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/**
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******************************************************************************
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* @file stm32f10x_usart.c
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* @author MCD Application Team
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* @version V3.5.0
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* @date 11-March-2011
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* @brief This file provides all the USART firmware functions.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_usart.h"
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#include "stm32f10x_rcc.h"
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/** @addtogroup STM32F10x_StdPeriph_Driver
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* @{
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*/
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/** @defgroup USART
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* @brief USART driver modules
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* @{
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*/
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/** @defgroup USART_Private_TypesDefinitions
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup USART_Private_Defines
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* @{
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*/
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#define CR1_UE_Set ((uint16_t)0x2000) /*!< USART Enable Mask */
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#define CR1_UE_Reset ((uint16_t)0xDFFF) /*!< USART Disable Mask */
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#define CR1_WAKE_Mask ((uint16_t)0xF7FF) /*!< USART WakeUp Method Mask */
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#define CR1_RWU_Set ((uint16_t)0x0002) /*!< USART mute mode Enable Mask */
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#define CR1_RWU_Reset ((uint16_t)0xFFFD) /*!< USART mute mode Enable Mask */
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#define CR1_SBK_Set ((uint16_t)0x0001) /*!< USART Break Character send Mask */
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#define CR1_CLEAR_Mask ((uint16_t)0xE9F3) /*!< USART CR1 Mask */
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#define CR2_Address_Mask ((uint16_t)0xFFF0) /*!< USART address Mask */
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#define CR2_LINEN_Set ((uint16_t)0x4000) /*!< USART LIN Enable Mask */
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#define CR2_LINEN_Reset ((uint16_t)0xBFFF) /*!< USART LIN Disable Mask */
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#define CR2_LBDL_Mask ((uint16_t)0xFFDF) /*!< USART LIN Break detection Mask */
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#define CR2_STOP_CLEAR_Mask ((uint16_t)0xCFFF) /*!< USART CR2 STOP Bits Mask */
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#define CR2_CLOCK_CLEAR_Mask ((uint16_t)0xF0FF) /*!< USART CR2 Clock Mask */
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#define CR3_SCEN_Set ((uint16_t)0x0020) /*!< USART SC Enable Mask */
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#define CR3_SCEN_Reset ((uint16_t)0xFFDF) /*!< USART SC Disable Mask */
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#define CR3_NACK_Set ((uint16_t)0x0010) /*!< USART SC NACK Enable Mask */
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#define CR3_NACK_Reset ((uint16_t)0xFFEF) /*!< USART SC NACK Disable Mask */
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#define CR3_HDSEL_Set ((uint16_t)0x0008) /*!< USART Half-Duplex Enable Mask */
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#define CR3_HDSEL_Reset ((uint16_t)0xFFF7) /*!< USART Half-Duplex Disable Mask */
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#define CR3_IRLP_Mask ((uint16_t)0xFFFB) /*!< USART IrDA LowPower mode Mask */
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#define CR3_CLEAR_Mask ((uint16_t)0xFCFF) /*!< USART CR3 Mask */
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#define CR3_IREN_Set ((uint16_t)0x0002) /*!< USART IrDA Enable Mask */
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#define CR3_IREN_Reset ((uint16_t)0xFFFD) /*!< USART IrDA Disable Mask */
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#define GTPR_LSB_Mask ((uint16_t)0x00FF) /*!< Guard Time Register LSB Mask */
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#define GTPR_MSB_Mask ((uint16_t)0xFF00) /*!< Guard Time Register MSB Mask */
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#define IT_Mask ((uint16_t)0x001F) /*!< USART Interrupt Mask */
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/* USART OverSampling-8 Mask */
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#define CR1_OVER8_Set ((u16)0x8000) /* USART OVER8 mode Enable Mask */
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#define CR1_OVER8_Reset ((u16)0x7FFF) /* USART OVER8 mode Disable Mask */
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/* USART One Bit Sampling Mask */
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#define CR3_ONEBITE_Set ((u16)0x0800) /* USART ONEBITE mode Enable Mask */
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#define CR3_ONEBITE_Reset ((u16)0xF7FF) /* USART ONEBITE mode Disable Mask */
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/**
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* @}
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*/
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/** @defgroup USART_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup USART_Private_Variables
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup USART_Private_FunctionPrototypes
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup USART_Private_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the USARTx peripheral registers to their default reset values.
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* @param USARTx: Select the USART or the UART peripheral.
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* This parameter can be one of the following values:
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* USART1, USART2, USART3, UART4 or UART5.
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* @retval None
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*/
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void USART_DeInit(USART_TypeDef* USARTx)
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{
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/* Check the parameters */
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assert_param(IS_USART_ALL_PERIPH(USARTx));
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if (USARTx == USART1)
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_USART1, DISABLE);
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}
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else if (USARTx == USART2)
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART2, DISABLE);
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}
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else if (USARTx == USART3)
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_USART3, DISABLE);
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}
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else if (USARTx == UART4)
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE);
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}
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else
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{
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if (USARTx == UART5)
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE);
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE);
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}
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}
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}
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/**
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* @brief Initializes the USARTx peripheral according to the specified
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* parameters in the USART_InitStruct .
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* @param USARTx: Select the USART or the UART peripheral.
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* This parameter can be one of the following values:
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* USART1, USART2, USART3, UART4 or UART5.
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* @param USART_InitStruct: pointer to a USART_InitTypeDef structure
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* that contains the configuration information for the specified USART
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* peripheral.
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* @retval None
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*/
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void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
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{
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uint32_t tmpreg = 0x00, apbclock = 0x00;
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uint32_t integerdivider = 0x00;
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uint32_t fractionaldivider = 0x00;
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uint32_t usartxbase = 0;
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182
|
RCC_ClocksTypeDef RCC_ClocksStatus;
|
| Sergunb |
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|
183
|
/* Check the parameters */
|
| Sergunb |
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|
184
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
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|
185
|
assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
|
| Sergunb |
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|
186
|
assert_param(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength));
|
| Sergunb |
0:f1834a63f7c1
|
187
|
assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits));
|
| Sergunb |
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|
188
|
assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity));
|
| Sergunb |
0:f1834a63f7c1
|
189
|
assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode));
|
| Sergunb |
0:f1834a63f7c1
|
190
|
assert_param(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl));
|
| Sergunb |
0:f1834a63f7c1
|
191
|
/* The hardware flow control is available only for USART1, USART2 and USART3 */
|
| Sergunb |
0:f1834a63f7c1
|
192
|
if (USART_InitStruct->USART_HardwareFlowControl != USART_HardwareFlowControl_None)
|
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0:f1834a63f7c1
|
193
|
{
|
| Sergunb |
0:f1834a63f7c1
|
194
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
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0:f1834a63f7c1
|
195
|
}
|
| Sergunb |
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|
196
|
|
| Sergunb |
0:f1834a63f7c1
|
197
|
usartxbase = (uint32_t)USARTx;
|
| Sergunb |
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|
198
|
|
| Sergunb |
0:f1834a63f7c1
|
199
|
/*---------------------------- USART CR2 Configuration -----------------------*/
|
| Sergunb |
0:f1834a63f7c1
|
200
|
tmpreg = USARTx->CR2;
|
| Sergunb |
0:f1834a63f7c1
|
201
|
/* Clear STOP[13:12] bits */
|
| Sergunb |
0:f1834a63f7c1
|
202
|
tmpreg &= CR2_STOP_CLEAR_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
203
|
/* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/
|
| Sergunb |
0:f1834a63f7c1
|
204
|
/* Set STOP[13:12] bits according to USART_StopBits value */
|
| Sergunb |
0:f1834a63f7c1
|
205
|
tmpreg |= (uint32_t)USART_InitStruct->USART_StopBits;
|
| Sergunb |
0:f1834a63f7c1
|
206
|
|
| Sergunb |
0:f1834a63f7c1
|
207
|
/* Write to USART CR2 */
|
| Sergunb |
0:f1834a63f7c1
|
208
|
USARTx->CR2 = (uint16_t)tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
209
|
|
| Sergunb |
0:f1834a63f7c1
|
210
|
/*---------------------------- USART CR1 Configuration -----------------------*/
|
| Sergunb |
0:f1834a63f7c1
|
211
|
tmpreg = USARTx->CR1;
|
| Sergunb |
0:f1834a63f7c1
|
212
|
/* Clear M, PCE, PS, TE and RE bits */
|
| Sergunb |
0:f1834a63f7c1
|
213
|
tmpreg &= CR1_CLEAR_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
214
|
/* Configure the USART Word Length, Parity and mode ----------------------- */
|
| Sergunb |
0:f1834a63f7c1
|
215
|
/* Set the M bits according to USART_WordLength value */
|
| Sergunb |
0:f1834a63f7c1
|
216
|
/* Set PCE and PS bits according to USART_Parity value */
|
| Sergunb |
0:f1834a63f7c1
|
217
|
/* Set TE and RE bits according to USART_Mode value */
|
| Sergunb |
0:f1834a63f7c1
|
218
|
tmpreg |= (uint32_t)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity |
|
| Sergunb |
0:f1834a63f7c1
|
219
|
USART_InitStruct->USART_Mode;
|
| Sergunb |
0:f1834a63f7c1
|
220
|
/* Write to USART CR1 */
|
| Sergunb |
0:f1834a63f7c1
|
221
|
USARTx->CR1 = (uint16_t)tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
222
|
|
| Sergunb |
0:f1834a63f7c1
|
223
|
/*---------------------------- USART CR3 Configuration -----------------------*/
|
| Sergunb |
0:f1834a63f7c1
|
224
|
tmpreg = USARTx->CR3;
|
| Sergunb |
0:f1834a63f7c1
|
225
|
/* Clear CTSE and RTSE bits */
|
| Sergunb |
0:f1834a63f7c1
|
226
|
tmpreg &= CR3_CLEAR_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
227
|
/* Configure the USART HFC -------------------------------------------------*/
|
| Sergunb |
0:f1834a63f7c1
|
228
|
/* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */
|
| Sergunb |
0:f1834a63f7c1
|
229
|
tmpreg |= USART_InitStruct->USART_HardwareFlowControl;
|
| Sergunb |
0:f1834a63f7c1
|
230
|
/* Write to USART CR3 */
|
| Sergunb |
0:f1834a63f7c1
|
231
|
USARTx->CR3 = (uint16_t)tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
232
|
|
| Sergunb |
0:f1834a63f7c1
|
233
|
/*---------------------------- USART BRR Configuration -----------------------*/
|
| Sergunb |
0:f1834a63f7c1
|
234
|
/* Configure the USART Baud Rate -------------------------------------------*/
|
| Sergunb |
0:f1834a63f7c1
|
235
|
RCC_GetClocksFreq(&RCC_ClocksStatus);
|
| Sergunb |
0:f1834a63f7c1
|
236
|
if (usartxbase == USART1_BASE)
|
| Sergunb |
0:f1834a63f7c1
|
237
|
{
|
| Sergunb |
0:f1834a63f7c1
|
238
|
apbclock = RCC_ClocksStatus.PCLK2_Frequency;
|
| Sergunb |
0:f1834a63f7c1
|
239
|
}
|
| Sergunb |
0:f1834a63f7c1
|
240
|
else
|
| Sergunb |
0:f1834a63f7c1
|
241
|
{
|
| Sergunb |
0:f1834a63f7c1
|
242
|
apbclock = RCC_ClocksStatus.PCLK1_Frequency;
|
| Sergunb |
0:f1834a63f7c1
|
243
|
}
|
| Sergunb |
0:f1834a63f7c1
|
244
|
|
| Sergunb |
0:f1834a63f7c1
|
245
|
/* Determine the integer part */
|
| Sergunb |
0:f1834a63f7c1
|
246
|
if ((USARTx->CR1 & CR1_OVER8_Set) != 0)
|
| Sergunb |
0:f1834a63f7c1
|
247
|
{
|
| Sergunb |
0:f1834a63f7c1
|
248
|
/* Integer part computing in case Oversampling mode is 8 Samples */
|
| Sergunb |
0:f1834a63f7c1
|
249
|
integerdivider = ((25 * apbclock) / (2 * (USART_InitStruct->USART_BaudRate)));
|
| Sergunb |
0:f1834a63f7c1
|
250
|
}
|
| Sergunb |
0:f1834a63f7c1
|
251
|
else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
|
| Sergunb |
0:f1834a63f7c1
|
252
|
{
|
| Sergunb |
0:f1834a63f7c1
|
253
|
/* Integer part computing in case Oversampling mode is 16 Samples */
|
| Sergunb |
0:f1834a63f7c1
|
254
|
integerdivider = ((25 * apbclock) / (4 * (USART_InitStruct->USART_BaudRate)));
|
| Sergunb |
0:f1834a63f7c1
|
255
|
}
|
| Sergunb |
0:f1834a63f7c1
|
256
|
tmpreg = (integerdivider / 100) << 4;
|
| Sergunb |
0:f1834a63f7c1
|
257
|
|
| Sergunb |
0:f1834a63f7c1
|
258
|
/* Determine the fractional part */
|
| Sergunb |
0:f1834a63f7c1
|
259
|
fractionaldivider = integerdivider - (100 * (tmpreg >> 4));
|
| Sergunb |
0:f1834a63f7c1
|
260
|
|
| Sergunb |
0:f1834a63f7c1
|
261
|
/* Implement the fractional part in the register */
|
| Sergunb |
0:f1834a63f7c1
|
262
|
if ((USARTx->CR1 & CR1_OVER8_Set) != 0)
|
| Sergunb |
0:f1834a63f7c1
|
263
|
{
|
| Sergunb |
0:f1834a63f7c1
|
264
|
tmpreg |= ((((fractionaldivider * 8) + 50) / 100)) & ((uint8_t)0x07);
|
| Sergunb |
0:f1834a63f7c1
|
265
|
}
|
| Sergunb |
0:f1834a63f7c1
|
266
|
else /* if ((USARTx->CR1 & CR1_OVER8_Set) == 0) */
|
| Sergunb |
0:f1834a63f7c1
|
267
|
{
|
| Sergunb |
0:f1834a63f7c1
|
268
|
tmpreg |= ((((fractionaldivider * 16) + 50) / 100)) & ((uint8_t)0x0F);
|
| Sergunb |
0:f1834a63f7c1
|
269
|
}
|
| Sergunb |
0:f1834a63f7c1
|
270
|
|
| Sergunb |
0:f1834a63f7c1
|
271
|
/* Write to USART BRR */
|
| Sergunb |
0:f1834a63f7c1
|
272
|
USARTx->BRR = (uint16_t)tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
273
|
}
|
| Sergunb |
0:f1834a63f7c1
|
274
|
|
| Sergunb |
0:f1834a63f7c1
|
275
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
276
|
* @brief Fills each USART_InitStruct member with its default value.
|
| Sergunb |
0:f1834a63f7c1
|
277
|
* @param USART_InitStruct: pointer to a USART_InitTypeDef structure
|
| Sergunb |
0:f1834a63f7c1
|
278
|
* which will be initialized.
|
| Sergunb |
0:f1834a63f7c1
|
279
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
280
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
281
|
void USART_StructInit(USART_InitTypeDef* USART_InitStruct)
|
| Sergunb |
0:f1834a63f7c1
|
282
|
{
|
| Sergunb |
0:f1834a63f7c1
|
283
|
/* USART_InitStruct members default value */
|
| Sergunb |
0:f1834a63f7c1
|
284
|
USART_InitStruct->USART_BaudRate = 9600;
|
| Sergunb |
0:f1834a63f7c1
|
285
|
USART_InitStruct->USART_WordLength = USART_WordLength_8b;
|
| Sergunb |
0:f1834a63f7c1
|
286
|
USART_InitStruct->USART_StopBits = USART_StopBits_1;
|
| Sergunb |
0:f1834a63f7c1
|
287
|
USART_InitStruct->USART_Parity = USART_Parity_No ;
|
| Sergunb |
0:f1834a63f7c1
|
288
|
USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
| Sergunb |
0:f1834a63f7c1
|
289
|
USART_InitStruct->USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
| Sergunb |
0:f1834a63f7c1
|
290
|
}
|
| Sergunb |
0:f1834a63f7c1
|
291
|
|
| Sergunb |
0:f1834a63f7c1
|
292
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
293
|
* @brief Initializes the USARTx peripheral Clock according to the
|
| Sergunb |
0:f1834a63f7c1
|
294
|
* specified parameters in the USART_ClockInitStruct .
|
| Sergunb |
0:f1834a63f7c1
|
295
|
* @param USARTx: where x can be 1, 2, 3 to select the USART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
296
|
* @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef
|
| Sergunb |
0:f1834a63f7c1
|
297
|
* structure that contains the configuration information for the specified
|
| Sergunb |
0:f1834a63f7c1
|
298
|
* USART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
299
|
* @note The Smart Card and Synchronous modes are not available for UART4 and UART5.
|
| Sergunb |
0:f1834a63f7c1
|
300
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
301
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
302
|
void USART_ClockInit(USART_TypeDef* USARTx, USART_ClockInitTypeDef* USART_ClockInitStruct)
|
| Sergunb |
0:f1834a63f7c1
|
303
|
{
|
| Sergunb |
0:f1834a63f7c1
|
304
|
uint32_t tmpreg = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
305
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
306
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
307
|
assert_param(IS_USART_CLOCK(USART_ClockInitStruct->USART_Clock));
|
| Sergunb |
0:f1834a63f7c1
|
308
|
assert_param(IS_USART_CPOL(USART_ClockInitStruct->USART_CPOL));
|
| Sergunb |
0:f1834a63f7c1
|
309
|
assert_param(IS_USART_CPHA(USART_ClockInitStruct->USART_CPHA));
|
| Sergunb |
0:f1834a63f7c1
|
310
|
assert_param(IS_USART_LASTBIT(USART_ClockInitStruct->USART_LastBit));
|
| Sergunb |
0:f1834a63f7c1
|
311
|
|
| Sergunb |
0:f1834a63f7c1
|
312
|
/*---------------------------- USART CR2 Configuration -----------------------*/
|
| Sergunb |
0:f1834a63f7c1
|
313
|
tmpreg = USARTx->CR2;
|
| Sergunb |
0:f1834a63f7c1
|
314
|
/* Clear CLKEN, CPOL, CPHA and LBCL bits */
|
| Sergunb |
0:f1834a63f7c1
|
315
|
tmpreg &= CR2_CLOCK_CLEAR_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
316
|
/* Configure the USART Clock, CPOL, CPHA and LastBit ------------*/
|
| Sergunb |
0:f1834a63f7c1
|
317
|
/* Set CLKEN bit according to USART_Clock value */
|
| Sergunb |
0:f1834a63f7c1
|
318
|
/* Set CPOL bit according to USART_CPOL value */
|
| Sergunb |
0:f1834a63f7c1
|
319
|
/* Set CPHA bit according to USART_CPHA value */
|
| Sergunb |
0:f1834a63f7c1
|
320
|
/* Set LBCL bit according to USART_LastBit value */
|
| Sergunb |
0:f1834a63f7c1
|
321
|
tmpreg |= (uint32_t)USART_ClockInitStruct->USART_Clock | USART_ClockInitStruct->USART_CPOL |
|
| Sergunb |
0:f1834a63f7c1
|
322
|
USART_ClockInitStruct->USART_CPHA | USART_ClockInitStruct->USART_LastBit;
|
| Sergunb |
0:f1834a63f7c1
|
323
|
/* Write to USART CR2 */
|
| Sergunb |
0:f1834a63f7c1
|
324
|
USARTx->CR2 = (uint16_t)tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
325
|
}
|
| Sergunb |
0:f1834a63f7c1
|
326
|
|
| Sergunb |
0:f1834a63f7c1
|
327
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
328
|
* @brief Fills each USART_ClockInitStruct member with its default value.
|
| Sergunb |
0:f1834a63f7c1
|
329
|
* @param USART_ClockInitStruct: pointer to a USART_ClockInitTypeDef
|
| Sergunb |
0:f1834a63f7c1
|
330
|
* structure which will be initialized.
|
| Sergunb |
0:f1834a63f7c1
|
331
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
332
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
333
|
void USART_ClockStructInit(USART_ClockInitTypeDef* USART_ClockInitStruct)
|
| Sergunb |
0:f1834a63f7c1
|
334
|
{
|
| Sergunb |
0:f1834a63f7c1
|
335
|
/* USART_ClockInitStruct members default value */
|
| Sergunb |
0:f1834a63f7c1
|
336
|
USART_ClockInitStruct->USART_Clock = USART_Clock_Disable;
|
| Sergunb |
0:f1834a63f7c1
|
337
|
USART_ClockInitStruct->USART_CPOL = USART_CPOL_Low;
|
| Sergunb |
0:f1834a63f7c1
|
338
|
USART_ClockInitStruct->USART_CPHA = USART_CPHA_1Edge;
|
| Sergunb |
0:f1834a63f7c1
|
339
|
USART_ClockInitStruct->USART_LastBit = USART_LastBit_Disable;
|
| Sergunb |
0:f1834a63f7c1
|
340
|
}
|
| Sergunb |
0:f1834a63f7c1
|
341
|
|
| Sergunb |
0:f1834a63f7c1
|
342
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
343
|
* @brief Enables or disables the specified USART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
344
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
345
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
346
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
347
|
* @param NewState: new state of the USARTx peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
348
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
349
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
350
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
351
|
void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
352
|
{
|
| Sergunb |
0:f1834a63f7c1
|
353
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
354
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
355
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
356
|
|
| Sergunb |
0:f1834a63f7c1
|
357
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
358
|
{
|
| Sergunb |
0:f1834a63f7c1
|
359
|
/* Enable the selected USART by setting the UE bit in the CR1 register */
|
| Sergunb |
0:f1834a63f7c1
|
360
|
USARTx->CR1 |= CR1_UE_Set;
|
| Sergunb |
0:f1834a63f7c1
|
361
|
}
|
| Sergunb |
0:f1834a63f7c1
|
362
|
else
|
| Sergunb |
0:f1834a63f7c1
|
363
|
{
|
| Sergunb |
0:f1834a63f7c1
|
364
|
/* Disable the selected USART by clearing the UE bit in the CR1 register */
|
| Sergunb |
0:f1834a63f7c1
|
365
|
USARTx->CR1 &= CR1_UE_Reset;
|
| Sergunb |
0:f1834a63f7c1
|
366
|
}
|
| Sergunb |
0:f1834a63f7c1
|
367
|
}
|
| Sergunb |
0:f1834a63f7c1
|
368
|
|
| Sergunb |
0:f1834a63f7c1
|
369
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
370
|
* @brief Enables or disables the specified USART interrupts.
|
| Sergunb |
0:f1834a63f7c1
|
371
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
372
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
373
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
374
|
* @param USART_IT: specifies the USART interrupt sources to be enabled or disabled.
|
| Sergunb |
0:f1834a63f7c1
|
375
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
376
|
* @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
|
| Sergunb |
0:f1834a63f7c1
|
377
|
* @arg USART_IT_LBD: LIN Break detection interrupt
|
| Sergunb |
0:f1834a63f7c1
|
378
|
* @arg USART_IT_TXE: Transmit Data Register empty interrupt
|
| Sergunb |
0:f1834a63f7c1
|
379
|
* @arg USART_IT_TC: Transmission complete interrupt
|
| Sergunb |
0:f1834a63f7c1
|
380
|
* @arg USART_IT_RXNE: Receive Data register not empty interrupt
|
| Sergunb |
0:f1834a63f7c1
|
381
|
* @arg USART_IT_IDLE: Idle line detection interrupt
|
| Sergunb |
0:f1834a63f7c1
|
382
|
* @arg USART_IT_PE: Parity Error interrupt
|
| Sergunb |
0:f1834a63f7c1
|
383
|
* @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
|
| Sergunb |
0:f1834a63f7c1
|
384
|
* @param NewState: new state of the specified USARTx interrupts.
|
| Sergunb |
0:f1834a63f7c1
|
385
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
386
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
387
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
388
|
void USART_ITConfig(USART_TypeDef* USARTx, uint16_t USART_IT, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
389
|
{
|
| Sergunb |
0:f1834a63f7c1
|
390
|
uint32_t usartreg = 0x00, itpos = 0x00, itmask = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
391
|
uint32_t usartxbase = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
392
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
393
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
394
|
assert_param(IS_USART_CONFIG_IT(USART_IT));
|
| Sergunb |
0:f1834a63f7c1
|
395
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
396
|
/* The CTS interrupt is not available for UART4 and UART5 */
|
| Sergunb |
0:f1834a63f7c1
|
397
|
if (USART_IT == USART_IT_CTS)
|
| Sergunb |
0:f1834a63f7c1
|
398
|
{
|
| Sergunb |
0:f1834a63f7c1
|
399
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
400
|
}
|
| Sergunb |
0:f1834a63f7c1
|
401
|
|
| Sergunb |
0:f1834a63f7c1
|
402
|
usartxbase = (uint32_t)USARTx;
|
| Sergunb |
0:f1834a63f7c1
|
403
|
|
| Sergunb |
0:f1834a63f7c1
|
404
|
/* Get the USART register index */
|
| Sergunb |
0:f1834a63f7c1
|
405
|
usartreg = (((uint8_t)USART_IT) >> 0x05);
|
| Sergunb |
0:f1834a63f7c1
|
406
|
|
| Sergunb |
0:f1834a63f7c1
|
407
|
/* Get the interrupt position */
|
| Sergunb |
0:f1834a63f7c1
|
408
|
itpos = USART_IT & IT_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
409
|
itmask = (((uint32_t)0x01) << itpos);
|
| Sergunb |
0:f1834a63f7c1
|
410
|
|
| Sergunb |
0:f1834a63f7c1
|
411
|
if (usartreg == 0x01) /* The IT is in CR1 register */
|
| Sergunb |
0:f1834a63f7c1
|
412
|
{
|
| Sergunb |
0:f1834a63f7c1
|
413
|
usartxbase += 0x0C;
|
| Sergunb |
0:f1834a63f7c1
|
414
|
}
|
| Sergunb |
0:f1834a63f7c1
|
415
|
else if (usartreg == 0x02) /* The IT is in CR2 register */
|
| Sergunb |
0:f1834a63f7c1
|
416
|
{
|
| Sergunb |
0:f1834a63f7c1
|
417
|
usartxbase += 0x10;
|
| Sergunb |
0:f1834a63f7c1
|
418
|
}
|
| Sergunb |
0:f1834a63f7c1
|
419
|
else /* The IT is in CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
420
|
{
|
| Sergunb |
0:f1834a63f7c1
|
421
|
usartxbase += 0x14;
|
| Sergunb |
0:f1834a63f7c1
|
422
|
}
|
| Sergunb |
0:f1834a63f7c1
|
423
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
424
|
{
|
| Sergunb |
0:f1834a63f7c1
|
425
|
*(__IO uint32_t*)usartxbase |= itmask;
|
| Sergunb |
0:f1834a63f7c1
|
426
|
}
|
| Sergunb |
0:f1834a63f7c1
|
427
|
else
|
| Sergunb |
0:f1834a63f7c1
|
428
|
{
|
| Sergunb |
0:f1834a63f7c1
|
429
|
*(__IO uint32_t*)usartxbase &= ~itmask;
|
| Sergunb |
0:f1834a63f7c1
|
430
|
}
|
| Sergunb |
0:f1834a63f7c1
|
431
|
}
|
| Sergunb |
0:f1834a63f7c1
|
432
|
|
| Sergunb |
0:f1834a63f7c1
|
433
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
434
|
* @brief Enables or disables the USARTs DMA interface.
|
| Sergunb |
0:f1834a63f7c1
|
435
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
436
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
437
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
438
|
* @param USART_DMAReq: specifies the DMA request.
|
| Sergunb |
0:f1834a63f7c1
|
439
|
* This parameter can be any combination of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
440
|
* @arg USART_DMAReq_Tx: USART DMA transmit request
|
| Sergunb |
0:f1834a63f7c1
|
441
|
* @arg USART_DMAReq_Rx: USART DMA receive request
|
| Sergunb |
0:f1834a63f7c1
|
442
|
* @param NewState: new state of the DMA Request sources.
|
| Sergunb |
0:f1834a63f7c1
|
443
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
444
|
* @note The DMA mode is not available for UART5 except in the STM32
|
| Sergunb |
0:f1834a63f7c1
|
445
|
* High density value line devices(STM32F10X_HD_VL).
|
| Sergunb |
0:f1834a63f7c1
|
446
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
447
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
448
|
void USART_DMACmd(USART_TypeDef* USARTx, uint16_t USART_DMAReq, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
449
|
{
|
| Sergunb |
0:f1834a63f7c1
|
450
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
451
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
452
|
assert_param(IS_USART_DMAREQ(USART_DMAReq));
|
| Sergunb |
0:f1834a63f7c1
|
453
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
454
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
455
|
{
|
| Sergunb |
0:f1834a63f7c1
|
456
|
/* Enable the DMA transfer for selected requests by setting the DMAT and/or
|
| Sergunb |
0:f1834a63f7c1
|
457
|
DMAR bits in the USART CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
458
|
USARTx->CR3 |= USART_DMAReq;
|
| Sergunb |
0:f1834a63f7c1
|
459
|
}
|
| Sergunb |
0:f1834a63f7c1
|
460
|
else
|
| Sergunb |
0:f1834a63f7c1
|
461
|
{
|
| Sergunb |
0:f1834a63f7c1
|
462
|
/* Disable the DMA transfer for selected requests by clearing the DMAT and/or
|
| Sergunb |
0:f1834a63f7c1
|
463
|
DMAR bits in the USART CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
464
|
USARTx->CR3 &= (uint16_t)~USART_DMAReq;
|
| Sergunb |
0:f1834a63f7c1
|
465
|
}
|
| Sergunb |
0:f1834a63f7c1
|
466
|
}
|
| Sergunb |
0:f1834a63f7c1
|
467
|
|
| Sergunb |
0:f1834a63f7c1
|
468
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
469
|
* @brief Sets the address of the USART node.
|
| Sergunb |
0:f1834a63f7c1
|
470
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
471
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
472
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
473
|
* @param USART_Address: Indicates the address of the USART node.
|
| Sergunb |
0:f1834a63f7c1
|
474
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
475
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
476
|
void USART_SetAddress(USART_TypeDef* USARTx, uint8_t USART_Address)
|
| Sergunb |
0:f1834a63f7c1
|
477
|
{
|
| Sergunb |
0:f1834a63f7c1
|
478
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
479
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
480
|
assert_param(IS_USART_ADDRESS(USART_Address));
|
| Sergunb |
0:f1834a63f7c1
|
481
|
|
| Sergunb |
0:f1834a63f7c1
|
482
|
/* Clear the USART address */
|
| Sergunb |
0:f1834a63f7c1
|
483
|
USARTx->CR2 &= CR2_Address_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
484
|
/* Set the USART address node */
|
| Sergunb |
0:f1834a63f7c1
|
485
|
USARTx->CR2 |= USART_Address;
|
| Sergunb |
0:f1834a63f7c1
|
486
|
}
|
| Sergunb |
0:f1834a63f7c1
|
487
|
|
| Sergunb |
0:f1834a63f7c1
|
488
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
489
|
* @brief Selects the USART WakeUp method.
|
| Sergunb |
0:f1834a63f7c1
|
490
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
491
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
492
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
493
|
* @param USART_WakeUp: specifies the USART wakeup method.
|
| Sergunb |
0:f1834a63f7c1
|
494
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
495
|
* @arg USART_WakeUp_IdleLine: WakeUp by an idle line detection
|
| Sergunb |
0:f1834a63f7c1
|
496
|
* @arg USART_WakeUp_AddressMark: WakeUp by an address mark
|
| Sergunb |
0:f1834a63f7c1
|
497
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
498
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
499
|
void USART_WakeUpConfig(USART_TypeDef* USARTx, uint16_t USART_WakeUp)
|
| Sergunb |
0:f1834a63f7c1
|
500
|
{
|
| Sergunb |
0:f1834a63f7c1
|
501
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
502
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
503
|
assert_param(IS_USART_WAKEUP(USART_WakeUp));
|
| Sergunb |
0:f1834a63f7c1
|
504
|
|
| Sergunb |
0:f1834a63f7c1
|
505
|
USARTx->CR1 &= CR1_WAKE_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
506
|
USARTx->CR1 |= USART_WakeUp;
|
| Sergunb |
0:f1834a63f7c1
|
507
|
}
|
| Sergunb |
0:f1834a63f7c1
|
508
|
|
| Sergunb |
0:f1834a63f7c1
|
509
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
510
|
* @brief Determines if the USART is in mute mode or not.
|
| Sergunb |
0:f1834a63f7c1
|
511
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
512
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
513
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
514
|
* @param NewState: new state of the USART mute mode.
|
| Sergunb |
0:f1834a63f7c1
|
515
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
516
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
517
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
518
|
void USART_ReceiverWakeUpCmd(USART_TypeDef* USARTx, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
519
|
{
|
| Sergunb |
0:f1834a63f7c1
|
520
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
521
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
522
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
523
|
|
| Sergunb |
0:f1834a63f7c1
|
524
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
525
|
{
|
| Sergunb |
0:f1834a63f7c1
|
526
|
/* Enable the USART mute mode by setting the RWU bit in the CR1 register */
|
| Sergunb |
0:f1834a63f7c1
|
527
|
USARTx->CR1 |= CR1_RWU_Set;
|
| Sergunb |
0:f1834a63f7c1
|
528
|
}
|
| Sergunb |
0:f1834a63f7c1
|
529
|
else
|
| Sergunb |
0:f1834a63f7c1
|
530
|
{
|
| Sergunb |
0:f1834a63f7c1
|
531
|
/* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
|
| Sergunb |
0:f1834a63f7c1
|
532
|
USARTx->CR1 &= CR1_RWU_Reset;
|
| Sergunb |
0:f1834a63f7c1
|
533
|
}
|
| Sergunb |
0:f1834a63f7c1
|
534
|
}
|
| Sergunb |
0:f1834a63f7c1
|
535
|
|
| Sergunb |
0:f1834a63f7c1
|
536
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
537
|
* @brief Sets the USART LIN Break detection length.
|
| Sergunb |
0:f1834a63f7c1
|
538
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
539
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
540
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
541
|
* @param USART_LINBreakDetectLength: specifies the LIN break detection length.
|
| Sergunb |
0:f1834a63f7c1
|
542
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
543
|
* @arg USART_LINBreakDetectLength_10b: 10-bit break detection
|
| Sergunb |
0:f1834a63f7c1
|
544
|
* @arg USART_LINBreakDetectLength_11b: 11-bit break detection
|
| Sergunb |
0:f1834a63f7c1
|
545
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
546
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
547
|
void USART_LINBreakDetectLengthConfig(USART_TypeDef* USARTx, uint16_t USART_LINBreakDetectLength)
|
| Sergunb |
0:f1834a63f7c1
|
548
|
{
|
| Sergunb |
0:f1834a63f7c1
|
549
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
550
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
551
|
assert_param(IS_USART_LIN_BREAK_DETECT_LENGTH(USART_LINBreakDetectLength));
|
| Sergunb |
0:f1834a63f7c1
|
552
|
|
| Sergunb |
0:f1834a63f7c1
|
553
|
USARTx->CR2 &= CR2_LBDL_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
554
|
USARTx->CR2 |= USART_LINBreakDetectLength;
|
| Sergunb |
0:f1834a63f7c1
|
555
|
}
|
| Sergunb |
0:f1834a63f7c1
|
556
|
|
| Sergunb |
0:f1834a63f7c1
|
557
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
558
|
* @brief Enables or disables the USARTs LIN mode.
|
| Sergunb |
0:f1834a63f7c1
|
559
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
560
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
561
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
562
|
* @param NewState: new state of the USART LIN mode.
|
| Sergunb |
0:f1834a63f7c1
|
563
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
564
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
565
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
566
|
void USART_LINCmd(USART_TypeDef* USARTx, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
567
|
{
|
| Sergunb |
0:f1834a63f7c1
|
568
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
569
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
570
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
571
|
|
| Sergunb |
0:f1834a63f7c1
|
572
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
573
|
{
|
| Sergunb |
0:f1834a63f7c1
|
574
|
/* Enable the LIN mode by setting the LINEN bit in the CR2 register */
|
| Sergunb |
0:f1834a63f7c1
|
575
|
USARTx->CR2 |= CR2_LINEN_Set;
|
| Sergunb |
0:f1834a63f7c1
|
576
|
}
|
| Sergunb |
0:f1834a63f7c1
|
577
|
else
|
| Sergunb |
0:f1834a63f7c1
|
578
|
{
|
| Sergunb |
0:f1834a63f7c1
|
579
|
/* Disable the LIN mode by clearing the LINEN bit in the CR2 register */
|
| Sergunb |
0:f1834a63f7c1
|
580
|
USARTx->CR2 &= CR2_LINEN_Reset;
|
| Sergunb |
0:f1834a63f7c1
|
581
|
}
|
| Sergunb |
0:f1834a63f7c1
|
582
|
}
|
| Sergunb |
0:f1834a63f7c1
|
583
|
|
| Sergunb |
0:f1834a63f7c1
|
584
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
585
|
* @brief Transmits single data through the USARTx peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
586
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
587
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
588
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
589
|
* @param Data: the data to transmit.
|
| Sergunb |
0:f1834a63f7c1
|
590
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
591
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
592
|
void USART_SendData(USART_TypeDef* USARTx, uint16_t Data)
|
| Sergunb |
0:f1834a63f7c1
|
593
|
{
|
| Sergunb |
0:f1834a63f7c1
|
594
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
595
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
596
|
assert_param(IS_USART_DATA(Data));
|
| Sergunb |
0:f1834a63f7c1
|
597
|
|
| Sergunb |
0:f1834a63f7c1
|
598
|
/* Transmit Data */
|
| Sergunb |
0:f1834a63f7c1
|
599
|
USARTx->DR = (Data & (uint16_t)0x01FF);
|
| Sergunb |
0:f1834a63f7c1
|
600
|
}
|
| Sergunb |
0:f1834a63f7c1
|
601
|
|
| Sergunb |
0:f1834a63f7c1
|
602
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
603
|
* @brief Returns the most recent received data by the USARTx peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
604
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
605
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
606
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
607
|
* @retval The received data.
|
| Sergunb |
0:f1834a63f7c1
|
608
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
609
|
uint16_t USART_ReceiveData(USART_TypeDef* USARTx)
|
| Sergunb |
0:f1834a63f7c1
|
610
|
{
|
| Sergunb |
0:f1834a63f7c1
|
611
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
612
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
613
|
|
| Sergunb |
0:f1834a63f7c1
|
614
|
/* Receive Data */
|
| Sergunb |
0:f1834a63f7c1
|
615
|
return (uint16_t)(USARTx->DR & (uint16_t)0x01FF);
|
| Sergunb |
0:f1834a63f7c1
|
616
|
}
|
| Sergunb |
0:f1834a63f7c1
|
617
|
|
| Sergunb |
0:f1834a63f7c1
|
618
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
619
|
* @brief Transmits break characters.
|
| Sergunb |
0:f1834a63f7c1
|
620
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
621
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
622
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
623
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
624
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
625
|
void USART_SendBreak(USART_TypeDef* USARTx)
|
| Sergunb |
0:f1834a63f7c1
|
626
|
{
|
| Sergunb |
0:f1834a63f7c1
|
627
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
628
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
629
|
|
| Sergunb |
0:f1834a63f7c1
|
630
|
/* Send break characters */
|
| Sergunb |
0:f1834a63f7c1
|
631
|
USARTx->CR1 |= CR1_SBK_Set;
|
| Sergunb |
0:f1834a63f7c1
|
632
|
}
|
| Sergunb |
0:f1834a63f7c1
|
633
|
|
| Sergunb |
0:f1834a63f7c1
|
634
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
635
|
* @brief Sets the specified USART guard time.
|
| Sergunb |
0:f1834a63f7c1
|
636
|
* @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
637
|
* @param USART_GuardTime: specifies the guard time.
|
| Sergunb |
0:f1834a63f7c1
|
638
|
* @note The guard time bits are not available for UART4 and UART5.
|
| Sergunb |
0:f1834a63f7c1
|
639
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
640
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
641
|
void USART_SetGuardTime(USART_TypeDef* USARTx, uint8_t USART_GuardTime)
|
| Sergunb |
0:f1834a63f7c1
|
642
|
{
|
| Sergunb |
0:f1834a63f7c1
|
643
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
644
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
645
|
|
| Sergunb |
0:f1834a63f7c1
|
646
|
/* Clear the USART Guard time */
|
| Sergunb |
0:f1834a63f7c1
|
647
|
USARTx->GTPR &= GTPR_LSB_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
648
|
/* Set the USART guard time */
|
| Sergunb |
0:f1834a63f7c1
|
649
|
USARTx->GTPR |= (uint16_t)((uint16_t)USART_GuardTime << 0x08);
|
| Sergunb |
0:f1834a63f7c1
|
650
|
}
|
| Sergunb |
0:f1834a63f7c1
|
651
|
|
| Sergunb |
0:f1834a63f7c1
|
652
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
653
|
* @brief Sets the system clock prescaler.
|
| Sergunb |
0:f1834a63f7c1
|
654
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
655
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
656
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
657
|
* @param USART_Prescaler: specifies the prescaler clock.
|
| Sergunb |
0:f1834a63f7c1
|
658
|
* @note The function is used for IrDA mode with UART4 and UART5.
|
| Sergunb |
0:f1834a63f7c1
|
659
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
660
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
661
|
void USART_SetPrescaler(USART_TypeDef* USARTx, uint8_t USART_Prescaler)
|
| Sergunb |
0:f1834a63f7c1
|
662
|
{
|
| Sergunb |
0:f1834a63f7c1
|
663
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
664
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
665
|
|
| Sergunb |
0:f1834a63f7c1
|
666
|
/* Clear the USART prescaler */
|
| Sergunb |
0:f1834a63f7c1
|
667
|
USARTx->GTPR &= GTPR_MSB_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
668
|
/* Set the USART prescaler */
|
| Sergunb |
0:f1834a63f7c1
|
669
|
USARTx->GTPR |= USART_Prescaler;
|
| Sergunb |
0:f1834a63f7c1
|
670
|
}
|
| Sergunb |
0:f1834a63f7c1
|
671
|
|
| Sergunb |
0:f1834a63f7c1
|
672
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
673
|
* @brief Enables or disables the USARTs Smart Card mode.
|
| Sergunb |
0:f1834a63f7c1
|
674
|
* @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
675
|
* @param NewState: new state of the Smart Card mode.
|
| Sergunb |
0:f1834a63f7c1
|
676
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
677
|
* @note The Smart Card mode is not available for UART4 and UART5.
|
| Sergunb |
0:f1834a63f7c1
|
678
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
679
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
680
|
void USART_SmartCardCmd(USART_TypeDef* USARTx, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
681
|
{
|
| Sergunb |
0:f1834a63f7c1
|
682
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
683
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
684
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
685
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
686
|
{
|
| Sergunb |
0:f1834a63f7c1
|
687
|
/* Enable the SC mode by setting the SCEN bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
688
|
USARTx->CR3 |= CR3_SCEN_Set;
|
| Sergunb |
0:f1834a63f7c1
|
689
|
}
|
| Sergunb |
0:f1834a63f7c1
|
690
|
else
|
| Sergunb |
0:f1834a63f7c1
|
691
|
{
|
| Sergunb |
0:f1834a63f7c1
|
692
|
/* Disable the SC mode by clearing the SCEN bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
693
|
USARTx->CR3 &= CR3_SCEN_Reset;
|
| Sergunb |
0:f1834a63f7c1
|
694
|
}
|
| Sergunb |
0:f1834a63f7c1
|
695
|
}
|
| Sergunb |
0:f1834a63f7c1
|
696
|
|
| Sergunb |
0:f1834a63f7c1
|
697
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
698
|
* @brief Enables or disables NACK transmission.
|
| Sergunb |
0:f1834a63f7c1
|
699
|
* @param USARTx: where x can be 1, 2 or 3 to select the USART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
700
|
* @param NewState: new state of the NACK transmission.
|
| Sergunb |
0:f1834a63f7c1
|
701
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
702
|
* @note The Smart Card mode is not available for UART4 and UART5.
|
| Sergunb |
0:f1834a63f7c1
|
703
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
704
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
705
|
void USART_SmartCardNACKCmd(USART_TypeDef* USARTx, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
706
|
{
|
| Sergunb |
0:f1834a63f7c1
|
707
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
708
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
709
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
710
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
711
|
{
|
| Sergunb |
0:f1834a63f7c1
|
712
|
/* Enable the NACK transmission by setting the NACK bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
713
|
USARTx->CR3 |= CR3_NACK_Set;
|
| Sergunb |
0:f1834a63f7c1
|
714
|
}
|
| Sergunb |
0:f1834a63f7c1
|
715
|
else
|
| Sergunb |
0:f1834a63f7c1
|
716
|
{
|
| Sergunb |
0:f1834a63f7c1
|
717
|
/* Disable the NACK transmission by clearing the NACK bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
718
|
USARTx->CR3 &= CR3_NACK_Reset;
|
| Sergunb |
0:f1834a63f7c1
|
719
|
}
|
| Sergunb |
0:f1834a63f7c1
|
720
|
}
|
| Sergunb |
0:f1834a63f7c1
|
721
|
|
| Sergunb |
0:f1834a63f7c1
|
722
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
723
|
* @brief Enables or disables the USARTs Half Duplex communication.
|
| Sergunb |
0:f1834a63f7c1
|
724
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
725
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
726
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
727
|
* @param NewState: new state of the USART Communication.
|
| Sergunb |
0:f1834a63f7c1
|
728
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
729
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
730
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
731
|
void USART_HalfDuplexCmd(USART_TypeDef* USARTx, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
732
|
{
|
| Sergunb |
0:f1834a63f7c1
|
733
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
734
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
735
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
736
|
|
| Sergunb |
0:f1834a63f7c1
|
737
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
738
|
{
|
| Sergunb |
0:f1834a63f7c1
|
739
|
/* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
740
|
USARTx->CR3 |= CR3_HDSEL_Set;
|
| Sergunb |
0:f1834a63f7c1
|
741
|
}
|
| Sergunb |
0:f1834a63f7c1
|
742
|
else
|
| Sergunb |
0:f1834a63f7c1
|
743
|
{
|
| Sergunb |
0:f1834a63f7c1
|
744
|
/* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
745
|
USARTx->CR3 &= CR3_HDSEL_Reset;
|
| Sergunb |
0:f1834a63f7c1
|
746
|
}
|
| Sergunb |
0:f1834a63f7c1
|
747
|
}
|
| Sergunb |
0:f1834a63f7c1
|
748
|
|
| Sergunb |
0:f1834a63f7c1
|
749
|
|
| Sergunb |
0:f1834a63f7c1
|
750
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
751
|
* @brief Enables or disables the USART's 8x oversampling mode.
|
| Sergunb |
0:f1834a63f7c1
|
752
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
753
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
754
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
755
|
* @param NewState: new state of the USART one bit sampling method.
|
| Sergunb |
0:f1834a63f7c1
|
756
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
757
|
* @note
|
| Sergunb |
0:f1834a63f7c1
|
758
|
* This function has to be called before calling USART_Init()
|
| Sergunb |
0:f1834a63f7c1
|
759
|
* function in order to have correct baudrate Divider value.
|
| Sergunb |
0:f1834a63f7c1
|
760
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
761
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
762
|
void USART_OverSampling8Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
763
|
{
|
| Sergunb |
0:f1834a63f7c1
|
764
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
765
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
766
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
767
|
|
| Sergunb |
0:f1834a63f7c1
|
768
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
769
|
{
|
| Sergunb |
0:f1834a63f7c1
|
770
|
/* Enable the 8x Oversampling mode by setting the OVER8 bit in the CR1 register */
|
| Sergunb |
0:f1834a63f7c1
|
771
|
USARTx->CR1 |= CR1_OVER8_Set;
|
| Sergunb |
0:f1834a63f7c1
|
772
|
}
|
| Sergunb |
0:f1834a63f7c1
|
773
|
else
|
| Sergunb |
0:f1834a63f7c1
|
774
|
{
|
| Sergunb |
0:f1834a63f7c1
|
775
|
/* Disable the 8x Oversampling mode by clearing the OVER8 bit in the CR1 register */
|
| Sergunb |
0:f1834a63f7c1
|
776
|
USARTx->CR1 &= CR1_OVER8_Reset;
|
| Sergunb |
0:f1834a63f7c1
|
777
|
}
|
| Sergunb |
0:f1834a63f7c1
|
778
|
}
|
| Sergunb |
0:f1834a63f7c1
|
779
|
|
| Sergunb |
0:f1834a63f7c1
|
780
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
781
|
* @brief Enables or disables the USART's one bit sampling method.
|
| Sergunb |
0:f1834a63f7c1
|
782
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
783
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
784
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
785
|
* @param NewState: new state of the USART one bit sampling method.
|
| Sergunb |
0:f1834a63f7c1
|
786
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
787
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
788
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
789
|
void USART_OneBitMethodCmd(USART_TypeDef* USARTx, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
790
|
{
|
| Sergunb |
0:f1834a63f7c1
|
791
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
792
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
793
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
794
|
|
| Sergunb |
0:f1834a63f7c1
|
795
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
796
|
{
|
| Sergunb |
0:f1834a63f7c1
|
797
|
/* Enable the one bit method by setting the ONEBITE bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
798
|
USARTx->CR3 |= CR3_ONEBITE_Set;
|
| Sergunb |
0:f1834a63f7c1
|
799
|
}
|
| Sergunb |
0:f1834a63f7c1
|
800
|
else
|
| Sergunb |
0:f1834a63f7c1
|
801
|
{
|
| Sergunb |
0:f1834a63f7c1
|
802
|
/* Disable tthe one bit method by clearing the ONEBITE bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
803
|
USARTx->CR3 &= CR3_ONEBITE_Reset;
|
| Sergunb |
0:f1834a63f7c1
|
804
|
}
|
| Sergunb |
0:f1834a63f7c1
|
805
|
}
|
| Sergunb |
0:f1834a63f7c1
|
806
|
|
| Sergunb |
0:f1834a63f7c1
|
807
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
808
|
* @brief Configures the USART's IrDA interface.
|
| Sergunb |
0:f1834a63f7c1
|
809
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
810
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
811
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
812
|
* @param USART_IrDAMode: specifies the IrDA mode.
|
| Sergunb |
0:f1834a63f7c1
|
813
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
814
|
* @arg USART_IrDAMode_LowPower
|
| Sergunb |
0:f1834a63f7c1
|
815
|
* @arg USART_IrDAMode_Normal
|
| Sergunb |
0:f1834a63f7c1
|
816
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
817
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
818
|
void USART_IrDAConfig(USART_TypeDef* USARTx, uint16_t USART_IrDAMode)
|
| Sergunb |
0:f1834a63f7c1
|
819
|
{
|
| Sergunb |
0:f1834a63f7c1
|
820
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
821
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
822
|
assert_param(IS_USART_IRDA_MODE(USART_IrDAMode));
|
| Sergunb |
0:f1834a63f7c1
|
823
|
|
| Sergunb |
0:f1834a63f7c1
|
824
|
USARTx->CR3 &= CR3_IRLP_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
825
|
USARTx->CR3 |= USART_IrDAMode;
|
| Sergunb |
0:f1834a63f7c1
|
826
|
}
|
| Sergunb |
0:f1834a63f7c1
|
827
|
|
| Sergunb |
0:f1834a63f7c1
|
828
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
829
|
* @brief Enables or disables the USART's IrDA interface.
|
| Sergunb |
0:f1834a63f7c1
|
830
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
831
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
832
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
833
|
* @param NewState: new state of the IrDA mode.
|
| Sergunb |
0:f1834a63f7c1
|
834
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
835
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
836
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
837
|
void USART_IrDACmd(USART_TypeDef* USARTx, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
838
|
{
|
| Sergunb |
0:f1834a63f7c1
|
839
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
840
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
841
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
842
|
|
| Sergunb |
0:f1834a63f7c1
|
843
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
844
|
{
|
| Sergunb |
0:f1834a63f7c1
|
845
|
/* Enable the IrDA mode by setting the IREN bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
846
|
USARTx->CR3 |= CR3_IREN_Set;
|
| Sergunb |
0:f1834a63f7c1
|
847
|
}
|
| Sergunb |
0:f1834a63f7c1
|
848
|
else
|
| Sergunb |
0:f1834a63f7c1
|
849
|
{
|
| Sergunb |
0:f1834a63f7c1
|
850
|
/* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
851
|
USARTx->CR3 &= CR3_IREN_Reset;
|
| Sergunb |
0:f1834a63f7c1
|
852
|
}
|
| Sergunb |
0:f1834a63f7c1
|
853
|
}
|
| Sergunb |
0:f1834a63f7c1
|
854
|
|
| Sergunb |
0:f1834a63f7c1
|
855
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
856
|
* @brief Checks whether the specified USART flag is set or not.
|
| Sergunb |
0:f1834a63f7c1
|
857
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
858
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
859
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
860
|
* @param USART_FLAG: specifies the flag to check.
|
| Sergunb |
0:f1834a63f7c1
|
861
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
862
|
* @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
|
| Sergunb |
0:f1834a63f7c1
|
863
|
* @arg USART_FLAG_LBD: LIN Break detection flag
|
| Sergunb |
0:f1834a63f7c1
|
864
|
* @arg USART_FLAG_TXE: Transmit data register empty flag
|
| Sergunb |
0:f1834a63f7c1
|
865
|
* @arg USART_FLAG_TC: Transmission Complete flag
|
| Sergunb |
0:f1834a63f7c1
|
866
|
* @arg USART_FLAG_RXNE: Receive data register not empty flag
|
| Sergunb |
0:f1834a63f7c1
|
867
|
* @arg USART_FLAG_IDLE: Idle Line detection flag
|
| Sergunb |
0:f1834a63f7c1
|
868
|
* @arg USART_FLAG_ORE: OverRun Error flag
|
| Sergunb |
0:f1834a63f7c1
|
869
|
* @arg USART_FLAG_NE: Noise Error flag
|
| Sergunb |
0:f1834a63f7c1
|
870
|
* @arg USART_FLAG_FE: Framing Error flag
|
| Sergunb |
0:f1834a63f7c1
|
871
|
* @arg USART_FLAG_PE: Parity Error flag
|
| Sergunb |
0:f1834a63f7c1
|
872
|
* @retval The new state of USART_FLAG (SET or RESET).
|
| Sergunb |
0:f1834a63f7c1
|
873
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
874
|
FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, uint16_t USART_FLAG)
|
| Sergunb |
0:f1834a63f7c1
|
875
|
{
|
| Sergunb |
0:f1834a63f7c1
|
876
|
FlagStatus bitstatus = RESET;
|
| Sergunb |
0:f1834a63f7c1
|
877
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
878
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
879
|
assert_param(IS_USART_FLAG(USART_FLAG));
|
| Sergunb |
0:f1834a63f7c1
|
880
|
/* The CTS flag is not available for UART4 and UART5 */
|
| Sergunb |
0:f1834a63f7c1
|
881
|
if (USART_FLAG == USART_FLAG_CTS)
|
| Sergunb |
0:f1834a63f7c1
|
882
|
{
|
| Sergunb |
0:f1834a63f7c1
|
883
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
884
|
}
|
| Sergunb |
0:f1834a63f7c1
|
885
|
|
| Sergunb |
0:f1834a63f7c1
|
886
|
if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET)
|
| Sergunb |
0:f1834a63f7c1
|
887
|
{
|
| Sergunb |
0:f1834a63f7c1
|
888
|
bitstatus = SET;
|
| Sergunb |
0:f1834a63f7c1
|
889
|
}
|
| Sergunb |
0:f1834a63f7c1
|
890
|
else
|
| Sergunb |
0:f1834a63f7c1
|
891
|
{
|
| Sergunb |
0:f1834a63f7c1
|
892
|
bitstatus = RESET;
|
| Sergunb |
0:f1834a63f7c1
|
893
|
}
|
| Sergunb |
0:f1834a63f7c1
|
894
|
return bitstatus;
|
| Sergunb |
0:f1834a63f7c1
|
895
|
}
|
| Sergunb |
0:f1834a63f7c1
|
896
|
|
| Sergunb |
0:f1834a63f7c1
|
897
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
898
|
* @brief Clears the USARTx's pending flags.
|
| Sergunb |
0:f1834a63f7c1
|
899
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
900
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
901
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
902
|
* @param USART_FLAG: specifies the flag to clear.
|
| Sergunb |
0:f1834a63f7c1
|
903
|
* This parameter can be any combination of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
904
|
* @arg USART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
|
| Sergunb |
0:f1834a63f7c1
|
905
|
* @arg USART_FLAG_LBD: LIN Break detection flag.
|
| Sergunb |
0:f1834a63f7c1
|
906
|
* @arg USART_FLAG_TC: Transmission Complete flag.
|
| Sergunb |
0:f1834a63f7c1
|
907
|
* @arg USART_FLAG_RXNE: Receive data register not empty flag.
|
| Sergunb |
0:f1834a63f7c1
|
908
|
*
|
| Sergunb |
0:f1834a63f7c1
|
909
|
* @note
|
| Sergunb |
0:f1834a63f7c1
|
910
|
* - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
|
| Sergunb |
0:f1834a63f7c1
|
911
|
* error) and IDLE (Idle line detected) flags are cleared by software
|
| Sergunb |
0:f1834a63f7c1
|
912
|
* sequence: a read operation to USART_SR register (USART_GetFlagStatus())
|
| Sergunb |
0:f1834a63f7c1
|
913
|
* followed by a read operation to USART_DR register (USART_ReceiveData()).
|
| Sergunb |
0:f1834a63f7c1
|
914
|
* - RXNE flag can be also cleared by a read to the USART_DR register
|
| Sergunb |
0:f1834a63f7c1
|
915
|
* (USART_ReceiveData()).
|
| Sergunb |
0:f1834a63f7c1
|
916
|
* - TC flag can be also cleared by software sequence: a read operation to
|
| Sergunb |
0:f1834a63f7c1
|
917
|
* USART_SR register (USART_GetFlagStatus()) followed by a write operation
|
| Sergunb |
0:f1834a63f7c1
|
918
|
* to USART_DR register (USART_SendData()).
|
| Sergunb |
0:f1834a63f7c1
|
919
|
* - TXE flag is cleared only by a write to the USART_DR register
|
| Sergunb |
0:f1834a63f7c1
|
920
|
* (USART_SendData()).
|
| Sergunb |
0:f1834a63f7c1
|
921
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
922
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
923
|
void USART_ClearFlag(USART_TypeDef* USARTx, uint16_t USART_FLAG)
|
| Sergunb |
0:f1834a63f7c1
|
924
|
{
|
| Sergunb |
0:f1834a63f7c1
|
925
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
926
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
927
|
assert_param(IS_USART_CLEAR_FLAG(USART_FLAG));
|
| Sergunb |
0:f1834a63f7c1
|
928
|
/* The CTS flag is not available for UART4 and UART5 */
|
| Sergunb |
0:f1834a63f7c1
|
929
|
if ((USART_FLAG & USART_FLAG_CTS) == USART_FLAG_CTS)
|
| Sergunb |
0:f1834a63f7c1
|
930
|
{
|
| Sergunb |
0:f1834a63f7c1
|
931
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
932
|
}
|
| Sergunb |
0:f1834a63f7c1
|
933
|
|
| Sergunb |
0:f1834a63f7c1
|
934
|
USARTx->SR = (uint16_t)~USART_FLAG;
|
| Sergunb |
0:f1834a63f7c1
|
935
|
}
|
| Sergunb |
0:f1834a63f7c1
|
936
|
|
| Sergunb |
0:f1834a63f7c1
|
937
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
938
|
* @brief Checks whether the specified USART interrupt has occurred or not.
|
| Sergunb |
0:f1834a63f7c1
|
939
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
940
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
941
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
942
|
* @param USART_IT: specifies the USART interrupt source to check.
|
| Sergunb |
0:f1834a63f7c1
|
943
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
944
|
* @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
|
| Sergunb |
0:f1834a63f7c1
|
945
|
* @arg USART_IT_LBD: LIN Break detection interrupt
|
| Sergunb |
0:f1834a63f7c1
|
946
|
* @arg USART_IT_TXE: Tansmit Data Register empty interrupt
|
| Sergunb |
0:f1834a63f7c1
|
947
|
* @arg USART_IT_TC: Transmission complete interrupt
|
| Sergunb |
0:f1834a63f7c1
|
948
|
* @arg USART_IT_RXNE: Receive Data register not empty interrupt
|
| Sergunb |
0:f1834a63f7c1
|
949
|
* @arg USART_IT_IDLE: Idle line detection interrupt
|
| Sergunb |
0:f1834a63f7c1
|
950
|
* @arg USART_IT_ORE: OverRun Error interrupt
|
| Sergunb |
0:f1834a63f7c1
|
951
|
* @arg USART_IT_NE: Noise Error interrupt
|
| Sergunb |
0:f1834a63f7c1
|
952
|
* @arg USART_IT_FE: Framing Error interrupt
|
| Sergunb |
0:f1834a63f7c1
|
953
|
* @arg USART_IT_PE: Parity Error interrupt
|
| Sergunb |
0:f1834a63f7c1
|
954
|
* @retval The new state of USART_IT (SET or RESET).
|
| Sergunb |
0:f1834a63f7c1
|
955
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
956
|
ITStatus USART_GetITStatus(USART_TypeDef* USARTx, uint16_t USART_IT)
|
| Sergunb |
0:f1834a63f7c1
|
957
|
{
|
| Sergunb |
0:f1834a63f7c1
|
958
|
uint32_t bitpos = 0x00, itmask = 0x00, usartreg = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
959
|
ITStatus bitstatus = RESET;
|
| Sergunb |
0:f1834a63f7c1
|
960
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
961
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
962
|
assert_param(IS_USART_GET_IT(USART_IT));
|
| Sergunb |
0:f1834a63f7c1
|
963
|
/* The CTS interrupt is not available for UART4 and UART5 */
|
| Sergunb |
0:f1834a63f7c1
|
964
|
if (USART_IT == USART_IT_CTS)
|
| Sergunb |
0:f1834a63f7c1
|
965
|
{
|
| Sergunb |
0:f1834a63f7c1
|
966
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
967
|
}
|
| Sergunb |
0:f1834a63f7c1
|
968
|
|
| Sergunb |
0:f1834a63f7c1
|
969
|
/* Get the USART register index */
|
| Sergunb |
0:f1834a63f7c1
|
970
|
usartreg = (((uint8_t)USART_IT) >> 0x05);
|
| Sergunb |
0:f1834a63f7c1
|
971
|
/* Get the interrupt position */
|
| Sergunb |
0:f1834a63f7c1
|
972
|
itmask = USART_IT & IT_Mask;
|
| Sergunb |
0:f1834a63f7c1
|
973
|
itmask = (uint32_t)0x01 << itmask;
|
| Sergunb |
0:f1834a63f7c1
|
974
|
|
| Sergunb |
0:f1834a63f7c1
|
975
|
if (usartreg == 0x01) /* The IT is in CR1 register */
|
| Sergunb |
0:f1834a63f7c1
|
976
|
{
|
| Sergunb |
0:f1834a63f7c1
|
977
|
itmask &= USARTx->CR1;
|
| Sergunb |
0:f1834a63f7c1
|
978
|
}
|
| Sergunb |
0:f1834a63f7c1
|
979
|
else if (usartreg == 0x02) /* The IT is in CR2 register */
|
| Sergunb |
0:f1834a63f7c1
|
980
|
{
|
| Sergunb |
0:f1834a63f7c1
|
981
|
itmask &= USARTx->CR2;
|
| Sergunb |
0:f1834a63f7c1
|
982
|
}
|
| Sergunb |
0:f1834a63f7c1
|
983
|
else /* The IT is in CR3 register */
|
| Sergunb |
0:f1834a63f7c1
|
984
|
{
|
| Sergunb |
0:f1834a63f7c1
|
985
|
itmask &= USARTx->CR3;
|
| Sergunb |
0:f1834a63f7c1
|
986
|
}
|
| Sergunb |
0:f1834a63f7c1
|
987
|
|
| Sergunb |
0:f1834a63f7c1
|
988
|
bitpos = USART_IT >> 0x08;
|
| Sergunb |
0:f1834a63f7c1
|
989
|
bitpos = (uint32_t)0x01 << bitpos;
|
| Sergunb |
0:f1834a63f7c1
|
990
|
bitpos &= USARTx->SR;
|
| Sergunb |
0:f1834a63f7c1
|
991
|
if ((itmask != (uint16_t)RESET)&&(bitpos != (uint16_t)RESET))
|
| Sergunb |
0:f1834a63f7c1
|
992
|
{
|
| Sergunb |
0:f1834a63f7c1
|
993
|
bitstatus = SET;
|
| Sergunb |
0:f1834a63f7c1
|
994
|
}
|
| Sergunb |
0:f1834a63f7c1
|
995
|
else
|
| Sergunb |
0:f1834a63f7c1
|
996
|
{
|
| Sergunb |
0:f1834a63f7c1
|
997
|
bitstatus = RESET;
|
| Sergunb |
0:f1834a63f7c1
|
998
|
}
|
| Sergunb |
0:f1834a63f7c1
|
999
|
|
| Sergunb |
0:f1834a63f7c1
|
1000
|
return bitstatus;
|
| Sergunb |
0:f1834a63f7c1
|
1001
|
}
|
| Sergunb |
0:f1834a63f7c1
|
1002
|
|
| Sergunb |
0:f1834a63f7c1
|
1003
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
1004
|
* @brief Clears the USARTx's interrupt pending bits.
|
| Sergunb |
0:f1834a63f7c1
|
1005
|
* @param USARTx: Select the USART or the UART peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
1006
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
1007
|
* USART1, USART2, USART3, UART4 or UART5.
|
| Sergunb |
0:f1834a63f7c1
|
1008
|
* @param USART_IT: specifies the interrupt pending bit to clear.
|
| Sergunb |
0:f1834a63f7c1
|
1009
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
1010
|
* @arg USART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
|
| Sergunb |
0:f1834a63f7c1
|
1011
|
* @arg USART_IT_LBD: LIN Break detection interrupt
|
| Sergunb |
0:f1834a63f7c1
|
1012
|
* @arg USART_IT_TC: Transmission complete interrupt.
|
| Sergunb |
0:f1834a63f7c1
|
1013
|
* @arg USART_IT_RXNE: Receive Data register not empty interrupt.
|
| Sergunb |
0:f1834a63f7c1
|
1014
|
*
|
| Sergunb |
0:f1834a63f7c1
|
1015
|
* @note
|
| Sergunb |
0:f1834a63f7c1
|
1016
|
* - PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
|
| Sergunb |
0:f1834a63f7c1
|
1017
|
* error) and IDLE (Idle line detected) pending bits are cleared by
|
| Sergunb |
0:f1834a63f7c1
|
1018
|
* software sequence: a read operation to USART_SR register
|
| Sergunb |
0:f1834a63f7c1
|
1019
|
* (USART_GetITStatus()) followed by a read operation to USART_DR register
|
| Sergunb |
0:f1834a63f7c1
|
1020
|
* (USART_ReceiveData()).
|
| Sergunb |
0:f1834a63f7c1
|
1021
|
* - RXNE pending bit can be also cleared by a read to the USART_DR register
|
| Sergunb |
0:f1834a63f7c1
|
1022
|
* (USART_ReceiveData()).
|
| Sergunb |
0:f1834a63f7c1
|
1023
|
* - TC pending bit can be also cleared by software sequence: a read
|
| Sergunb |
0:f1834a63f7c1
|
1024
|
* operation to USART_SR register (USART_GetITStatus()) followed by a write
|
| Sergunb |
0:f1834a63f7c1
|
1025
|
* operation to USART_DR register (USART_SendData()).
|
| Sergunb |
0:f1834a63f7c1
|
1026
|
* - TXE pending bit is cleared only by a write to the USART_DR register
|
| Sergunb |
0:f1834a63f7c1
|
1027
|
* (USART_SendData()).
|
| Sergunb |
0:f1834a63f7c1
|
1028
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
1029
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
1030
|
void USART_ClearITPendingBit(USART_TypeDef* USARTx, uint16_t USART_IT)
|
| Sergunb |
0:f1834a63f7c1
|
1031
|
{
|
| Sergunb |
0:f1834a63f7c1
|
1032
|
uint16_t bitpos = 0x00, itmask = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
1033
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
1034
|
assert_param(IS_USART_ALL_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
1035
|
assert_param(IS_USART_CLEAR_IT(USART_IT));
|
| Sergunb |
0:f1834a63f7c1
|
1036
|
/* The CTS interrupt is not available for UART4 and UART5 */
|
| Sergunb |
0:f1834a63f7c1
|
1037
|
if (USART_IT == USART_IT_CTS)
|
| Sergunb |
0:f1834a63f7c1
|
1038
|
{
|
| Sergunb |
0:f1834a63f7c1
|
1039
|
assert_param(IS_USART_123_PERIPH(USARTx));
|
| Sergunb |
0:f1834a63f7c1
|
1040
|
}
|
| Sergunb |
0:f1834a63f7c1
|
1041
|
|
| Sergunb |
0:f1834a63f7c1
|
1042
|
bitpos = USART_IT >> 0x08;
|
| Sergunb |
0:f1834a63f7c1
|
1043
|
itmask = ((uint16_t)0x01 << (uint16_t)bitpos);
|
| Sergunb |
0:f1834a63f7c1
|
1044
|
USARTx->SR = (uint16_t)~itmask;
|
| Sergunb |
0:f1834a63f7c1
|
1045
|
}
|
| Sergunb |
0:f1834a63f7c1
|
1046
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
1047
|
* @}
|
| Sergunb |
0:f1834a63f7c1
|
1048
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
1049
|
|
| Sergunb |
0:f1834a63f7c1
|
1050
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
1051
|
* @}
|
| Sergunb |
0:f1834a63f7c1
|
1052
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
1053
|
|
| Sergunb |
0:f1834a63f7c1
|
1054
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
1055
|
* @}
|
| Sergunb |
0:f1834a63f7c1
|
1056
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
1057
|
|
| Sergunb |
0:f1834a63f7c1
|
1058
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|