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/**
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******************************************************************************
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* @file stm32f10x_gpio.c
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* @author MCD Application Team
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* @version V3.5.0
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* @date 11-March-2011
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* @brief This file provides all the GPIO firmware functions.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_gpio.h"
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#include "stm32f10x_rcc.h"
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/** @addtogroup STM32F10x_StdPeriph_Driver
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* @{
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*/
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/** @defgroup GPIO
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* @brief GPIO driver modules
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* @{
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*/
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/** @defgroup GPIO_Private_TypesDefinitions
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup GPIO_Private_Defines
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* @{
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*/
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/* ------------ RCC registers bit address in the alias region ----------------*/
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#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
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/* --- EVENTCR Register -----*/
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/* Alias word address of EVOE bit */
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#define EVCR_OFFSET (AFIO_OFFSET + 0x00)
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#define EVOE_BitNumber ((uint8_t)0x07)
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#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
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/* --- MAPR Register ---*/
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/* Alias word address of MII_RMII_SEL bit */
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#define MAPR_OFFSET (AFIO_OFFSET + 0x04)
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#define MII_RMII_SEL_BitNumber ((u8)0x17)
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#define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))
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#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
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#define LSB_MASK ((uint16_t)0xFFFF)
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#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
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#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
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#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
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#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
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/**
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* @}
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*/
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/** @defgroup GPIO_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup GPIO_Private_Variables
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup GPIO_Private_FunctionPrototypes
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup GPIO_Private_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the GPIOx peripheral registers to their default reset values.
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* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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* @retval None
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*/
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void GPIO_DeInit(GPIO_TypeDef* GPIOx)
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{
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/* Check the parameters */
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assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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if (GPIOx == GPIOA)
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
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}
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else if (GPIOx == GPIOB)
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
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}
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else if (GPIOx == GPIOC)
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
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}
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else if (GPIOx == GPIOD)
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
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}
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else if (GPIOx == GPIOE)
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
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}
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138
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else if (GPIOx == GPIOF)
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139
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
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}
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else
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{
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if (GPIOx == GPIOG)
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146
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
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149
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}
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150
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}
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151
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}
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152
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153
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/**
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154
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* @brief Deinitializes the Alternate Functions (remap, event control
|
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155
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* and EXTI configuration) registers to their default reset values.
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156
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* @param None
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* @retval None
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158
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*/
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void GPIO_AFIODeInit(void)
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160
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{
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161
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
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162
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
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}
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164
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/**
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166
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* @brief Initializes the GPIOx peripheral according to the specified
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167
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* parameters in the GPIO_InitStruct.
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* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
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* @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
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* contains the configuration information for the specified GPIO peripheral.
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* @retval None
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172
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*/
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void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
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174
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{
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uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
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uint32_t tmpreg = 0x00, pinmask = 0x00;
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/* Check the parameters */
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assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
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assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
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assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
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181
|
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182
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/*---------------------------- GPIO Mode Configuration -----------------------*/
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currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
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if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
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185
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{
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186
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/* Check the parameters */
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187
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assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
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|
188
|
/* Output mode */
|
| Sergunb |
0:f1834a63f7c1
|
189
|
currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
|
| Sergunb |
0:f1834a63f7c1
|
190
|
}
|
| Sergunb |
0:f1834a63f7c1
|
191
|
/*---------------------------- GPIO CRL Configuration ------------------------*/
|
| Sergunb |
0:f1834a63f7c1
|
192
|
/* Configure the eight low port pins */
|
| Sergunb |
0:f1834a63f7c1
|
193
|
if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
|
| Sergunb |
0:f1834a63f7c1
|
194
|
{
|
| Sergunb |
0:f1834a63f7c1
|
195
|
tmpreg = GPIOx->CRL;
|
| Sergunb |
0:f1834a63f7c1
|
196
|
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
|
| Sergunb |
0:f1834a63f7c1
|
197
|
{
|
| Sergunb |
0:f1834a63f7c1
|
198
|
pos = ((uint32_t)0x01) << pinpos;
|
| Sergunb |
0:f1834a63f7c1
|
199
|
/* Get the port pins position */
|
| Sergunb |
0:f1834a63f7c1
|
200
|
currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
|
| Sergunb |
0:f1834a63f7c1
|
201
|
if (currentpin == pos)
|
| Sergunb |
0:f1834a63f7c1
|
202
|
{
|
| Sergunb |
0:f1834a63f7c1
|
203
|
pos = pinpos << 2;
|
| Sergunb |
0:f1834a63f7c1
|
204
|
/* Clear the corresponding low control register bits */
|
| Sergunb |
0:f1834a63f7c1
|
205
|
pinmask = ((uint32_t)0x0F) << pos;
|
| Sergunb |
0:f1834a63f7c1
|
206
|
tmpreg &= ~pinmask;
|
| Sergunb |
0:f1834a63f7c1
|
207
|
/* Write the mode configuration in the corresponding bits */
|
| Sergunb |
0:f1834a63f7c1
|
208
|
tmpreg |= (currentmode << pos);
|
| Sergunb |
0:f1834a63f7c1
|
209
|
/* Reset the corresponding ODR bit */
|
| Sergunb |
0:f1834a63f7c1
|
210
|
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
|
| Sergunb |
0:f1834a63f7c1
|
211
|
{
|
| Sergunb |
0:f1834a63f7c1
|
212
|
GPIOx->BRR = (((uint32_t)0x01) << pinpos);
|
| Sergunb |
0:f1834a63f7c1
|
213
|
}
|
| Sergunb |
0:f1834a63f7c1
|
214
|
else
|
| Sergunb |
0:f1834a63f7c1
|
215
|
{
|
| Sergunb |
0:f1834a63f7c1
|
216
|
/* Set the corresponding ODR bit */
|
| Sergunb |
0:f1834a63f7c1
|
217
|
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
|
| Sergunb |
0:f1834a63f7c1
|
218
|
{
|
| Sergunb |
0:f1834a63f7c1
|
219
|
GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
|
| Sergunb |
0:f1834a63f7c1
|
220
|
}
|
| Sergunb |
0:f1834a63f7c1
|
221
|
}
|
| Sergunb |
0:f1834a63f7c1
|
222
|
}
|
| Sergunb |
0:f1834a63f7c1
|
223
|
}
|
| Sergunb |
0:f1834a63f7c1
|
224
|
GPIOx->CRL = tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
225
|
}
|
| Sergunb |
0:f1834a63f7c1
|
226
|
/*---------------------------- GPIO CRH Configuration ------------------------*/
|
| Sergunb |
0:f1834a63f7c1
|
227
|
/* Configure the eight high port pins */
|
| Sergunb |
0:f1834a63f7c1
|
228
|
if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
|
| Sergunb |
0:f1834a63f7c1
|
229
|
{
|
| Sergunb |
0:f1834a63f7c1
|
230
|
tmpreg = GPIOx->CRH;
|
| Sergunb |
0:f1834a63f7c1
|
231
|
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
|
| Sergunb |
0:f1834a63f7c1
|
232
|
{
|
| Sergunb |
0:f1834a63f7c1
|
233
|
pos = (((uint32_t)0x01) << (pinpos + 0x08));
|
| Sergunb |
0:f1834a63f7c1
|
234
|
/* Get the port pins position */
|
| Sergunb |
0:f1834a63f7c1
|
235
|
currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
|
| Sergunb |
0:f1834a63f7c1
|
236
|
if (currentpin == pos)
|
| Sergunb |
0:f1834a63f7c1
|
237
|
{
|
| Sergunb |
0:f1834a63f7c1
|
238
|
pos = pinpos << 2;
|
| Sergunb |
0:f1834a63f7c1
|
239
|
/* Clear the corresponding high control register bits */
|
| Sergunb |
0:f1834a63f7c1
|
240
|
pinmask = ((uint32_t)0x0F) << pos;
|
| Sergunb |
0:f1834a63f7c1
|
241
|
tmpreg &= ~pinmask;
|
| Sergunb |
0:f1834a63f7c1
|
242
|
/* Write the mode configuration in the corresponding bits */
|
| Sergunb |
0:f1834a63f7c1
|
243
|
tmpreg |= (currentmode << pos);
|
| Sergunb |
0:f1834a63f7c1
|
244
|
/* Reset the corresponding ODR bit */
|
| Sergunb |
0:f1834a63f7c1
|
245
|
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
|
| Sergunb |
0:f1834a63f7c1
|
246
|
{
|
| Sergunb |
0:f1834a63f7c1
|
247
|
GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
|
| Sergunb |
0:f1834a63f7c1
|
248
|
}
|
| Sergunb |
0:f1834a63f7c1
|
249
|
/* Set the corresponding ODR bit */
|
| Sergunb |
0:f1834a63f7c1
|
250
|
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
|
| Sergunb |
0:f1834a63f7c1
|
251
|
{
|
| Sergunb |
0:f1834a63f7c1
|
252
|
GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
|
| Sergunb |
0:f1834a63f7c1
|
253
|
}
|
| Sergunb |
0:f1834a63f7c1
|
254
|
}
|
| Sergunb |
0:f1834a63f7c1
|
255
|
}
|
| Sergunb |
0:f1834a63f7c1
|
256
|
GPIOx->CRH = tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
257
|
}
|
| Sergunb |
0:f1834a63f7c1
|
258
|
}
|
| Sergunb |
0:f1834a63f7c1
|
259
|
|
| Sergunb |
0:f1834a63f7c1
|
260
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
261
|
* @brief Fills each GPIO_InitStruct member with its default value.
|
| Sergunb |
0:f1834a63f7c1
|
262
|
* @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
|
| Sergunb |
0:f1834a63f7c1
|
263
|
* be initialized.
|
| Sergunb |
0:f1834a63f7c1
|
264
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
265
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
266
|
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
|
| Sergunb |
0:f1834a63f7c1
|
267
|
{
|
| Sergunb |
0:f1834a63f7c1
|
268
|
/* Reset GPIO init structure parameters values */
|
| Sergunb |
0:f1834a63f7c1
|
269
|
GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
|
| Sergunb |
0:f1834a63f7c1
|
270
|
GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
|
| Sergunb |
0:f1834a63f7c1
|
271
|
GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
|
| Sergunb |
0:f1834a63f7c1
|
272
|
}
|
| Sergunb |
0:f1834a63f7c1
|
273
|
|
| Sergunb |
0:f1834a63f7c1
|
274
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
275
|
* @brief Reads the specified input port pin.
|
| Sergunb |
0:f1834a63f7c1
|
276
|
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
277
|
* @param GPIO_Pin: specifies the port bit to read.
|
| Sergunb |
0:f1834a63f7c1
|
278
|
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
| Sergunb |
0:f1834a63f7c1
|
279
|
* @retval The input port pin value.
|
| Sergunb |
0:f1834a63f7c1
|
280
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
281
|
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
| Sergunb |
0:f1834a63f7c1
|
282
|
{
|
| Sergunb |
0:f1834a63f7c1
|
283
|
uint8_t bitstatus = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
284
|
|
| Sergunb |
0:f1834a63f7c1
|
285
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
286
|
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
| Sergunb |
0:f1834a63f7c1
|
287
|
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
| Sergunb |
0:f1834a63f7c1
|
288
|
|
| Sergunb |
0:f1834a63f7c1
|
289
|
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
| Sergunb |
0:f1834a63f7c1
|
290
|
{
|
| Sergunb |
0:f1834a63f7c1
|
291
|
bitstatus = (uint8_t)Bit_SET;
|
| Sergunb |
0:f1834a63f7c1
|
292
|
}
|
| Sergunb |
0:f1834a63f7c1
|
293
|
else
|
| Sergunb |
0:f1834a63f7c1
|
294
|
{
|
| Sergunb |
0:f1834a63f7c1
|
295
|
bitstatus = (uint8_t)Bit_RESET;
|
| Sergunb |
0:f1834a63f7c1
|
296
|
}
|
| Sergunb |
0:f1834a63f7c1
|
297
|
return bitstatus;
|
| Sergunb |
0:f1834a63f7c1
|
298
|
}
|
| Sergunb |
0:f1834a63f7c1
|
299
|
|
| Sergunb |
0:f1834a63f7c1
|
300
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
301
|
* @brief Reads the specified GPIO input data port.
|
| Sergunb |
0:f1834a63f7c1
|
302
|
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
303
|
* @retval GPIO input data port value.
|
| Sergunb |
0:f1834a63f7c1
|
304
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
305
|
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
|
| Sergunb |
0:f1834a63f7c1
|
306
|
{
|
| Sergunb |
0:f1834a63f7c1
|
307
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
308
|
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
| Sergunb |
0:f1834a63f7c1
|
309
|
|
| Sergunb |
0:f1834a63f7c1
|
310
|
return ((uint16_t)GPIOx->IDR);
|
| Sergunb |
0:f1834a63f7c1
|
311
|
}
|
| Sergunb |
0:f1834a63f7c1
|
312
|
|
| Sergunb |
0:f1834a63f7c1
|
313
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
314
|
* @brief Reads the specified output data port bit.
|
| Sergunb |
0:f1834a63f7c1
|
315
|
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
316
|
* @param GPIO_Pin: specifies the port bit to read.
|
| Sergunb |
0:f1834a63f7c1
|
317
|
* This parameter can be GPIO_Pin_x where x can be (0..15).
|
| Sergunb |
0:f1834a63f7c1
|
318
|
* @retval The output port pin value.
|
| Sergunb |
0:f1834a63f7c1
|
319
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
320
|
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
| Sergunb |
0:f1834a63f7c1
|
321
|
{
|
| Sergunb |
0:f1834a63f7c1
|
322
|
uint8_t bitstatus = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
323
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
324
|
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
| Sergunb |
0:f1834a63f7c1
|
325
|
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
| Sergunb |
0:f1834a63f7c1
|
326
|
|
| Sergunb |
0:f1834a63f7c1
|
327
|
if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
|
| Sergunb |
0:f1834a63f7c1
|
328
|
{
|
| Sergunb |
0:f1834a63f7c1
|
329
|
bitstatus = (uint8_t)Bit_SET;
|
| Sergunb |
0:f1834a63f7c1
|
330
|
}
|
| Sergunb |
0:f1834a63f7c1
|
331
|
else
|
| Sergunb |
0:f1834a63f7c1
|
332
|
{
|
| Sergunb |
0:f1834a63f7c1
|
333
|
bitstatus = (uint8_t)Bit_RESET;
|
| Sergunb |
0:f1834a63f7c1
|
334
|
}
|
| Sergunb |
0:f1834a63f7c1
|
335
|
return bitstatus;
|
| Sergunb |
0:f1834a63f7c1
|
336
|
}
|
| Sergunb |
0:f1834a63f7c1
|
337
|
|
| Sergunb |
0:f1834a63f7c1
|
338
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
339
|
* @brief Reads the specified GPIO output data port.
|
| Sergunb |
0:f1834a63f7c1
|
340
|
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
341
|
* @retval GPIO output data port value.
|
| Sergunb |
0:f1834a63f7c1
|
342
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
343
|
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
|
| Sergunb |
0:f1834a63f7c1
|
344
|
{
|
| Sergunb |
0:f1834a63f7c1
|
345
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
346
|
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
| Sergunb |
0:f1834a63f7c1
|
347
|
|
| Sergunb |
0:f1834a63f7c1
|
348
|
return ((uint16_t)GPIOx->ODR);
|
| Sergunb |
0:f1834a63f7c1
|
349
|
}
|
| Sergunb |
0:f1834a63f7c1
|
350
|
|
| Sergunb |
0:f1834a63f7c1
|
351
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
352
|
* @brief Sets the selected data port bits.
|
| Sergunb |
0:f1834a63f7c1
|
353
|
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
354
|
* @param GPIO_Pin: specifies the port bits to be written.
|
| Sergunb |
0:f1834a63f7c1
|
355
|
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
| Sergunb |
0:f1834a63f7c1
|
356
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
357
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
358
|
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
| Sergunb |
0:f1834a63f7c1
|
359
|
{
|
| Sergunb |
0:f1834a63f7c1
|
360
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
361
|
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
| Sergunb |
0:f1834a63f7c1
|
362
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
| Sergunb |
0:f1834a63f7c1
|
363
|
|
| Sergunb |
0:f1834a63f7c1
|
364
|
GPIOx->BSRR = GPIO_Pin;
|
| Sergunb |
0:f1834a63f7c1
|
365
|
}
|
| Sergunb |
0:f1834a63f7c1
|
366
|
|
| Sergunb |
0:f1834a63f7c1
|
367
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
368
|
* @brief Clears the selected data port bits.
|
| Sergunb |
0:f1834a63f7c1
|
369
|
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
370
|
* @param GPIO_Pin: specifies the port bits to be written.
|
| Sergunb |
0:f1834a63f7c1
|
371
|
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
| Sergunb |
0:f1834a63f7c1
|
372
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
373
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
374
|
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
| Sergunb |
0:f1834a63f7c1
|
375
|
{
|
| Sergunb |
0:f1834a63f7c1
|
376
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
377
|
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
| Sergunb |
0:f1834a63f7c1
|
378
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
| Sergunb |
0:f1834a63f7c1
|
379
|
|
| Sergunb |
0:f1834a63f7c1
|
380
|
GPIOx->BRR = GPIO_Pin;
|
| Sergunb |
0:f1834a63f7c1
|
381
|
}
|
| Sergunb |
0:f1834a63f7c1
|
382
|
|
| Sergunb |
0:f1834a63f7c1
|
383
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
384
|
* @brief Sets or clears the selected data port bit.
|
| Sergunb |
0:f1834a63f7c1
|
385
|
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
386
|
* @param GPIO_Pin: specifies the port bit to be written.
|
| Sergunb |
0:f1834a63f7c1
|
387
|
* This parameter can be one of GPIO_Pin_x where x can be (0..15).
|
| Sergunb |
0:f1834a63f7c1
|
388
|
* @param BitVal: specifies the value to be written to the selected bit.
|
| Sergunb |
0:f1834a63f7c1
|
389
|
* This parameter can be one of the BitAction enum values:
|
| Sergunb |
0:f1834a63f7c1
|
390
|
* @arg Bit_RESET: to clear the port pin
|
| Sergunb |
0:f1834a63f7c1
|
391
|
* @arg Bit_SET: to set the port pin
|
| Sergunb |
0:f1834a63f7c1
|
392
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
393
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
394
|
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
|
| Sergunb |
0:f1834a63f7c1
|
395
|
{
|
| Sergunb |
0:f1834a63f7c1
|
396
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
397
|
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
| Sergunb |
0:f1834a63f7c1
|
398
|
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
|
| Sergunb |
0:f1834a63f7c1
|
399
|
assert_param(IS_GPIO_BIT_ACTION(BitVal));
|
| Sergunb |
0:f1834a63f7c1
|
400
|
|
| Sergunb |
0:f1834a63f7c1
|
401
|
if (BitVal != Bit_RESET)
|
| Sergunb |
0:f1834a63f7c1
|
402
|
{
|
| Sergunb |
0:f1834a63f7c1
|
403
|
GPIOx->BSRR = GPIO_Pin;
|
| Sergunb |
0:f1834a63f7c1
|
404
|
}
|
| Sergunb |
0:f1834a63f7c1
|
405
|
else
|
| Sergunb |
0:f1834a63f7c1
|
406
|
{
|
| Sergunb |
0:f1834a63f7c1
|
407
|
GPIOx->BRR = GPIO_Pin;
|
| Sergunb |
0:f1834a63f7c1
|
408
|
}
|
| Sergunb |
0:f1834a63f7c1
|
409
|
}
|
| Sergunb |
0:f1834a63f7c1
|
410
|
|
| Sergunb |
0:f1834a63f7c1
|
411
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
412
|
* @brief Writes data to the specified GPIO data port.
|
| Sergunb |
0:f1834a63f7c1
|
413
|
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
414
|
* @param PortVal: specifies the value to be written to the port output data register.
|
| Sergunb |
0:f1834a63f7c1
|
415
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
416
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
417
|
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
|
| Sergunb |
0:f1834a63f7c1
|
418
|
{
|
| Sergunb |
0:f1834a63f7c1
|
419
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
420
|
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
| Sergunb |
0:f1834a63f7c1
|
421
|
|
| Sergunb |
0:f1834a63f7c1
|
422
|
GPIOx->ODR = PortVal;
|
| Sergunb |
0:f1834a63f7c1
|
423
|
}
|
| Sergunb |
0:f1834a63f7c1
|
424
|
|
| Sergunb |
0:f1834a63f7c1
|
425
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
426
|
* @brief Locks GPIO Pins configuration registers.
|
| Sergunb |
0:f1834a63f7c1
|
427
|
* @param GPIOx: where x can be (A..G) to select the GPIO peripheral.
|
| Sergunb |
0:f1834a63f7c1
|
428
|
* @param GPIO_Pin: specifies the port bit to be written.
|
| Sergunb |
0:f1834a63f7c1
|
429
|
* This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
|
| Sergunb |
0:f1834a63f7c1
|
430
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
431
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
432
|
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
| Sergunb |
0:f1834a63f7c1
|
433
|
{
|
| Sergunb |
0:f1834a63f7c1
|
434
|
uint32_t tmp = 0x00010000;
|
| Sergunb |
0:f1834a63f7c1
|
435
|
|
| Sergunb |
0:f1834a63f7c1
|
436
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
437
|
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
|
| Sergunb |
0:f1834a63f7c1
|
438
|
assert_param(IS_GPIO_PIN(GPIO_Pin));
|
| Sergunb |
0:f1834a63f7c1
|
439
|
|
| Sergunb |
0:f1834a63f7c1
|
440
|
tmp |= GPIO_Pin;
|
| Sergunb |
0:f1834a63f7c1
|
441
|
/* Set LCKK bit */
|
| Sergunb |
0:f1834a63f7c1
|
442
|
GPIOx->LCKR = tmp;
|
| Sergunb |
0:f1834a63f7c1
|
443
|
/* Reset LCKK bit */
|
| Sergunb |
0:f1834a63f7c1
|
444
|
GPIOx->LCKR = GPIO_Pin;
|
| Sergunb |
0:f1834a63f7c1
|
445
|
/* Set LCKK bit */
|
| Sergunb |
0:f1834a63f7c1
|
446
|
GPIOx->LCKR = tmp;
|
| Sergunb |
0:f1834a63f7c1
|
447
|
/* Read LCKK bit*/
|
| Sergunb |
0:f1834a63f7c1
|
448
|
tmp = GPIOx->LCKR;
|
| Sergunb |
0:f1834a63f7c1
|
449
|
/* Read LCKK bit*/
|
| Sergunb |
0:f1834a63f7c1
|
450
|
tmp = GPIOx->LCKR;
|
| Sergunb |
0:f1834a63f7c1
|
451
|
}
|
| Sergunb |
0:f1834a63f7c1
|
452
|
|
| Sergunb |
0:f1834a63f7c1
|
453
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
454
|
* @brief Selects the GPIO pin used as Event output.
|
| Sergunb |
0:f1834a63f7c1
|
455
|
* @param GPIO_PortSource: selects the GPIO port to be used as source
|
| Sergunb |
0:f1834a63f7c1
|
456
|
* for Event output.
|
| Sergunb |
0:f1834a63f7c1
|
457
|
* This parameter can be GPIO_PortSourceGPIOx where x can be (A..E).
|
| Sergunb |
0:f1834a63f7c1
|
458
|
* @param GPIO_PinSource: specifies the pin for the Event output.
|
| Sergunb |
0:f1834a63f7c1
|
459
|
* This parameter can be GPIO_PinSourcex where x can be (0..15).
|
| Sergunb |
0:f1834a63f7c1
|
460
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
461
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
462
|
void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
|
| Sergunb |
0:f1834a63f7c1
|
463
|
{
|
| Sergunb |
0:f1834a63f7c1
|
464
|
uint32_t tmpreg = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
465
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
466
|
assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
|
| Sergunb |
0:f1834a63f7c1
|
467
|
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
| Sergunb |
0:f1834a63f7c1
|
468
|
|
| Sergunb |
0:f1834a63f7c1
|
469
|
tmpreg = AFIO->EVCR;
|
| Sergunb |
0:f1834a63f7c1
|
470
|
/* Clear the PORT[6:4] and PIN[3:0] bits */
|
| Sergunb |
0:f1834a63f7c1
|
471
|
tmpreg &= EVCR_PORTPINCONFIG_MASK;
|
| Sergunb |
0:f1834a63f7c1
|
472
|
tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
|
| Sergunb |
0:f1834a63f7c1
|
473
|
tmpreg |= GPIO_PinSource;
|
| Sergunb |
0:f1834a63f7c1
|
474
|
AFIO->EVCR = tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
475
|
}
|
| Sergunb |
0:f1834a63f7c1
|
476
|
|
| Sergunb |
0:f1834a63f7c1
|
477
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
478
|
* @brief Enables or disables the Event Output.
|
| Sergunb |
0:f1834a63f7c1
|
479
|
* @param NewState: new state of the Event output.
|
| Sergunb |
0:f1834a63f7c1
|
480
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
481
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
482
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
483
|
void GPIO_EventOutputCmd(FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
484
|
{
|
| Sergunb |
0:f1834a63f7c1
|
485
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
486
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
487
|
|
| Sergunb |
0:f1834a63f7c1
|
488
|
*(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
|
| Sergunb |
0:f1834a63f7c1
|
489
|
}
|
| Sergunb |
0:f1834a63f7c1
|
490
|
|
| Sergunb |
0:f1834a63f7c1
|
491
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
492
|
* @brief Changes the mapping of the specified pin.
|
| Sergunb |
0:f1834a63f7c1
|
493
|
* @param GPIO_Remap: selects the pin to remap.
|
| Sergunb |
0:f1834a63f7c1
|
494
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
495
|
* @arg GPIO_Remap_SPI1 : SPI1 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
496
|
* @arg GPIO_Remap_I2C1 : I2C1 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
497
|
* @arg GPIO_Remap_USART1 : USART1 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
498
|
* @arg GPIO_Remap_USART2 : USART2 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
499
|
* @arg GPIO_PartialRemap_USART3 : USART3 Partial Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
500
|
* @arg GPIO_FullRemap_USART3 : USART3 Full Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
501
|
* @arg GPIO_PartialRemap_TIM1 : TIM1 Partial Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
502
|
* @arg GPIO_FullRemap_TIM1 : TIM1 Full Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
503
|
* @arg GPIO_PartialRemap1_TIM2 : TIM2 Partial1 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
504
|
* @arg GPIO_PartialRemap2_TIM2 : TIM2 Partial2 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
505
|
* @arg GPIO_FullRemap_TIM2 : TIM2 Full Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
506
|
* @arg GPIO_PartialRemap_TIM3 : TIM3 Partial Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
507
|
* @arg GPIO_FullRemap_TIM3 : TIM3 Full Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
508
|
* @arg GPIO_Remap_TIM4 : TIM4 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
509
|
* @arg GPIO_Remap1_CAN1 : CAN1 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
510
|
* @arg GPIO_Remap2_CAN1 : CAN1 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
511
|
* @arg GPIO_Remap_PD01 : PD01 Alternate Function mapping
|
| Sergunb |
0:f1834a63f7c1
|
512
|
* @arg GPIO_Remap_TIM5CH4_LSI : LSI connected to TIM5 Channel4 input capture for calibration
|
| Sergunb |
0:f1834a63f7c1
|
513
|
* @arg GPIO_Remap_ADC1_ETRGINJ : ADC1 External Trigger Injected Conversion remapping
|
| Sergunb |
0:f1834a63f7c1
|
514
|
* @arg GPIO_Remap_ADC1_ETRGREG : ADC1 External Trigger Regular Conversion remapping
|
| Sergunb |
0:f1834a63f7c1
|
515
|
* @arg GPIO_Remap_ADC2_ETRGINJ : ADC2 External Trigger Injected Conversion remapping
|
| Sergunb |
0:f1834a63f7c1
|
516
|
* @arg GPIO_Remap_ADC2_ETRGREG : ADC2 External Trigger Regular Conversion remapping
|
| Sergunb |
0:f1834a63f7c1
|
517
|
* @arg GPIO_Remap_ETH : Ethernet remapping (only for Connectivity line devices)
|
| Sergunb |
0:f1834a63f7c1
|
518
|
* @arg GPIO_Remap_CAN2 : CAN2 remapping (only for Connectivity line devices)
|
| Sergunb |
0:f1834a63f7c1
|
519
|
* @arg GPIO_Remap_SWJ_NoJTRST : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
|
| Sergunb |
0:f1834a63f7c1
|
520
|
* @arg GPIO_Remap_SWJ_JTAGDisable : JTAG-DP Disabled and SW-DP Enabled
|
| Sergunb |
0:f1834a63f7c1
|
521
|
* @arg GPIO_Remap_SWJ_Disable : Full SWJ Disabled (JTAG-DP + SW-DP)
|
| Sergunb |
0:f1834a63f7c1
|
522
|
* @arg GPIO_Remap_SPI3 : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices)
|
| Sergunb |
0:f1834a63f7c1
|
523
|
* When the SPI3/I2S3 is remapped using this function, the SWJ is configured
|
| Sergunb |
0:f1834a63f7c1
|
524
|
* to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST.
|
| Sergunb |
0:f1834a63f7c1
|
525
|
* @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected
|
| Sergunb |
0:f1834a63f7c1
|
526
|
* to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices)
|
| Sergunb |
0:f1834a63f7c1
|
527
|
* If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to
|
| Sergunb |
0:f1834a63f7c1
|
528
|
* Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.
|
| Sergunb |
0:f1834a63f7c1
|
529
|
* @arg GPIO_Remap_PTP_PPS : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices)
|
| Sergunb |
0:f1834a63f7c1
|
530
|
* @arg GPIO_Remap_TIM15 : TIM15 Alternate Function mapping (only for Value line devices)
|
| Sergunb |
0:f1834a63f7c1
|
531
|
* @arg GPIO_Remap_TIM16 : TIM16 Alternate Function mapping (only for Value line devices)
|
| Sergunb |
0:f1834a63f7c1
|
532
|
* @arg GPIO_Remap_TIM17 : TIM17 Alternate Function mapping (only for Value line devices)
|
| Sergunb |
0:f1834a63f7c1
|
533
|
* @arg GPIO_Remap_CEC : CEC Alternate Function mapping (only for Value line devices)
|
| Sergunb |
0:f1834a63f7c1
|
534
|
* @arg GPIO_Remap_TIM1_DMA : TIM1 DMA requests mapping (only for Value line devices)
|
| Sergunb |
0:f1834a63f7c1
|
535
|
* @arg GPIO_Remap_TIM9 : TIM9 Alternate Function mapping (only for XL-density devices)
|
| Sergunb |
0:f1834a63f7c1
|
536
|
* @arg GPIO_Remap_TIM10 : TIM10 Alternate Function mapping (only for XL-density devices)
|
| Sergunb |
0:f1834a63f7c1
|
537
|
* @arg GPIO_Remap_TIM11 : TIM11 Alternate Function mapping (only for XL-density devices)
|
| Sergunb |
0:f1834a63f7c1
|
538
|
* @arg GPIO_Remap_TIM13 : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices)
|
| Sergunb |
0:f1834a63f7c1
|
539
|
* @arg GPIO_Remap_TIM14 : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices)
|
| Sergunb |
0:f1834a63f7c1
|
540
|
* @arg GPIO_Remap_FSMC_NADV : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices)
|
| Sergunb |
0:f1834a63f7c1
|
541
|
* @arg GPIO_Remap_TIM67_DAC_DMA : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices)
|
| Sergunb |
0:f1834a63f7c1
|
542
|
* @arg GPIO_Remap_TIM12 : TIM12 Alternate Function mapping (only for High density Value line devices)
|
| Sergunb |
0:f1834a63f7c1
|
543
|
* @arg GPIO_Remap_MISC : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
|
| Sergunb |
0:f1834a63f7c1
|
544
|
* only for High density Value line devices)
|
| Sergunb |
0:f1834a63f7c1
|
545
|
* @param NewState: new state of the port pin remapping.
|
| Sergunb |
0:f1834a63f7c1
|
546
|
* This parameter can be: ENABLE or DISABLE.
|
| Sergunb |
0:f1834a63f7c1
|
547
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
548
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
549
|
void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
|
| Sergunb |
0:f1834a63f7c1
|
550
|
{
|
| Sergunb |
0:f1834a63f7c1
|
551
|
uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
552
|
|
| Sergunb |
0:f1834a63f7c1
|
553
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
554
|
assert_param(IS_GPIO_REMAP(GPIO_Remap));
|
| Sergunb |
0:f1834a63f7c1
|
555
|
assert_param(IS_FUNCTIONAL_STATE(NewState));
|
| Sergunb |
0:f1834a63f7c1
|
556
|
|
| Sergunb |
0:f1834a63f7c1
|
557
|
if((GPIO_Remap & 0x80000000) == 0x80000000)
|
| Sergunb |
0:f1834a63f7c1
|
558
|
{
|
| Sergunb |
0:f1834a63f7c1
|
559
|
tmpreg = AFIO->MAPR2;
|
| Sergunb |
0:f1834a63f7c1
|
560
|
}
|
| Sergunb |
0:f1834a63f7c1
|
561
|
else
|
| Sergunb |
0:f1834a63f7c1
|
562
|
{
|
| Sergunb |
0:f1834a63f7c1
|
563
|
tmpreg = AFIO->MAPR;
|
| Sergunb |
0:f1834a63f7c1
|
564
|
}
|
| Sergunb |
0:f1834a63f7c1
|
565
|
|
| Sergunb |
0:f1834a63f7c1
|
566
|
tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
|
| Sergunb |
0:f1834a63f7c1
|
567
|
tmp = GPIO_Remap & LSB_MASK;
|
| Sergunb |
0:f1834a63f7c1
|
568
|
|
| Sergunb |
0:f1834a63f7c1
|
569
|
if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
|
| Sergunb |
0:f1834a63f7c1
|
570
|
{
|
| Sergunb |
0:f1834a63f7c1
|
571
|
tmpreg &= DBGAFR_SWJCFG_MASK;
|
| Sergunb |
0:f1834a63f7c1
|
572
|
AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
|
| Sergunb |
0:f1834a63f7c1
|
573
|
}
|
| Sergunb |
0:f1834a63f7c1
|
574
|
else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
|
| Sergunb |
0:f1834a63f7c1
|
575
|
{
|
| Sergunb |
0:f1834a63f7c1
|
576
|
tmp1 = ((uint32_t)0x03) << tmpmask;
|
| Sergunb |
0:f1834a63f7c1
|
577
|
tmpreg &= ~tmp1;
|
| Sergunb |
0:f1834a63f7c1
|
578
|
tmpreg |= ~DBGAFR_SWJCFG_MASK;
|
| Sergunb |
0:f1834a63f7c1
|
579
|
}
|
| Sergunb |
0:f1834a63f7c1
|
580
|
else
|
| Sergunb |
0:f1834a63f7c1
|
581
|
{
|
| Sergunb |
0:f1834a63f7c1
|
582
|
tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
|
| Sergunb |
0:f1834a63f7c1
|
583
|
tmpreg |= ~DBGAFR_SWJCFG_MASK;
|
| Sergunb |
0:f1834a63f7c1
|
584
|
}
|
| Sergunb |
0:f1834a63f7c1
|
585
|
|
| Sergunb |
0:f1834a63f7c1
|
586
|
if (NewState != DISABLE)
|
| Sergunb |
0:f1834a63f7c1
|
587
|
{
|
| Sergunb |
0:f1834a63f7c1
|
588
|
tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
|
| Sergunb |
0:f1834a63f7c1
|
589
|
}
|
| Sergunb |
0:f1834a63f7c1
|
590
|
|
| Sergunb |
0:f1834a63f7c1
|
591
|
if((GPIO_Remap & 0x80000000) == 0x80000000)
|
| Sergunb |
0:f1834a63f7c1
|
592
|
{
|
| Sergunb |
0:f1834a63f7c1
|
593
|
AFIO->MAPR2 = tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
594
|
}
|
| Sergunb |
0:f1834a63f7c1
|
595
|
else
|
| Sergunb |
0:f1834a63f7c1
|
596
|
{
|
| Sergunb |
0:f1834a63f7c1
|
597
|
AFIO->MAPR = tmpreg;
|
| Sergunb |
0:f1834a63f7c1
|
598
|
}
|
| Sergunb |
0:f1834a63f7c1
|
599
|
}
|
| Sergunb |
0:f1834a63f7c1
|
600
|
|
| Sergunb |
0:f1834a63f7c1
|
601
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
602
|
* @brief Selects the GPIO pin used as EXTI Line.
|
| Sergunb |
0:f1834a63f7c1
|
603
|
* @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
|
| Sergunb |
0:f1834a63f7c1
|
604
|
* This parameter can be GPIO_PortSourceGPIOx where x can be (A..G).
|
| Sergunb |
0:f1834a63f7c1
|
605
|
* @param GPIO_PinSource: specifies the EXTI line to be configured.
|
| Sergunb |
0:f1834a63f7c1
|
606
|
* This parameter can be GPIO_PinSourcex where x can be (0..15).
|
| Sergunb |
0:f1834a63f7c1
|
607
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
608
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
609
|
void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
|
| Sergunb |
0:f1834a63f7c1
|
610
|
{
|
| Sergunb |
0:f1834a63f7c1
|
611
|
uint32_t tmp = 0x00;
|
| Sergunb |
0:f1834a63f7c1
|
612
|
/* Check the parameters */
|
| Sergunb |
0:f1834a63f7c1
|
613
|
assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
|
| Sergunb |
0:f1834a63f7c1
|
614
|
assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
|
| Sergunb |
0:f1834a63f7c1
|
615
|
|
| Sergunb |
0:f1834a63f7c1
|
616
|
tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
|
| Sergunb |
0:f1834a63f7c1
|
617
|
AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
|
| Sergunb |
0:f1834a63f7c1
|
618
|
AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
|
| Sergunb |
0:f1834a63f7c1
|
619
|
}
|
| Sergunb |
0:f1834a63f7c1
|
620
|
|
| Sergunb |
0:f1834a63f7c1
|
621
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
622
|
* @brief Selects the Ethernet media interface.
|
| Sergunb |
0:f1834a63f7c1
|
623
|
* @note This function applies only to STM32 Connectivity line devices.
|
| Sergunb |
0:f1834a63f7c1
|
624
|
* @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
|
| Sergunb |
0:f1834a63f7c1
|
625
|
* This parameter can be one of the following values:
|
| Sergunb |
0:f1834a63f7c1
|
626
|
* @arg GPIO_ETH_MediaInterface_MII: MII mode
|
| Sergunb |
0:f1834a63f7c1
|
627
|
* @arg GPIO_ETH_MediaInterface_RMII: RMII mode
|
| Sergunb |
0:f1834a63f7c1
|
628
|
* @retval None
|
| Sergunb |
0:f1834a63f7c1
|
629
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
630
|
void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
|
| Sergunb |
0:f1834a63f7c1
|
631
|
{
|
| Sergunb |
0:f1834a63f7c1
|
632
|
assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));
|
| Sergunb |
0:f1834a63f7c1
|
633
|
|
| Sergunb |
0:f1834a63f7c1
|
634
|
/* Configure MII_RMII selection bit */
|
| Sergunb |
0:f1834a63f7c1
|
635
|
*(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
|
| Sergunb |
0:f1834a63f7c1
|
636
|
}
|
| Sergunb |
0:f1834a63f7c1
|
637
|
|
| Sergunb |
0:f1834a63f7c1
|
638
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
639
|
* @}
|
| Sergunb |
0:f1834a63f7c1
|
640
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
641
|
|
| Sergunb |
0:f1834a63f7c1
|
642
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
643
|
* @}
|
| Sergunb |
0:f1834a63f7c1
|
644
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
645
|
|
| Sergunb |
0:f1834a63f7c1
|
646
|
/**
|
| Sergunb |
0:f1834a63f7c1
|
647
|
* @}
|
| Sergunb |
0:f1834a63f7c1
|
648
|
*/
|
| Sergunb |
0:f1834a63f7c1
|
649
|
|
| Sergunb |
0:f1834a63f7c1
|
650
|
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|