Sergey Pastor / grbl

stm_lib/src/stm32f10x_flash.c@0:f1834a63f7c1, 2017-09-04 (annotated)

Committer:
Sergunb
Date:
Mon Sep 04 12:03:42 2017 +0000
Revision:
0:f1834a63f7c1
Initial commit

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Sergunb 0:f1834a63f7c1 1 /**
Sergunb 0:f1834a63f7c1 2 ******************************************************************************
Sergunb 0:f1834a63f7c1 3 * @file stm32f10x_flash.c
Sergunb 0:f1834a63f7c1 4 * @author MCD Application Team
Sergunb 0:f1834a63f7c1 5 * @version V3.5.0
Sergunb 0:f1834a63f7c1 6 * @date 11-March-2011
Sergunb 0:f1834a63f7c1 7 * @brief This file provides all the FLASH firmware functions.
Sergunb 0:f1834a63f7c1 8 ******************************************************************************
Sergunb 0:f1834a63f7c1 9 * @attention
Sergunb 0:f1834a63f7c1 10 *
Sergunb 0:f1834a63f7c1 11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
Sergunb 0:f1834a63f7c1 12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
Sergunb 0:f1834a63f7c1 13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
Sergunb 0:f1834a63f7c1 14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
Sergunb 0:f1834a63f7c1 15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
Sergunb 0:f1834a63f7c1 16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
Sergunb 0:f1834a63f7c1 17 *
Sergunb 0:f1834a63f7c1 18 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
Sergunb 0:f1834a63f7c1 19 ******************************************************************************
Sergunb 0:f1834a63f7c1 20 */
Sergunb 0:f1834a63f7c1 21
Sergunb 0:f1834a63f7c1 22 /* Includes ------------------------------------------------------------------*/
Sergunb 0:f1834a63f7c1 23 #include "stm32f10x_flash.h"
Sergunb 0:f1834a63f7c1 24
Sergunb 0:f1834a63f7c1 25 /** @addtogroup STM32F10x_StdPeriph_Driver
Sergunb 0:f1834a63f7c1 26 * @{
Sergunb 0:f1834a63f7c1 27 */
Sergunb 0:f1834a63f7c1 28
Sergunb 0:f1834a63f7c1 29 /** @defgroup FLASH
Sergunb 0:f1834a63f7c1 30 * @brief FLASH driver modules
Sergunb 0:f1834a63f7c1 31 * @{
Sergunb 0:f1834a63f7c1 32 */
Sergunb 0:f1834a63f7c1 33
Sergunb 0:f1834a63f7c1 34 /** @defgroup FLASH_Private_TypesDefinitions
Sergunb 0:f1834a63f7c1 35 * @{
Sergunb 0:f1834a63f7c1 36 */
Sergunb 0:f1834a63f7c1 37
Sergunb 0:f1834a63f7c1 38 /**
Sergunb 0:f1834a63f7c1 39 * @}
Sergunb 0:f1834a63f7c1 40 */
Sergunb 0:f1834a63f7c1 41
Sergunb 0:f1834a63f7c1 42 /** @defgroup FLASH_Private_Defines
Sergunb 0:f1834a63f7c1 43 * @{
Sergunb 0:f1834a63f7c1 44 */
Sergunb 0:f1834a63f7c1 45
Sergunb 0:f1834a63f7c1 46 /* Flash Access Control Register bits */
Sergunb 0:f1834a63f7c1 47 #define ACR_LATENCY_Mask ((uint32_t)0x00000038)
Sergunb 0:f1834a63f7c1 48 #define ACR_HLFCYA_Mask ((uint32_t)0xFFFFFFF7)
Sergunb 0:f1834a63f7c1 49 #define ACR_PRFTBE_Mask ((uint32_t)0xFFFFFFEF)
Sergunb 0:f1834a63f7c1 50
Sergunb 0:f1834a63f7c1 51 /* Flash Access Control Register bits */
Sergunb 0:f1834a63f7c1 52 #define ACR_PRFTBS_Mask ((uint32_t)0x00000020)
Sergunb 0:f1834a63f7c1 53
Sergunb 0:f1834a63f7c1 54 /* Flash Control Register bits */
Sergunb 0:f1834a63f7c1 55 #define CR_PG_Set ((uint32_t)0x00000001)
Sergunb 0:f1834a63f7c1 56 #define CR_PG_Reset ((uint32_t)0x00001FFE)
Sergunb 0:f1834a63f7c1 57 #define CR_PER_Set ((uint32_t)0x00000002)
Sergunb 0:f1834a63f7c1 58 #define CR_PER_Reset ((uint32_t)0x00001FFD)
Sergunb 0:f1834a63f7c1 59 #define CR_MER_Set ((uint32_t)0x00000004)
Sergunb 0:f1834a63f7c1 60 #define CR_MER_Reset ((uint32_t)0x00001FFB)
Sergunb 0:f1834a63f7c1 61 #define CR_OPTPG_Set ((uint32_t)0x00000010)
Sergunb 0:f1834a63f7c1 62 #define CR_OPTPG_Reset ((uint32_t)0x00001FEF)
Sergunb 0:f1834a63f7c1 63 #define CR_OPTER_Set ((uint32_t)0x00000020)
Sergunb 0:f1834a63f7c1 64 #define CR_OPTER_Reset ((uint32_t)0x00001FDF)
Sergunb 0:f1834a63f7c1 65 #define CR_STRT_Set ((uint32_t)0x00000040)
Sergunb 0:f1834a63f7c1 66 #define CR_LOCK_Set ((uint32_t)0x00000080)
Sergunb 0:f1834a63f7c1 67
Sergunb 0:f1834a63f7c1 68 /* FLASH Mask */
Sergunb 0:f1834a63f7c1 69 #define RDPRT_Mask ((uint32_t)0x00000002)
Sergunb 0:f1834a63f7c1 70 #define WRP0_Mask ((uint32_t)0x000000FF)
Sergunb 0:f1834a63f7c1 71 #define WRP1_Mask ((uint32_t)0x0000FF00)
Sergunb 0:f1834a63f7c1 72 #define WRP2_Mask ((uint32_t)0x00FF0000)
Sergunb 0:f1834a63f7c1 73 #define WRP3_Mask ((uint32_t)0xFF000000)
Sergunb 0:f1834a63f7c1 74 #define OB_USER_BFB2 ((uint16_t)0x0008)
Sergunb 0:f1834a63f7c1 75
Sergunb 0:f1834a63f7c1 76 /* FLASH Keys */
Sergunb 0:f1834a63f7c1 77 #define RDP_Key ((uint16_t)0x00A5)
Sergunb 0:f1834a63f7c1 78 #define FLASH_KEY1 ((uint32_t)0x45670123)
Sergunb 0:f1834a63f7c1 79 #define FLASH_KEY2 ((uint32_t)0xCDEF89AB)
Sergunb 0:f1834a63f7c1 80
Sergunb 0:f1834a63f7c1 81 /* FLASH BANK address */
Sergunb 0:f1834a63f7c1 82 #define FLASH_BANK1_END_ADDRESS ((uint32_t)0x807FFFF)
Sergunb 0:f1834a63f7c1 83
Sergunb 0:f1834a63f7c1 84 /* Delay definition */
Sergunb 0:f1834a63f7c1 85 #define EraseTimeout ((uint32_t)0x000B0000)
Sergunb 0:f1834a63f7c1 86 #define ProgramTimeout ((uint32_t)0x00002000)
Sergunb 0:f1834a63f7c1 87 /**
Sergunb 0:f1834a63f7c1 88 * @}
Sergunb 0:f1834a63f7c1 89 */
Sergunb 0:f1834a63f7c1 90
Sergunb 0:f1834a63f7c1 91 /** @defgroup FLASH_Private_Macros
Sergunb 0:f1834a63f7c1 92 * @{
Sergunb 0:f1834a63f7c1 93 */
Sergunb 0:f1834a63f7c1 94
Sergunb 0:f1834a63f7c1 95 /**
Sergunb 0:f1834a63f7c1 96 * @}
Sergunb 0:f1834a63f7c1 97 */
Sergunb 0:f1834a63f7c1 98
Sergunb 0:f1834a63f7c1 99 /** @defgroup FLASH_Private_Variables
Sergunb 0:f1834a63f7c1 100 * @{
Sergunb 0:f1834a63f7c1 101 */
Sergunb 0:f1834a63f7c1 102
Sergunb 0:f1834a63f7c1 103 /**
Sergunb 0:f1834a63f7c1 104 * @}
Sergunb 0:f1834a63f7c1 105 */
Sergunb 0:f1834a63f7c1 106
Sergunb 0:f1834a63f7c1 107 /** @defgroup FLASH_Private_FunctionPrototypes
Sergunb 0:f1834a63f7c1 108 * @{
Sergunb 0:f1834a63f7c1 109 */
Sergunb 0:f1834a63f7c1 110
Sergunb 0:f1834a63f7c1 111 /**
Sergunb 0:f1834a63f7c1 112 * @}
Sergunb 0:f1834a63f7c1 113 */
Sergunb 0:f1834a63f7c1 114
Sergunb 0:f1834a63f7c1 115 /** @defgroup FLASH_Private_Functions
Sergunb 0:f1834a63f7c1 116 * @{
Sergunb 0:f1834a63f7c1 117 */
Sergunb 0:f1834a63f7c1 118
Sergunb 0:f1834a63f7c1 119 /**
Sergunb 0:f1834a63f7c1 120 @code
Sergunb 0:f1834a63f7c1 121
Sergunb 0:f1834a63f7c1 122 This driver provides functions to configure and program the Flash memory of all STM32F10x devices,
Sergunb 0:f1834a63f7c1 123 including the latest STM32F10x_XL density devices.
Sergunb 0:f1834a63f7c1 124
Sergunb 0:f1834a63f7c1 125 STM32F10x_XL devices feature up to 1 Mbyte with dual bank architecture for read-while-write (RWW) capability:
Sergunb 0:f1834a63f7c1 126 - bank1: fixed size of 512 Kbytes (256 pages of 2Kbytes each)
Sergunb 0:f1834a63f7c1 127 - bank2: up to 512 Kbytes (up to 256 pages of 2Kbytes each)
Sergunb 0:f1834a63f7c1 128 While other STM32F10x devices features only one bank with memory up to 512 Kbytes.
Sergunb 0:f1834a63f7c1 129
Sergunb 0:f1834a63f7c1 130 In version V3.3.0, some functions were updated and new ones were added to support
Sergunb 0:f1834a63f7c1 131 STM32F10x_XL devices. Thus some functions manages all devices, while other are
Sergunb 0:f1834a63f7c1 132 dedicated for XL devices only.
Sergunb 0:f1834a63f7c1 133
Sergunb 0:f1834a63f7c1 134 The table below presents the list of available functions depending on the used STM32F10x devices.
Sergunb 0:f1834a63f7c1 135
Sergunb 0:f1834a63f7c1 136 ***************************************************
Sergunb 0:f1834a63f7c1 137 * Legacy functions used for all STM32F10x devices *
Sergunb 0:f1834a63f7c1 138 ***************************************************
Sergunb 0:f1834a63f7c1 139 +----------------------------------------------------------------------------------------------------------------------------------+
Sergunb 0:f1834a63f7c1 140 | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments |
Sergunb 0:f1834a63f7c1 141 | | devices | devices | |
Sergunb 0:f1834a63f7c1 142 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 143 |FLASH_SetLatency | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 144 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 145 |FLASH_HalfCycleAccessCmd | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 146 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 147 |FLASH_PrefetchBufferCmd | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 148 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 149 |FLASH_Unlock | Yes | Yes | - For STM32F10X_XL devices: unlock Bank1 and Bank2. |
Sergunb 0:f1834a63f7c1 150 | | | | - For other devices: unlock Bank1 and it is equivalent |
Sergunb 0:f1834a63f7c1 151 | | | | to FLASH_UnlockBank1 function. |
Sergunb 0:f1834a63f7c1 152 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 153 |FLASH_Lock | Yes | Yes | - For STM32F10X_XL devices: lock Bank1 and Bank2. |
Sergunb 0:f1834a63f7c1 154 | | | | - For other devices: lock Bank1 and it is equivalent |
Sergunb 0:f1834a63f7c1 155 | | | | to FLASH_LockBank1 function. |
Sergunb 0:f1834a63f7c1 156 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 157 |FLASH_ErasePage | Yes | Yes | - For STM32F10x_XL devices: erase a page in Bank1 and Bank2 |
Sergunb 0:f1834a63f7c1 158 | | | | - For other devices: erase a page in Bank1 |
Sergunb 0:f1834a63f7c1 159 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 160 |FLASH_EraseAllPages | Yes | Yes | - For STM32F10x_XL devices: erase all pages in Bank1 and Bank2 |
Sergunb 0:f1834a63f7c1 161 | | | | - For other devices: erase all pages in Bank1 |
Sergunb 0:f1834a63f7c1 162 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 163 |FLASH_EraseOptionBytes | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 164 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 165 |FLASH_ProgramWord | Yes | Yes | Updated to program up to 1MByte (depending on the used device) |
Sergunb 0:f1834a63f7c1 166 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 167 |FLASH_ProgramHalfWord | Yes | Yes | Updated to program up to 1MByte (depending on the used device) |
Sergunb 0:f1834a63f7c1 168 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 169 |FLASH_ProgramOptionByteData | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 170 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 171 |FLASH_EnableWriteProtection | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 172 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 173 |FLASH_ReadOutProtection | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 174 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 175 |FLASH_UserOptionByteConfig | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 176 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 177 |FLASH_GetUserOptionByte | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 178 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 179 |FLASH_GetWriteProtectionOptionByte | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 180 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 181 |FLASH_GetReadOutProtectionStatus | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 182 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 183 |FLASH_GetPrefetchBufferStatus | Yes | Yes | No change |
Sergunb 0:f1834a63f7c1 184 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 185 |FLASH_ITConfig | Yes | Yes | - For STM32F10x_XL devices: enable Bank1 and Bank2's interrupts|
Sergunb 0:f1834a63f7c1 186 | | | | - For other devices: enable Bank1's interrupts |
Sergunb 0:f1834a63f7c1 187 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 188 |FLASH_GetFlagStatus | Yes | Yes | - For STM32F10x_XL devices: return Bank1 and Bank2's flag status|
Sergunb 0:f1834a63f7c1 189 | | | | - For other devices: return Bank1's flag status |
Sergunb 0:f1834a63f7c1 190 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 191 |FLASH_ClearFlag | Yes | Yes | - For STM32F10x_XL devices: clear Bank1 and Bank2's flag |
Sergunb 0:f1834a63f7c1 192 | | | | - For other devices: clear Bank1's flag |
Sergunb 0:f1834a63f7c1 193 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 194 |FLASH_GetStatus | Yes | Yes | - Return the status of Bank1 (for all devices) |
Sergunb 0:f1834a63f7c1 195 | | | | equivalent to FLASH_GetBank1Status function |
Sergunb 0:f1834a63f7c1 196 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 197 |FLASH_WaitForLastOperation | Yes | Yes | - Wait for Bank1 last operation (for all devices) |
Sergunb 0:f1834a63f7c1 198 | | | | equivalent to: FLASH_WaitForLastBank1Operation function |
Sergunb 0:f1834a63f7c1 199 +----------------------------------------------------------------------------------------------------------------------------------+
Sergunb 0:f1834a63f7c1 200
Sergunb 0:f1834a63f7c1 201 ************************************************************************************************************************
Sergunb 0:f1834a63f7c1 202 * New functions used for all STM32F10x devices to manage Bank1: *
Sergunb 0:f1834a63f7c1 203 * - These functions are mainly useful for STM32F10x_XL density devices, to have separate control for Bank1 and bank2 *
Sergunb 0:f1834a63f7c1 204 * - For other devices, these functions are optional (covered by functions listed above) *
Sergunb 0:f1834a63f7c1 205 ************************************************************************************************************************
Sergunb 0:f1834a63f7c1 206 +----------------------------------------------------------------------------------------------------------------------------------+
Sergunb 0:f1834a63f7c1 207 | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments |
Sergunb 0:f1834a63f7c1 208 | | devices | devices | |
Sergunb 0:f1834a63f7c1 209 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 210 | FLASH_UnlockBank1 | Yes | Yes | - Unlock Bank1 |
Sergunb 0:f1834a63f7c1 211 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 212 |FLASH_LockBank1 | Yes | Yes | - Lock Bank1 |
Sergunb 0:f1834a63f7c1 213 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 214 | FLASH_EraseAllBank1Pages | Yes | Yes | - Erase all pages in Bank1 |
Sergunb 0:f1834a63f7c1 215 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 216 | FLASH_GetBank1Status | Yes | Yes | - Return the status of Bank1 |
Sergunb 0:f1834a63f7c1 217 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 218 | FLASH_WaitForLastBank1Operation | Yes | Yes | - Wait for Bank1 last operation |
Sergunb 0:f1834a63f7c1 219 +----------------------------------------------------------------------------------------------------------------------------------+
Sergunb 0:f1834a63f7c1 220
Sergunb 0:f1834a63f7c1 221 *****************************************************************************
Sergunb 0:f1834a63f7c1 222 * New Functions used only with STM32F10x_XL density devices to manage Bank2 *
Sergunb 0:f1834a63f7c1 223 *****************************************************************************
Sergunb 0:f1834a63f7c1 224 +----------------------------------------------------------------------------------------------------------------------------------+
Sergunb 0:f1834a63f7c1 225 | Functions prototypes |STM32F10x_XL|Other STM32F10x| Comments |
Sergunb 0:f1834a63f7c1 226 | | devices | devices | |
Sergunb 0:f1834a63f7c1 227 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 228 | FLASH_UnlockBank2 | Yes | No | - Unlock Bank2 |
Sergunb 0:f1834a63f7c1 229 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 230 |FLASH_LockBank2 | Yes | No | - Lock Bank2 |
Sergunb 0:f1834a63f7c1 231 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 232 | FLASH_EraseAllBank2Pages | Yes | No | - Erase all pages in Bank2 |
Sergunb 0:f1834a63f7c1 233 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 234 | FLASH_GetBank2Status | Yes | No | - Return the status of Bank2 |
Sergunb 0:f1834a63f7c1 235 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 236 | FLASH_WaitForLastBank2Operation | Yes | No | - Wait for Bank2 last operation |
Sergunb 0:f1834a63f7c1 237 |----------------------------------------------------------------------------------------------------------------------------------|
Sergunb 0:f1834a63f7c1 238 | FLASH_BootConfig | Yes | No | - Configure to boot from Bank1 or Bank2 |
Sergunb 0:f1834a63f7c1 239 +----------------------------------------------------------------------------------------------------------------------------------+
Sergunb 0:f1834a63f7c1 240 @endcode
Sergunb 0:f1834a63f7c1 241 */
Sergunb 0:f1834a63f7c1 242
Sergunb 0:f1834a63f7c1 243
Sergunb 0:f1834a63f7c1 244 /**
Sergunb 0:f1834a63f7c1 245 * @brief Sets the code latency value.
Sergunb 0:f1834a63f7c1 246 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 247 * @param FLASH_Latency: specifies the FLASH Latency value.
Sergunb 0:f1834a63f7c1 248 * This parameter can be one of the following values:
Sergunb 0:f1834a63f7c1 249 * @arg FLASH_Latency_0: FLASH Zero Latency cycle
Sergunb 0:f1834a63f7c1 250 * @arg FLASH_Latency_1: FLASH One Latency cycle
Sergunb 0:f1834a63f7c1 251 * @arg FLASH_Latency_2: FLASH Two Latency cycles
Sergunb 0:f1834a63f7c1 252 * @retval None
Sergunb 0:f1834a63f7c1 253 */
Sergunb 0:f1834a63f7c1 254 void FLASH_SetLatency(uint32_t FLASH_Latency)
Sergunb 0:f1834a63f7c1 255 {
Sergunb 0:f1834a63f7c1 256 uint32_t tmpreg = 0;
Sergunb 0:f1834a63f7c1 257
Sergunb 0:f1834a63f7c1 258 /* Check the parameters */
Sergunb 0:f1834a63f7c1 259 assert_param(IS_FLASH_LATENCY(FLASH_Latency));
Sergunb 0:f1834a63f7c1 260
Sergunb 0:f1834a63f7c1 261 /* Read the ACR register */
Sergunb 0:f1834a63f7c1 262 tmpreg = FLASH->ACR;
Sergunb 0:f1834a63f7c1 263
Sergunb 0:f1834a63f7c1 264 /* Sets the Latency value */
Sergunb 0:f1834a63f7c1 265 tmpreg &= ACR_LATENCY_Mask;
Sergunb 0:f1834a63f7c1 266 tmpreg |= FLASH_Latency;
Sergunb 0:f1834a63f7c1 267
Sergunb 0:f1834a63f7c1 268 /* Write the ACR register */
Sergunb 0:f1834a63f7c1 269 FLASH->ACR = tmpreg;
Sergunb 0:f1834a63f7c1 270 }
Sergunb 0:f1834a63f7c1 271
Sergunb 0:f1834a63f7c1 272 /**
Sergunb 0:f1834a63f7c1 273 * @brief Enables or disables the Half cycle flash access.
Sergunb 0:f1834a63f7c1 274 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 275 * @param FLASH_HalfCycleAccess: specifies the FLASH Half cycle Access mode.
Sergunb 0:f1834a63f7c1 276 * This parameter can be one of the following values:
Sergunb 0:f1834a63f7c1 277 * @arg FLASH_HalfCycleAccess_Enable: FLASH Half Cycle Enable
Sergunb 0:f1834a63f7c1 278 * @arg FLASH_HalfCycleAccess_Disable: FLASH Half Cycle Disable
Sergunb 0:f1834a63f7c1 279 * @retval None
Sergunb 0:f1834a63f7c1 280 */
Sergunb 0:f1834a63f7c1 281 void FLASH_HalfCycleAccessCmd(uint32_t FLASH_HalfCycleAccess)
Sergunb 0:f1834a63f7c1 282 {
Sergunb 0:f1834a63f7c1 283 /* Check the parameters */
Sergunb 0:f1834a63f7c1 284 assert_param(IS_FLASH_HALFCYCLEACCESS_STATE(FLASH_HalfCycleAccess));
Sergunb 0:f1834a63f7c1 285
Sergunb 0:f1834a63f7c1 286 /* Enable or disable the Half cycle access */
Sergunb 0:f1834a63f7c1 287 FLASH->ACR &= ACR_HLFCYA_Mask;
Sergunb 0:f1834a63f7c1 288 FLASH->ACR |= FLASH_HalfCycleAccess;
Sergunb 0:f1834a63f7c1 289 }
Sergunb 0:f1834a63f7c1 290
Sergunb 0:f1834a63f7c1 291 /**
Sergunb 0:f1834a63f7c1 292 * @brief Enables or disables the Prefetch Buffer.
Sergunb 0:f1834a63f7c1 293 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 294 * @param FLASH_PrefetchBuffer: specifies the Prefetch buffer status.
Sergunb 0:f1834a63f7c1 295 * This parameter can be one of the following values:
Sergunb 0:f1834a63f7c1 296 * @arg FLASH_PrefetchBuffer_Enable: FLASH Prefetch Buffer Enable
Sergunb 0:f1834a63f7c1 297 * @arg FLASH_PrefetchBuffer_Disable: FLASH Prefetch Buffer Disable
Sergunb 0:f1834a63f7c1 298 * @retval None
Sergunb 0:f1834a63f7c1 299 */
Sergunb 0:f1834a63f7c1 300 void FLASH_PrefetchBufferCmd(uint32_t FLASH_PrefetchBuffer)
Sergunb 0:f1834a63f7c1 301 {
Sergunb 0:f1834a63f7c1 302 /* Check the parameters */
Sergunb 0:f1834a63f7c1 303 assert_param(IS_FLASH_PREFETCHBUFFER_STATE(FLASH_PrefetchBuffer));
Sergunb 0:f1834a63f7c1 304
Sergunb 0:f1834a63f7c1 305 /* Enable or disable the Prefetch Buffer */
Sergunb 0:f1834a63f7c1 306 FLASH->ACR &= ACR_PRFTBE_Mask;
Sergunb 0:f1834a63f7c1 307 FLASH->ACR |= FLASH_PrefetchBuffer;
Sergunb 0:f1834a63f7c1 308 }
Sergunb 0:f1834a63f7c1 309
Sergunb 0:f1834a63f7c1 310 /**
Sergunb 0:f1834a63f7c1 311 * @brief Unlocks the FLASH Program Erase Controller.
Sergunb 0:f1834a63f7c1 312 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 313 * - For STM32F10X_XL devices this function unlocks Bank1 and Bank2.
Sergunb 0:f1834a63f7c1 314 * - For all other devices it unlocks Bank1 and it is equivalent
Sergunb 0:f1834a63f7c1 315 * to FLASH_UnlockBank1 function..
Sergunb 0:f1834a63f7c1 316 * @param None
Sergunb 0:f1834a63f7c1 317 * @retval None
Sergunb 0:f1834a63f7c1 318 */
Sergunb 0:f1834a63f7c1 319 void FLASH_Unlock(void)
Sergunb 0:f1834a63f7c1 320 {
Sergunb 0:f1834a63f7c1 321 /* Authorize the FPEC of Bank1 Access */
Sergunb 0:f1834a63f7c1 322 FLASH->KEYR = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 323 FLASH->KEYR = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 324
Sergunb 0:f1834a63f7c1 325 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 326 /* Authorize the FPEC of Bank2 Access */
Sergunb 0:f1834a63f7c1 327 FLASH->KEYR2 = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 328 FLASH->KEYR2 = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 329 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 330 }
Sergunb 0:f1834a63f7c1 331 /**
Sergunb 0:f1834a63f7c1 332 * @brief Unlocks the FLASH Bank1 Program Erase Controller.
Sergunb 0:f1834a63f7c1 333 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 334 * - For STM32F10X_XL devices this function unlocks Bank1.
Sergunb 0:f1834a63f7c1 335 * - For all other devices it unlocks Bank1 and it is
Sergunb 0:f1834a63f7c1 336 * equivalent to FLASH_Unlock function.
Sergunb 0:f1834a63f7c1 337 * @param None
Sergunb 0:f1834a63f7c1 338 * @retval None
Sergunb 0:f1834a63f7c1 339 */
Sergunb 0:f1834a63f7c1 340 void FLASH_UnlockBank1(void)
Sergunb 0:f1834a63f7c1 341 {
Sergunb 0:f1834a63f7c1 342 /* Authorize the FPEC of Bank1 Access */
Sergunb 0:f1834a63f7c1 343 FLASH->KEYR = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 344 FLASH->KEYR = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 345 }
Sergunb 0:f1834a63f7c1 346
Sergunb 0:f1834a63f7c1 347 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 348 /**
Sergunb 0:f1834a63f7c1 349 * @brief Unlocks the FLASH Bank2 Program Erase Controller.
Sergunb 0:f1834a63f7c1 350 * @note This function can be used only for STM32F10X_XL density devices.
Sergunb 0:f1834a63f7c1 351 * @param None
Sergunb 0:f1834a63f7c1 352 * @retval None
Sergunb 0:f1834a63f7c1 353 */
Sergunb 0:f1834a63f7c1 354 void FLASH_UnlockBank2(void)
Sergunb 0:f1834a63f7c1 355 {
Sergunb 0:f1834a63f7c1 356 /* Authorize the FPEC of Bank2 Access */
Sergunb 0:f1834a63f7c1 357 FLASH->KEYR2 = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 358 FLASH->KEYR2 = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 359
Sergunb 0:f1834a63f7c1 360 }
Sergunb 0:f1834a63f7c1 361 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 362
Sergunb 0:f1834a63f7c1 363 /**
Sergunb 0:f1834a63f7c1 364 * @brief Locks the FLASH Program Erase Controller.
Sergunb 0:f1834a63f7c1 365 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 366 * - For STM32F10X_XL devices this function Locks Bank1 and Bank2.
Sergunb 0:f1834a63f7c1 367 * - For all other devices it Locks Bank1 and it is equivalent
Sergunb 0:f1834a63f7c1 368 * to FLASH_LockBank1 function.
Sergunb 0:f1834a63f7c1 369 * @param None
Sergunb 0:f1834a63f7c1 370 * @retval None
Sergunb 0:f1834a63f7c1 371 */
Sergunb 0:f1834a63f7c1 372 void FLASH_Lock(void)
Sergunb 0:f1834a63f7c1 373 {
Sergunb 0:f1834a63f7c1 374 /* Set the Lock Bit to lock the FPEC and the CR of Bank1 */
Sergunb 0:f1834a63f7c1 375 FLASH->CR |= CR_LOCK_Set;
Sergunb 0:f1834a63f7c1 376
Sergunb 0:f1834a63f7c1 377 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 378 /* Set the Lock Bit to lock the FPEC and the CR of Bank2 */
Sergunb 0:f1834a63f7c1 379 FLASH->CR2 |= CR_LOCK_Set;
Sergunb 0:f1834a63f7c1 380 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 381 }
Sergunb 0:f1834a63f7c1 382
Sergunb 0:f1834a63f7c1 383 /**
Sergunb 0:f1834a63f7c1 384 * @brief Locks the FLASH Bank1 Program Erase Controller.
Sergunb 0:f1834a63f7c1 385 * @note this function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 386 * - For STM32F10X_XL devices this function Locks Bank1.
Sergunb 0:f1834a63f7c1 387 * - For all other devices it Locks Bank1 and it is equivalent
Sergunb 0:f1834a63f7c1 388 * to FLASH_Lock function.
Sergunb 0:f1834a63f7c1 389 * @param None
Sergunb 0:f1834a63f7c1 390 * @retval None
Sergunb 0:f1834a63f7c1 391 */
Sergunb 0:f1834a63f7c1 392 void FLASH_LockBank1(void)
Sergunb 0:f1834a63f7c1 393 {
Sergunb 0:f1834a63f7c1 394 /* Set the Lock Bit to lock the FPEC and the CR of Bank1 */
Sergunb 0:f1834a63f7c1 395 FLASH->CR |= CR_LOCK_Set;
Sergunb 0:f1834a63f7c1 396 }
Sergunb 0:f1834a63f7c1 397
Sergunb 0:f1834a63f7c1 398 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 399 /**
Sergunb 0:f1834a63f7c1 400 * @brief Locks the FLASH Bank2 Program Erase Controller.
Sergunb 0:f1834a63f7c1 401 * @note This function can be used only for STM32F10X_XL density devices.
Sergunb 0:f1834a63f7c1 402 * @param None
Sergunb 0:f1834a63f7c1 403 * @retval None
Sergunb 0:f1834a63f7c1 404 */
Sergunb 0:f1834a63f7c1 405 void FLASH_LockBank2(void)
Sergunb 0:f1834a63f7c1 406 {
Sergunb 0:f1834a63f7c1 407 /* Set the Lock Bit to lock the FPEC and the CR of Bank2 */
Sergunb 0:f1834a63f7c1 408 FLASH->CR2 |= CR_LOCK_Set;
Sergunb 0:f1834a63f7c1 409 }
Sergunb 0:f1834a63f7c1 410 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 411
Sergunb 0:f1834a63f7c1 412 /**
Sergunb 0:f1834a63f7c1 413 * @brief Erases a specified FLASH page.
Sergunb 0:f1834a63f7c1 414 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 415 * @param Page_Address: The page address to be erased.
Sergunb 0:f1834a63f7c1 416 * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 417 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 418 */
Sergunb 0:f1834a63f7c1 419 FLASH_Status FLASH_ErasePage(uint32_t Page_Address)
Sergunb 0:f1834a63f7c1 420 {
Sergunb 0:f1834a63f7c1 421 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 422 /* Check the parameters */
Sergunb 0:f1834a63f7c1 423 assert_param(IS_FLASH_ADDRESS(Page_Address));
Sergunb 0:f1834a63f7c1 424
Sergunb 0:f1834a63f7c1 425 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 426 if(Page_Address < FLASH_BANK1_END_ADDRESS)
Sergunb 0:f1834a63f7c1 427 {
Sergunb 0:f1834a63f7c1 428 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 429 status = FLASH_WaitForLastBank1Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 430 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 431 {
Sergunb 0:f1834a63f7c1 432 /* if the previous operation is completed, proceed to erase the page */
Sergunb 0:f1834a63f7c1 433 FLASH->CR|= CR_PER_Set;
Sergunb 0:f1834a63f7c1 434 FLASH->AR = Page_Address;
Sergunb 0:f1834a63f7c1 435 FLASH->CR|= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 436
Sergunb 0:f1834a63f7c1 437 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 438 status = FLASH_WaitForLastBank1Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 439
Sergunb 0:f1834a63f7c1 440 /* Disable the PER Bit */
Sergunb 0:f1834a63f7c1 441 FLASH->CR &= CR_PER_Reset;
Sergunb 0:f1834a63f7c1 442 }
Sergunb 0:f1834a63f7c1 443 }
Sergunb 0:f1834a63f7c1 444 else
Sergunb 0:f1834a63f7c1 445 {
Sergunb 0:f1834a63f7c1 446 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 447 status = FLASH_WaitForLastBank2Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 448 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 449 {
Sergunb 0:f1834a63f7c1 450 /* if the previous operation is completed, proceed to erase the page */
Sergunb 0:f1834a63f7c1 451 FLASH->CR2|= CR_PER_Set;
Sergunb 0:f1834a63f7c1 452 FLASH->AR2 = Page_Address;
Sergunb 0:f1834a63f7c1 453 FLASH->CR2|= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 454
Sergunb 0:f1834a63f7c1 455 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 456 status = FLASH_WaitForLastBank2Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 457
Sergunb 0:f1834a63f7c1 458 /* Disable the PER Bit */
Sergunb 0:f1834a63f7c1 459 FLASH->CR2 &= CR_PER_Reset;
Sergunb 0:f1834a63f7c1 460 }
Sergunb 0:f1834a63f7c1 461 }
Sergunb 0:f1834a63f7c1 462 #else
Sergunb 0:f1834a63f7c1 463 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 464 status = FLASH_WaitForLastOperation(EraseTimeout);
Sergunb 0:f1834a63f7c1 465
Sergunb 0:f1834a63f7c1 466 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 467 {
Sergunb 0:f1834a63f7c1 468 /* if the previous operation is completed, proceed to erase the page */
Sergunb 0:f1834a63f7c1 469 FLASH->CR|= CR_PER_Set;
Sergunb 0:f1834a63f7c1 470 FLASH->AR = Page_Address;
Sergunb 0:f1834a63f7c1 471 FLASH->CR|= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 472
Sergunb 0:f1834a63f7c1 473 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 474 status = FLASH_WaitForLastOperation(EraseTimeout);
Sergunb 0:f1834a63f7c1 475
Sergunb 0:f1834a63f7c1 476 /* Disable the PER Bit */
Sergunb 0:f1834a63f7c1 477 FLASH->CR &= CR_PER_Reset;
Sergunb 0:f1834a63f7c1 478 }
Sergunb 0:f1834a63f7c1 479 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 480
Sergunb 0:f1834a63f7c1 481 /* Return the Erase Status */
Sergunb 0:f1834a63f7c1 482 return status;
Sergunb 0:f1834a63f7c1 483 }
Sergunb 0:f1834a63f7c1 484
Sergunb 0:f1834a63f7c1 485 /**
Sergunb 0:f1834a63f7c1 486 * @brief Erases all FLASH pages.
Sergunb 0:f1834a63f7c1 487 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 488 * @param None
Sergunb 0:f1834a63f7c1 489 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 490 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 491 */
Sergunb 0:f1834a63f7c1 492 FLASH_Status FLASH_EraseAllPages(void)
Sergunb 0:f1834a63f7c1 493 {
Sergunb 0:f1834a63f7c1 494 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 495
Sergunb 0:f1834a63f7c1 496 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 497 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 498 status = FLASH_WaitForLastBank1Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 499
Sergunb 0:f1834a63f7c1 500 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 501 {
Sergunb 0:f1834a63f7c1 502 /* if the previous operation is completed, proceed to erase all pages */
Sergunb 0:f1834a63f7c1 503 FLASH->CR |= CR_MER_Set;
Sergunb 0:f1834a63f7c1 504 FLASH->CR |= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 505
Sergunb 0:f1834a63f7c1 506 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 507 status = FLASH_WaitForLastBank1Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 508
Sergunb 0:f1834a63f7c1 509 /* Disable the MER Bit */
Sergunb 0:f1834a63f7c1 510 FLASH->CR &= CR_MER_Reset;
Sergunb 0:f1834a63f7c1 511 }
Sergunb 0:f1834a63f7c1 512 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 513 {
Sergunb 0:f1834a63f7c1 514 /* if the previous operation is completed, proceed to erase all pages */
Sergunb 0:f1834a63f7c1 515 FLASH->CR2 |= CR_MER_Set;
Sergunb 0:f1834a63f7c1 516 FLASH->CR2 |= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 517
Sergunb 0:f1834a63f7c1 518 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 519 status = FLASH_WaitForLastBank2Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 520
Sergunb 0:f1834a63f7c1 521 /* Disable the MER Bit */
Sergunb 0:f1834a63f7c1 522 FLASH->CR2 &= CR_MER_Reset;
Sergunb 0:f1834a63f7c1 523 }
Sergunb 0:f1834a63f7c1 524 #else
Sergunb 0:f1834a63f7c1 525 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 526 status = FLASH_WaitForLastOperation(EraseTimeout);
Sergunb 0:f1834a63f7c1 527 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 528 {
Sergunb 0:f1834a63f7c1 529 /* if the previous operation is completed, proceed to erase all pages */
Sergunb 0:f1834a63f7c1 530 FLASH->CR |= CR_MER_Set;
Sergunb 0:f1834a63f7c1 531 FLASH->CR |= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 532
Sergunb 0:f1834a63f7c1 533 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 534 status = FLASH_WaitForLastOperation(EraseTimeout);
Sergunb 0:f1834a63f7c1 535
Sergunb 0:f1834a63f7c1 536 /* Disable the MER Bit */
Sergunb 0:f1834a63f7c1 537 FLASH->CR &= CR_MER_Reset;
Sergunb 0:f1834a63f7c1 538 }
Sergunb 0:f1834a63f7c1 539 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 540
Sergunb 0:f1834a63f7c1 541 /* Return the Erase Status */
Sergunb 0:f1834a63f7c1 542 return status;
Sergunb 0:f1834a63f7c1 543 }
Sergunb 0:f1834a63f7c1 544
Sergunb 0:f1834a63f7c1 545 /**
Sergunb 0:f1834a63f7c1 546 * @brief Erases all Bank1 FLASH pages.
Sergunb 0:f1834a63f7c1 547 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 548 * - For STM32F10X_XL devices this function erases all Bank1 pages.
Sergunb 0:f1834a63f7c1 549 * - For all other devices it erases all Bank1 pages and it is equivalent
Sergunb 0:f1834a63f7c1 550 * to FLASH_EraseAllPages function.
Sergunb 0:f1834a63f7c1 551 * @param None
Sergunb 0:f1834a63f7c1 552 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 553 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 554 */
Sergunb 0:f1834a63f7c1 555 FLASH_Status FLASH_EraseAllBank1Pages(void)
Sergunb 0:f1834a63f7c1 556 {
Sergunb 0:f1834a63f7c1 557 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 558 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 559 status = FLASH_WaitForLastBank1Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 560
Sergunb 0:f1834a63f7c1 561 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 562 {
Sergunb 0:f1834a63f7c1 563 /* if the previous operation is completed, proceed to erase all pages */
Sergunb 0:f1834a63f7c1 564 FLASH->CR |= CR_MER_Set;
Sergunb 0:f1834a63f7c1 565 FLASH->CR |= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 566
Sergunb 0:f1834a63f7c1 567 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 568 status = FLASH_WaitForLastBank1Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 569
Sergunb 0:f1834a63f7c1 570 /* Disable the MER Bit */
Sergunb 0:f1834a63f7c1 571 FLASH->CR &= CR_MER_Reset;
Sergunb 0:f1834a63f7c1 572 }
Sergunb 0:f1834a63f7c1 573 /* Return the Erase Status */
Sergunb 0:f1834a63f7c1 574 return status;
Sergunb 0:f1834a63f7c1 575 }
Sergunb 0:f1834a63f7c1 576
Sergunb 0:f1834a63f7c1 577 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 578 /**
Sergunb 0:f1834a63f7c1 579 * @brief Erases all Bank2 FLASH pages.
Sergunb 0:f1834a63f7c1 580 * @note This function can be used only for STM32F10x_XL density devices.
Sergunb 0:f1834a63f7c1 581 * @param None
Sergunb 0:f1834a63f7c1 582 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 583 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 584 */
Sergunb 0:f1834a63f7c1 585 FLASH_Status FLASH_EraseAllBank2Pages(void)
Sergunb 0:f1834a63f7c1 586 {
Sergunb 0:f1834a63f7c1 587 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 588 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 589 status = FLASH_WaitForLastBank2Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 590
Sergunb 0:f1834a63f7c1 591 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 592 {
Sergunb 0:f1834a63f7c1 593 /* if the previous operation is completed, proceed to erase all pages */
Sergunb 0:f1834a63f7c1 594 FLASH->CR2 |= CR_MER_Set;
Sergunb 0:f1834a63f7c1 595 FLASH->CR2 |= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 596
Sergunb 0:f1834a63f7c1 597 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 598 status = FLASH_WaitForLastBank2Operation(EraseTimeout);
Sergunb 0:f1834a63f7c1 599
Sergunb 0:f1834a63f7c1 600 /* Disable the MER Bit */
Sergunb 0:f1834a63f7c1 601 FLASH->CR2 &= CR_MER_Reset;
Sergunb 0:f1834a63f7c1 602 }
Sergunb 0:f1834a63f7c1 603 /* Return the Erase Status */
Sergunb 0:f1834a63f7c1 604 return status;
Sergunb 0:f1834a63f7c1 605 }
Sergunb 0:f1834a63f7c1 606 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 607
Sergunb 0:f1834a63f7c1 608 /**
Sergunb 0:f1834a63f7c1 609 * @brief Erases the FLASH option bytes.
Sergunb 0:f1834a63f7c1 610 * @note This functions erases all option bytes except the Read protection (RDP).
Sergunb 0:f1834a63f7c1 611 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 612 * @param None
Sergunb 0:f1834a63f7c1 613 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 614 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 615 */
Sergunb 0:f1834a63f7c1 616 FLASH_Status FLASH_EraseOptionBytes(void)
Sergunb 0:f1834a63f7c1 617 {
Sergunb 0:f1834a63f7c1 618 uint16_t rdptmp = RDP_Key;
Sergunb 0:f1834a63f7c1 619
Sergunb 0:f1834a63f7c1 620 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 621
Sergunb 0:f1834a63f7c1 622 /* Get the actual read protection Option Byte value */
Sergunb 0:f1834a63f7c1 623 if(FLASH_GetReadOutProtectionStatus() != RESET)
Sergunb 0:f1834a63f7c1 624 {
Sergunb 0:f1834a63f7c1 625 rdptmp = 0x00;
Sergunb 0:f1834a63f7c1 626 }
Sergunb 0:f1834a63f7c1 627
Sergunb 0:f1834a63f7c1 628 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 629 status = FLASH_WaitForLastOperation(EraseTimeout);
Sergunb 0:f1834a63f7c1 630 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 631 {
Sergunb 0:f1834a63f7c1 632 /* Authorize the small information block programming */
Sergunb 0:f1834a63f7c1 633 FLASH->OPTKEYR = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 634 FLASH->OPTKEYR = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 635
Sergunb 0:f1834a63f7c1 636 /* if the previous operation is completed, proceed to erase the option bytes */
Sergunb 0:f1834a63f7c1 637 FLASH->CR |= CR_OPTER_Set;
Sergunb 0:f1834a63f7c1 638 FLASH->CR |= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 639 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 640 status = FLASH_WaitForLastOperation(EraseTimeout);
Sergunb 0:f1834a63f7c1 641
Sergunb 0:f1834a63f7c1 642 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 643 {
Sergunb 0:f1834a63f7c1 644 /* if the erase operation is completed, disable the OPTER Bit */
Sergunb 0:f1834a63f7c1 645 FLASH->CR &= CR_OPTER_Reset;
Sergunb 0:f1834a63f7c1 646
Sergunb 0:f1834a63f7c1 647 /* Enable the Option Bytes Programming operation */
Sergunb 0:f1834a63f7c1 648 FLASH->CR |= CR_OPTPG_Set;
Sergunb 0:f1834a63f7c1 649 /* Restore the last read protection Option Byte value */
Sergunb 0:f1834a63f7c1 650 OB->RDP = (uint16_t)rdptmp;
Sergunb 0:f1834a63f7c1 651 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 652 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 653
Sergunb 0:f1834a63f7c1 654 if(status != FLASH_TIMEOUT)
Sergunb 0:f1834a63f7c1 655 {
Sergunb 0:f1834a63f7c1 656 /* if the program operation is completed, disable the OPTPG Bit */
Sergunb 0:f1834a63f7c1 657 FLASH->CR &= CR_OPTPG_Reset;
Sergunb 0:f1834a63f7c1 658 }
Sergunb 0:f1834a63f7c1 659 }
Sergunb 0:f1834a63f7c1 660 else
Sergunb 0:f1834a63f7c1 661 {
Sergunb 0:f1834a63f7c1 662 if (status != FLASH_TIMEOUT)
Sergunb 0:f1834a63f7c1 663 {
Sergunb 0:f1834a63f7c1 664 /* Disable the OPTPG Bit */
Sergunb 0:f1834a63f7c1 665 FLASH->CR &= CR_OPTPG_Reset;
Sergunb 0:f1834a63f7c1 666 }
Sergunb 0:f1834a63f7c1 667 }
Sergunb 0:f1834a63f7c1 668 }
Sergunb 0:f1834a63f7c1 669 /* Return the erase status */
Sergunb 0:f1834a63f7c1 670 return status;
Sergunb 0:f1834a63f7c1 671 }
Sergunb 0:f1834a63f7c1 672
Sergunb 0:f1834a63f7c1 673 /**
Sergunb 0:f1834a63f7c1 674 * @brief Programs a word at a specified address.
Sergunb 0:f1834a63f7c1 675 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 676 * @param Address: specifies the address to be programmed.
Sergunb 0:f1834a63f7c1 677 * @param Data: specifies the data to be programmed.
Sergunb 0:f1834a63f7c1 678 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 679 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 680 */
Sergunb 0:f1834a63f7c1 681 FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
Sergunb 0:f1834a63f7c1 682 {
Sergunb 0:f1834a63f7c1 683 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 684 __IO uint32_t tmp = 0;
Sergunb 0:f1834a63f7c1 685
Sergunb 0:f1834a63f7c1 686 /* Check the parameters */
Sergunb 0:f1834a63f7c1 687 assert_param(IS_FLASH_ADDRESS(Address));
Sergunb 0:f1834a63f7c1 688
Sergunb 0:f1834a63f7c1 689 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 690 if(Address < FLASH_BANK1_END_ADDRESS - 2)
Sergunb 0:f1834a63f7c1 691 {
Sergunb 0:f1834a63f7c1 692 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 693 status = FLASH_WaitForLastBank1Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 694 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 695 {
Sergunb 0:f1834a63f7c1 696 /* if the previous operation is completed, proceed to program the new first
Sergunb 0:f1834a63f7c1 697 half word */
Sergunb 0:f1834a63f7c1 698 FLASH->CR |= CR_PG_Set;
Sergunb 0:f1834a63f7c1 699
Sergunb 0:f1834a63f7c1 700 *(__IO uint16_t*)Address = (uint16_t)Data;
Sergunb 0:f1834a63f7c1 701 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 702 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 703
Sergunb 0:f1834a63f7c1 704 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 705 {
Sergunb 0:f1834a63f7c1 706 /* if the previous operation is completed, proceed to program the new second
Sergunb 0:f1834a63f7c1 707 half word */
Sergunb 0:f1834a63f7c1 708 tmp = Address + 2;
Sergunb 0:f1834a63f7c1 709
Sergunb 0:f1834a63f7c1 710 *(__IO uint16_t*) tmp = Data >> 16;
Sergunb 0:f1834a63f7c1 711
Sergunb 0:f1834a63f7c1 712 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 713 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 714
Sergunb 0:f1834a63f7c1 715 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 716 FLASH->CR &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 717 }
Sergunb 0:f1834a63f7c1 718 else
Sergunb 0:f1834a63f7c1 719 {
Sergunb 0:f1834a63f7c1 720 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 721 FLASH->CR &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 722 }
Sergunb 0:f1834a63f7c1 723 }
Sergunb 0:f1834a63f7c1 724 }
Sergunb 0:f1834a63f7c1 725 else if(Address == (FLASH_BANK1_END_ADDRESS - 1))
Sergunb 0:f1834a63f7c1 726 {
Sergunb 0:f1834a63f7c1 727 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 728 status = FLASH_WaitForLastBank1Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 729
Sergunb 0:f1834a63f7c1 730 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 731 {
Sergunb 0:f1834a63f7c1 732 /* if the previous operation is completed, proceed to program the new first
Sergunb 0:f1834a63f7c1 733 half word */
Sergunb 0:f1834a63f7c1 734 FLASH->CR |= CR_PG_Set;
Sergunb 0:f1834a63f7c1 735
Sergunb 0:f1834a63f7c1 736 *(__IO uint16_t*)Address = (uint16_t)Data;
Sergunb 0:f1834a63f7c1 737
Sergunb 0:f1834a63f7c1 738 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 739 status = FLASH_WaitForLastBank1Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 740
Sergunb 0:f1834a63f7c1 741 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 742 FLASH->CR &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 743 }
Sergunb 0:f1834a63f7c1 744 else
Sergunb 0:f1834a63f7c1 745 {
Sergunb 0:f1834a63f7c1 746 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 747 FLASH->CR &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 748 }
Sergunb 0:f1834a63f7c1 749
Sergunb 0:f1834a63f7c1 750 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 751 status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 752
Sergunb 0:f1834a63f7c1 753 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 754 {
Sergunb 0:f1834a63f7c1 755 /* if the previous operation is completed, proceed to program the new second
Sergunb 0:f1834a63f7c1 756 half word */
Sergunb 0:f1834a63f7c1 757 FLASH->CR2 |= CR_PG_Set;
Sergunb 0:f1834a63f7c1 758 tmp = Address + 2;
Sergunb 0:f1834a63f7c1 759
Sergunb 0:f1834a63f7c1 760 *(__IO uint16_t*) tmp = Data >> 16;
Sergunb 0:f1834a63f7c1 761
Sergunb 0:f1834a63f7c1 762 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 763 status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 764
Sergunb 0:f1834a63f7c1 765 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 766 FLASH->CR2 &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 767 }
Sergunb 0:f1834a63f7c1 768 else
Sergunb 0:f1834a63f7c1 769 {
Sergunb 0:f1834a63f7c1 770 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 771 FLASH->CR2 &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 772 }
Sergunb 0:f1834a63f7c1 773 }
Sergunb 0:f1834a63f7c1 774 else
Sergunb 0:f1834a63f7c1 775 {
Sergunb 0:f1834a63f7c1 776 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 777 status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 778
Sergunb 0:f1834a63f7c1 779 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 780 {
Sergunb 0:f1834a63f7c1 781 /* if the previous operation is completed, proceed to program the new first
Sergunb 0:f1834a63f7c1 782 half word */
Sergunb 0:f1834a63f7c1 783 FLASH->CR2 |= CR_PG_Set;
Sergunb 0:f1834a63f7c1 784
Sergunb 0:f1834a63f7c1 785 *(__IO uint16_t*)Address = (uint16_t)Data;
Sergunb 0:f1834a63f7c1 786 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 787 status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 788
Sergunb 0:f1834a63f7c1 789 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 790 {
Sergunb 0:f1834a63f7c1 791 /* if the previous operation is completed, proceed to program the new second
Sergunb 0:f1834a63f7c1 792 half word */
Sergunb 0:f1834a63f7c1 793 tmp = Address + 2;
Sergunb 0:f1834a63f7c1 794
Sergunb 0:f1834a63f7c1 795 *(__IO uint16_t*) tmp = Data >> 16;
Sergunb 0:f1834a63f7c1 796
Sergunb 0:f1834a63f7c1 797 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 798 status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 799
Sergunb 0:f1834a63f7c1 800 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 801 FLASH->CR2 &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 802 }
Sergunb 0:f1834a63f7c1 803 else
Sergunb 0:f1834a63f7c1 804 {
Sergunb 0:f1834a63f7c1 805 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 806 FLASH->CR2 &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 807 }
Sergunb 0:f1834a63f7c1 808 }
Sergunb 0:f1834a63f7c1 809 }
Sergunb 0:f1834a63f7c1 810 #else
Sergunb 0:f1834a63f7c1 811 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 812 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 813
Sergunb 0:f1834a63f7c1 814 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 815 {
Sergunb 0:f1834a63f7c1 816 /* if the previous operation is completed, proceed to program the new first
Sergunb 0:f1834a63f7c1 817 half word */
Sergunb 0:f1834a63f7c1 818 FLASH->CR |= CR_PG_Set;
Sergunb 0:f1834a63f7c1 819
Sergunb 0:f1834a63f7c1 820 *(__IO uint16_t*)Address = (uint16_t)Data;
Sergunb 0:f1834a63f7c1 821 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 822 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 823
Sergunb 0:f1834a63f7c1 824 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 825 {
Sergunb 0:f1834a63f7c1 826 /* if the previous operation is completed, proceed to program the new second
Sergunb 0:f1834a63f7c1 827 half word */
Sergunb 0:f1834a63f7c1 828 tmp = Address + 2;
Sergunb 0:f1834a63f7c1 829
Sergunb 0:f1834a63f7c1 830 *(__IO uint16_t*) tmp = Data >> 16;
Sergunb 0:f1834a63f7c1 831
Sergunb 0:f1834a63f7c1 832 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 833 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 834
Sergunb 0:f1834a63f7c1 835 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 836 FLASH->CR &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 837 }
Sergunb 0:f1834a63f7c1 838 else
Sergunb 0:f1834a63f7c1 839 {
Sergunb 0:f1834a63f7c1 840 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 841 FLASH->CR &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 842 }
Sergunb 0:f1834a63f7c1 843 }
Sergunb 0:f1834a63f7c1 844 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 845
Sergunb 0:f1834a63f7c1 846 /* Return the Program Status */
Sergunb 0:f1834a63f7c1 847 return status;
Sergunb 0:f1834a63f7c1 848 }
Sergunb 0:f1834a63f7c1 849
Sergunb 0:f1834a63f7c1 850 /**
Sergunb 0:f1834a63f7c1 851 * @brief Programs a half word at a specified address.
Sergunb 0:f1834a63f7c1 852 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 853 * @param Address: specifies the address to be programmed.
Sergunb 0:f1834a63f7c1 854 * @param Data: specifies the data to be programmed.
Sergunb 0:f1834a63f7c1 855 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 856 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 857 */
Sergunb 0:f1834a63f7c1 858 FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
Sergunb 0:f1834a63f7c1 859 {
Sergunb 0:f1834a63f7c1 860 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 861 /* Check the parameters */
Sergunb 0:f1834a63f7c1 862 assert_param(IS_FLASH_ADDRESS(Address));
Sergunb 0:f1834a63f7c1 863
Sergunb 0:f1834a63f7c1 864 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 865 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 866 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 867
Sergunb 0:f1834a63f7c1 868 if(Address < FLASH_BANK1_END_ADDRESS)
Sergunb 0:f1834a63f7c1 869 {
Sergunb 0:f1834a63f7c1 870 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 871 {
Sergunb 0:f1834a63f7c1 872 /* if the previous operation is completed, proceed to program the new data */
Sergunb 0:f1834a63f7c1 873 FLASH->CR |= CR_PG_Set;
Sergunb 0:f1834a63f7c1 874
Sergunb 0:f1834a63f7c1 875 *(__IO uint16_t*)Address = Data;
Sergunb 0:f1834a63f7c1 876 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 877 status = FLASH_WaitForLastBank1Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 878
Sergunb 0:f1834a63f7c1 879 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 880 FLASH->CR &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 881 }
Sergunb 0:f1834a63f7c1 882 }
Sergunb 0:f1834a63f7c1 883 else
Sergunb 0:f1834a63f7c1 884 {
Sergunb 0:f1834a63f7c1 885 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 886 {
Sergunb 0:f1834a63f7c1 887 /* if the previous operation is completed, proceed to program the new data */
Sergunb 0:f1834a63f7c1 888 FLASH->CR2 |= CR_PG_Set;
Sergunb 0:f1834a63f7c1 889
Sergunb 0:f1834a63f7c1 890 *(__IO uint16_t*)Address = Data;
Sergunb 0:f1834a63f7c1 891 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 892 status = FLASH_WaitForLastBank2Operation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 893
Sergunb 0:f1834a63f7c1 894 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 895 FLASH->CR2 &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 896 }
Sergunb 0:f1834a63f7c1 897 }
Sergunb 0:f1834a63f7c1 898 #else
Sergunb 0:f1834a63f7c1 899 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 900 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 901
Sergunb 0:f1834a63f7c1 902 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 903 {
Sergunb 0:f1834a63f7c1 904 /* if the previous operation is completed, proceed to program the new data */
Sergunb 0:f1834a63f7c1 905 FLASH->CR |= CR_PG_Set;
Sergunb 0:f1834a63f7c1 906
Sergunb 0:f1834a63f7c1 907 *(__IO uint16_t*)Address = Data;
Sergunb 0:f1834a63f7c1 908 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 909 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 910
Sergunb 0:f1834a63f7c1 911 /* Disable the PG Bit */
Sergunb 0:f1834a63f7c1 912 FLASH->CR &= CR_PG_Reset;
Sergunb 0:f1834a63f7c1 913 }
Sergunb 0:f1834a63f7c1 914 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 915
Sergunb 0:f1834a63f7c1 916 /* Return the Program Status */
Sergunb 0:f1834a63f7c1 917 return status;
Sergunb 0:f1834a63f7c1 918 }
Sergunb 0:f1834a63f7c1 919
Sergunb 0:f1834a63f7c1 920 /**
Sergunb 0:f1834a63f7c1 921 * @brief Programs a half word at a specified Option Byte Data address.
Sergunb 0:f1834a63f7c1 922 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 923 * @param Address: specifies the address to be programmed.
Sergunb 0:f1834a63f7c1 924 * This parameter can be 0x1FFFF804 or 0x1FFFF806.
Sergunb 0:f1834a63f7c1 925 * @param Data: specifies the data to be programmed.
Sergunb 0:f1834a63f7c1 926 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 927 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 928 */
Sergunb 0:f1834a63f7c1 929 FLASH_Status FLASH_ProgramOptionByteData(uint32_t Address, uint8_t Data)
Sergunb 0:f1834a63f7c1 930 {
Sergunb 0:f1834a63f7c1 931 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 932 /* Check the parameters */
Sergunb 0:f1834a63f7c1 933 assert_param(IS_OB_DATA_ADDRESS(Address));
Sergunb 0:f1834a63f7c1 934 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 935
Sergunb 0:f1834a63f7c1 936 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 937 {
Sergunb 0:f1834a63f7c1 938 /* Authorize the small information block programming */
Sergunb 0:f1834a63f7c1 939 FLASH->OPTKEYR = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 940 FLASH->OPTKEYR = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 941 /* Enables the Option Bytes Programming operation */
Sergunb 0:f1834a63f7c1 942 FLASH->CR |= CR_OPTPG_Set;
Sergunb 0:f1834a63f7c1 943 *(__IO uint16_t*)Address = Data;
Sergunb 0:f1834a63f7c1 944
Sergunb 0:f1834a63f7c1 945 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 946 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 947 if(status != FLASH_TIMEOUT)
Sergunb 0:f1834a63f7c1 948 {
Sergunb 0:f1834a63f7c1 949 /* if the program operation is completed, disable the OPTPG Bit */
Sergunb 0:f1834a63f7c1 950 FLASH->CR &= CR_OPTPG_Reset;
Sergunb 0:f1834a63f7c1 951 }
Sergunb 0:f1834a63f7c1 952 }
Sergunb 0:f1834a63f7c1 953 /* Return the Option Byte Data Program Status */
Sergunb 0:f1834a63f7c1 954 return status;
Sergunb 0:f1834a63f7c1 955 }
Sergunb 0:f1834a63f7c1 956
Sergunb 0:f1834a63f7c1 957 /**
Sergunb 0:f1834a63f7c1 958 * @brief Write protects the desired pages
Sergunb 0:f1834a63f7c1 959 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 960 * @param FLASH_Pages: specifies the address of the pages to be write protected.
Sergunb 0:f1834a63f7c1 961 * This parameter can be:
Sergunb 0:f1834a63f7c1 962 * @arg For @b STM32_Low-density_devices: value between FLASH_WRProt_Pages0to3 and FLASH_WRProt_Pages28to31
Sergunb 0:f1834a63f7c1 963 * @arg For @b STM32_Medium-density_devices: value between FLASH_WRProt_Pages0to3
Sergunb 0:f1834a63f7c1 964 * and FLASH_WRProt_Pages124to127
Sergunb 0:f1834a63f7c1 965 * @arg For @b STM32_High-density_devices: value between FLASH_WRProt_Pages0to1 and
Sergunb 0:f1834a63f7c1 966 * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to255
Sergunb 0:f1834a63f7c1 967 * @arg For @b STM32_Connectivity_line_devices: value between FLASH_WRProt_Pages0to1 and
Sergunb 0:f1834a63f7c1 968 * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to127
Sergunb 0:f1834a63f7c1 969 * @arg For @b STM32_XL-density_devices: value between FLASH_WRProt_Pages0to1 and
Sergunb 0:f1834a63f7c1 970 * FLASH_WRProt_Pages60to61 or FLASH_WRProt_Pages62to511
Sergunb 0:f1834a63f7c1 971 * @arg FLASH_WRProt_AllPages
Sergunb 0:f1834a63f7c1 972 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 973 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 974 */
Sergunb 0:f1834a63f7c1 975 FLASH_Status FLASH_EnableWriteProtection(uint32_t FLASH_Pages)
Sergunb 0:f1834a63f7c1 976 {
Sergunb 0:f1834a63f7c1 977 uint16_t WRP0_Data = 0xFFFF, WRP1_Data = 0xFFFF, WRP2_Data = 0xFFFF, WRP3_Data = 0xFFFF;
Sergunb 0:f1834a63f7c1 978
Sergunb 0:f1834a63f7c1 979 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 980
Sergunb 0:f1834a63f7c1 981 /* Check the parameters */
Sergunb 0:f1834a63f7c1 982 assert_param(IS_FLASH_WRPROT_PAGE(FLASH_Pages));
Sergunb 0:f1834a63f7c1 983
Sergunb 0:f1834a63f7c1 984 FLASH_Pages = (uint32_t)(~FLASH_Pages);
Sergunb 0:f1834a63f7c1 985 WRP0_Data = (uint16_t)(FLASH_Pages & WRP0_Mask);
Sergunb 0:f1834a63f7c1 986 WRP1_Data = (uint16_t)((FLASH_Pages & WRP1_Mask) >> 8);
Sergunb 0:f1834a63f7c1 987 WRP2_Data = (uint16_t)((FLASH_Pages & WRP2_Mask) >> 16);
Sergunb 0:f1834a63f7c1 988 WRP3_Data = (uint16_t)((FLASH_Pages & WRP3_Mask) >> 24);
Sergunb 0:f1834a63f7c1 989
Sergunb 0:f1834a63f7c1 990 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 991 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 992
Sergunb 0:f1834a63f7c1 993 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 994 {
Sergunb 0:f1834a63f7c1 995 /* Authorizes the small information block programming */
Sergunb 0:f1834a63f7c1 996 FLASH->OPTKEYR = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 997 FLASH->OPTKEYR = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 998 FLASH->CR |= CR_OPTPG_Set;
Sergunb 0:f1834a63f7c1 999 if(WRP0_Data != 0xFF)
Sergunb 0:f1834a63f7c1 1000 {
Sergunb 0:f1834a63f7c1 1001 OB->WRP0 = WRP0_Data;
Sergunb 0:f1834a63f7c1 1002
Sergunb 0:f1834a63f7c1 1003 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1004 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 1005 }
Sergunb 0:f1834a63f7c1 1006 if((status == FLASH_COMPLETE) && (WRP1_Data != 0xFF))
Sergunb 0:f1834a63f7c1 1007 {
Sergunb 0:f1834a63f7c1 1008 OB->WRP1 = WRP1_Data;
Sergunb 0:f1834a63f7c1 1009
Sergunb 0:f1834a63f7c1 1010 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1011 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 1012 }
Sergunb 0:f1834a63f7c1 1013 if((status == FLASH_COMPLETE) && (WRP2_Data != 0xFF))
Sergunb 0:f1834a63f7c1 1014 {
Sergunb 0:f1834a63f7c1 1015 OB->WRP2 = WRP2_Data;
Sergunb 0:f1834a63f7c1 1016
Sergunb 0:f1834a63f7c1 1017 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1018 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 1019 }
Sergunb 0:f1834a63f7c1 1020
Sergunb 0:f1834a63f7c1 1021 if((status == FLASH_COMPLETE)&& (WRP3_Data != 0xFF))
Sergunb 0:f1834a63f7c1 1022 {
Sergunb 0:f1834a63f7c1 1023 OB->WRP3 = WRP3_Data;
Sergunb 0:f1834a63f7c1 1024
Sergunb 0:f1834a63f7c1 1025 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1026 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 1027 }
Sergunb 0:f1834a63f7c1 1028
Sergunb 0:f1834a63f7c1 1029 if(status != FLASH_TIMEOUT)
Sergunb 0:f1834a63f7c1 1030 {
Sergunb 0:f1834a63f7c1 1031 /* if the program operation is completed, disable the OPTPG Bit */
Sergunb 0:f1834a63f7c1 1032 FLASH->CR &= CR_OPTPG_Reset;
Sergunb 0:f1834a63f7c1 1033 }
Sergunb 0:f1834a63f7c1 1034 }
Sergunb 0:f1834a63f7c1 1035 /* Return the write protection operation Status */
Sergunb 0:f1834a63f7c1 1036 return status;
Sergunb 0:f1834a63f7c1 1037 }
Sergunb 0:f1834a63f7c1 1038
Sergunb 0:f1834a63f7c1 1039 /**
Sergunb 0:f1834a63f7c1 1040 * @brief Enables or disables the read out protection.
Sergunb 0:f1834a63f7c1 1041 * @note If the user has already programmed the other option bytes before calling
Sergunb 0:f1834a63f7c1 1042 * this function, he must re-program them since this function erases all option bytes.
Sergunb 0:f1834a63f7c1 1043 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 1044 * @param Newstate: new state of the ReadOut Protection.
Sergunb 0:f1834a63f7c1 1045 * This parameter can be: ENABLE or DISABLE.
Sergunb 0:f1834a63f7c1 1046 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 1047 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 1048 */
Sergunb 0:f1834a63f7c1 1049 FLASH_Status FLASH_ReadOutProtection(FunctionalState NewState)
Sergunb 0:f1834a63f7c1 1050 {
Sergunb 0:f1834a63f7c1 1051 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1052 /* Check the parameters */
Sergunb 0:f1834a63f7c1 1053 assert_param(IS_FUNCTIONAL_STATE(NewState));
Sergunb 0:f1834a63f7c1 1054 status = FLASH_WaitForLastOperation(EraseTimeout);
Sergunb 0:f1834a63f7c1 1055 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 1056 {
Sergunb 0:f1834a63f7c1 1057 /* Authorizes the small information block programming */
Sergunb 0:f1834a63f7c1 1058 FLASH->OPTKEYR = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 1059 FLASH->OPTKEYR = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 1060 FLASH->CR |= CR_OPTER_Set;
Sergunb 0:f1834a63f7c1 1061 FLASH->CR |= CR_STRT_Set;
Sergunb 0:f1834a63f7c1 1062 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1063 status = FLASH_WaitForLastOperation(EraseTimeout);
Sergunb 0:f1834a63f7c1 1064 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 1065 {
Sergunb 0:f1834a63f7c1 1066 /* if the erase operation is completed, disable the OPTER Bit */
Sergunb 0:f1834a63f7c1 1067 FLASH->CR &= CR_OPTER_Reset;
Sergunb 0:f1834a63f7c1 1068 /* Enable the Option Bytes Programming operation */
Sergunb 0:f1834a63f7c1 1069 FLASH->CR |= CR_OPTPG_Set;
Sergunb 0:f1834a63f7c1 1070 if(NewState != DISABLE)
Sergunb 0:f1834a63f7c1 1071 {
Sergunb 0:f1834a63f7c1 1072 OB->RDP = 0x00;
Sergunb 0:f1834a63f7c1 1073 }
Sergunb 0:f1834a63f7c1 1074 else
Sergunb 0:f1834a63f7c1 1075 {
Sergunb 0:f1834a63f7c1 1076 OB->RDP = RDP_Key;
Sergunb 0:f1834a63f7c1 1077 }
Sergunb 0:f1834a63f7c1 1078 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1079 status = FLASH_WaitForLastOperation(EraseTimeout);
Sergunb 0:f1834a63f7c1 1080
Sergunb 0:f1834a63f7c1 1081 if(status != FLASH_TIMEOUT)
Sergunb 0:f1834a63f7c1 1082 {
Sergunb 0:f1834a63f7c1 1083 /* if the program operation is completed, disable the OPTPG Bit */
Sergunb 0:f1834a63f7c1 1084 FLASH->CR &= CR_OPTPG_Reset;
Sergunb 0:f1834a63f7c1 1085 }
Sergunb 0:f1834a63f7c1 1086 }
Sergunb 0:f1834a63f7c1 1087 else
Sergunb 0:f1834a63f7c1 1088 {
Sergunb 0:f1834a63f7c1 1089 if(status != FLASH_TIMEOUT)
Sergunb 0:f1834a63f7c1 1090 {
Sergunb 0:f1834a63f7c1 1091 /* Disable the OPTER Bit */
Sergunb 0:f1834a63f7c1 1092 FLASH->CR &= CR_OPTER_Reset;
Sergunb 0:f1834a63f7c1 1093 }
Sergunb 0:f1834a63f7c1 1094 }
Sergunb 0:f1834a63f7c1 1095 }
Sergunb 0:f1834a63f7c1 1096 /* Return the protection operation Status */
Sergunb 0:f1834a63f7c1 1097 return status;
Sergunb 0:f1834a63f7c1 1098 }
Sergunb 0:f1834a63f7c1 1099
Sergunb 0:f1834a63f7c1 1100 /**
Sergunb 0:f1834a63f7c1 1101 * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
Sergunb 0:f1834a63f7c1 1102 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 1103 * @param OB_IWDG: Selects the IWDG mode
Sergunb 0:f1834a63f7c1 1104 * This parameter can be one of the following values:
Sergunb 0:f1834a63f7c1 1105 * @arg OB_IWDG_SW: Software IWDG selected
Sergunb 0:f1834a63f7c1 1106 * @arg OB_IWDG_HW: Hardware IWDG selected
Sergunb 0:f1834a63f7c1 1107 * @param OB_STOP: Reset event when entering STOP mode.
Sergunb 0:f1834a63f7c1 1108 * This parameter can be one of the following values:
Sergunb 0:f1834a63f7c1 1109 * @arg OB_STOP_NoRST: No reset generated when entering in STOP
Sergunb 0:f1834a63f7c1 1110 * @arg OB_STOP_RST: Reset generated when entering in STOP
Sergunb 0:f1834a63f7c1 1111 * @param OB_STDBY: Reset event when entering Standby mode.
Sergunb 0:f1834a63f7c1 1112 * This parameter can be one of the following values:
Sergunb 0:f1834a63f7c1 1113 * @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY
Sergunb 0:f1834a63f7c1 1114 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
Sergunb 0:f1834a63f7c1 1115 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 1116 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 1117 */
Sergunb 0:f1834a63f7c1 1118 FLASH_Status FLASH_UserOptionByteConfig(uint16_t OB_IWDG, uint16_t OB_STOP, uint16_t OB_STDBY)
Sergunb 0:f1834a63f7c1 1119 {
Sergunb 0:f1834a63f7c1 1120 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1121
Sergunb 0:f1834a63f7c1 1122 /* Check the parameters */
Sergunb 0:f1834a63f7c1 1123 assert_param(IS_OB_IWDG_SOURCE(OB_IWDG));
Sergunb 0:f1834a63f7c1 1124 assert_param(IS_OB_STOP_SOURCE(OB_STOP));
Sergunb 0:f1834a63f7c1 1125 assert_param(IS_OB_STDBY_SOURCE(OB_STDBY));
Sergunb 0:f1834a63f7c1 1126
Sergunb 0:f1834a63f7c1 1127 /* Authorize the small information block programming */
Sergunb 0:f1834a63f7c1 1128 FLASH->OPTKEYR = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 1129 FLASH->OPTKEYR = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 1130
Sergunb 0:f1834a63f7c1 1131 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1132 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 1133
Sergunb 0:f1834a63f7c1 1134 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 1135 {
Sergunb 0:f1834a63f7c1 1136 /* Enable the Option Bytes Programming operation */
Sergunb 0:f1834a63f7c1 1137 FLASH->CR |= CR_OPTPG_Set;
Sergunb 0:f1834a63f7c1 1138
Sergunb 0:f1834a63f7c1 1139 OB->USER = OB_IWDG | (uint16_t)(OB_STOP | (uint16_t)(OB_STDBY | ((uint16_t)0xF8)));
Sergunb 0:f1834a63f7c1 1140
Sergunb 0:f1834a63f7c1 1141 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1142 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 1143 if(status != FLASH_TIMEOUT)
Sergunb 0:f1834a63f7c1 1144 {
Sergunb 0:f1834a63f7c1 1145 /* if the program operation is completed, disable the OPTPG Bit */
Sergunb 0:f1834a63f7c1 1146 FLASH->CR &= CR_OPTPG_Reset;
Sergunb 0:f1834a63f7c1 1147 }
Sergunb 0:f1834a63f7c1 1148 }
Sergunb 0:f1834a63f7c1 1149 /* Return the Option Byte program Status */
Sergunb 0:f1834a63f7c1 1150 return status;
Sergunb 0:f1834a63f7c1 1151 }
Sergunb 0:f1834a63f7c1 1152
Sergunb 0:f1834a63f7c1 1153 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 1154 /**
Sergunb 0:f1834a63f7c1 1155 * @brief Configures to boot from Bank1 or Bank2.
Sergunb 0:f1834a63f7c1 1156 * @note This function can be used only for STM32F10x_XL density devices.
Sergunb 0:f1834a63f7c1 1157 * @param FLASH_BOOT: select the FLASH Bank to boot from.
Sergunb 0:f1834a63f7c1 1158 * This parameter can be one of the following values:
Sergunb 0:f1834a63f7c1 1159 * @arg FLASH_BOOT_Bank1: At startup, if boot pins are set in boot from user Flash
Sergunb 0:f1834a63f7c1 1160 * position and this parameter is selected the device will boot from Bank1(Default).
Sergunb 0:f1834a63f7c1 1161 * @arg FLASH_BOOT_Bank2: At startup, if boot pins are set in boot from user Flash
Sergunb 0:f1834a63f7c1 1162 * position and this parameter is selected the device will boot from Bank2 or Bank1,
Sergunb 0:f1834a63f7c1 1163 * depending on the activation of the bank. The active banks are checked in
Sergunb 0:f1834a63f7c1 1164 * the following order: Bank2, followed by Bank1.
Sergunb 0:f1834a63f7c1 1165 * The active bank is recognized by the value programmed at the base address
Sergunb 0:f1834a63f7c1 1166 * of the respective bank (corresponding to the initial stack pointer value
Sergunb 0:f1834a63f7c1 1167 * in the interrupt vector table).
Sergunb 0:f1834a63f7c1 1168 * For more information, please refer to AN2606 from www.st.com.
Sergunb 0:f1834a63f7c1 1169 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 1170 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 1171 */
Sergunb 0:f1834a63f7c1 1172 FLASH_Status FLASH_BootConfig(uint16_t FLASH_BOOT)
Sergunb 0:f1834a63f7c1 1173 {
Sergunb 0:f1834a63f7c1 1174 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1175 assert_param(IS_FLASH_BOOT(FLASH_BOOT));
Sergunb 0:f1834a63f7c1 1176 /* Authorize the small information block programming */
Sergunb 0:f1834a63f7c1 1177 FLASH->OPTKEYR = FLASH_KEY1;
Sergunb 0:f1834a63f7c1 1178 FLASH->OPTKEYR = FLASH_KEY2;
Sergunb 0:f1834a63f7c1 1179
Sergunb 0:f1834a63f7c1 1180 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1181 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 1182
Sergunb 0:f1834a63f7c1 1183 if(status == FLASH_COMPLETE)
Sergunb 0:f1834a63f7c1 1184 {
Sergunb 0:f1834a63f7c1 1185 /* Enable the Option Bytes Programming operation */
Sergunb 0:f1834a63f7c1 1186 FLASH->CR |= CR_OPTPG_Set;
Sergunb 0:f1834a63f7c1 1187
Sergunb 0:f1834a63f7c1 1188 if(FLASH_BOOT == FLASH_BOOT_Bank1)
Sergunb 0:f1834a63f7c1 1189 {
Sergunb 0:f1834a63f7c1 1190 OB->USER |= OB_USER_BFB2;
Sergunb 0:f1834a63f7c1 1191 }
Sergunb 0:f1834a63f7c1 1192 else
Sergunb 0:f1834a63f7c1 1193 {
Sergunb 0:f1834a63f7c1 1194 OB->USER &= (uint16_t)(~(uint16_t)(OB_USER_BFB2));
Sergunb 0:f1834a63f7c1 1195 }
Sergunb 0:f1834a63f7c1 1196 /* Wait for last operation to be completed */
Sergunb 0:f1834a63f7c1 1197 status = FLASH_WaitForLastOperation(ProgramTimeout);
Sergunb 0:f1834a63f7c1 1198 if(status != FLASH_TIMEOUT)
Sergunb 0:f1834a63f7c1 1199 {
Sergunb 0:f1834a63f7c1 1200 /* if the program operation is completed, disable the OPTPG Bit */
Sergunb 0:f1834a63f7c1 1201 FLASH->CR &= CR_OPTPG_Reset;
Sergunb 0:f1834a63f7c1 1202 }
Sergunb 0:f1834a63f7c1 1203 }
Sergunb 0:f1834a63f7c1 1204 /* Return the Option Byte program Status */
Sergunb 0:f1834a63f7c1 1205 return status;
Sergunb 0:f1834a63f7c1 1206 }
Sergunb 0:f1834a63f7c1 1207 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 1208
Sergunb 0:f1834a63f7c1 1209 /**
Sergunb 0:f1834a63f7c1 1210 * @brief Returns the FLASH User Option Bytes values.
Sergunb 0:f1834a63f7c1 1211 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 1212 * @param None
Sergunb 0:f1834a63f7c1 1213 * @retval The FLASH User Option Bytes values:IWDG_SW(Bit0), RST_STOP(Bit1)
Sergunb 0:f1834a63f7c1 1214 * and RST_STDBY(Bit2).
Sergunb 0:f1834a63f7c1 1215 */
Sergunb 0:f1834a63f7c1 1216 uint32_t FLASH_GetUserOptionByte(void)
Sergunb 0:f1834a63f7c1 1217 {
Sergunb 0:f1834a63f7c1 1218 /* Return the User Option Byte */
Sergunb 0:f1834a63f7c1 1219 return (uint32_t)(FLASH->OBR >> 2);
Sergunb 0:f1834a63f7c1 1220 }
Sergunb 0:f1834a63f7c1 1221
Sergunb 0:f1834a63f7c1 1222 /**
Sergunb 0:f1834a63f7c1 1223 * @brief Returns the FLASH Write Protection Option Bytes Register value.
Sergunb 0:f1834a63f7c1 1224 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 1225 * @param None
Sergunb 0:f1834a63f7c1 1226 * @retval The FLASH Write Protection Option Bytes Register value
Sergunb 0:f1834a63f7c1 1227 */
Sergunb 0:f1834a63f7c1 1228 uint32_t FLASH_GetWriteProtectionOptionByte(void)
Sergunb 0:f1834a63f7c1 1229 {
Sergunb 0:f1834a63f7c1 1230 /* Return the Flash write protection Register value */
Sergunb 0:f1834a63f7c1 1231 return (uint32_t)(FLASH->WRPR);
Sergunb 0:f1834a63f7c1 1232 }
Sergunb 0:f1834a63f7c1 1233
Sergunb 0:f1834a63f7c1 1234 /**
Sergunb 0:f1834a63f7c1 1235 * @brief Checks whether the FLASH Read Out Protection Status is set or not.
Sergunb 0:f1834a63f7c1 1236 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 1237 * @param None
Sergunb 0:f1834a63f7c1 1238 * @retval FLASH ReadOut Protection Status(SET or RESET)
Sergunb 0:f1834a63f7c1 1239 */
Sergunb 0:f1834a63f7c1 1240 FlagStatus FLASH_GetReadOutProtectionStatus(void)
Sergunb 0:f1834a63f7c1 1241 {
Sergunb 0:f1834a63f7c1 1242 FlagStatus readoutstatus = RESET;
Sergunb 0:f1834a63f7c1 1243 if ((FLASH->OBR & RDPRT_Mask) != (uint32_t)RESET)
Sergunb 0:f1834a63f7c1 1244 {
Sergunb 0:f1834a63f7c1 1245 readoutstatus = SET;
Sergunb 0:f1834a63f7c1 1246 }
Sergunb 0:f1834a63f7c1 1247 else
Sergunb 0:f1834a63f7c1 1248 {
Sergunb 0:f1834a63f7c1 1249 readoutstatus = RESET;
Sergunb 0:f1834a63f7c1 1250 }
Sergunb 0:f1834a63f7c1 1251 return readoutstatus;
Sergunb 0:f1834a63f7c1 1252 }
Sergunb 0:f1834a63f7c1 1253
Sergunb 0:f1834a63f7c1 1254 /**
Sergunb 0:f1834a63f7c1 1255 * @brief Checks whether the FLASH Prefetch Buffer status is set or not.
Sergunb 0:f1834a63f7c1 1256 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 1257 * @param None
Sergunb 0:f1834a63f7c1 1258 * @retval FLASH Prefetch Buffer Status (SET or RESET).
Sergunb 0:f1834a63f7c1 1259 */
Sergunb 0:f1834a63f7c1 1260 FlagStatus FLASH_GetPrefetchBufferStatus(void)
Sergunb 0:f1834a63f7c1 1261 {
Sergunb 0:f1834a63f7c1 1262 FlagStatus bitstatus = RESET;
Sergunb 0:f1834a63f7c1 1263
Sergunb 0:f1834a63f7c1 1264 if ((FLASH->ACR & ACR_PRFTBS_Mask) != (uint32_t)RESET)
Sergunb 0:f1834a63f7c1 1265 {
Sergunb 0:f1834a63f7c1 1266 bitstatus = SET;
Sergunb 0:f1834a63f7c1 1267 }
Sergunb 0:f1834a63f7c1 1268 else
Sergunb 0:f1834a63f7c1 1269 {
Sergunb 0:f1834a63f7c1 1270 bitstatus = RESET;
Sergunb 0:f1834a63f7c1 1271 }
Sergunb 0:f1834a63f7c1 1272 /* Return the new state of FLASH Prefetch Buffer Status (SET or RESET) */
Sergunb 0:f1834a63f7c1 1273 return bitstatus;
Sergunb 0:f1834a63f7c1 1274 }
Sergunb 0:f1834a63f7c1 1275
Sergunb 0:f1834a63f7c1 1276 /**
Sergunb 0:f1834a63f7c1 1277 * @brief Enables or disables the specified FLASH interrupts.
Sergunb 0:f1834a63f7c1 1278 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 1279 * - For STM32F10X_XL devices, enables or disables the specified FLASH interrupts
Sergunb 0:f1834a63f7c1 1280 for Bank1 and Bank2.
Sergunb 0:f1834a63f7c1 1281 * - For other devices it enables or disables the specified FLASH interrupts for Bank1.
Sergunb 0:f1834a63f7c1 1282 * @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled.
Sergunb 0:f1834a63f7c1 1283 * This parameter can be any combination of the following values:
Sergunb 0:f1834a63f7c1 1284 * @arg FLASH_IT_ERROR: FLASH Error Interrupt
Sergunb 0:f1834a63f7c1 1285 * @arg FLASH_IT_EOP: FLASH end of operation Interrupt
Sergunb 0:f1834a63f7c1 1286 * @param NewState: new state of the specified Flash interrupts.
Sergunb 0:f1834a63f7c1 1287 * This parameter can be: ENABLE or DISABLE.
Sergunb 0:f1834a63f7c1 1288 * @retval None
Sergunb 0:f1834a63f7c1 1289 */
Sergunb 0:f1834a63f7c1 1290 void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState)
Sergunb 0:f1834a63f7c1 1291 {
Sergunb 0:f1834a63f7c1 1292 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 1293 /* Check the parameters */
Sergunb 0:f1834a63f7c1 1294 assert_param(IS_FLASH_IT(FLASH_IT));
Sergunb 0:f1834a63f7c1 1295 assert_param(IS_FUNCTIONAL_STATE(NewState));
Sergunb 0:f1834a63f7c1 1296
Sergunb 0:f1834a63f7c1 1297 if((FLASH_IT & 0x80000000) != 0x0)
Sergunb 0:f1834a63f7c1 1298 {
Sergunb 0:f1834a63f7c1 1299 if(NewState != DISABLE)
Sergunb 0:f1834a63f7c1 1300 {
Sergunb 0:f1834a63f7c1 1301 /* Enable the interrupt sources */
Sergunb 0:f1834a63f7c1 1302 FLASH->CR2 |= (FLASH_IT & 0x7FFFFFFF);
Sergunb 0:f1834a63f7c1 1303 }
Sergunb 0:f1834a63f7c1 1304 else
Sergunb 0:f1834a63f7c1 1305 {
Sergunb 0:f1834a63f7c1 1306 /* Disable the interrupt sources */
Sergunb 0:f1834a63f7c1 1307 FLASH->CR2 &= ~(uint32_t)(FLASH_IT & 0x7FFFFFFF);
Sergunb 0:f1834a63f7c1 1308 }
Sergunb 0:f1834a63f7c1 1309 }
Sergunb 0:f1834a63f7c1 1310 else
Sergunb 0:f1834a63f7c1 1311 {
Sergunb 0:f1834a63f7c1 1312 if(NewState != DISABLE)
Sergunb 0:f1834a63f7c1 1313 {
Sergunb 0:f1834a63f7c1 1314 /* Enable the interrupt sources */
Sergunb 0:f1834a63f7c1 1315 FLASH->CR |= FLASH_IT;
Sergunb 0:f1834a63f7c1 1316 }
Sergunb 0:f1834a63f7c1 1317 else
Sergunb 0:f1834a63f7c1 1318 {
Sergunb 0:f1834a63f7c1 1319 /* Disable the interrupt sources */
Sergunb 0:f1834a63f7c1 1320 FLASH->CR &= ~(uint32_t)FLASH_IT;
Sergunb 0:f1834a63f7c1 1321 }
Sergunb 0:f1834a63f7c1 1322 }
Sergunb 0:f1834a63f7c1 1323 #else
Sergunb 0:f1834a63f7c1 1324 /* Check the parameters */
Sergunb 0:f1834a63f7c1 1325 assert_param(IS_FLASH_IT(FLASH_IT));
Sergunb 0:f1834a63f7c1 1326 assert_param(IS_FUNCTIONAL_STATE(NewState));
Sergunb 0:f1834a63f7c1 1327
Sergunb 0:f1834a63f7c1 1328 if(NewState != DISABLE)
Sergunb 0:f1834a63f7c1 1329 {
Sergunb 0:f1834a63f7c1 1330 /* Enable the interrupt sources */
Sergunb 0:f1834a63f7c1 1331 FLASH->CR |= FLASH_IT;
Sergunb 0:f1834a63f7c1 1332 }
Sergunb 0:f1834a63f7c1 1333 else
Sergunb 0:f1834a63f7c1 1334 {
Sergunb 0:f1834a63f7c1 1335 /* Disable the interrupt sources */
Sergunb 0:f1834a63f7c1 1336 FLASH->CR &= ~(uint32_t)FLASH_IT;
Sergunb 0:f1834a63f7c1 1337 }
Sergunb 0:f1834a63f7c1 1338 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 1339 }
Sergunb 0:f1834a63f7c1 1340
Sergunb 0:f1834a63f7c1 1341 /**
Sergunb 0:f1834a63f7c1 1342 * @brief Checks whether the specified FLASH flag is set or not.
Sergunb 0:f1834a63f7c1 1343 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 1344 * - For STM32F10X_XL devices, this function checks whether the specified
Sergunb 0:f1834a63f7c1 1345 * Bank1 or Bank2 flag is set or not.
Sergunb 0:f1834a63f7c1 1346 * - For other devices, it checks whether the specified Bank1 flag is
Sergunb 0:f1834a63f7c1 1347 * set or not.
Sergunb 0:f1834a63f7c1 1348 * @param FLASH_FLAG: specifies the FLASH flag to check.
Sergunb 0:f1834a63f7c1 1349 * This parameter can be one of the following values:
Sergunb 0:f1834a63f7c1 1350 * @arg FLASH_FLAG_BSY: FLASH Busy flag
Sergunb 0:f1834a63f7c1 1351 * @arg FLASH_FLAG_PGERR: FLASH Program error flag
Sergunb 0:f1834a63f7c1 1352 * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag
Sergunb 0:f1834a63f7c1 1353 * @arg FLASH_FLAG_EOP: FLASH End of Operation flag
Sergunb 0:f1834a63f7c1 1354 * @arg FLASH_FLAG_OPTERR: FLASH Option Byte error flag
Sergunb 0:f1834a63f7c1 1355 * @retval The new state of FLASH_FLAG (SET or RESET).
Sergunb 0:f1834a63f7c1 1356 */
Sergunb 0:f1834a63f7c1 1357 FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG)
Sergunb 0:f1834a63f7c1 1358 {
Sergunb 0:f1834a63f7c1 1359 FlagStatus bitstatus = RESET;
Sergunb 0:f1834a63f7c1 1360
Sergunb 0:f1834a63f7c1 1361 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 1362 /* Check the parameters */
Sergunb 0:f1834a63f7c1 1363 assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ;
Sergunb 0:f1834a63f7c1 1364 if(FLASH_FLAG == FLASH_FLAG_OPTERR)
Sergunb 0:f1834a63f7c1 1365 {
Sergunb 0:f1834a63f7c1 1366 if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET)
Sergunb 0:f1834a63f7c1 1367 {
Sergunb 0:f1834a63f7c1 1368 bitstatus = SET;
Sergunb 0:f1834a63f7c1 1369 }
Sergunb 0:f1834a63f7c1 1370 else
Sergunb 0:f1834a63f7c1 1371 {
Sergunb 0:f1834a63f7c1 1372 bitstatus = RESET;
Sergunb 0:f1834a63f7c1 1373 }
Sergunb 0:f1834a63f7c1 1374 }
Sergunb 0:f1834a63f7c1 1375 else
Sergunb 0:f1834a63f7c1 1376 {
Sergunb 0:f1834a63f7c1 1377 if((FLASH_FLAG & 0x80000000) != 0x0)
Sergunb 0:f1834a63f7c1 1378 {
Sergunb 0:f1834a63f7c1 1379 if((FLASH->SR2 & FLASH_FLAG) != (uint32_t)RESET)
Sergunb 0:f1834a63f7c1 1380 {
Sergunb 0:f1834a63f7c1 1381 bitstatus = SET;
Sergunb 0:f1834a63f7c1 1382 }
Sergunb 0:f1834a63f7c1 1383 else
Sergunb 0:f1834a63f7c1 1384 {
Sergunb 0:f1834a63f7c1 1385 bitstatus = RESET;
Sergunb 0:f1834a63f7c1 1386 }
Sergunb 0:f1834a63f7c1 1387 }
Sergunb 0:f1834a63f7c1 1388 else
Sergunb 0:f1834a63f7c1 1389 {
Sergunb 0:f1834a63f7c1 1390 if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET)
Sergunb 0:f1834a63f7c1 1391 {
Sergunb 0:f1834a63f7c1 1392 bitstatus = SET;
Sergunb 0:f1834a63f7c1 1393 }
Sergunb 0:f1834a63f7c1 1394 else
Sergunb 0:f1834a63f7c1 1395 {
Sergunb 0:f1834a63f7c1 1396 bitstatus = RESET;
Sergunb 0:f1834a63f7c1 1397 }
Sergunb 0:f1834a63f7c1 1398 }
Sergunb 0:f1834a63f7c1 1399 }
Sergunb 0:f1834a63f7c1 1400 #else
Sergunb 0:f1834a63f7c1 1401 /* Check the parameters */
Sergunb 0:f1834a63f7c1 1402 assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)) ;
Sergunb 0:f1834a63f7c1 1403 if(FLASH_FLAG == FLASH_FLAG_OPTERR)
Sergunb 0:f1834a63f7c1 1404 {
Sergunb 0:f1834a63f7c1 1405 if((FLASH->OBR & FLASH_FLAG_OPTERR) != (uint32_t)RESET)
Sergunb 0:f1834a63f7c1 1406 {
Sergunb 0:f1834a63f7c1 1407 bitstatus = SET;
Sergunb 0:f1834a63f7c1 1408 }
Sergunb 0:f1834a63f7c1 1409 else
Sergunb 0:f1834a63f7c1 1410 {
Sergunb 0:f1834a63f7c1 1411 bitstatus = RESET;
Sergunb 0:f1834a63f7c1 1412 }
Sergunb 0:f1834a63f7c1 1413 }
Sergunb 0:f1834a63f7c1 1414 else
Sergunb 0:f1834a63f7c1 1415 {
Sergunb 0:f1834a63f7c1 1416 if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET)
Sergunb 0:f1834a63f7c1 1417 {
Sergunb 0:f1834a63f7c1 1418 bitstatus = SET;
Sergunb 0:f1834a63f7c1 1419 }
Sergunb 0:f1834a63f7c1 1420 else
Sergunb 0:f1834a63f7c1 1421 {
Sergunb 0:f1834a63f7c1 1422 bitstatus = RESET;
Sergunb 0:f1834a63f7c1 1423 }
Sergunb 0:f1834a63f7c1 1424 }
Sergunb 0:f1834a63f7c1 1425 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 1426
Sergunb 0:f1834a63f7c1 1427 /* Return the new state of FLASH_FLAG (SET or RESET) */
Sergunb 0:f1834a63f7c1 1428 return bitstatus;
Sergunb 0:f1834a63f7c1 1429 }
Sergunb 0:f1834a63f7c1 1430
Sergunb 0:f1834a63f7c1 1431 /**
Sergunb 0:f1834a63f7c1 1432 * @brief Clears the FLASH's pending flags.
Sergunb 0:f1834a63f7c1 1433 * @note This function can be used for all STM32F10x devices.
Sergunb 0:f1834a63f7c1 1434 * - For STM32F10X_XL devices, this function clears Bank1 or Bank2’s pending flags
Sergunb 0:f1834a63f7c1 1435 * - For other devices, it clears Bank1’s pending flags.
Sergunb 0:f1834a63f7c1 1436 * @param FLASH_FLAG: specifies the FLASH flags to clear.
Sergunb 0:f1834a63f7c1 1437 * This parameter can be any combination of the following values:
Sergunb 0:f1834a63f7c1 1438 * @arg FLASH_FLAG_PGERR: FLASH Program error flag
Sergunb 0:f1834a63f7c1 1439 * @arg FLASH_FLAG_WRPRTERR: FLASH Write protected error flag
Sergunb 0:f1834a63f7c1 1440 * @arg FLASH_FLAG_EOP: FLASH End of Operation flag
Sergunb 0:f1834a63f7c1 1441 * @retval None
Sergunb 0:f1834a63f7c1 1442 */
Sergunb 0:f1834a63f7c1 1443 void FLASH_ClearFlag(uint32_t FLASH_FLAG)
Sergunb 0:f1834a63f7c1 1444 {
Sergunb 0:f1834a63f7c1 1445 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 1446 /* Check the parameters */
Sergunb 0:f1834a63f7c1 1447 assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ;
Sergunb 0:f1834a63f7c1 1448
Sergunb 0:f1834a63f7c1 1449 if((FLASH_FLAG & 0x80000000) != 0x0)
Sergunb 0:f1834a63f7c1 1450 {
Sergunb 0:f1834a63f7c1 1451 /* Clear the flags */
Sergunb 0:f1834a63f7c1 1452 FLASH->SR2 = FLASH_FLAG;
Sergunb 0:f1834a63f7c1 1453 }
Sergunb 0:f1834a63f7c1 1454 else
Sergunb 0:f1834a63f7c1 1455 {
Sergunb 0:f1834a63f7c1 1456 /* Clear the flags */
Sergunb 0:f1834a63f7c1 1457 FLASH->SR = FLASH_FLAG;
Sergunb 0:f1834a63f7c1 1458 }
Sergunb 0:f1834a63f7c1 1459
Sergunb 0:f1834a63f7c1 1460 #else
Sergunb 0:f1834a63f7c1 1461 /* Check the parameters */
Sergunb 0:f1834a63f7c1 1462 assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)) ;
Sergunb 0:f1834a63f7c1 1463
Sergunb 0:f1834a63f7c1 1464 /* Clear the flags */
Sergunb 0:f1834a63f7c1 1465 FLASH->SR = FLASH_FLAG;
Sergunb 0:f1834a63f7c1 1466 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 1467 }
Sergunb 0:f1834a63f7c1 1468
Sergunb 0:f1834a63f7c1 1469 /**
Sergunb 0:f1834a63f7c1 1470 * @brief Returns the FLASH Status.
Sergunb 0:f1834a63f7c1 1471 * @note This function can be used for all STM32F10x devices, it is equivalent
Sergunb 0:f1834a63f7c1 1472 * to FLASH_GetBank1Status function.
Sergunb 0:f1834a63f7c1 1473 * @param None
Sergunb 0:f1834a63f7c1 1474 * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 1475 * FLASH_ERROR_WRP or FLASH_COMPLETE
Sergunb 0:f1834a63f7c1 1476 */
Sergunb 0:f1834a63f7c1 1477 FLASH_Status FLASH_GetStatus(void)
Sergunb 0:f1834a63f7c1 1478 {
Sergunb 0:f1834a63f7c1 1479 FLASH_Status flashstatus = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1480
Sergunb 0:f1834a63f7c1 1481 if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY)
Sergunb 0:f1834a63f7c1 1482 {
Sergunb 0:f1834a63f7c1 1483 flashstatus = FLASH_BUSY;
Sergunb 0:f1834a63f7c1 1484 }
Sergunb 0:f1834a63f7c1 1485 else
Sergunb 0:f1834a63f7c1 1486 {
Sergunb 0:f1834a63f7c1 1487 if((FLASH->SR & FLASH_FLAG_PGERR) != 0)
Sergunb 0:f1834a63f7c1 1488 {
Sergunb 0:f1834a63f7c1 1489 flashstatus = FLASH_ERROR_PG;
Sergunb 0:f1834a63f7c1 1490 }
Sergunb 0:f1834a63f7c1 1491 else
Sergunb 0:f1834a63f7c1 1492 {
Sergunb 0:f1834a63f7c1 1493 if((FLASH->SR & FLASH_FLAG_WRPRTERR) != 0 )
Sergunb 0:f1834a63f7c1 1494 {
Sergunb 0:f1834a63f7c1 1495 flashstatus = FLASH_ERROR_WRP;
Sergunb 0:f1834a63f7c1 1496 }
Sergunb 0:f1834a63f7c1 1497 else
Sergunb 0:f1834a63f7c1 1498 {
Sergunb 0:f1834a63f7c1 1499 flashstatus = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1500 }
Sergunb 0:f1834a63f7c1 1501 }
Sergunb 0:f1834a63f7c1 1502 }
Sergunb 0:f1834a63f7c1 1503 /* Return the Flash Status */
Sergunb 0:f1834a63f7c1 1504 return flashstatus;
Sergunb 0:f1834a63f7c1 1505 }
Sergunb 0:f1834a63f7c1 1506
Sergunb 0:f1834a63f7c1 1507 /**
Sergunb 0:f1834a63f7c1 1508 * @brief Returns the FLASH Bank1 Status.
Sergunb 0:f1834a63f7c1 1509 * @note This function can be used for all STM32F10x devices, it is equivalent
Sergunb 0:f1834a63f7c1 1510 * to FLASH_GetStatus function.
Sergunb 0:f1834a63f7c1 1511 * @param None
Sergunb 0:f1834a63f7c1 1512 * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 1513 * FLASH_ERROR_WRP or FLASH_COMPLETE
Sergunb 0:f1834a63f7c1 1514 */
Sergunb 0:f1834a63f7c1 1515 FLASH_Status FLASH_GetBank1Status(void)
Sergunb 0:f1834a63f7c1 1516 {
Sergunb 0:f1834a63f7c1 1517 FLASH_Status flashstatus = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1518
Sergunb 0:f1834a63f7c1 1519 if((FLASH->SR & FLASH_FLAG_BANK1_BSY) == FLASH_FLAG_BSY)
Sergunb 0:f1834a63f7c1 1520 {
Sergunb 0:f1834a63f7c1 1521 flashstatus = FLASH_BUSY;
Sergunb 0:f1834a63f7c1 1522 }
Sergunb 0:f1834a63f7c1 1523 else
Sergunb 0:f1834a63f7c1 1524 {
Sergunb 0:f1834a63f7c1 1525 if((FLASH->SR & FLASH_FLAG_BANK1_PGERR) != 0)
Sergunb 0:f1834a63f7c1 1526 {
Sergunb 0:f1834a63f7c1 1527 flashstatus = FLASH_ERROR_PG;
Sergunb 0:f1834a63f7c1 1528 }
Sergunb 0:f1834a63f7c1 1529 else
Sergunb 0:f1834a63f7c1 1530 {
Sergunb 0:f1834a63f7c1 1531 if((FLASH->SR & FLASH_FLAG_BANK1_WRPRTERR) != 0 )
Sergunb 0:f1834a63f7c1 1532 {
Sergunb 0:f1834a63f7c1 1533 flashstatus = FLASH_ERROR_WRP;
Sergunb 0:f1834a63f7c1 1534 }
Sergunb 0:f1834a63f7c1 1535 else
Sergunb 0:f1834a63f7c1 1536 {
Sergunb 0:f1834a63f7c1 1537 flashstatus = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1538 }
Sergunb 0:f1834a63f7c1 1539 }
Sergunb 0:f1834a63f7c1 1540 }
Sergunb 0:f1834a63f7c1 1541 /* Return the Flash Status */
Sergunb 0:f1834a63f7c1 1542 return flashstatus;
Sergunb 0:f1834a63f7c1 1543 }
Sergunb 0:f1834a63f7c1 1544
Sergunb 0:f1834a63f7c1 1545 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 1546 /**
Sergunb 0:f1834a63f7c1 1547 * @brief Returns the FLASH Bank2 Status.
Sergunb 0:f1834a63f7c1 1548 * @note This function can be used for STM32F10x_XL density devices.
Sergunb 0:f1834a63f7c1 1549 * @param None
Sergunb 0:f1834a63f7c1 1550 * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 1551 * FLASH_ERROR_WRP or FLASH_COMPLETE
Sergunb 0:f1834a63f7c1 1552 */
Sergunb 0:f1834a63f7c1 1553 FLASH_Status FLASH_GetBank2Status(void)
Sergunb 0:f1834a63f7c1 1554 {
Sergunb 0:f1834a63f7c1 1555 FLASH_Status flashstatus = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1556
Sergunb 0:f1834a63f7c1 1557 if((FLASH->SR2 & (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF))
Sergunb 0:f1834a63f7c1 1558 {
Sergunb 0:f1834a63f7c1 1559 flashstatus = FLASH_BUSY;
Sergunb 0:f1834a63f7c1 1560 }
Sergunb 0:f1834a63f7c1 1561 else
Sergunb 0:f1834a63f7c1 1562 {
Sergunb 0:f1834a63f7c1 1563 if((FLASH->SR2 & (FLASH_FLAG_BANK2_PGERR & 0x7FFFFFFF)) != 0)
Sergunb 0:f1834a63f7c1 1564 {
Sergunb 0:f1834a63f7c1 1565 flashstatus = FLASH_ERROR_PG;
Sergunb 0:f1834a63f7c1 1566 }
Sergunb 0:f1834a63f7c1 1567 else
Sergunb 0:f1834a63f7c1 1568 {
Sergunb 0:f1834a63f7c1 1569 if((FLASH->SR2 & (FLASH_FLAG_BANK2_WRPRTERR & 0x7FFFFFFF)) != 0 )
Sergunb 0:f1834a63f7c1 1570 {
Sergunb 0:f1834a63f7c1 1571 flashstatus = FLASH_ERROR_WRP;
Sergunb 0:f1834a63f7c1 1572 }
Sergunb 0:f1834a63f7c1 1573 else
Sergunb 0:f1834a63f7c1 1574 {
Sergunb 0:f1834a63f7c1 1575 flashstatus = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1576 }
Sergunb 0:f1834a63f7c1 1577 }
Sergunb 0:f1834a63f7c1 1578 }
Sergunb 0:f1834a63f7c1 1579 /* Return the Flash Status */
Sergunb 0:f1834a63f7c1 1580 return flashstatus;
Sergunb 0:f1834a63f7c1 1581 }
Sergunb 0:f1834a63f7c1 1582 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 1583 /**
Sergunb 0:f1834a63f7c1 1584 * @brief Waits for a Flash operation to complete or a TIMEOUT to occur.
Sergunb 0:f1834a63f7c1 1585 * @note This function can be used for all STM32F10x devices,
Sergunb 0:f1834a63f7c1 1586 * it is equivalent to FLASH_WaitForLastBank1Operation.
Sergunb 0:f1834a63f7c1 1587 * - For STM32F10X_XL devices this function waits for a Bank1 Flash operation
Sergunb 0:f1834a63f7c1 1588 * to complete or a TIMEOUT to occur.
Sergunb 0:f1834a63f7c1 1589 * - For all other devices it waits for a Flash operation to complete
Sergunb 0:f1834a63f7c1 1590 * or a TIMEOUT to occur.
Sergunb 0:f1834a63f7c1 1591 * @param Timeout: FLASH programming Timeout
Sergunb 0:f1834a63f7c1 1592 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 1593 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 1594 */
Sergunb 0:f1834a63f7c1 1595 FLASH_Status FLASH_WaitForLastOperation(uint32_t Timeout)
Sergunb 0:f1834a63f7c1 1596 {
Sergunb 0:f1834a63f7c1 1597 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1598
Sergunb 0:f1834a63f7c1 1599 /* Check for the Flash Status */
Sergunb 0:f1834a63f7c1 1600 status = FLASH_GetBank1Status();
Sergunb 0:f1834a63f7c1 1601 /* Wait for a Flash operation to complete or a TIMEOUT to occur */
Sergunb 0:f1834a63f7c1 1602 while((status == FLASH_BUSY) && (Timeout != 0x00))
Sergunb 0:f1834a63f7c1 1603 {
Sergunb 0:f1834a63f7c1 1604 status = FLASH_GetBank1Status();
Sergunb 0:f1834a63f7c1 1605 Timeout--;
Sergunb 0:f1834a63f7c1 1606 }
Sergunb 0:f1834a63f7c1 1607 if(Timeout == 0x00 )
Sergunb 0:f1834a63f7c1 1608 {
Sergunb 0:f1834a63f7c1 1609 status = FLASH_TIMEOUT;
Sergunb 0:f1834a63f7c1 1610 }
Sergunb 0:f1834a63f7c1 1611 /* Return the operation status */
Sergunb 0:f1834a63f7c1 1612 return status;
Sergunb 0:f1834a63f7c1 1613 }
Sergunb 0:f1834a63f7c1 1614
Sergunb 0:f1834a63f7c1 1615 /**
Sergunb 0:f1834a63f7c1 1616 * @brief Waits for a Flash operation on Bank1 to complete or a TIMEOUT to occur.
Sergunb 0:f1834a63f7c1 1617 * @note This function can be used for all STM32F10x devices,
Sergunb 0:f1834a63f7c1 1618 * it is equivalent to FLASH_WaitForLastOperation.
Sergunb 0:f1834a63f7c1 1619 * @param Timeout: FLASH programming Timeout
Sergunb 0:f1834a63f7c1 1620 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 1621 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 1622 */
Sergunb 0:f1834a63f7c1 1623 FLASH_Status FLASH_WaitForLastBank1Operation(uint32_t Timeout)
Sergunb 0:f1834a63f7c1 1624 {
Sergunb 0:f1834a63f7c1 1625 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1626
Sergunb 0:f1834a63f7c1 1627 /* Check for the Flash Status */
Sergunb 0:f1834a63f7c1 1628 status = FLASH_GetBank1Status();
Sergunb 0:f1834a63f7c1 1629 /* Wait for a Flash operation to complete or a TIMEOUT to occur */
Sergunb 0:f1834a63f7c1 1630 while((status == FLASH_FLAG_BANK1_BSY) && (Timeout != 0x00))
Sergunb 0:f1834a63f7c1 1631 {
Sergunb 0:f1834a63f7c1 1632 status = FLASH_GetBank1Status();
Sergunb 0:f1834a63f7c1 1633 Timeout--;
Sergunb 0:f1834a63f7c1 1634 }
Sergunb 0:f1834a63f7c1 1635 if(Timeout == 0x00 )
Sergunb 0:f1834a63f7c1 1636 {
Sergunb 0:f1834a63f7c1 1637 status = FLASH_TIMEOUT;
Sergunb 0:f1834a63f7c1 1638 }
Sergunb 0:f1834a63f7c1 1639 /* Return the operation status */
Sergunb 0:f1834a63f7c1 1640 return status;
Sergunb 0:f1834a63f7c1 1641 }
Sergunb 0:f1834a63f7c1 1642
Sergunb 0:f1834a63f7c1 1643 #ifdef STM32F10X_XL
Sergunb 0:f1834a63f7c1 1644 /**
Sergunb 0:f1834a63f7c1 1645 * @brief Waits for a Flash operation on Bank2 to complete or a TIMEOUT to occur.
Sergunb 0:f1834a63f7c1 1646 * @note This function can be used only for STM32F10x_XL density devices.
Sergunb 0:f1834a63f7c1 1647 * @param Timeout: FLASH programming Timeout
Sergunb 0:f1834a63f7c1 1648 * @retval FLASH Status: The returned value can be: FLASH_ERROR_PG,
Sergunb 0:f1834a63f7c1 1649 * FLASH_ERROR_WRP, FLASH_COMPLETE or FLASH_TIMEOUT.
Sergunb 0:f1834a63f7c1 1650 */
Sergunb 0:f1834a63f7c1 1651 FLASH_Status FLASH_WaitForLastBank2Operation(uint32_t Timeout)
Sergunb 0:f1834a63f7c1 1652 {
Sergunb 0:f1834a63f7c1 1653 FLASH_Status status = FLASH_COMPLETE;
Sergunb 0:f1834a63f7c1 1654
Sergunb 0:f1834a63f7c1 1655 /* Check for the Flash Status */
Sergunb 0:f1834a63f7c1 1656 status = FLASH_GetBank2Status();
Sergunb 0:f1834a63f7c1 1657 /* Wait for a Flash operation to complete or a TIMEOUT to occur */
Sergunb 0:f1834a63f7c1 1658 while((status == (FLASH_FLAG_BANK2_BSY & 0x7FFFFFFF)) && (Timeout != 0x00))
Sergunb 0:f1834a63f7c1 1659 {
Sergunb 0:f1834a63f7c1 1660 status = FLASH_GetBank2Status();
Sergunb 0:f1834a63f7c1 1661 Timeout--;
Sergunb 0:f1834a63f7c1 1662 }
Sergunb 0:f1834a63f7c1 1663 if(Timeout == 0x00 )
Sergunb 0:f1834a63f7c1 1664 {
Sergunb 0:f1834a63f7c1 1665 status = FLASH_TIMEOUT;
Sergunb 0:f1834a63f7c1 1666 }
Sergunb 0:f1834a63f7c1 1667 /* Return the operation status */
Sergunb 0:f1834a63f7c1 1668 return status;
Sergunb 0:f1834a63f7c1 1669 }
Sergunb 0:f1834a63f7c1 1670 #endif /* STM32F10X_XL */
Sergunb 0:f1834a63f7c1 1671
Sergunb 0:f1834a63f7c1 1672 /**
Sergunb 0:f1834a63f7c1 1673 * @}
Sergunb 0:f1834a63f7c1 1674 */
Sergunb 0:f1834a63f7c1 1675
Sergunb 0:f1834a63f7c1 1676 /**
Sergunb 0:f1834a63f7c1 1677 * @}
Sergunb 0:f1834a63f7c1 1678 */
Sergunb 0:f1834a63f7c1 1679
Sergunb 0:f1834a63f7c1 1680 /**
Sergunb 0:f1834a63f7c1 1681 * @}
Sergunb 0:f1834a63f7c1 1682 */
Sergunb 0:f1834a63f7c1 1683
Sergunb 0:f1834a63f7c1 1684 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/