Sergey Pastor / grbl

I'm trying to port GRBL 1.1 to the STM32F746 chip. Tell me the solution, thanks.

stm_lib/inc/stm32f10x_gpio.h@0:f1834a63f7c1, 2017-09-04 (annotated)

Committer:
Sergunb
Date:
Mon Sep 04 12:03:42 2017 +0000
Revision:
0:f1834a63f7c1
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sergunb 0:f1834a63f7c1 1 /**
Sergunb 0:f1834a63f7c1 2 ******************************************************************************
Sergunb 0:f1834a63f7c1 3 * @file stm32f10x_gpio.h
Sergunb 0:f1834a63f7c1 4 * @author MCD Application Team
Sergunb 0:f1834a63f7c1 5 * @version V3.5.0
Sergunb 0:f1834a63f7c1 6 * @date 11-March-2011
Sergunb 0:f1834a63f7c1 7 * @brief This file contains all the functions prototypes for the GPIO
Sergunb 0:f1834a63f7c1 8 * firmware library.
Sergunb 0:f1834a63f7c1 9 ******************************************************************************
Sergunb 0:f1834a63f7c1 10 * @attention
Sergunb 0:f1834a63f7c1 11 *
Sergunb 0:f1834a63f7c1 12 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
Sergunb 0:f1834a63f7c1 13 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
Sergunb 0:f1834a63f7c1 14 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
Sergunb 0:f1834a63f7c1 15 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
Sergunb 0:f1834a63f7c1 16 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
Sergunb 0:f1834a63f7c1 17 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
Sergunb 0:f1834a63f7c1 18 *
Sergunb 0:f1834a63f7c1 19 * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
Sergunb 0:f1834a63f7c1 20 ******************************************************************************
Sergunb 0:f1834a63f7c1 21 */
Sergunb 0:f1834a63f7c1 22
Sergunb 0:f1834a63f7c1 23 /* Define to prevent recursive inclusion -------------------------------------*/
Sergunb 0:f1834a63f7c1 24 #ifndef __STM32F10x_GPIO_H
Sergunb 0:f1834a63f7c1 25 #define __STM32F10x_GPIO_H
Sergunb 0:f1834a63f7c1 26
Sergunb 0:f1834a63f7c1 27 #ifdef __cplusplus
Sergunb 0:f1834a63f7c1 28 extern "C" {
Sergunb 0:f1834a63f7c1 29 #endif
Sergunb 0:f1834a63f7c1 30
Sergunb 0:f1834a63f7c1 31 /* Includes ------------------------------------------------------------------*/
Sergunb 0:f1834a63f7c1 32 #include "stm32f10x.h"
Sergunb 0:f1834a63f7c1 33
Sergunb 0:f1834a63f7c1 34 /** @addtogroup STM32F10x_StdPeriph_Driver
Sergunb 0:f1834a63f7c1 35 * @{
Sergunb 0:f1834a63f7c1 36 */
Sergunb 0:f1834a63f7c1 37
Sergunb 0:f1834a63f7c1 38 /** @addtogroup GPIO
Sergunb 0:f1834a63f7c1 39 * @{
Sergunb 0:f1834a63f7c1 40 */
Sergunb 0:f1834a63f7c1 41
Sergunb 0:f1834a63f7c1 42 /** @defgroup GPIO_Exported_Types
Sergunb 0:f1834a63f7c1 43 * @{
Sergunb 0:f1834a63f7c1 44 */
Sergunb 0:f1834a63f7c1 45
Sergunb 0:f1834a63f7c1 46 #define IS_GPIO_ALL_PERIPH(PERIPH) (((PERIPH) == GPIOA) || \
Sergunb 0:f1834a63f7c1 47 ((PERIPH) == GPIOB) || \
Sergunb 0:f1834a63f7c1 48 ((PERIPH) == GPIOC) || \
Sergunb 0:f1834a63f7c1 49 ((PERIPH) == GPIOD) || \
Sergunb 0:f1834a63f7c1 50 ((PERIPH) == GPIOE) || \
Sergunb 0:f1834a63f7c1 51 ((PERIPH) == GPIOF) || \
Sergunb 0:f1834a63f7c1 52 ((PERIPH) == GPIOG))
Sergunb 0:f1834a63f7c1 53
Sergunb 0:f1834a63f7c1 54 /**
Sergunb 0:f1834a63f7c1 55 * @brief Output Maximum frequency selection
Sergunb 0:f1834a63f7c1 56 */
Sergunb 0:f1834a63f7c1 57
Sergunb 0:f1834a63f7c1 58 typedef enum
Sergunb 0:f1834a63f7c1 59 {
Sergunb 0:f1834a63f7c1 60 GPIO_Speed_10MHz = 1,
Sergunb 0:f1834a63f7c1 61 GPIO_Speed_2MHz,
Sergunb 0:f1834a63f7c1 62 GPIO_Speed_50MHz
Sergunb 0:f1834a63f7c1 63 }GPIOSpeed_TypeDef;
Sergunb 0:f1834a63f7c1 64 #define IS_GPIO_SPEED(SPEED) (((SPEED) == GPIO_Speed_10MHz) || ((SPEED) == GPIO_Speed_2MHz) || \
Sergunb 0:f1834a63f7c1 65 ((SPEED) == GPIO_Speed_50MHz))
Sergunb 0:f1834a63f7c1 66
Sergunb 0:f1834a63f7c1 67 /**
Sergunb 0:f1834a63f7c1 68 * @brief Configuration Mode enumeration
Sergunb 0:f1834a63f7c1 69 */
Sergunb 0:f1834a63f7c1 70
Sergunb 0:f1834a63f7c1 71 typedef enum
Sergunb 0:f1834a63f7c1 72 { GPIO_Mode_AIN = 0x0,
Sergunb 0:f1834a63f7c1 73 GPIO_Mode_IN_FLOATING = 0x04,
Sergunb 0:f1834a63f7c1 74 GPIO_Mode_IPD = 0x28,
Sergunb 0:f1834a63f7c1 75 GPIO_Mode_IPU = 0x48,
Sergunb 0:f1834a63f7c1 76 GPIO_Mode_Out_OD = 0x14,
Sergunb 0:f1834a63f7c1 77 GPIO_Mode_Out_PP = 0x10,
Sergunb 0:f1834a63f7c1 78 GPIO_Mode_AF_OD = 0x1C,
Sergunb 0:f1834a63f7c1 79 GPIO_Mode_AF_PP = 0x18
Sergunb 0:f1834a63f7c1 80 }GPIOMode_TypeDef;
Sergunb 0:f1834a63f7c1 81
Sergunb 0:f1834a63f7c1 82 #define IS_GPIO_MODE(MODE) (((MODE) == GPIO_Mode_AIN) || ((MODE) == GPIO_Mode_IN_FLOATING) || \
Sergunb 0:f1834a63f7c1 83 ((MODE) == GPIO_Mode_IPD) || ((MODE) == GPIO_Mode_IPU) || \
Sergunb 0:f1834a63f7c1 84 ((MODE) == GPIO_Mode_Out_OD) || ((MODE) == GPIO_Mode_Out_PP) || \
Sergunb 0:f1834a63f7c1 85 ((MODE) == GPIO_Mode_AF_OD) || ((MODE) == GPIO_Mode_AF_PP))
Sergunb 0:f1834a63f7c1 86
Sergunb 0:f1834a63f7c1 87 /**
Sergunb 0:f1834a63f7c1 88 * @brief GPIO Init structure definition
Sergunb 0:f1834a63f7c1 89 */
Sergunb 0:f1834a63f7c1 90
Sergunb 0:f1834a63f7c1 91 typedef struct
Sergunb 0:f1834a63f7c1 92 {
Sergunb 0:f1834a63f7c1 93 uint16_t GPIO_Pin; /*!< Specifies the GPIO pins to be configured.
Sergunb 0:f1834a63f7c1 94 This parameter can be any value of @ref GPIO_pins_define */
Sergunb 0:f1834a63f7c1 95
Sergunb 0:f1834a63f7c1 96 GPIOSpeed_TypeDef GPIO_Speed; /*!< Specifies the speed for the selected pins.
Sergunb 0:f1834a63f7c1 97 This parameter can be a value of @ref GPIOSpeed_TypeDef */
Sergunb 0:f1834a63f7c1 98
Sergunb 0:f1834a63f7c1 99 GPIOMode_TypeDef GPIO_Mode; /*!< Specifies the operating mode for the selected pins.
Sergunb 0:f1834a63f7c1 100 This parameter can be a value of @ref GPIOMode_TypeDef */
Sergunb 0:f1834a63f7c1 101 }GPIO_InitTypeDef;
Sergunb 0:f1834a63f7c1 102
Sergunb 0:f1834a63f7c1 103
Sergunb 0:f1834a63f7c1 104 /**
Sergunb 0:f1834a63f7c1 105 * @brief Bit_SET and Bit_RESET enumeration
Sergunb 0:f1834a63f7c1 106 */
Sergunb 0:f1834a63f7c1 107
Sergunb 0:f1834a63f7c1 108 typedef enum
Sergunb 0:f1834a63f7c1 109 { Bit_RESET = 0,
Sergunb 0:f1834a63f7c1 110 Bit_SET
Sergunb 0:f1834a63f7c1 111 }BitAction;
Sergunb 0:f1834a63f7c1 112
Sergunb 0:f1834a63f7c1 113 #define IS_GPIO_BIT_ACTION(ACTION) (((ACTION) == Bit_RESET) || ((ACTION) == Bit_SET))
Sergunb 0:f1834a63f7c1 114
Sergunb 0:f1834a63f7c1 115 /**
Sergunb 0:f1834a63f7c1 116 * @}
Sergunb 0:f1834a63f7c1 117 */
Sergunb 0:f1834a63f7c1 118
Sergunb 0:f1834a63f7c1 119 /** @defgroup GPIO_Exported_Constants
Sergunb 0:f1834a63f7c1 120 * @{
Sergunb 0:f1834a63f7c1 121 */
Sergunb 0:f1834a63f7c1 122
Sergunb 0:f1834a63f7c1 123 /** @defgroup GPIO_pins_define
Sergunb 0:f1834a63f7c1 124 * @{
Sergunb 0:f1834a63f7c1 125 */
Sergunb 0:f1834a63f7c1 126
Sergunb 0:f1834a63f7c1 127 #define GPIO_Pin_0 ((uint16_t)0x0001) /*!< Pin 0 selected */
Sergunb 0:f1834a63f7c1 128 #define GPIO_Pin_1 ((uint16_t)0x0002) /*!< Pin 1 selected */
Sergunb 0:f1834a63f7c1 129 #define GPIO_Pin_2 ((uint16_t)0x0004) /*!< Pin 2 selected */
Sergunb 0:f1834a63f7c1 130 #define GPIO_Pin_3 ((uint16_t)0x0008) /*!< Pin 3 selected */
Sergunb 0:f1834a63f7c1 131 #define GPIO_Pin_4 ((uint16_t)0x0010) /*!< Pin 4 selected */
Sergunb 0:f1834a63f7c1 132 #define GPIO_Pin_5 ((uint16_t)0x0020) /*!< Pin 5 selected */
Sergunb 0:f1834a63f7c1 133 #define GPIO_Pin_6 ((uint16_t)0x0040) /*!< Pin 6 selected */
Sergunb 0:f1834a63f7c1 134 #define GPIO_Pin_7 ((uint16_t)0x0080) /*!< Pin 7 selected */
Sergunb 0:f1834a63f7c1 135 #define GPIO_Pin_8 ((uint16_t)0x0100) /*!< Pin 8 selected */
Sergunb 0:f1834a63f7c1 136 #define GPIO_Pin_9 ((uint16_t)0x0200) /*!< Pin 9 selected */
Sergunb 0:f1834a63f7c1 137 #define GPIO_Pin_10 ((uint16_t)0x0400) /*!< Pin 10 selected */
Sergunb 0:f1834a63f7c1 138 #define GPIO_Pin_11 ((uint16_t)0x0800) /*!< Pin 11 selected */
Sergunb 0:f1834a63f7c1 139 #define GPIO_Pin_12 ((uint16_t)0x1000) /*!< Pin 12 selected */
Sergunb 0:f1834a63f7c1 140 #define GPIO_Pin_13 ((uint16_t)0x2000) /*!< Pin 13 selected */
Sergunb 0:f1834a63f7c1 141 #define GPIO_Pin_14 ((uint16_t)0x4000) /*!< Pin 14 selected */
Sergunb 0:f1834a63f7c1 142 #define GPIO_Pin_15 ((uint16_t)0x8000) /*!< Pin 15 selected */
Sergunb 0:f1834a63f7c1 143 #define GPIO_Pin_All ((uint16_t)0xFFFF) /*!< All pins selected */
Sergunb 0:f1834a63f7c1 144
Sergunb 0:f1834a63f7c1 145 #define IS_GPIO_PIN(PIN) ((((PIN) & (uint16_t)0x00) == 0x00) && ((PIN) != (uint16_t)0x00))
Sergunb 0:f1834a63f7c1 146
Sergunb 0:f1834a63f7c1 147 #define IS_GET_GPIO_PIN(PIN) (((PIN) == GPIO_Pin_0) || \
Sergunb 0:f1834a63f7c1 148 ((PIN) == GPIO_Pin_1) || \
Sergunb 0:f1834a63f7c1 149 ((PIN) == GPIO_Pin_2) || \
Sergunb 0:f1834a63f7c1 150 ((PIN) == GPIO_Pin_3) || \
Sergunb 0:f1834a63f7c1 151 ((PIN) == GPIO_Pin_4) || \
Sergunb 0:f1834a63f7c1 152 ((PIN) == GPIO_Pin_5) || \
Sergunb 0:f1834a63f7c1 153 ((PIN) == GPIO_Pin_6) || \
Sergunb 0:f1834a63f7c1 154 ((PIN) == GPIO_Pin_7) || \
Sergunb 0:f1834a63f7c1 155 ((PIN) == GPIO_Pin_8) || \
Sergunb 0:f1834a63f7c1 156 ((PIN) == GPIO_Pin_9) || \
Sergunb 0:f1834a63f7c1 157 ((PIN) == GPIO_Pin_10) || \
Sergunb 0:f1834a63f7c1 158 ((PIN) == GPIO_Pin_11) || \
Sergunb 0:f1834a63f7c1 159 ((PIN) == GPIO_Pin_12) || \
Sergunb 0:f1834a63f7c1 160 ((PIN) == GPIO_Pin_13) || \
Sergunb 0:f1834a63f7c1 161 ((PIN) == GPIO_Pin_14) || \
Sergunb 0:f1834a63f7c1 162 ((PIN) == GPIO_Pin_15))
Sergunb 0:f1834a63f7c1 163
Sergunb 0:f1834a63f7c1 164 /**
Sergunb 0:f1834a63f7c1 165 * @}
Sergunb 0:f1834a63f7c1 166 */
Sergunb 0:f1834a63f7c1 167
Sergunb 0:f1834a63f7c1 168 /** @defgroup GPIO_Remap_define
Sergunb 0:f1834a63f7c1 169 * @{
Sergunb 0:f1834a63f7c1 170 */
Sergunb 0:f1834a63f7c1 171
Sergunb 0:f1834a63f7c1 172 #define GPIO_Remap_SPI1 ((uint32_t)0x00000001) /*!< SPI1 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 173 #define GPIO_Remap_I2C1 ((uint32_t)0x00000002) /*!< I2C1 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 174 #define GPIO_Remap_USART1 ((uint32_t)0x00000004) /*!< USART1 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 175 #define GPIO_Remap_USART2 ((uint32_t)0x00000008) /*!< USART2 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 176 #define GPIO_PartialRemap_USART3 ((uint32_t)0x00140010) /*!< USART3 Partial Alternate Function mapping */
Sergunb 0:f1834a63f7c1 177 #define GPIO_FullRemap_USART3 ((uint32_t)0x00140030) /*!< USART3 Full Alternate Function mapping */
Sergunb 0:f1834a63f7c1 178 #define GPIO_PartialRemap_TIM1 ((uint32_t)0x00160040) /*!< TIM1 Partial Alternate Function mapping */
Sergunb 0:f1834a63f7c1 179 #define GPIO_FullRemap_TIM1 ((uint32_t)0x001600C0) /*!< TIM1 Full Alternate Function mapping */
Sergunb 0:f1834a63f7c1 180 #define GPIO_PartialRemap1_TIM2 ((uint32_t)0x00180100) /*!< TIM2 Partial1 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 181 #define GPIO_PartialRemap2_TIM2 ((uint32_t)0x00180200) /*!< TIM2 Partial2 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 182 #define GPIO_FullRemap_TIM2 ((uint32_t)0x00180300) /*!< TIM2 Full Alternate Function mapping */
Sergunb 0:f1834a63f7c1 183 #define GPIO_PartialRemap_TIM3 ((uint32_t)0x001A0800) /*!< TIM3 Partial Alternate Function mapping */
Sergunb 0:f1834a63f7c1 184 #define GPIO_FullRemap_TIM3 ((uint32_t)0x001A0C00) /*!< TIM3 Full Alternate Function mapping */
Sergunb 0:f1834a63f7c1 185 #define GPIO_Remap_TIM4 ((uint32_t)0x00001000) /*!< TIM4 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 186 #define GPIO_Remap1_CAN1 ((uint32_t)0x001D4000) /*!< CAN1 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 187 #define GPIO_Remap2_CAN1 ((uint32_t)0x001D6000) /*!< CAN1 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 188 #define GPIO_Remap_PD01 ((uint32_t)0x00008000) /*!< PD01 Alternate Function mapping */
Sergunb 0:f1834a63f7c1 189 #define GPIO_Remap_TIM5CH4_LSI ((uint32_t)0x00200001) /*!< LSI connected to TIM5 Channel4 input capture for calibration */
Sergunb 0:f1834a63f7c1 190 #define GPIO_Remap_ADC1_ETRGINJ ((uint32_t)0x00200002) /*!< ADC1 External Trigger Injected Conversion remapping */
Sergunb 0:f1834a63f7c1 191 #define GPIO_Remap_ADC1_ETRGREG ((uint32_t)0x00200004) /*!< ADC1 External Trigger Regular Conversion remapping */
Sergunb 0:f1834a63f7c1 192 #define GPIO_Remap_ADC2_ETRGINJ ((uint32_t)0x00200008) /*!< ADC2 External Trigger Injected Conversion remapping */
Sergunb 0:f1834a63f7c1 193 #define GPIO_Remap_ADC2_ETRGREG ((uint32_t)0x00200010) /*!< ADC2 External Trigger Regular Conversion remapping */
Sergunb 0:f1834a63f7c1 194 #define GPIO_Remap_ETH ((uint32_t)0x00200020) /*!< Ethernet remapping (only for Connectivity line devices) */
Sergunb 0:f1834a63f7c1 195 #define GPIO_Remap_CAN2 ((uint32_t)0x00200040) /*!< CAN2 remapping (only for Connectivity line devices) */
Sergunb 0:f1834a63f7c1 196 #define GPIO_Remap_SWJ_NoJTRST ((uint32_t)0x00300100) /*!< Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST */
Sergunb 0:f1834a63f7c1 197 #define GPIO_Remap_SWJ_JTAGDisable ((uint32_t)0x00300200) /*!< JTAG-DP Disabled and SW-DP Enabled */
Sergunb 0:f1834a63f7c1 198 #define GPIO_Remap_SWJ_Disable ((uint32_t)0x00300400) /*!< Full SWJ Disabled (JTAG-DP + SW-DP) */
Sergunb 0:f1834a63f7c1 199 #define GPIO_Remap_SPI3 ((uint32_t)0x00201100) /*!< SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices) */
Sergunb 0:f1834a63f7c1 200 #define GPIO_Remap_TIM2ITR1_PTP_SOF ((uint32_t)0x00202000) /*!< Ethernet PTP output or USB OTG SOF (Start of Frame) connected
Sergunb 0:f1834a63f7c1 201 to TIM2 Internal Trigger 1 for calibration
Sergunb 0:f1834a63f7c1 202 (only for Connectivity line devices) */
Sergunb 0:f1834a63f7c1 203 #define GPIO_Remap_PTP_PPS ((uint32_t)0x00204000) /*!< Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices) */
Sergunb 0:f1834a63f7c1 204
Sergunb 0:f1834a63f7c1 205 #define GPIO_Remap_TIM15 ((uint32_t)0x80000001) /*!< TIM15 Alternate Function mapping (only for Value line devices) */
Sergunb 0:f1834a63f7c1 206 #define GPIO_Remap_TIM16 ((uint32_t)0x80000002) /*!< TIM16 Alternate Function mapping (only for Value line devices) */
Sergunb 0:f1834a63f7c1 207 #define GPIO_Remap_TIM17 ((uint32_t)0x80000004) /*!< TIM17 Alternate Function mapping (only for Value line devices) */
Sergunb 0:f1834a63f7c1 208 #define GPIO_Remap_CEC ((uint32_t)0x80000008) /*!< CEC Alternate Function mapping (only for Value line devices) */
Sergunb 0:f1834a63f7c1 209 #define GPIO_Remap_TIM1_DMA ((uint32_t)0x80000010) /*!< TIM1 DMA requests mapping (only for Value line devices) */
Sergunb 0:f1834a63f7c1 210
Sergunb 0:f1834a63f7c1 211 #define GPIO_Remap_TIM9 ((uint32_t)0x80000020) /*!< TIM9 Alternate Function mapping (only for XL-density devices) */
Sergunb 0:f1834a63f7c1 212 #define GPIO_Remap_TIM10 ((uint32_t)0x80000040) /*!< TIM10 Alternate Function mapping (only for XL-density devices) */
Sergunb 0:f1834a63f7c1 213 #define GPIO_Remap_TIM11 ((uint32_t)0x80000080) /*!< TIM11 Alternate Function mapping (only for XL-density devices) */
Sergunb 0:f1834a63f7c1 214 #define GPIO_Remap_TIM13 ((uint32_t)0x80000100) /*!< TIM13 Alternate Function mapping (only for High density Value line and XL-density devices) */
Sergunb 0:f1834a63f7c1 215 #define GPIO_Remap_TIM14 ((uint32_t)0x80000200) /*!< TIM14 Alternate Function mapping (only for High density Value line and XL-density devices) */
Sergunb 0:f1834a63f7c1 216 #define GPIO_Remap_FSMC_NADV ((uint32_t)0x80000400) /*!< FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices) */
Sergunb 0:f1834a63f7c1 217
Sergunb 0:f1834a63f7c1 218 #define GPIO_Remap_TIM67_DAC_DMA ((uint32_t)0x80000800) /*!< TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices) */
Sergunb 0:f1834a63f7c1 219 #define GPIO_Remap_TIM12 ((uint32_t)0x80001000) /*!< TIM12 Alternate Function mapping (only for High density Value line devices) */
Sergunb 0:f1834a63f7c1 220 #define GPIO_Remap_MISC ((uint32_t)0x80002000) /*!< Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping,
Sergunb 0:f1834a63f7c1 221 only for High density Value line devices) */
Sergunb 0:f1834a63f7c1 222
Sergunb 0:f1834a63f7c1 223 #define IS_GPIO_REMAP(REMAP) (((REMAP) == GPIO_Remap_SPI1) || ((REMAP) == GPIO_Remap_I2C1) || \
Sergunb 0:f1834a63f7c1 224 ((REMAP) == GPIO_Remap_USART1) || ((REMAP) == GPIO_Remap_USART2) || \
Sergunb 0:f1834a63f7c1 225 ((REMAP) == GPIO_PartialRemap_USART3) || ((REMAP) == GPIO_FullRemap_USART3) || \
Sergunb 0:f1834a63f7c1 226 ((REMAP) == GPIO_PartialRemap_TIM1) || ((REMAP) == GPIO_FullRemap_TIM1) || \
Sergunb 0:f1834a63f7c1 227 ((REMAP) == GPIO_PartialRemap1_TIM2) || ((REMAP) == GPIO_PartialRemap2_TIM2) || \
Sergunb 0:f1834a63f7c1 228 ((REMAP) == GPIO_FullRemap_TIM2) || ((REMAP) == GPIO_PartialRemap_TIM3) || \
Sergunb 0:f1834a63f7c1 229 ((REMAP) == GPIO_FullRemap_TIM3) || ((REMAP) == GPIO_Remap_TIM4) || \
Sergunb 0:f1834a63f7c1 230 ((REMAP) == GPIO_Remap1_CAN1) || ((REMAP) == GPIO_Remap2_CAN1) || \
Sergunb 0:f1834a63f7c1 231 ((REMAP) == GPIO_Remap_PD01) || ((REMAP) == GPIO_Remap_TIM5CH4_LSI) || \
Sergunb 0:f1834a63f7c1 232 ((REMAP) == GPIO_Remap_ADC1_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC1_ETRGREG) || \
Sergunb 0:f1834a63f7c1 233 ((REMAP) == GPIO_Remap_ADC2_ETRGINJ) ||((REMAP) == GPIO_Remap_ADC2_ETRGREG) || \
Sergunb 0:f1834a63f7c1 234 ((REMAP) == GPIO_Remap_ETH) ||((REMAP) == GPIO_Remap_CAN2) || \
Sergunb 0:f1834a63f7c1 235 ((REMAP) == GPIO_Remap_SWJ_NoJTRST) || ((REMAP) == GPIO_Remap_SWJ_JTAGDisable) || \
Sergunb 0:f1834a63f7c1 236 ((REMAP) == GPIO_Remap_SWJ_Disable)|| ((REMAP) == GPIO_Remap_SPI3) || \
Sergunb 0:f1834a63f7c1 237 ((REMAP) == GPIO_Remap_TIM2ITR1_PTP_SOF) || ((REMAP) == GPIO_Remap_PTP_PPS) || \
Sergunb 0:f1834a63f7c1 238 ((REMAP) == GPIO_Remap_TIM15) || ((REMAP) == GPIO_Remap_TIM16) || \
Sergunb 0:f1834a63f7c1 239 ((REMAP) == GPIO_Remap_TIM17) || ((REMAP) == GPIO_Remap_CEC) || \
Sergunb 0:f1834a63f7c1 240 ((REMAP) == GPIO_Remap_TIM1_DMA) || ((REMAP) == GPIO_Remap_TIM9) || \
Sergunb 0:f1834a63f7c1 241 ((REMAP) == GPIO_Remap_TIM10) || ((REMAP) == GPIO_Remap_TIM11) || \
Sergunb 0:f1834a63f7c1 242 ((REMAP) == GPIO_Remap_TIM13) || ((REMAP) == GPIO_Remap_TIM14) || \
Sergunb 0:f1834a63f7c1 243 ((REMAP) == GPIO_Remap_FSMC_NADV) || ((REMAP) == GPIO_Remap_TIM67_DAC_DMA) || \
Sergunb 0:f1834a63f7c1 244 ((REMAP) == GPIO_Remap_TIM12) || ((REMAP) == GPIO_Remap_MISC))
Sergunb 0:f1834a63f7c1 245
Sergunb 0:f1834a63f7c1 246 /**
Sergunb 0:f1834a63f7c1 247 * @}
Sergunb 0:f1834a63f7c1 248 */
Sergunb 0:f1834a63f7c1 249
Sergunb 0:f1834a63f7c1 250 /** @defgroup GPIO_Port_Sources
Sergunb 0:f1834a63f7c1 251 * @{
Sergunb 0:f1834a63f7c1 252 */
Sergunb 0:f1834a63f7c1 253
Sergunb 0:f1834a63f7c1 254 #define GPIO_PortSourceGPIOA ((uint8_t)0x00)
Sergunb 0:f1834a63f7c1 255 #define GPIO_PortSourceGPIOB ((uint8_t)0x01)
Sergunb 0:f1834a63f7c1 256 #define GPIO_PortSourceGPIOC ((uint8_t)0x02)
Sergunb 0:f1834a63f7c1 257 #define GPIO_PortSourceGPIOD ((uint8_t)0x03)
Sergunb 0:f1834a63f7c1 258 #define GPIO_PortSourceGPIOE ((uint8_t)0x04)
Sergunb 0:f1834a63f7c1 259 #define GPIO_PortSourceGPIOF ((uint8_t)0x05)
Sergunb 0:f1834a63f7c1 260 #define GPIO_PortSourceGPIOG ((uint8_t)0x06)
Sergunb 0:f1834a63f7c1 261 #define IS_GPIO_EVENTOUT_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
Sergunb 0:f1834a63f7c1 262 ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
Sergunb 0:f1834a63f7c1 263 ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
Sergunb 0:f1834a63f7c1 264 ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
Sergunb 0:f1834a63f7c1 265 ((PORTSOURCE) == GPIO_PortSourceGPIOE))
Sergunb 0:f1834a63f7c1 266
Sergunb 0:f1834a63f7c1 267 #define IS_GPIO_EXTI_PORT_SOURCE(PORTSOURCE) (((PORTSOURCE) == GPIO_PortSourceGPIOA) || \
Sergunb 0:f1834a63f7c1 268 ((PORTSOURCE) == GPIO_PortSourceGPIOB) || \
Sergunb 0:f1834a63f7c1 269 ((PORTSOURCE) == GPIO_PortSourceGPIOC) || \
Sergunb 0:f1834a63f7c1 270 ((PORTSOURCE) == GPIO_PortSourceGPIOD) || \
Sergunb 0:f1834a63f7c1 271 ((PORTSOURCE) == GPIO_PortSourceGPIOE) || \
Sergunb 0:f1834a63f7c1 272 ((PORTSOURCE) == GPIO_PortSourceGPIOF) || \
Sergunb 0:f1834a63f7c1 273 ((PORTSOURCE) == GPIO_PortSourceGPIOG))
Sergunb 0:f1834a63f7c1 274
Sergunb 0:f1834a63f7c1 275 /**
Sergunb 0:f1834a63f7c1 276 * @}
Sergunb 0:f1834a63f7c1 277 */
Sergunb 0:f1834a63f7c1 278
Sergunb 0:f1834a63f7c1 279 /** @defgroup GPIO_Pin_sources
Sergunb 0:f1834a63f7c1 280 * @{
Sergunb 0:f1834a63f7c1 281 */
Sergunb 0:f1834a63f7c1 282
Sergunb 0:f1834a63f7c1 283 #define GPIO_PinSource0 ((uint8_t)0x00)
Sergunb 0:f1834a63f7c1 284 #define GPIO_PinSource1 ((uint8_t)0x01)
Sergunb 0:f1834a63f7c1 285 #define GPIO_PinSource2 ((uint8_t)0x02)
Sergunb 0:f1834a63f7c1 286 #define GPIO_PinSource3 ((uint8_t)0x03)
Sergunb 0:f1834a63f7c1 287 #define GPIO_PinSource4 ((uint8_t)0x04)
Sergunb 0:f1834a63f7c1 288 #define GPIO_PinSource5 ((uint8_t)0x05)
Sergunb 0:f1834a63f7c1 289 #define GPIO_PinSource6 ((uint8_t)0x06)
Sergunb 0:f1834a63f7c1 290 #define GPIO_PinSource7 ((uint8_t)0x07)
Sergunb 0:f1834a63f7c1 291 #define GPIO_PinSource8 ((uint8_t)0x08)
Sergunb 0:f1834a63f7c1 292 #define GPIO_PinSource9 ((uint8_t)0x09)
Sergunb 0:f1834a63f7c1 293 #define GPIO_PinSource10 ((uint8_t)0x0A)
Sergunb 0:f1834a63f7c1 294 #define GPIO_PinSource11 ((uint8_t)0x0B)
Sergunb 0:f1834a63f7c1 295 #define GPIO_PinSource12 ((uint8_t)0x0C)
Sergunb 0:f1834a63f7c1 296 #define GPIO_PinSource13 ((uint8_t)0x0D)
Sergunb 0:f1834a63f7c1 297 #define GPIO_PinSource14 ((uint8_t)0x0E)
Sergunb 0:f1834a63f7c1 298 #define GPIO_PinSource15 ((uint8_t)0x0F)
Sergunb 0:f1834a63f7c1 299
Sergunb 0:f1834a63f7c1 300 #define IS_GPIO_PIN_SOURCE(PINSOURCE) (((PINSOURCE) == GPIO_PinSource0) || \
Sergunb 0:f1834a63f7c1 301 ((PINSOURCE) == GPIO_PinSource1) || \
Sergunb 0:f1834a63f7c1 302 ((PINSOURCE) == GPIO_PinSource2) || \
Sergunb 0:f1834a63f7c1 303 ((PINSOURCE) == GPIO_PinSource3) || \
Sergunb 0:f1834a63f7c1 304 ((PINSOURCE) == GPIO_PinSource4) || \
Sergunb 0:f1834a63f7c1 305 ((PINSOURCE) == GPIO_PinSource5) || \
Sergunb 0:f1834a63f7c1 306 ((PINSOURCE) == GPIO_PinSource6) || \
Sergunb 0:f1834a63f7c1 307 ((PINSOURCE) == GPIO_PinSource7) || \
Sergunb 0:f1834a63f7c1 308 ((PINSOURCE) == GPIO_PinSource8) || \
Sergunb 0:f1834a63f7c1 309 ((PINSOURCE) == GPIO_PinSource9) || \
Sergunb 0:f1834a63f7c1 310 ((PINSOURCE) == GPIO_PinSource10) || \
Sergunb 0:f1834a63f7c1 311 ((PINSOURCE) == GPIO_PinSource11) || \
Sergunb 0:f1834a63f7c1 312 ((PINSOURCE) == GPIO_PinSource12) || \
Sergunb 0:f1834a63f7c1 313 ((PINSOURCE) == GPIO_PinSource13) || \
Sergunb 0:f1834a63f7c1 314 ((PINSOURCE) == GPIO_PinSource14) || \
Sergunb 0:f1834a63f7c1 315 ((PINSOURCE) == GPIO_PinSource15))
Sergunb 0:f1834a63f7c1 316
Sergunb 0:f1834a63f7c1 317 /**
Sergunb 0:f1834a63f7c1 318 * @}
Sergunb 0:f1834a63f7c1 319 */
Sergunb 0:f1834a63f7c1 320
Sergunb 0:f1834a63f7c1 321 /** @defgroup Ethernet_Media_Interface
Sergunb 0:f1834a63f7c1 322 * @{
Sergunb 0:f1834a63f7c1 323 */
Sergunb 0:f1834a63f7c1 324 #define GPIO_ETH_MediaInterface_MII ((u32)0x00000000)
Sergunb 0:f1834a63f7c1 325 #define GPIO_ETH_MediaInterface_RMII ((u32)0x00000001)
Sergunb 0:f1834a63f7c1 326
Sergunb 0:f1834a63f7c1 327 #define IS_GPIO_ETH_MEDIA_INTERFACE(INTERFACE) (((INTERFACE) == GPIO_ETH_MediaInterface_MII) || \
Sergunb 0:f1834a63f7c1 328 ((INTERFACE) == GPIO_ETH_MediaInterface_RMII))
Sergunb 0:f1834a63f7c1 329
Sergunb 0:f1834a63f7c1 330 /**
Sergunb 0:f1834a63f7c1 331 * @}
Sergunb 0:f1834a63f7c1 332 */
Sergunb 0:f1834a63f7c1 333 /**
Sergunb 0:f1834a63f7c1 334 * @}
Sergunb 0:f1834a63f7c1 335 */
Sergunb 0:f1834a63f7c1 336
Sergunb 0:f1834a63f7c1 337 /** @defgroup GPIO_Exported_Macros
Sergunb 0:f1834a63f7c1 338 * @{
Sergunb 0:f1834a63f7c1 339 */
Sergunb 0:f1834a63f7c1 340
Sergunb 0:f1834a63f7c1 341 /**
Sergunb 0:f1834a63f7c1 342 * @}
Sergunb 0:f1834a63f7c1 343 */
Sergunb 0:f1834a63f7c1 344
Sergunb 0:f1834a63f7c1 345 /** @defgroup GPIO_Exported_Functions
Sergunb 0:f1834a63f7c1 346 * @{
Sergunb 0:f1834a63f7c1 347 */
Sergunb 0:f1834a63f7c1 348
Sergunb 0:f1834a63f7c1 349 void GPIO_DeInit(GPIO_TypeDef* GPIOx);
Sergunb 0:f1834a63f7c1 350 void GPIO_AFIODeInit(void);
Sergunb 0:f1834a63f7c1 351 void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct);
Sergunb 0:f1834a63f7c1 352 void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct);
Sergunb 0:f1834a63f7c1 353 uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
Sergunb 0:f1834a63f7c1 354 uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
Sergunb 0:f1834a63f7c1 355 uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
Sergunb 0:f1834a63f7c1 356 uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx);
Sergunb 0:f1834a63f7c1 357 void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
Sergunb 0:f1834a63f7c1 358 void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
Sergunb 0:f1834a63f7c1 359 void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal);
Sergunb 0:f1834a63f7c1 360 void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal);
Sergunb 0:f1834a63f7c1 361 void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
Sergunb 0:f1834a63f7c1 362 void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
Sergunb 0:f1834a63f7c1 363 void GPIO_EventOutputCmd(FunctionalState NewState);
Sergunb 0:f1834a63f7c1 364 void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState);
Sergunb 0:f1834a63f7c1 365 void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource);
Sergunb 0:f1834a63f7c1 366 void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface);
Sergunb 0:f1834a63f7c1 367
Sergunb 0:f1834a63f7c1 368 #ifdef __cplusplus
Sergunb 0:f1834a63f7c1 369 }
Sergunb 0:f1834a63f7c1 370 #endif
Sergunb 0:f1834a63f7c1 371
Sergunb 0:f1834a63f7c1 372 #endif /* __STM32F10x_GPIO_H */
Sergunb 0:f1834a63f7c1 373 /**
Sergunb 0:f1834a63f7c1 374 * @}
Sergunb 0:f1834a63f7c1 375 */
Sergunb 0:f1834a63f7c1 376
Sergunb 0:f1834a63f7c1 377 /**
Sergunb 0:f1834a63f7c1 378 * @}
Sergunb 0:f1834a63f7c1 379 */
Sergunb 0:f1834a63f7c1 380
Sergunb 0:f1834a63f7c1 381 /**
Sergunb 0:f1834a63f7c1 382 * @}
Sergunb 0:f1834a63f7c1 383 */
Sergunb 0:f1834a63f7c1 384
Sergunb 0:f1834a63f7c1 385 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/