Sergey Pastor
Webserver+3d print
Diff: cyclone_tcp/drivers/fm4_eth.h
- Revision:
- 0:8918a71cdbe9
diff -r 000000000000 -r 8918a71cdbe9 cyclone_tcp/drivers/fm4_eth.h
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/cyclone_tcp/drivers/fm4_eth.h Sat Feb 04 18:15:49 2017 +0000
@@ -0,0 +1,220 @@
+/**
+ * @file fm4_eth.h
+ * @brief Spansion FM4 Ethernet MAC controller
+ *
+ * @section License
+ *
+ * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved.
+ *
+ * This file is part of CycloneTCP Open.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ *
+ * @author Oryx Embedded SARL (www.oryx-embedded.com)
+ * @version 1.7.6
+ **/
+
+#ifndef _FM4_ETH_H
+#define _FM4_ETH_H
+
+//Dependencies
+#include "core/nic.h"
+
+//Number of TX buffers
+#ifndef FM4_ETH_TX_BUFFER_COUNT
+ #define FM4_ETH_TX_BUFFER_COUNT 3
+#elif (FM4_ETH_TX_BUFFER_COUNT < 1)
+ #error FM4_ETH_TX_BUFFER_COUNT parameter is not valid
+#endif
+
+//TX buffer size
+#ifndef FM4_ETH_TX_BUFFER_SIZE
+ #define FM4_ETH_TX_BUFFER_SIZE 1536
+#elif (FM4_ETH_TX_BUFFER_SIZE != 1536)
+ #error FM4_ETH_TX_BUFFER_SIZE parameter is not valid
+#endif
+
+//Number of RX buffers
+#ifndef FM4_ETH_RX_BUFFER_COUNT
+ #define FM4_ETH_RX_BUFFER_COUNT 6
+#elif (FM4_ETH_RX_BUFFER_COUNT < 1)
+ #error FM4_ETH_RX_BUFFER_COUNT parameter is not valid
+#endif
+
+//RX buffer size
+#ifndef FM4_ETH_RX_BUFFER_SIZE
+ #define FM4_ETH_RX_BUFFER_SIZE 1536
+#elif (FM4_ETH_RX_BUFFER_SIZE != 1536)
+ #error FM4_ETH_RX_BUFFER_SIZE parameter is not valid
+#endif
+
+//Interrupt priority grouping
+#ifndef FM4_ETH_IRQ_PRIORITY_GROUPING
+ #define FM4_ETH_IRQ_PRIORITY_GROUPING 3
+#elif (FM4_ETH_IRQ_PRIORITY_GROUPING < 0)
+ #error FM4_ETH_IRQ_PRIORITY_GROUPING parameter is not valid
+#endif
+
+//Ethernet interrupt group priority
+#ifndef FM4_ETH_IRQ_GROUP_PRIORITY
+ #define FM4_ETH_IRQ_GROUP_PRIORITY 12
+#elif (FM4_ETH_IRQ_GROUP_PRIORITY < 0)
+ #error FM4_ETH_IRQ_GROUP_PRIORITY parameter is not valid
+#endif
+
+//Ethernet interrupt subpriority
+#ifndef FM4_ETH_IRQ_SUB_PRIORITY
+ #define FM4_ETH_IRQ_SUB_PRIORITY 0
+#elif (FM4_ETH_IRQ_SUB_PRIORITY < 0)
+ #error FM4_ETH_IRQ_SUB_PRIORITY parameter is not valid
+#endif
+
+//Transmit DMA descriptor flags
+#define ETH_TDES0_OWN 0x80000000
+#define ETH_TDES0_IC 0x40000000
+#define ETH_TDES0_LS 0x20000000
+#define ETH_TDES0_FS 0x10000000
+#define ETH_TDES0_DC 0x08000000
+#define ETH_TDES0_DP 0x04000000
+#define ETH_TDES0_TTSE 0x02000000
+#define ETH_TDES0_CIC 0x00C00000
+#define ETH_TDES0_TER 0x00200000
+#define ETH_TDES0_TCH 0x00100000
+#define ETH_TDES0_TTSS 0x00020000
+#define ETH_TDES0_IHE 0x00010000
+#define ETH_TDES0_ES 0x00008000
+#define ETH_TDES0_JT 0x00004000
+#define ETH_TDES0_FF 0x00002000
+#define ETH_TDES0_IPE 0x00001000
+#define ETH_TDES0_LCA 0x00000800
+#define ETH_TDES0_NC 0x00000400
+#define ETH_TDES0_LCO 0x00000200
+#define ETH_TDES0_EC 0x00000100
+#define ETH_TDES0_VF 0x00000080
+#define ETH_TDES0_CC 0x00000078
+#define ETH_TDES0_ED 0x00000004
+#define ETH_TDES0_UF 0x00000002
+#define ETH_TDES0_DB 0x00000001
+#define ETH_TDES1_TBS2 0x1FFF0000
+#define ETH_TDES1_TBS1 0x00001FFF
+#define ETH_TDES2_B1AP 0xFFFFFFFF
+#define ETH_TDES3_B2AP 0xFFFFFFFF
+#define ETH_TDES6_TTSL 0xFFFFFFFF
+#define ETH_TDES7_TTSH 0xFFFFFFFF
+
+//Receive DMA descriptor flags
+#define ETH_RDES0_OWN 0x80000000
+#define ETH_RDES0_AFM 0x40000000
+#define ETH_RDES0_FL 0x3FFF0000
+#define ETH_RDES0_ES 0x00008000
+#define ETH_RDES0_DE 0x00004000
+#define ETH_RDES0_SAF 0x00002000
+#define ETH_RDES0_LE 0x00001000
+#define ETH_RDES0_OE 0x00000800
+#define ETH_RDES0_VLAN 0x00000400
+#define ETH_RDES0_FS 0x00000200
+#define ETH_RDES0_LS 0x00000100
+#define ETH_RDES0_TS 0x00000080
+#define ETH_RDES0_LCO 0x00000040
+#define ETH_RDES0_FT 0x00000020
+#define ETH_RDES0_RWT 0x00000010
+#define ETH_RDES0_RE 0x00000008
+#define ETH_RDES0_DBE 0x00000004
+#define ETH_RDES0_CE 0x00000002
+#define ETH_RDES0_ESA 0x00000001
+#define ETH_RDES1_DIC 0x80000000
+#define ETH_RDES1_RBS2 0x1FFF0000
+#define ETH_RDES1_RER 0x00008000
+#define ETH_RDES1_RCH 0x00004000
+#define ETH_RDES1_RBS1 0x00001FFF
+#define ETH_RDES2_B1AP 0xFFFFFFFF
+#define ETH_RDES3_B2AP 0xFFFFFFFF
+#define ETH_RDES4_TD 0x00004000
+#define ETH_RDES4_PV 0x00002000
+#define ETH_RDES4_PFT 0x00001000
+#define ETH_RDES4_MT 0x00000F00
+#define ETH_RDES4_IP6R 0x00000080
+#define ETH_RDES4_IP4R 0x00000040
+#define ETH_RDES4_IPCB 0x00000020
+#define ETH_RDES4_IPE 0x00000010
+#define ETH_RDES4_IPHE 0x00000008
+#define ETH_RDES4_IPT 0x00000007
+#define ETH_RDES6_RTSL 0xFFFFFFFF
+#define ETH_RDES7_RTSH 0xFFFFFFFF
+
+
+/**
+ * @brief Enhanced TX DMA descriptor
+ **/
+
+typedef struct
+{
+ uint32_t tdes0;
+ uint32_t tdes1;
+ uint32_t tdes2;
+ uint32_t tdes3;
+ uint32_t tdes4;
+ uint32_t tdes5;
+ uint32_t tdes6;
+ uint32_t tdes7;
+} Fm4TxDmaDesc;
+
+
+/**
+ * @brief Enhanced RX DMA descriptor
+ **/
+
+typedef struct
+{
+ uint32_t rdes0;
+ uint32_t rdes1;
+ uint32_t rdes2;
+ uint32_t rdes3;
+ uint32_t rdes4;
+ uint32_t rdes5;
+ uint32_t rdes6;
+ uint32_t rdes7;
+} Fm4RxDmaDesc;
+
+
+//Spansion FM4 Ethernet MAC driver
+extern const NicDriver fm4EthDriver;
+
+//Spansion FM4 Ethernet MAC related functions
+error_t fm4EthInit(NetInterface *interface);
+void fm4EthInitGpio(NetInterface *interface);
+void fm4EthInitDmaDesc(NetInterface *interface);
+
+void fm4EthTick(NetInterface *interface);
+
+void fm4EthEnableIrq(NetInterface *interface);
+void fm4EthDisableIrq(NetInterface *interface);
+void fm4EthEventHandler(NetInterface *interface);
+
+error_t fm4EthSendPacket(NetInterface *interface,
+ const NetBuffer *buffer, size_t offset);
+
+error_t fm4EthReceivePacket(NetInterface *interface);
+
+error_t fm4EthSetMulticastFilter(NetInterface *interface);
+error_t fm4EthUpdateMacConfig(NetInterface *interface);
+
+void fm4EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
+uint16_t fm4EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
+
+uint32_t fm4EthCalcCrc(const void *data, size_t length);
+
+#endif
+