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cyclone_tcp/drivers/upd60611.h@0:8918a71cdbe9, 2017-02-04 (annotated)
- Committer:
- Sergunb
- Date:
- Sat Feb 04 18:15:49 2017 +0000
- Revision:
- 0:8918a71cdbe9
nothing else
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Sergunb | 0:8918a71cdbe9 | 1 | /** |
Sergunb | 0:8918a71cdbe9 | 2 | * @file upd60611.h |
Sergunb | 0:8918a71cdbe9 | 3 | * @brief uPD60611 Ethernet PHY transceiver |
Sergunb | 0:8918a71cdbe9 | 4 | * |
Sergunb | 0:8918a71cdbe9 | 5 | * @section License |
Sergunb | 0:8918a71cdbe9 | 6 | * |
Sergunb | 0:8918a71cdbe9 | 7 | * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved. |
Sergunb | 0:8918a71cdbe9 | 8 | * |
Sergunb | 0:8918a71cdbe9 | 9 | * This file is part of CycloneTCP Open. |
Sergunb | 0:8918a71cdbe9 | 10 | * |
Sergunb | 0:8918a71cdbe9 | 11 | * This program is free software; you can redistribute it and/or |
Sergunb | 0:8918a71cdbe9 | 12 | * modify it under the terms of the GNU General Public License |
Sergunb | 0:8918a71cdbe9 | 13 | * as published by the Free Software Foundation; either version 2 |
Sergunb | 0:8918a71cdbe9 | 14 | * of the License, or (at your option) any later version. |
Sergunb | 0:8918a71cdbe9 | 15 | * |
Sergunb | 0:8918a71cdbe9 | 16 | * This program is distributed in the hope that it will be useful, |
Sergunb | 0:8918a71cdbe9 | 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
Sergunb | 0:8918a71cdbe9 | 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
Sergunb | 0:8918a71cdbe9 | 19 | * GNU General Public License for more details. |
Sergunb | 0:8918a71cdbe9 | 20 | * |
Sergunb | 0:8918a71cdbe9 | 21 | * You should have received a copy of the GNU General Public License |
Sergunb | 0:8918a71cdbe9 | 22 | * along with this program; if not, write to the Free Software Foundation, |
Sergunb | 0:8918a71cdbe9 | 23 | * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
Sergunb | 0:8918a71cdbe9 | 24 | * |
Sergunb | 0:8918a71cdbe9 | 25 | * @author Oryx Embedded SARL (www.oryx-embedded.com) |
Sergunb | 0:8918a71cdbe9 | 26 | * @version 1.7.6 |
Sergunb | 0:8918a71cdbe9 | 27 | **/ |
Sergunb | 0:8918a71cdbe9 | 28 | |
Sergunb | 0:8918a71cdbe9 | 29 | #ifndef _UPD60611_H |
Sergunb | 0:8918a71cdbe9 | 30 | #define _UPD60611_H |
Sergunb | 0:8918a71cdbe9 | 31 | |
Sergunb | 0:8918a71cdbe9 | 32 | //Dependencies |
Sergunb | 0:8918a71cdbe9 | 33 | #include "core/nic.h" |
Sergunb | 0:8918a71cdbe9 | 34 | |
Sergunb | 0:8918a71cdbe9 | 35 | //PHY address |
Sergunb | 0:8918a71cdbe9 | 36 | #ifndef UPD60611_PHY_ADDR |
Sergunb | 0:8918a71cdbe9 | 37 | #define UPD60611_PHY_ADDR 0 |
Sergunb | 0:8918a71cdbe9 | 38 | #elif (UPD60611_PHY_ADDR < 0 || UPD60611_PHY_ADDR > 31) |
Sergunb | 0:8918a71cdbe9 | 39 | #error UPD60611_PHY_ADDR parameter is not valid |
Sergunb | 0:8918a71cdbe9 | 40 | #endif |
Sergunb | 0:8918a71cdbe9 | 41 | |
Sergunb | 0:8918a71cdbe9 | 42 | //uPD60611 registers |
Sergunb | 0:8918a71cdbe9 | 43 | #define UPD60611_PHY_REG_BMCR 0x00 |
Sergunb | 0:8918a71cdbe9 | 44 | #define UPD60611_PHY_REG_BMSR 0x01 |
Sergunb | 0:8918a71cdbe9 | 45 | #define UPD60611_PHY_REG_PHYIDR1 0x02 |
Sergunb | 0:8918a71cdbe9 | 46 | #define UPD60611_PHY_REG_PHYIDR2 0x03 |
Sergunb | 0:8918a71cdbe9 | 47 | #define UPD60611_PHY_REG_ANAR 0x04 |
Sergunb | 0:8918a71cdbe9 | 48 | #define UPD60611_PHY_REG_ANLPAR 0x05 |
Sergunb | 0:8918a71cdbe9 | 49 | #define UPD60611_PHY_REG_ANER 0x06 |
Sergunb | 0:8918a71cdbe9 | 50 | #define UPD60611_PHY_REG_ANNPTR 0x07 |
Sergunb | 0:8918a71cdbe9 | 51 | #define UPD60611_PHY_REG_SRR 0x10 |
Sergunb | 0:8918a71cdbe9 | 52 | #define UPD60611_PHY_REG_MCSR 0x11 |
Sergunb | 0:8918a71cdbe9 | 53 | #define UPD60611_PHY_REG_SMR 0x12 |
Sergunb | 0:8918a71cdbe9 | 54 | #define UPD60611_PHY_REG_EBSR 0x13 |
Sergunb | 0:8918a71cdbe9 | 55 | #define UPD60611_PHY_REG_BER 0x17 |
Sergunb | 0:8918a71cdbe9 | 56 | #define UPD60611_PHY_REG_FEQMR 0x18 |
Sergunb | 0:8918a71cdbe9 | 57 | #define UPD60611_PHY_REG_DCSR 0x19 |
Sergunb | 0:8918a71cdbe9 | 58 | #define UPD60611_PHY_REG_DCR 0x1A |
Sergunb | 0:8918a71cdbe9 | 59 | #define UPD60611_PHY_REG_SCSIR 0x1B |
Sergunb | 0:8918a71cdbe9 | 60 | #define UPD60611_PHY_REG_ISR 0x1D |
Sergunb | 0:8918a71cdbe9 | 61 | #define UPD60611_PHY_REG_IER 0x1E |
Sergunb | 0:8918a71cdbe9 | 62 | #define UPD60611_PHY_REG_PSCSR 0x1F |
Sergunb | 0:8918a71cdbe9 | 63 | |
Sergunb | 0:8918a71cdbe9 | 64 | //BMCR register |
Sergunb | 0:8918a71cdbe9 | 65 | #define BMCR_RESET (1 << 15) |
Sergunb | 0:8918a71cdbe9 | 66 | #define BMCR_LOOPBACK (1 << 14) |
Sergunb | 0:8918a71cdbe9 | 67 | #define BMCR_SPEED_SEL (1 << 13) |
Sergunb | 0:8918a71cdbe9 | 68 | #define BMCR_AN_EN (1 << 12) |
Sergunb | 0:8918a71cdbe9 | 69 | #define BMCR_POWER_DOWN (1 << 11) |
Sergunb | 0:8918a71cdbe9 | 70 | #define BMCR_ISOLATE (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 71 | #define BMCR_RESTART_AN (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 72 | #define BMCR_DUPLEX_MODE (1 << 8) |
Sergunb | 0:8918a71cdbe9 | 73 | #define BMCR_COL_TEST (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 74 | |
Sergunb | 0:8918a71cdbe9 | 75 | //BMSR register |
Sergunb | 0:8918a71cdbe9 | 76 | #define BMSR_100BT4 (1 << 15) |
Sergunb | 0:8918a71cdbe9 | 77 | #define BMSR_100BTX_FD (1 << 14) |
Sergunb | 0:8918a71cdbe9 | 78 | #define BMSR_100BTX (1 << 13) |
Sergunb | 0:8918a71cdbe9 | 79 | #define BMSR_10BT_FD (1 << 12) |
Sergunb | 0:8918a71cdbe9 | 80 | #define BMSR_10BT (1 << 11) |
Sergunb | 0:8918a71cdbe9 | 81 | #define BMSR_AN_COMPLETE (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 82 | #define BMSR_REMOTE_FAULT (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 83 | #define BMSR_AN_ABLE (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 84 | #define BMSR_LINK_STATUS (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 85 | #define BMSR_JABBER_DETECT (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 86 | #define BMSR_EXTENDED_CAP (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 87 | |
Sergunb | 0:8918a71cdbe9 | 88 | //ANAR register |
Sergunb | 0:8918a71cdbe9 | 89 | #define ANAR_NP (1 << 15) |
Sergunb | 0:8918a71cdbe9 | 90 | #define ANAR_RF (1 << 13) |
Sergunb | 0:8918a71cdbe9 | 91 | #define ANAR_PAUSE1 (1 << 11) |
Sergunb | 0:8918a71cdbe9 | 92 | #define ANAR_PAUSE0 (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 93 | #define ANAR_100BT4 (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 94 | #define ANAR_100BTX_FD (1 << 8) |
Sergunb | 0:8918a71cdbe9 | 95 | #define ANAR_100BTX (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 96 | #define ANAR_10BT_FD (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 97 | #define ANAR_10BT (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 98 | #define ANAR_SELECTOR4 (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 99 | #define ANAR_SELECTOR3 (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 100 | #define ANAR_SELECTOR2 (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 101 | #define ANAR_SELECTOR1 (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 102 | #define ANAR_SELECTOR0 (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 103 | |
Sergunb | 0:8918a71cdbe9 | 104 | //ANLPAR register |
Sergunb | 0:8918a71cdbe9 | 105 | #define ANLPAR_NP (1 << 15) |
Sergunb | 0:8918a71cdbe9 | 106 | #define ANLPAR_ACK (1 << 14) |
Sergunb | 0:8918a71cdbe9 | 107 | #define ANLPAR_RF (1 << 13) |
Sergunb | 0:8918a71cdbe9 | 108 | #define ANLPAR_PAUSE (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 109 | #define ANLPAR_100BT4 (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 110 | #define ANLPAR_100BTX_FD (1 << 8) |
Sergunb | 0:8918a71cdbe9 | 111 | #define ANLPAR_100BTX (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 112 | #define ANLPAR_10BT_FD (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 113 | #define ANLPAR_10BT (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 114 | #define ANLPAR_SELECTOR4 (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 115 | #define ANLPAR_SELECTOR3 (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 116 | #define ANLPAR_SELECTOR2 (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 117 | #define ANLPAR_SELECTOR1 (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 118 | #define ANLPAR_SELECTOR0 (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 119 | |
Sergunb | 0:8918a71cdbe9 | 120 | //ANER register |
Sergunb | 0:8918a71cdbe9 | 121 | #define ANER_PDF (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 122 | #define ANER_LP_NP_ABLE (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 123 | #define ANER_NP_ABLE (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 124 | #define ANER_PAGE_RX (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 125 | #define ANER_LP_AN_ABLE (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 126 | |
Sergunb | 0:8918a71cdbe9 | 127 | //ANNPTR register |
Sergunb | 0:8918a71cdbe9 | 128 | #define ANNPTR_NP (1 << 15) |
Sergunb | 0:8918a71cdbe9 | 129 | #define ANNPTR_MP (1 << 13) |
Sergunb | 0:8918a71cdbe9 | 130 | #define ANNPTR_ACK2 (1 << 12) |
Sergunb | 0:8918a71cdbe9 | 131 | #define ANNPTR_TOGGLE (1 << 11) |
Sergunb | 0:8918a71cdbe9 | 132 | #define ANNPTR_CODE10 (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 133 | #define ANNPTR_CODE9 (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 134 | #define ANNPTR_CODE8 (1 << 8) |
Sergunb | 0:8918a71cdbe9 | 135 | #define ANNPTR_CODE7 (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 136 | #define ANNPTR_CODE6 (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 137 | #define ANNPTR_CODE5 (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 138 | #define ANNPTR_CODE4 (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 139 | #define ANNPTR_CODE3 (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 140 | #define ANNPTR_CODE2 (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 141 | #define ANNPTR_CODE1 (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 142 | #define ANNPTR_CODE0 (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 143 | |
Sergunb | 0:8918a71cdbe9 | 144 | //MCSR register |
Sergunb | 0:8918a71cdbe9 | 145 | #define MCSR_EDPWRDOWN (1 << 13) |
Sergunb | 0:8918a71cdbe9 | 146 | #define MCSR_FARLOOPBACK (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 147 | #define MCSR_FASTEST (1 << 8) |
Sergunb | 0:8918a71cdbe9 | 148 | #define MCSR_AUTOMDIX_EN (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 149 | #define MCSR_MDI MODE (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 150 | #define MCSR_FORCE_GOOD_LINK (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 151 | #define MCSR_ENERGYON (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 152 | |
Sergunb | 0:8918a71cdbe9 | 153 | //SMR register |
Sergunb | 0:8918a71cdbe9 | 154 | #define SMR_FX_MODE (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 155 | #define SMR_PHY_MODE3 (1 << 8) |
Sergunb | 0:8918a71cdbe9 | 156 | #define SMR_PHY_MODE2 (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 157 | #define SMR_PHY_MODE1 (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 158 | #define SMR_PHY_MODE0 (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 159 | #define SMR_PHY_ADD_DEV1 (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 160 | #define SMR_PHY_ADD_DEV0 (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 161 | #define SMR_PHY_ADD_MOD2 (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 162 | #define SMR_PHY_ADD_MOD1 (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 163 | #define SMR_PHY_ADD_MOD0 (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 164 | |
Sergunb | 0:8918a71cdbe9 | 165 | //EBSR register |
Sergunb | 0:8918a71cdbe9 | 166 | #define EBSR_T_EL_BUF_OVF (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 167 | #define EBSR_T_EL_BUF_UDF (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 168 | #define EBSR_R_EL_BUF_OVF (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 169 | #define EBSR_R_EL_BUF_UDF (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 170 | |
Sergunb | 0:8918a71cdbe9 | 171 | //BER register |
Sergunb | 0:8918a71cdbe9 | 172 | #define BER_LNK_OK (1 << 15) |
Sergunb | 0:8918a71cdbe9 | 173 | #define BER_CNT_LNK_EN (1 << 14) |
Sergunb | 0:8918a71cdbe9 | 174 | #define BER_CNT_TRIG2 (1 << 13) |
Sergunb | 0:8918a71cdbe9 | 175 | #define BER_CNT_TRIG1 (1 << 12) |
Sergunb | 0:8918a71cdbe9 | 176 | #define BER_CNT_TRIG0 (1 << 11) |
Sergunb | 0:8918a71cdbe9 | 177 | #define BER_WINDOW3 (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 178 | #define BER_WINDOW2 (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 179 | #define BER_WINDOW1 (1 << 8) |
Sergunb | 0:8918a71cdbe9 | 180 | #define BER_WINDOW0 (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 181 | #define BER_COUNT6 (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 182 | #define BER_COUNT5 (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 183 | #define BER_COUNT4 (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 184 | #define BER_COUNT3 (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 185 | #define BER_COUNT2 (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 186 | #define BER_COUNT1 (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 187 | #define BER_COUNT0 (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 188 | |
Sergunb | 0:8918a71cdbe9 | 189 | //DCSR register |
Sergunb | 0:8918a71cdbe9 | 190 | #define DCSR_DIAG_INIT (1 << 14) |
Sergunb | 0:8918a71cdbe9 | 191 | #define DCSR_ADC_MAX_VALUE5 (1 << 13) |
Sergunb | 0:8918a71cdbe9 | 192 | #define DCSR_ADC_MAX_VALUE4 (1 << 12) |
Sergunb | 0:8918a71cdbe9 | 193 | #define DCSR_ADC_MAX_VALUE3 (1 << 11) |
Sergunb | 0:8918a71cdbe9 | 194 | #define DCSR_ADC_MAX_VALUE2 (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 195 | #define DCSR_ADC_MAX_VALUE1 (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 196 | #define DCSR_ADC_MAX_VALUE0 (1 << 8) |
Sergunb | 0:8918a71cdbe9 | 197 | #define DCSR_DIAG_DONE (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 198 | #define DCSR_DIAG_POL (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 199 | #define DCSR_DIAG_SEL_LINE (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 200 | #define DCSR_PW_DIAG4 (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 201 | #define DCSR_PW_DIAG3 (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 202 | #define DCSR_PW_DIAG2 (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 203 | #define DCSR_PW_DIAG1 (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 204 | #define DCSR_PW_DIAG0 (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 205 | |
Sergunb | 0:8918a71cdbe9 | 206 | //DCR register |
Sergunb | 0:8918a71cdbe9 | 207 | #define DCR_CNT_WINDOW7 (1 << 15) |
Sergunb | 0:8918a71cdbe9 | 208 | #define DCR_CNT_WINDOW6 (1 << 14) |
Sergunb | 0:8918a71cdbe9 | 209 | #define DCR_CNT_WINDOW5 (1 << 13) |
Sergunb | 0:8918a71cdbe9 | 210 | #define DCR_CNT_WINDOW4 (1 << 12) |
Sergunb | 0:8918a71cdbe9 | 211 | #define DCR_CNT_WINDOW3 (1 << 11) |
Sergunb | 0:8918a71cdbe9 | 212 | #define DCR_CNT_WINDOW2 (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 213 | #define DCR_CNT_WINDOW1 (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 214 | #define DCR_CNT_WINDOW0 (1 << 8) |
Sergunb | 0:8918a71cdbe9 | 215 | #define DCR_DIAGCNT7 (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 216 | #define DCR_DIAGCNT6 (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 217 | #define DCR_DIAGCNT5 (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 218 | #define DCR_DIAGCNT4 (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 219 | #define DCR_DIAGCNT3 (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 220 | #define DCR_DIAGCNT2 (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 221 | #define DCR_DIAGCNT1 (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 222 | #define DCR_DIAGCNT0 (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 223 | |
Sergunb | 0:8918a71cdbe9 | 224 | //SCSIR register |
Sergunb | 0:8918a71cdbe9 | 225 | #define SCSIR_SWRST_FAST (1 << 12) |
Sergunb | 0:8918a71cdbe9 | 226 | #define SCSIR_SQEOFF (1 << 11) |
Sergunb | 0:8918a71cdbe9 | 227 | #define SCSIR_FEFIEN (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 228 | #define SCSIR_XPOL (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 229 | |
Sergunb | 0:8918a71cdbe9 | 230 | //ISR register |
Sergunb | 0:8918a71cdbe9 | 231 | #define ISR_BER (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 232 | #define ISR_FEQ (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 233 | #define ISR_ENERGYON (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 234 | #define ISR_AN_COMPLETE (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 235 | #define ISR_REMOTE_FAULT (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 236 | #define ISR_LINK_DOWN (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 237 | #define ISR_AN_LP_ACK (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 238 | #define ISR_PD_FAULT (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 239 | #define ISR_AN_PAGE_RECEIVED (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 240 | |
Sergunb | 0:8918a71cdbe9 | 241 | //IER register |
Sergunb | 0:8918a71cdbe9 | 242 | #define IER_BER (1 << 10) |
Sergunb | 0:8918a71cdbe9 | 243 | #define IER_FEQ (1 << 9) |
Sergunb | 0:8918a71cdbe9 | 244 | #define IER_ENERGYON (1 << 7) |
Sergunb | 0:8918a71cdbe9 | 245 | #define IER_AN_COMPLETE (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 246 | #define IER_REMOTE_FAULT (1 << 5) |
Sergunb | 0:8918a71cdbe9 | 247 | #define IER_LINK_DOWN (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 248 | #define IER_AN_LP_ACK (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 249 | #define IER_PD_FAULT (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 250 | #define IER_AN_PAGE_RECEIVED (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 251 | |
Sergunb | 0:8918a71cdbe9 | 252 | //PSCSR register |
Sergunb | 0:8918a71cdbe9 | 253 | #define PSCSR_AUTODONE (1 << 12) |
Sergunb | 0:8918a71cdbe9 | 254 | #define PSCSR_ENABLE_4B5B (1 << 6) |
Sergunb | 0:8918a71cdbe9 | 255 | #define PSCSR_HCDSPEED2 (1 << 4) |
Sergunb | 0:8918a71cdbe9 | 256 | #define PSCSR_HCDSPEED1 (1 << 3) |
Sergunb | 0:8918a71cdbe9 | 257 | #define PSCSR_HCDSPEED0 (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 258 | #define PSCSR_RX_DV_J2T (1 << 1) |
Sergunb | 0:8918a71cdbe9 | 259 | #define PSCSR_SCRAMBLE_DIS (1 << 0) |
Sergunb | 0:8918a71cdbe9 | 260 | |
Sergunb | 0:8918a71cdbe9 | 261 | //Speed indication |
Sergunb | 0:8918a71cdbe9 | 262 | #define PSCSR_HCDSPEED_MASK (7 << 2) |
Sergunb | 0:8918a71cdbe9 | 263 | #define PSCSR_HCDSPEED_10BT (1 << 2) |
Sergunb | 0:8918a71cdbe9 | 264 | #define PSCSR_HCDSPEED_100BTX (2 << 2) |
Sergunb | 0:8918a71cdbe9 | 265 | #define PSCSR_HCDSPEED_10BT_FD (5 << 2) |
Sergunb | 0:8918a71cdbe9 | 266 | #define PSCSR_HCDSPEED_100BTX_FD (6 << 2) |
Sergunb | 0:8918a71cdbe9 | 267 | |
Sergunb | 0:8918a71cdbe9 | 268 | //uPD60611 Ethernet PHY driver |
Sergunb | 0:8918a71cdbe9 | 269 | extern const PhyDriver upd60611PhyDriver; |
Sergunb | 0:8918a71cdbe9 | 270 | |
Sergunb | 0:8918a71cdbe9 | 271 | //uPD60611 related functions |
Sergunb | 0:8918a71cdbe9 | 272 | error_t upd60611Init(NetInterface *interface); |
Sergunb | 0:8918a71cdbe9 | 273 | |
Sergunb | 0:8918a71cdbe9 | 274 | void upd60611Tick(NetInterface *interface); |
Sergunb | 0:8918a71cdbe9 | 275 | |
Sergunb | 0:8918a71cdbe9 | 276 | void upd60611EnableIrq(NetInterface *interface); |
Sergunb | 0:8918a71cdbe9 | 277 | void upd60611DisableIrq(NetInterface *interface); |
Sergunb | 0:8918a71cdbe9 | 278 | |
Sergunb | 0:8918a71cdbe9 | 279 | void upd60611EventHandler(NetInterface *interface); |
Sergunb | 0:8918a71cdbe9 | 280 | |
Sergunb | 0:8918a71cdbe9 | 281 | void upd60611WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data); |
Sergunb | 0:8918a71cdbe9 | 282 | uint16_t upd60611ReadPhyReg(NetInterface *interface, uint8_t address); |
Sergunb | 0:8918a71cdbe9 | 283 | |
Sergunb | 0:8918a71cdbe9 | 284 | void upd60611DumpPhyReg(NetInterface *interface); |
Sergunb | 0:8918a71cdbe9 | 285 | |
Sergunb | 0:8918a71cdbe9 | 286 | #endif |
Sergunb | 0:8918a71cdbe9 | 287 |