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cyclone_tcp/drivers/sama5d2_eth.h@0:8918a71cdbe9, 2017-02-04 (annotated)

Committer:
Sergunb
Date:
Sat Feb 04 18:15:49 2017 +0000
Revision:
0:8918a71cdbe9
nothing else

Who changed what in which revision?

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Sergunb 0:8918a71cdbe9 1 /**
Sergunb 0:8918a71cdbe9 2 * @file sama5d2_eth.h
Sergunb 0:8918a71cdbe9 3 * @brief SAMA5D2 Ethernet MAC controller
Sergunb 0:8918a71cdbe9 4 *
Sergunb 0:8918a71cdbe9 5 * @section License
Sergunb 0:8918a71cdbe9 6 *
Sergunb 0:8918a71cdbe9 7 * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved.
Sergunb 0:8918a71cdbe9 8 *
Sergunb 0:8918a71cdbe9 9 * This file is part of CycloneTCP Open.
Sergunb 0:8918a71cdbe9 10 *
Sergunb 0:8918a71cdbe9 11 * This program is free software; you can redistribute it and/or
Sergunb 0:8918a71cdbe9 12 * modify it under the terms of the GNU General Public License
Sergunb 0:8918a71cdbe9 13 * as published by the Free Software Foundation; either version 2
Sergunb 0:8918a71cdbe9 14 * of the License, or (at your option) any later version.
Sergunb 0:8918a71cdbe9 15 *
Sergunb 0:8918a71cdbe9 16 * This program is distributed in the hope that it will be useful,
Sergunb 0:8918a71cdbe9 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Sergunb 0:8918a71cdbe9 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Sergunb 0:8918a71cdbe9 19 * GNU General Public License for more details.
Sergunb 0:8918a71cdbe9 20 *
Sergunb 0:8918a71cdbe9 21 * You should have received a copy of the GNU General Public License
Sergunb 0:8918a71cdbe9 22 * along with this program; if not, write to the Free Software Foundation,
Sergunb 0:8918a71cdbe9 23 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
Sergunb 0:8918a71cdbe9 24 *
Sergunb 0:8918a71cdbe9 25 * @author Oryx Embedded SARL (www.oryx-embedded.com)
Sergunb 0:8918a71cdbe9 26 * @version 1.7.6
Sergunb 0:8918a71cdbe9 27 **/
Sergunb 0:8918a71cdbe9 28
Sergunb 0:8918a71cdbe9 29 #ifndef _SAMA5D2_ETH_H
Sergunb 0:8918a71cdbe9 30 #define _SAMA5D2_ETH_H
Sergunb 0:8918a71cdbe9 31
Sergunb 0:8918a71cdbe9 32 //Number of TX buffers
Sergunb 0:8918a71cdbe9 33 #ifndef SAMA5D2_ETH_TX_BUFFER_COUNT
Sergunb 0:8918a71cdbe9 34 #define SAMA5D2_ETH_TX_BUFFER_COUNT 4
Sergunb 0:8918a71cdbe9 35 #elif (SAMA5D2_ETH_TX_BUFFER_COUNT < 1)
Sergunb 0:8918a71cdbe9 36 #error SAMA5D2_ETH_TX_BUFFER_COUNT parameter is not valid
Sergunb 0:8918a71cdbe9 37 #endif
Sergunb 0:8918a71cdbe9 38
Sergunb 0:8918a71cdbe9 39 //TX buffer size
Sergunb 0:8918a71cdbe9 40 #ifndef SAMA5D2_ETH_TX_BUFFER_SIZE
Sergunb 0:8918a71cdbe9 41 #define SAMA5D2_ETH_TX_BUFFER_SIZE 1536
Sergunb 0:8918a71cdbe9 42 #elif (SAMA5D2_ETH_TX_BUFFER_SIZE != 1536)
Sergunb 0:8918a71cdbe9 43 #error SAMA5D2_ETH_TX_BUFFER_SIZE parameter is not valid
Sergunb 0:8918a71cdbe9 44 #endif
Sergunb 0:8918a71cdbe9 45
Sergunb 0:8918a71cdbe9 46 //Number of RX buffers
Sergunb 0:8918a71cdbe9 47 #ifndef SAMA5D2_ETH_RX_BUFFER_COUNT
Sergunb 0:8918a71cdbe9 48 #define SAMA5D2_ETH_RX_BUFFER_COUNT 96
Sergunb 0:8918a71cdbe9 49 #elif (SAMA5D2_ETH_RX_BUFFER_COUNT < 12)
Sergunb 0:8918a71cdbe9 50 #error SAMA5D2_ETH_RX_BUFFER_COUNT parameter is not valid
Sergunb 0:8918a71cdbe9 51 #endif
Sergunb 0:8918a71cdbe9 52
Sergunb 0:8918a71cdbe9 53 //RX buffer size
Sergunb 0:8918a71cdbe9 54 #ifndef SAMA5D2_ETH_RX_BUFFER_SIZE
Sergunb 0:8918a71cdbe9 55 #define SAMA5D2_ETH_RX_BUFFER_SIZE 128
Sergunb 0:8918a71cdbe9 56 #elif (SAMA5D2_ETH_RX_BUFFER_SIZE != 128)
Sergunb 0:8918a71cdbe9 57 #error SAMA5D2_ETH_RX_BUFFER_SIZE parameter is not valid
Sergunb 0:8918a71cdbe9 58 #endif
Sergunb 0:8918a71cdbe9 59
Sergunb 0:8918a71cdbe9 60 //Number of dummy buffers
Sergunb 0:8918a71cdbe9 61 #ifndef SAMA5D2_ETH_DUMMY_BUFFER_COUNT
Sergunb 0:8918a71cdbe9 62 #define SAMA5D2_ETH_DUMMY_BUFFER_COUNT 2
Sergunb 0:8918a71cdbe9 63 #elif (SAMA5D2_ETH_DUMMY_BUFFER_COUNT < 1)
Sergunb 0:8918a71cdbe9 64 #error SAMA5D2_ETH_DUMMY_BUFFER_COUNT parameter is not valid
Sergunb 0:8918a71cdbe9 65 #endif
Sergunb 0:8918a71cdbe9 66
Sergunb 0:8918a71cdbe9 67 //Dummy buffer size
Sergunb 0:8918a71cdbe9 68 #ifndef SAMA5D2_ETH_DUMMY_BUFFER_SIZE
Sergunb 0:8918a71cdbe9 69 #define SAMA5D2_ETH_DUMMY_BUFFER_SIZE 128
Sergunb 0:8918a71cdbe9 70 #elif (SAMA5D2_ETH_DUMMY_BUFFER_SIZE != 128)
Sergunb 0:8918a71cdbe9 71 #error SAMA5D2_ETH_DUMMY_BUFFER_SIZE parameter is not valid
Sergunb 0:8918a71cdbe9 72 #endif
Sergunb 0:8918a71cdbe9 73
Sergunb 0:8918a71cdbe9 74 //Ethernet interrupt priority
Sergunb 0:8918a71cdbe9 75 #ifndef SAMA5D2_ETH_IRQ_PRIORITY
Sergunb 0:8918a71cdbe9 76 #define SAMA5D2_ETH_IRQ_PRIORITY 0
Sergunb 0:8918a71cdbe9 77 #elif (SAMA5D2_ETH_IRQ_PRIORITY < 0)
Sergunb 0:8918a71cdbe9 78 #error SAMA5D2_ETH_IRQ_PRIORITY parameter is not valid
Sergunb 0:8918a71cdbe9 79 #endif
Sergunb 0:8918a71cdbe9 80
Sergunb 0:8918a71cdbe9 81 //TX buffer descriptor flags
Sergunb 0:8918a71cdbe9 82 #define GMAC_TX_USED 0x80000000
Sergunb 0:8918a71cdbe9 83 #define GMAC_TX_WRAP 0x40000000
Sergunb 0:8918a71cdbe9 84 #define GMAC_TX_RLE_ERROR 0x20000000
Sergunb 0:8918a71cdbe9 85 #define GMAC_TX_UNDERRUN_ERROR 0x10000000
Sergunb 0:8918a71cdbe9 86 #define GMAC_TX_AHB_ERROR 0x08000000
Sergunb 0:8918a71cdbe9 87 #define GMAC_TX_LATE_COL_ERROR 0x04000000
Sergunb 0:8918a71cdbe9 88 #define GMAC_TX_CHECKSUM_ERROR 0x00700000
Sergunb 0:8918a71cdbe9 89 #define GMAC_TX_NO_CRC 0x00010000
Sergunb 0:8918a71cdbe9 90 #define GMAC_TX_LAST 0x00008000
Sergunb 0:8918a71cdbe9 91 #define GMAC_TX_LENGTH 0x00003FFF
Sergunb 0:8918a71cdbe9 92
Sergunb 0:8918a71cdbe9 93 //RX buffer descriptor flags
Sergunb 0:8918a71cdbe9 94 #define GMAC_RX_ADDRESS 0xFFFFFFFC
Sergunb 0:8918a71cdbe9 95 #define GMAC_RX_WRAP 0x00000002
Sergunb 0:8918a71cdbe9 96 #define GMAC_RX_OWNERSHIP 0x00000001
Sergunb 0:8918a71cdbe9 97 #define GMAC_RX_BROADCAST 0x80000000
Sergunb 0:8918a71cdbe9 98 #define GMAC_RX_MULTICAST_HASH 0x40000000
Sergunb 0:8918a71cdbe9 99 #define GMAC_RX_UNICAST_HASH 0x20000000
Sergunb 0:8918a71cdbe9 100 #define GMAC_RX_SAR 0x08000000
Sergunb 0:8918a71cdbe9 101 #define GMAC_RX_SAR_MASK 0x06000000
Sergunb 0:8918a71cdbe9 102 #define GMAC_RX_TYPE_ID 0x01000000
Sergunb 0:8918a71cdbe9 103 #define GMAC_RX_SNAP 0x01000000
Sergunb 0:8918a71cdbe9 104 #define GMAC_RX_TYPE_ID_MASK 0x00C00000
Sergunb 0:8918a71cdbe9 105 #define GMAC_RX_CHECKSUM_VALID 0x00C00000
Sergunb 0:8918a71cdbe9 106 #define GMAC_RX_VLAN_TAG 0x00200000
Sergunb 0:8918a71cdbe9 107 #define GMAC_RX_PRIORITY_TAG 0x00100000
Sergunb 0:8918a71cdbe9 108 #define GMAC_RX_VLAN_PRIORITY 0x000E0000
Sergunb 0:8918a71cdbe9 109 #define GMAC_RX_CFI 0x00010000
Sergunb 0:8918a71cdbe9 110 #define GMAC_RX_EOF 0x00008000
Sergunb 0:8918a71cdbe9 111 #define GMAC_RX_SOF 0x00004000
Sergunb 0:8918a71cdbe9 112 #define GMAC_RX_LENGTH_MSB 0x00002000
Sergunb 0:8918a71cdbe9 113 #define GMAC_RX_BAD_FCS 0x00002000
Sergunb 0:8918a71cdbe9 114 #define GMAC_RX_LENGTH 0x00001FFF
Sergunb 0:8918a71cdbe9 115
Sergunb 0:8918a71cdbe9 116
Sergunb 0:8918a71cdbe9 117 /**
Sergunb 0:8918a71cdbe9 118 * @brief Transmit buffer descriptor
Sergunb 0:8918a71cdbe9 119 **/
Sergunb 0:8918a71cdbe9 120
Sergunb 0:8918a71cdbe9 121 typedef struct
Sergunb 0:8918a71cdbe9 122 {
Sergunb 0:8918a71cdbe9 123 uint32_t address;
Sergunb 0:8918a71cdbe9 124 uint32_t status;
Sergunb 0:8918a71cdbe9 125 } Sama5d2TxBufferDesc;
Sergunb 0:8918a71cdbe9 126
Sergunb 0:8918a71cdbe9 127
Sergunb 0:8918a71cdbe9 128 /**
Sergunb 0:8918a71cdbe9 129 * @brief Receive buffer descriptor
Sergunb 0:8918a71cdbe9 130 **/
Sergunb 0:8918a71cdbe9 131
Sergunb 0:8918a71cdbe9 132 typedef struct
Sergunb 0:8918a71cdbe9 133 {
Sergunb 0:8918a71cdbe9 134 uint32_t address;
Sergunb 0:8918a71cdbe9 135 uint32_t status;
Sergunb 0:8918a71cdbe9 136 } Sama5d2RxBufferDesc;
Sergunb 0:8918a71cdbe9 137
Sergunb 0:8918a71cdbe9 138
Sergunb 0:8918a71cdbe9 139 //SAMA5D2 Ethernet MAC driver
Sergunb 0:8918a71cdbe9 140 extern const NicDriver sama5d2EthDriver;
Sergunb 0:8918a71cdbe9 141
Sergunb 0:8918a71cdbe9 142 //SAMA5D2 Ethernet MAC related functions
Sergunb 0:8918a71cdbe9 143 error_t sama5d2EthInit(NetInterface *interface);
Sergunb 0:8918a71cdbe9 144 void sama5d2EthInitGpio(NetInterface *interface);
Sergunb 0:8918a71cdbe9 145 void sama5d2EthInitBufferDesc(NetInterface *interface);
Sergunb 0:8918a71cdbe9 146
Sergunb 0:8918a71cdbe9 147 void sama5d2EthTick(NetInterface *interface);
Sergunb 0:8918a71cdbe9 148
Sergunb 0:8918a71cdbe9 149 void sama5d2EthEnableIrq(NetInterface *interface);
Sergunb 0:8918a71cdbe9 150 void sama5d2EthDisableIrq(NetInterface *interface);
Sergunb 0:8918a71cdbe9 151 void sama5d2EthIrqHandler(void);
Sergunb 0:8918a71cdbe9 152 void sama5d2EthEventHandler(NetInterface *interface);
Sergunb 0:8918a71cdbe9 153
Sergunb 0:8918a71cdbe9 154 error_t sama5d2EthSendPacket(NetInterface *interface,
Sergunb 0:8918a71cdbe9 155 const NetBuffer *buffer, size_t offset);
Sergunb 0:8918a71cdbe9 156
Sergunb 0:8918a71cdbe9 157 error_t sama5d2EthReceivePacket(NetInterface *interface);
Sergunb 0:8918a71cdbe9 158
Sergunb 0:8918a71cdbe9 159 error_t sama5d2EthSetMulticastFilter(NetInterface *interface);
Sergunb 0:8918a71cdbe9 160 error_t sama5d2EthUpdateMacConfig(NetInterface *interface);
Sergunb 0:8918a71cdbe9 161
Sergunb 0:8918a71cdbe9 162 void sama5d2EthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
Sergunb 0:8918a71cdbe9 163 uint16_t sama5d2EthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
Sergunb 0:8918a71cdbe9 164
Sergunb 0:8918a71cdbe9 165 #endif
Sergunb 0:8918a71cdbe9 166