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cyclone_tcp/drivers/pic32mz_eth.h@0:8918a71cdbe9, 2017-02-04 (annotated)

Committer:
Sergunb
Date:
Sat Feb 04 18:15:49 2017 +0000
Revision:
0:8918a71cdbe9
nothing else

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sergunb 0:8918a71cdbe9 1 /**
Sergunb 0:8918a71cdbe9 2 * @file pic32mz_eth.h
Sergunb 0:8918a71cdbe9 3 * @brief PIC32MZ Ethernet MAC controller
Sergunb 0:8918a71cdbe9 4 *
Sergunb 0:8918a71cdbe9 5 * @section License
Sergunb 0:8918a71cdbe9 6 *
Sergunb 0:8918a71cdbe9 7 * Copyright (C) 2010-2017 Oryx Embedded SARL. All rights reserved.
Sergunb 0:8918a71cdbe9 8 *
Sergunb 0:8918a71cdbe9 9 * This file is part of CycloneTCP Open.
Sergunb 0:8918a71cdbe9 10 *
Sergunb 0:8918a71cdbe9 11 * This program is free software; you can redistribute it and/or
Sergunb 0:8918a71cdbe9 12 * modify it under the terms of the GNU General Public License
Sergunb 0:8918a71cdbe9 13 * as published by the Free Software Foundation; either version 2
Sergunb 0:8918a71cdbe9 14 * of the License, or (at your option) any later version.
Sergunb 0:8918a71cdbe9 15 *
Sergunb 0:8918a71cdbe9 16 * This program is distributed in the hope that it will be useful,
Sergunb 0:8918a71cdbe9 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Sergunb 0:8918a71cdbe9 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Sergunb 0:8918a71cdbe9 19 * GNU General Public License for more details.
Sergunb 0:8918a71cdbe9 20 *
Sergunb 0:8918a71cdbe9 21 * You should have received a copy of the GNU General Public License
Sergunb 0:8918a71cdbe9 22 * along with this program; if not, write to the Free Software Foundation,
Sergunb 0:8918a71cdbe9 23 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
Sergunb 0:8918a71cdbe9 24 *
Sergunb 0:8918a71cdbe9 25 * @author Oryx Embedded SARL (www.oryx-embedded.com)
Sergunb 0:8918a71cdbe9 26 * @version 1.7.6
Sergunb 0:8918a71cdbe9 27 **/
Sergunb 0:8918a71cdbe9 28
Sergunb 0:8918a71cdbe9 29 #ifndef _PIC32MZ_ETH_H
Sergunb 0:8918a71cdbe9 30 #define _PIC32MZ_ETH_H
Sergunb 0:8918a71cdbe9 31
Sergunb 0:8918a71cdbe9 32 //Dependencies
Sergunb 0:8918a71cdbe9 33 #include "core/nic.h"
Sergunb 0:8918a71cdbe9 34
Sergunb 0:8918a71cdbe9 35 //Number of TX buffers
Sergunb 0:8918a71cdbe9 36 #ifndef PIC32MZ_ETH_TX_BUFFER_COUNT
Sergunb 0:8918a71cdbe9 37 #define PIC32MZ_ETH_TX_BUFFER_COUNT 3
Sergunb 0:8918a71cdbe9 38 #elif (PIC32MZ_ETH_TX_BUFFER_COUNT < 1)
Sergunb 0:8918a71cdbe9 39 #error PIC32MZ_ETH_TX_BUFFER_COUNT parameter is not valid
Sergunb 0:8918a71cdbe9 40 #endif
Sergunb 0:8918a71cdbe9 41
Sergunb 0:8918a71cdbe9 42 //TX buffer size
Sergunb 0:8918a71cdbe9 43 #ifndef PIC32MZ_ETH_TX_BUFFER_SIZE
Sergunb 0:8918a71cdbe9 44 #define PIC32MZ_ETH_TX_BUFFER_SIZE 1536
Sergunb 0:8918a71cdbe9 45 #elif (PIC32MZ_ETH_TX_BUFFER_SIZE != 1536)
Sergunb 0:8918a71cdbe9 46 #error PIC32MZ_ETH_TX_BUFFER_SIZE parameter is not valid
Sergunb 0:8918a71cdbe9 47 #endif
Sergunb 0:8918a71cdbe9 48
Sergunb 0:8918a71cdbe9 49 //Number of RX buffers
Sergunb 0:8918a71cdbe9 50 #ifndef PIC32MZ_ETH_RX_BUFFER_COUNT
Sergunb 0:8918a71cdbe9 51 #define PIC32MZ_ETH_RX_BUFFER_COUNT 6
Sergunb 0:8918a71cdbe9 52 #elif (PIC32MZ_ETH_RX_BUFFER_COUNT < 1)
Sergunb 0:8918a71cdbe9 53 #error PIC32MZ_ETH_RX_BUFFER_COUNT parameter is not valid
Sergunb 0:8918a71cdbe9 54 #endif
Sergunb 0:8918a71cdbe9 55
Sergunb 0:8918a71cdbe9 56 //RX buffer size
Sergunb 0:8918a71cdbe9 57 #ifndef PIC32MZ_ETH_RX_BUFFER_SIZE
Sergunb 0:8918a71cdbe9 58 #define PIC32MZ_ETH_RX_BUFFER_SIZE 1536
Sergunb 0:8918a71cdbe9 59 #elif (PIC32MZ_ETH_RX_BUFFER_SIZE != 1536)
Sergunb 0:8918a71cdbe9 60 #error PIC32MZ_ETH_RX_BUFFER_SIZE parameter is not valid
Sergunb 0:8918a71cdbe9 61 #endif
Sergunb 0:8918a71cdbe9 62
Sergunb 0:8918a71cdbe9 63 //Ethernet interrupt priority
Sergunb 0:8918a71cdbe9 64 #ifndef PIC32MZ_ETH_IRQ_PRIORITY
Sergunb 0:8918a71cdbe9 65 #define PIC32MZ_ETH_IRQ_PRIORITY 2
Sergunb 0:8918a71cdbe9 66 #elif (PIC32MZ_ETH_IRQ_PRIORITY < 0)
Sergunb 0:8918a71cdbe9 67 #error PIC32MZ_ETH_IRQ_PRIORITY parameter is not valid
Sergunb 0:8918a71cdbe9 68 #endif
Sergunb 0:8918a71cdbe9 69
Sergunb 0:8918a71cdbe9 70 //Ethernet interrupt subpriority
Sergunb 0:8918a71cdbe9 71 #ifndef PIC32MZ_ETH_IRQ_SUB_PRIORITY
Sergunb 0:8918a71cdbe9 72 #define PIC32MZ_ETH_IRQ_SUB_PRIORITY 0
Sergunb 0:8918a71cdbe9 73 #elif (PIC32MZ_ETH_IRQ_SUB_PRIORITY < 0)
Sergunb 0:8918a71cdbe9 74 #error PIC32MZ_ETH_IRQ_SUB_PRIORITY parameter is not valid
Sergunb 0:8918a71cdbe9 75 #endif
Sergunb 0:8918a71cdbe9 76
Sergunb 0:8918a71cdbe9 77 //EMAC1MCFG register
Sergunb 0:8918a71cdbe9 78 #define _EMAC1MCFG_CLKSEL_DIV4 (0 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 79 #define _EMAC1MCFG_CLKSEL_DIV6 (2 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 80 #define _EMAC1MCFG_CLKSEL_DIV8 (3 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 81 #define _EMAC1MCFG_CLKSEL_DIV10 (4 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 82 #define _EMAC1MCFG_CLKSEL_DIV14 (5 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 83 #define _EMAC1MCFG_CLKSEL_DIV20 (6 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 84 #define _EMAC1MCFG_CLKSEL_DIV28 (7 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 85 #define _EMAC1MCFG_CLKSEL_DIV40 (8 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 86 #define _EMAC1MCFG_CLKSEL_DIV48 (9 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 87 #define _EMAC1MCFG_CLKSEL_DIV50 (10 << _EMAC1MCFG_CLKSEL_POSITION)
Sergunb 0:8918a71cdbe9 88
Sergunb 0:8918a71cdbe9 89 //Transmit buffer descriptor flags
Sergunb 0:8918a71cdbe9 90 #define ETH_TX_CTRL_SOP 0x80000000
Sergunb 0:8918a71cdbe9 91 #define ETH_TX_CTRL_EOP 0x40000000
Sergunb 0:8918a71cdbe9 92 #define ETH_TX_CTRL_BYTE_COUNT 0x07FF0000
Sergunb 0:8918a71cdbe9 93 #define ETH_TX_CTRL_NPV 0x00000100
Sergunb 0:8918a71cdbe9 94 #define ETH_TX_CTRL_EOWN 0x00000080
Sergunb 0:8918a71cdbe9 95 #define ETH_TX_STATUS1_VLAN 0x00080000
Sergunb 0:8918a71cdbe9 96 #define ETH_TX_STATUS1_BACKPRESSURE 0x00040000
Sergunb 0:8918a71cdbe9 97 #define ETH_TX_STATUS1_PAUSE 0x00020000
Sergunb 0:8918a71cdbe9 98 #define ETH_TX_STATUS1_CONTROL 0x00010000
Sergunb 0:8918a71cdbe9 99 #define ETH_TX_STATUS1_TOTAL_BYTES 0x0000FFFF
Sergunb 0:8918a71cdbe9 100 #define ETH_TX_STATUS2_UNDERRUN 0x80000000
Sergunb 0:8918a71cdbe9 101 #define ETH_TX_STATUS2_GIANT 0x40000000
Sergunb 0:8918a71cdbe9 102 #define ETH_TX_STATUS2_LATE_COL 0x20000000
Sergunb 0:8918a71cdbe9 103 #define ETH_TX_STATUS2_MAX_COL 0x10000000
Sergunb 0:8918a71cdbe9 104 #define ETH_TX_STATUS2_EXCESSIVE_DEFER 0x08000000
Sergunb 0:8918a71cdbe9 105 #define ETH_TX_STATUS2_PACKET_DEFER 0x04000000
Sergunb 0:8918a71cdbe9 106 #define ETH_TX_STATUS2_BROADCAST 0x02000000
Sergunb 0:8918a71cdbe9 107 #define ETH_TX_STATUS2_MULTICAST 0x01000000
Sergunb 0:8918a71cdbe9 108 #define ETH_TX_STATUS2_DONE 0x00800000
Sergunb 0:8918a71cdbe9 109 #define ETH_TX_STATUS2_LEN_OUT_OF_RANGE 0x00400000
Sergunb 0:8918a71cdbe9 110 #define ETH_TX_STATUS2_LEN_CHECK_ERROR 0x00200000
Sergunb 0:8918a71cdbe9 111 #define ETH_TX_STATUS2_CRC_ERROR 0x00100000
Sergunb 0:8918a71cdbe9 112 #define ETH_TX_STATUS2_COL_COUNT 0x000F0000
Sergunb 0:8918a71cdbe9 113 #define ETH_TX_STATUS2_BYTE_COUNT 0x0000FFFF
Sergunb 0:8918a71cdbe9 114
Sergunb 0:8918a71cdbe9 115 //Receive buffer descriptor flags
Sergunb 0:8918a71cdbe9 116 #define ETH_RX_CTRL_SOP 0x80000000
Sergunb 0:8918a71cdbe9 117 #define ETH_RX_CTRL_EOP 0x40000000
Sergunb 0:8918a71cdbe9 118 #define ETH_RX_CTRL_BYTE_COUNT 0x07FF0000
Sergunb 0:8918a71cdbe9 119 #define ETH_RX_CTRL_NPV 0x00000100
Sergunb 0:8918a71cdbe9 120 #define ETH_RX_CTRL_EOWN 0x00000080
Sergunb 0:8918a71cdbe9 121 #define ETH_RX_STATUS1_MULTICAST_MATCH 0x80000000
Sergunb 0:8918a71cdbe9 122 #define ETH_RX_STATUS1_BROADCAST_MATCH 0x40000000
Sergunb 0:8918a71cdbe9 123 #define ETH_RX_STATUS1_UNICAST_MATCH 0x20000000
Sergunb 0:8918a71cdbe9 124 #define ETH_RX_STATUS1_PATTERN_MATCH 0x10000000
Sergunb 0:8918a71cdbe9 125 #define ETH_RX_STATUS1_MAGIC_PACKET_MATCH 0x08000000
Sergunb 0:8918a71cdbe9 126 #define ETH_RX_STATUS1_HASH_TABLE_MATCH 0x04000000
Sergunb 0:8918a71cdbe9 127 #define ETH_RX_STATUS1_NOT_MATCH 0x02000000
Sergunb 0:8918a71cdbe9 128 #define ETH_RX_STATUS1_RUNT_PACKET 0x01000000
Sergunb 0:8918a71cdbe9 129 #define ETH_RX_STATUS1_PACKET_CHECKSUM 0x0000FFFF
Sergunb 0:8918a71cdbe9 130 #define ETH_RX_STATUS2_VLAN 0x40000000
Sergunb 0:8918a71cdbe9 131 #define ETH_RX_STATUS2_UNKNOWN_OP_CODE 0x20000000
Sergunb 0:8918a71cdbe9 132 #define ETH_RX_STATUS2_PAUSE 0x10000000
Sergunb 0:8918a71cdbe9 133 #define ETH_RX_STATUS2_CONTROL 0x08000000
Sergunb 0:8918a71cdbe9 134 #define ETH_RX_STATUS2_DRIBBLE_NIBBLE 0x04000000
Sergunb 0:8918a71cdbe9 135 #define ETH_RX_STATUS2_BROADCAST 0x02000000
Sergunb 0:8918a71cdbe9 136 #define ETH_RX_STATUS2_MULTICAST 0x01000000
Sergunb 0:8918a71cdbe9 137 #define ETH_RX_STATUS2_OK 0x00800000
Sergunb 0:8918a71cdbe9 138 #define ETH_RX_STATUS2_LEN_OUT_OF_RANGE 0x00400000
Sergunb 0:8918a71cdbe9 139 #define ETH_RX_STATUS2_LEN_CHECK_ERROR 0x00200000
Sergunb 0:8918a71cdbe9 140 #define ETH_RX_STATUS2_CRC_ERROR 0x00100000
Sergunb 0:8918a71cdbe9 141 #define ETH_RX_STATUS2_CODE_VIOLATION 0x00080000
Sergunb 0:8918a71cdbe9 142 #define ETH_RX_STATUS2_CARRIER_EVENT 0x00040000
Sergunb 0:8918a71cdbe9 143 #define ETH_RX_STATUS2_RXDV_EVENT 0x00020000
Sergunb 0:8918a71cdbe9 144 #define ETH_RX_STATUS2_LONG_EVENT 0x00010000
Sergunb 0:8918a71cdbe9 145 #define ETH_RX_STATUS2_BYTE_COUNT 0x0000FFFF
Sergunb 0:8918a71cdbe9 146
Sergunb 0:8918a71cdbe9 147
Sergunb 0:8918a71cdbe9 148 /**
Sergunb 0:8918a71cdbe9 149 * @brief TX buffer descriptor
Sergunb 0:8918a71cdbe9 150 **/
Sergunb 0:8918a71cdbe9 151
Sergunb 0:8918a71cdbe9 152 typedef struct
Sergunb 0:8918a71cdbe9 153 {
Sergunb 0:8918a71cdbe9 154 uint32_t control;
Sergunb 0:8918a71cdbe9 155 uint32_t address;
Sergunb 0:8918a71cdbe9 156 uint32_t status1;
Sergunb 0:8918a71cdbe9 157 uint32_t status2;
Sergunb 0:8918a71cdbe9 158 uint32_t next;
Sergunb 0:8918a71cdbe9 159 } Pic32mzTxBufferDesc;
Sergunb 0:8918a71cdbe9 160
Sergunb 0:8918a71cdbe9 161
Sergunb 0:8918a71cdbe9 162 /**
Sergunb 0:8918a71cdbe9 163 * @brief RX buffer descriptor
Sergunb 0:8918a71cdbe9 164 **/
Sergunb 0:8918a71cdbe9 165
Sergunb 0:8918a71cdbe9 166 typedef struct
Sergunb 0:8918a71cdbe9 167 {
Sergunb 0:8918a71cdbe9 168 uint32_t control;
Sergunb 0:8918a71cdbe9 169 uint32_t address;
Sergunb 0:8918a71cdbe9 170 uint32_t status1;
Sergunb 0:8918a71cdbe9 171 uint32_t status2;
Sergunb 0:8918a71cdbe9 172 uint32_t next;
Sergunb 0:8918a71cdbe9 173 } Pic32mzRxBufferDesc;
Sergunb 0:8918a71cdbe9 174
Sergunb 0:8918a71cdbe9 175
Sergunb 0:8918a71cdbe9 176 //PIC32MZ Ethernet MAC driver
Sergunb 0:8918a71cdbe9 177 extern const NicDriver pic32mzEthDriver;
Sergunb 0:8918a71cdbe9 178
Sergunb 0:8918a71cdbe9 179 //PIC32MZ Ethernet MAC related functions
Sergunb 0:8918a71cdbe9 180 error_t pic32mzEthInit(NetInterface *interface);
Sergunb 0:8918a71cdbe9 181 void pic32mzEthInitGpio(NetInterface *interface);
Sergunb 0:8918a71cdbe9 182 void pic32mzEthInitBufferDesc(NetInterface *interface);
Sergunb 0:8918a71cdbe9 183
Sergunb 0:8918a71cdbe9 184 void pic32mzEthTick(NetInterface *interface);
Sergunb 0:8918a71cdbe9 185
Sergunb 0:8918a71cdbe9 186 void pic32mzEthEnableIrq(NetInterface *interface);
Sergunb 0:8918a71cdbe9 187 void pic32mzEthDisableIrq(NetInterface *interface);
Sergunb 0:8918a71cdbe9 188 void pic32mzEthIrqHandler(void);
Sergunb 0:8918a71cdbe9 189 void pic32mzEthEventHandler(NetInterface *interface);
Sergunb 0:8918a71cdbe9 190
Sergunb 0:8918a71cdbe9 191 error_t pic32mzEthSendPacket(NetInterface *interface,
Sergunb 0:8918a71cdbe9 192 const NetBuffer *buffer, size_t offset);
Sergunb 0:8918a71cdbe9 193
Sergunb 0:8918a71cdbe9 194 error_t pic32mzEthReceivePacket(NetInterface *interface);
Sergunb 0:8918a71cdbe9 195
Sergunb 0:8918a71cdbe9 196 error_t pic32mzEthSetMulticastFilter(NetInterface *interface);
Sergunb 0:8918a71cdbe9 197 error_t pic32mzEthUpdateMacConfig(NetInterface *interface);
Sergunb 0:8918a71cdbe9 198
Sergunb 0:8918a71cdbe9 199 void pic32mzEthWritePhyReg(uint8_t phyAddr, uint8_t regAddr, uint16_t data);
Sergunb 0:8918a71cdbe9 200 uint16_t pic32mzEthReadPhyReg(uint8_t phyAddr, uint8_t regAddr);
Sergunb 0:8918a71cdbe9 201
Sergunb 0:8918a71cdbe9 202 uint32_t pic32mzEthCalcCrc(const void *data, size_t length);
Sergunb 0:8918a71cdbe9 203
Sergunb 0:8918a71cdbe9 204 #endif
Sergunb 0:8918a71cdbe9 205