Sang Vu Van / RF22

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RF22.cpp@0:e16ffa7cb900, 2012-07-02 (annotated)

Committer:
SangSTBK
Date:
Mon Jul 02 01:29:58 2012 +0000
Revision:
0:e16ffa7cb900
RF

Who changed what in which revision?

UserRevisionLine numberNew contents of line
SangSTBK 0:e16ffa7cb900 1 // RF22.cpp
SangSTBK 0:e16ffa7cb900 2 //
SangSTBK 0:e16ffa7cb900 3 // Copyright (C) 2011 Mike McCauley
SangSTBK 0:e16ffa7cb900 4 // $Id: RF22.cpp,v 1.13 2011/10/09 21:22:24 mikem Exp mikem $
SangSTBK 0:e16ffa7cb900 5 // ported to mbed by Karl Zweimueller
SangSTBK 0:e16ffa7cb900 6
SangSTBK 0:e16ffa7cb900 7
SangSTBK 0:e16ffa7cb900 8 #include "mbed.h"
SangSTBK 0:e16ffa7cb900 9 #include "RF22.h"
SangSTBK 0:e16ffa7cb900 10 //#include <SPI.h>
SangSTBK 0:e16ffa7cb900 11
SangSTBK 0:e16ffa7cb900 12
SangSTBK 0:e16ffa7cb900 13 // Interrupt vectors for the 2 Arduino interrupt pins
SangSTBK 0:e16ffa7cb900 14 // Each interrupt can be handled by a different instance of RF22, allowing you to have
SangSTBK 0:e16ffa7cb900 15 // 2 RF22s per Arduino
SangSTBK 0:e16ffa7cb900 16 //RF22* RF22::_RF22ForInterrupt[2] = {0, 0};
SangSTBK 0:e16ffa7cb900 17
SangSTBK 0:e16ffa7cb900 18 // These are indexed by the values of ModemConfigChoice
SangSTBK 0:e16ffa7cb900 19 // Canned modem configurations generated with
SangSTBK 0:e16ffa7cb900 20 // 'http://www.hoperf.com/upfile/RF22B 23B 31B 42B 43B Register Settings_RevB1-v5.xls'
SangSTBK 0:e16ffa7cb900 21 // Stored in flash (program) memory to save SRAM
SangSTBK 0:e16ffa7cb900 22 /*PROGMEM */ static const RF22::ModemConfig MODEM_CONFIG_TABLE[] =
SangSTBK 0:e16ffa7cb900 23 {
SangSTBK 0:e16ffa7cb900 24 { 0x2b, 0x03, 0xf4, 0x20, 0x41, 0x89, 0x00, 0x36, 0x40, 0x0a, 0x1d, 0x80, 0x60, 0x10, 0x62, 0x2c, 0x00, 0x08 }, // Unmodulated carrier
SangSTBK 0:e16ffa7cb900 25 { 0x2b, 0x03, 0xf4, 0x20, 0x41, 0x89, 0x00, 0x36, 0x40, 0x0a, 0x1d, 0x80, 0x60, 0x10, 0x62, 0x2c, 0x33, 0x08 }, // FSK, PN9 random modulation, 2, 5
SangSTBK 0:e16ffa7cb900 26
SangSTBK 0:e16ffa7cb900 27 // 1c, 1f, 20, 21, 22, 23, 24, 25, 2c, 2d, 2e, 58, 69, 6e, 6f, 70, 71, 72
SangSTBK 0:e16ffa7cb900 28 // FSK, No Manchester, Max Rb err <1%, Xtal Tol 20ppm
SangSTBK 0:e16ffa7cb900 29 { 0x2b, 0x03, 0xf4, 0x20, 0x41, 0x89, 0x00, 0x36, 0x40, 0x0a, 0x1d, 0x80, 0x60, 0x10, 0x62, 0x2c, 0x22, 0x08 }, // 2, 5
SangSTBK 0:e16ffa7cb900 30 { 0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x22, 0x3a }, // 2.4, 36
SangSTBK 0:e16ffa7cb900 31 { 0x1d, 0x03, 0xa1, 0x20, 0x4e, 0xa5, 0x00, 0x13, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x27, 0x52, 0x2c, 0x22, 0x48 }, // 4.8, 45
SangSTBK 0:e16ffa7cb900 32 { 0x1e, 0x03, 0xd0, 0x00, 0x9d, 0x49, 0x00, 0x45, 0x40, 0x0a, 0x20, 0x80, 0x60, 0x4e, 0xa5, 0x2c, 0x22, 0x48 }, // 9.6, 45
SangSTBK 0:e16ffa7cb900 33 { 0x2b, 0x03, 0x34, 0x02, 0x75, 0x25, 0x07, 0xff, 0x40, 0x0a, 0x1b, 0x80, 0x60, 0x9d, 0x49, 0x2c, 0x22, 0x0f }, // 19.2, 9.6
SangSTBK 0:e16ffa7cb900 34 { 0x02, 0x03, 0x68, 0x01, 0x3a, 0x93, 0x04, 0xd5, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x09, 0xd5, 0x0c, 0x22, 0x1f }, // 38.4, 19.6
SangSTBK 0:e16ffa7cb900 35 { 0x06, 0x03, 0x45, 0x01, 0xd7, 0xdc, 0x07, 0x6e, 0x40, 0x0a, 0x2d, 0x80, 0x60, 0x0e, 0xbf, 0x0c, 0x22, 0x2e }, // 57.6. 28.8
SangSTBK 0:e16ffa7cb900 36 { 0x8a, 0x03, 0x60, 0x01, 0x55, 0x55, 0x02, 0xad, 0x40, 0x0a, 0x50, 0x80, 0x60, 0x20, 0x00, 0x0c, 0x22, 0xc8 }, // 125, 125
SangSTBK 0:e16ffa7cb900 37
SangSTBK 0:e16ffa7cb900 38 // GFSK, No Manchester, Max Rb err <1%, Xtal Tol 20ppm
SangSTBK 0:e16ffa7cb900 39 // These differ from FSK only in register 71, for the modulation type
SangSTBK 0:e16ffa7cb900 40 { 0x2b, 0x03, 0xf4, 0x20, 0x41, 0x89, 0x00, 0x36, 0x40, 0x0a, 0x1d, 0x80, 0x60, 0x10, 0x62, 0x2c, 0x23, 0x08 }, // 2, 5
SangSTBK 0:e16ffa7cb900 41 { 0x1b, 0x03, 0x41, 0x60, 0x27, 0x52, 0x00, 0x07, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x23, 0x3a }, // 2.4, 36
SangSTBK 0:e16ffa7cb900 42 { 0x1d, 0x03, 0xa1, 0x20, 0x4e, 0xa5, 0x00, 0x13, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x27, 0x52, 0x2c, 0x23, 0x48 }, // 4.8, 45
SangSTBK 0:e16ffa7cb900 43 { 0x1e, 0x03, 0xd0, 0x00, 0x9d, 0x49, 0x00, 0x45, 0x40, 0x0a, 0x20, 0x80, 0x60, 0x4e, 0xa5, 0x2c, 0x23, 0x48 }, // 9.6, 45
SangSTBK 0:e16ffa7cb900 44 { 0x2b, 0x03, 0x34, 0x02, 0x75, 0x25, 0x07, 0xff, 0x40, 0x0a, 0x1b, 0x80, 0x60, 0x9d, 0x49, 0x2c, 0x23, 0x0f }, // 19.2, 9.6
SangSTBK 0:e16ffa7cb900 45 { 0x02, 0x03, 0x68, 0x01, 0x3a, 0x93, 0x04, 0xd5, 0x40, 0x0a, 0x1e, 0x80, 0x60, 0x09, 0xd5, 0x0c, 0x23, 0x1f }, // 38.4, 19.6
SangSTBK 0:e16ffa7cb900 46 { 0x06, 0x03, 0x45, 0x01, 0xd7, 0xdc, 0x07, 0x6e, 0x40, 0x0a, 0x2d, 0x80, 0x60, 0x0e, 0xbf, 0x0c, 0x23, 0x2e }, // 57.6. 28.8
SangSTBK 0:e16ffa7cb900 47 { 0x8a, 0x03, 0x60, 0x01, 0x55, 0x55, 0x02, 0xad, 0x40, 0x0a, 0x50, 0x80, 0x60, 0x20, 0x00, 0x0c, 0x23, 0xc8 }, // 125, 125
SangSTBK 0:e16ffa7cb900 48
SangSTBK 0:e16ffa7cb900 49 // OOK, No Manchester, Max Rb err <1%, Xtal Tol 20ppm
SangSTBK 0:e16ffa7cb900 50 { 0x51, 0x03, 0x68, 0x00, 0x3a, 0x93, 0x01, 0x3d, 0x2c, 0x11, 0x28, 0x80, 0x60, 0x09, 0xd5, 0x2c, 0x21, 0x08 }, // 1.2, 75
SangSTBK 0:e16ffa7cb900 51 { 0xc8, 0x03, 0x39, 0x20, 0x68, 0xdc, 0x00, 0x6b, 0x2a, 0x08, 0x2a, 0x80, 0x60, 0x13, 0xa9, 0x2c, 0x21, 0x08 }, // 2.4, 335
SangSTBK 0:e16ffa7cb900 52 { 0xc8, 0x03, 0x9c, 0x00, 0xd1, 0xb7, 0x00, 0xd4, 0x29, 0x04, 0x29, 0x80, 0x60, 0x27, 0x52, 0x2c, 0x21, 0x08 }, // 4.8, 335
SangSTBK 0:e16ffa7cb900 53 { 0xb8, 0x03, 0x9c, 0x00, 0xd1, 0xb7, 0x00, 0xd4, 0x28, 0x82, 0x29, 0x80, 0x60, 0x4e, 0xa5, 0x2c, 0x21, 0x08 }, // 9.6, 335
SangSTBK 0:e16ffa7cb900 54 { 0xa8, 0x03, 0x9c, 0x00, 0xd1, 0xb7, 0x00, 0xd4, 0x28, 0x41, 0x29, 0x80, 0x60, 0x9d, 0x49, 0x2c, 0x21, 0x08 }, // 19.2, 335
SangSTBK 0:e16ffa7cb900 55 { 0x98, 0x03, 0x9c, 0x00, 0xd1, 0xb7, 0x00, 0xd4, 0x28, 0x20, 0x29, 0x80, 0x60, 0x09, 0xd5, 0x0c, 0x21, 0x08 }, // 38.4, 335
SangSTBK 0:e16ffa7cb900 56 { 0x98, 0x03, 0x96, 0x00, 0xda, 0x74, 0x00, 0xdc, 0x28, 0x1f, 0x29, 0x80, 0x60, 0x0a, 0x3d, 0x0c, 0x21, 0x08 }, // 40, 335
SangSTBK 0:e16ffa7cb900 57
SangSTBK 0:e16ffa7cb900 58 };
SangSTBK 0:e16ffa7cb900 59
SangSTBK 0:e16ffa7cb900 60 RF22::RF22(PinName slaveSelectPin, PinName mosi, PinName miso, PinName sclk, PinName interrupt)
SangSTBK 0:e16ffa7cb900 61 : _slaveSelectPin(slaveSelectPin), _spi(mosi, miso, sclk), _interrupt(interrupt), led1(LED1), led2(LED2), led3(LED3), led4(LED4)
SangSTBK 0:e16ffa7cb900 62 {
SangSTBK 0:e16ffa7cb900 63
SangSTBK 0:e16ffa7cb900 64
SangSTBK 0:e16ffa7cb900 65 _idleMode = RF22_XTON; // Default idle state is READY mode
SangSTBK 0:e16ffa7cb900 66 _mode = RF22_MODE_IDLE; // We start up in idle mode
SangSTBK 0:e16ffa7cb900 67 _rxGood = 0;
SangSTBK 0:e16ffa7cb900 68 _rxBad = 0;
SangSTBK 0:e16ffa7cb900 69 _txGood = 0;
SangSTBK 0:e16ffa7cb900 70
SangSTBK 0:e16ffa7cb900 71
SangSTBK 0:e16ffa7cb900 72 }
SangSTBK 0:e16ffa7cb900 73
SangSTBK 0:e16ffa7cb900 74 boolean RF22::init()
SangSTBK 0:e16ffa7cb900 75 {
SangSTBK 0:e16ffa7cb900 76 // Wait for RF22 POR (up to 16msec)
SangSTBK 0:e16ffa7cb900 77 //delay(16);
SangSTBK 0:e16ffa7cb900 78 wait_ms(16);
SangSTBK 0:e16ffa7cb900 79
SangSTBK 0:e16ffa7cb900 80 // Initialise the slave select pin
SangSTBK 0:e16ffa7cb900 81 //pinMode(_slaveSelectPin, OUTPUT);
SangSTBK 0:e16ffa7cb900 82 //digitalWrite(_slaveSelectPin, HIGH);
SangSTBK 0:e16ffa7cb900 83 _slaveSelectPin = 1;
SangSTBK 0:e16ffa7cb900 84
SangSTBK 0:e16ffa7cb900 85 wait_ms(100);
SangSTBK 0:e16ffa7cb900 86
SangSTBK 0:e16ffa7cb900 87 // start the SPI library:
SangSTBK 0:e16ffa7cb900 88 // Note the RF22 wants mode 0, MSB first and default to 1 Mbps
SangSTBK 0:e16ffa7cb900 89 /*SPI.begin();
SangSTBK 0:e16ffa7cb900 90 SPI.setDataMode(SPI_MODE0);
SangSTBK 0:e16ffa7cb900 91 SPI.setBitOrder(MSBFIRST);
SangSTBK 0:e16ffa7cb900 92 SPI.setClockDivider(SPI_CLOCK_DIV16); // (16 Mhz / 16) = 1 MHz
SangSTBK 0:e16ffa7cb900 93 */
SangSTBK 0:e16ffa7cb900 94
SangSTBK 0:e16ffa7cb900 95 // Setup the spi for 8 bit data : 1RW-bit 7 adressbit and 8 databit
SangSTBK 0:e16ffa7cb900 96 // second edge capture, with a 10MHz clock rate
SangSTBK 0:e16ffa7cb900 97 _spi.format(8,0);
SangSTBK 0:e16ffa7cb900 98 _spi.frequency(10000000);
SangSTBK 0:e16ffa7cb900 99
SangSTBK 0:e16ffa7cb900 100 // Software reset the device
SangSTBK 0:e16ffa7cb900 101 reset();
SangSTBK 0:e16ffa7cb900 102
SangSTBK 0:e16ffa7cb900 103 // Get the device type and check it
SangSTBK 0:e16ffa7cb900 104 // This also tests whether we are really connected to a device
SangSTBK 0:e16ffa7cb900 105 _deviceType = spiRead(RF22_REG_00_DEVICE_TYPE);
SangSTBK 0:e16ffa7cb900 106 if ( _deviceType != RF22_DEVICE_TYPE_RX_TRX
SangSTBK 0:e16ffa7cb900 107 && _deviceType != RF22_DEVICE_TYPE_TX)
SangSTBK 0:e16ffa7cb900 108 return false;
SangSTBK 0:e16ffa7cb900 109
SangSTBK 0:e16ffa7cb900 110 // Set up interrupt handler
SangSTBK 0:e16ffa7cb900 111 // if (_interrupt == 0)
SangSTBK 0:e16ffa7cb900 112 // {
SangSTBK 0:e16ffa7cb900 113 //_RF22ForInterrupt[0] = this;
SangSTBK 0:e16ffa7cb900 114 //attachInterrupt(0, RF22::isr0, LOW);
SangSTBK 0:e16ffa7cb900 115 _interrupt.fall(this, &RF22::isr0);
SangSTBK 0:e16ffa7cb900 116 /* }
SangSTBK 0:e16ffa7cb900 117 else if (_interrupt == 1)
SangSTBK 0:e16ffa7cb900 118 {
SangSTBK 0:e16ffa7cb900 119 _RF22ForInterrupt[1] = this;
SangSTBK 0:e16ffa7cb900 120 attachInterrupt(1, RF22::isr1, LOW);
SangSTBK 0:e16ffa7cb900 121 }
SangSTBK 0:e16ffa7cb900 122 else
SangSTBK 0:e16ffa7cb900 123 return false;
SangSTBK 0:e16ffa7cb900 124 */
SangSTBK 0:e16ffa7cb900 125 clearTxBuf();
SangSTBK 0:e16ffa7cb900 126 clearRxBuf();
SangSTBK 0:e16ffa7cb900 127
SangSTBK 0:e16ffa7cb900 128 // Most of these are the POR default
SangSTBK 0:e16ffa7cb900 129 spiWrite(RF22_REG_7D_TX_FIFO_CONTROL2, RF22_TXFFAEM_THRESHOLD);
SangSTBK 0:e16ffa7cb900 130 spiWrite(RF22_REG_7E_RX_FIFO_CONTROL, RF22_RXFFAFULL_THRESHOLD);
SangSTBK 0:e16ffa7cb900 131 spiWrite(RF22_REG_30_DATA_ACCESS_CONTROL, RF22_ENPACRX | RF22_ENPACTX | RF22_ENCRC | RF22_CRC_CRC_16_IBM);
SangSTBK 0:e16ffa7cb900 132 // Configure the message headers
SangSTBK 0:e16ffa7cb900 133 // Here we set up the standard packet format for use by the RF22 library
SangSTBK 0:e16ffa7cb900 134 // 8 nibbles preamble
SangSTBK 0:e16ffa7cb900 135 // 2 SYNC words 2d, d4
SangSTBK 0:e16ffa7cb900 136 // Header length 4 (to, from, id, flags)
SangSTBK 0:e16ffa7cb900 137 // 1 octet of data length (0 to 255)
SangSTBK 0:e16ffa7cb900 138 // 0 to 255 octets data
SangSTBK 0:e16ffa7cb900 139 // 2 CRC octets as CRC16(IBM), computed on the header, length and data
SangSTBK 0:e16ffa7cb900 140 // On reception the to address is check for validity against RF22_REG_3F_CHECK_HEADER3
SangSTBK 0:e16ffa7cb900 141 // or the broadcast address of 0xff
SangSTBK 0:e16ffa7cb900 142 // If no changes are made after this, the transmitted
SangSTBK 0:e16ffa7cb900 143 // to address will be 0xff, the from address will be 0xff
SangSTBK 0:e16ffa7cb900 144 // and all such messages will be accepted. This permits the out-of the box
SangSTBK 0:e16ffa7cb900 145 // RF22 config to act as an unaddresed, unreliable datagram service
SangSTBK 0:e16ffa7cb900 146 spiWrite(RF22_REG_32_HEADER_CONTROL1, RF22_BCEN_HEADER3 | RF22_HDCH_HEADER3);
SangSTBK 0:e16ffa7cb900 147 spiWrite(RF22_REG_33_HEADER_CONTROL2, RF22_HDLEN_4 | RF22_SYNCLEN_2);
SangSTBK 0:e16ffa7cb900 148 setPreambleLength(8);
SangSTBK 0:e16ffa7cb900 149 uint8_t syncwords[] = { 0x2d, 0xd4 };
SangSTBK 0:e16ffa7cb900 150 setSyncWords(syncwords, sizeof(syncwords));
SangSTBK 0:e16ffa7cb900 151 setPromiscuous(false);
SangSTBK 0:e16ffa7cb900 152 // Check the TO header against RF22_DEFAULT_NODE_ADDRESS
SangSTBK 0:e16ffa7cb900 153 spiWrite(RF22_REG_3F_CHECK_HEADER3, RF22_DEFAULT_NODE_ADDRESS);
SangSTBK 0:e16ffa7cb900 154 // Set the default transmit header values
SangSTBK 0:e16ffa7cb900 155 setHeaderTo(RF22_DEFAULT_NODE_ADDRESS);
SangSTBK 0:e16ffa7cb900 156 setHeaderFrom(RF22_DEFAULT_NODE_ADDRESS);
SangSTBK 0:e16ffa7cb900 157 setHeaderId(0);
SangSTBK 0:e16ffa7cb900 158 setHeaderFlags(0);
SangSTBK 0:e16ffa7cb900 159
SangSTBK 0:e16ffa7cb900 160 // Ensure the antenna can be switched automatically according to transmit and receive
SangSTBK 0:e16ffa7cb900 161 // This assumes GPIO0(out) is connected to TX_ANT(in) to enable tx antenna during transmit
SangSTBK 0:e16ffa7cb900 162 // This assumes GPIO1(out) is connected to RX_ANT(in) to enable rx antenna during receive
SangSTBK 0:e16ffa7cb900 163 spiWrite (RF22_REG_0B_GPIO_CONFIGURATION0, 0x12) ; // TX state
SangSTBK 0:e16ffa7cb900 164 spiWrite (RF22_REG_0C_GPIO_CONFIGURATION1, 0x15) ; // RX state
SangSTBK 0:e16ffa7cb900 165
SangSTBK 0:e16ffa7cb900 166 // Enable interrupts
SangSTBK 0:e16ffa7cb900 167 spiWrite(RF22_REG_05_INTERRUPT_ENABLE1, RF22_ENTXFFAEM | RF22_ENRXFFAFULL | RF22_ENPKSENT | RF22_ENPKVALID | RF22_ENCRCERROR | RF22_ENFFERR);
SangSTBK 0:e16ffa7cb900 168 spiWrite(RF22_REG_06_INTERRUPT_ENABLE2, RF22_ENPREAVAL);
SangSTBK 0:e16ffa7cb900 169
SangSTBK 0:e16ffa7cb900 170 // Set some defaults. An innocuous ISM frequency
SangSTBK 0:e16ffa7cb900 171 setFrequency(868.0);
SangSTBK 0:e16ffa7cb900 172 // setFrequency(434.0);
SangSTBK 0:e16ffa7cb900 173 // setFrequency(900.0);
SangSTBK 0:e16ffa7cb900 174 // Some slow, reliable default speed and modulation
SangSTBK 0:e16ffa7cb900 175 setModemConfig(FSK_Rb2_4Fd36);
SangSTBK 0:e16ffa7cb900 176 // setModemConfig(FSK_Rb125Fd125);
SangSTBK 0:e16ffa7cb900 177 // Minimum power
SangSTBK 0:e16ffa7cb900 178 setTxPower(RF22_TXPOW_8DBM);
SangSTBK 0:e16ffa7cb900 179 // setTxPower(RF22_TXPOW_17DBM);
SangSTBK 0:e16ffa7cb900 180
SangSTBK 0:e16ffa7cb900 181 // Set the AFC for receiver to max. 0,1MHz
SangSTBK 0:e16ffa7cb900 182 // Other AFC-Registers have PowerOnValues which enable AFC
SangSTBK 0:e16ffa7cb900 183 // RF22_AFC_LIMIT 0x50 =0,1MHz
SangSTBK 0:e16ffa7cb900 184 spiWrite(RF22_REG_2A_AFC_LIMITER, RF22_AFC_LIMIT); // POR=0x00 = OFF
SangSTBK 0:e16ffa7cb900 185
SangSTBK 0:e16ffa7cb900 186 return true;
SangSTBK 0:e16ffa7cb900 187 }
SangSTBK 0:e16ffa7cb900 188
SangSTBK 0:e16ffa7cb900 189 void RF22::handleInterrupt()
SangSTBK 0:e16ffa7cb900 190 {
SangSTBK 0:e16ffa7cb900 191 led1 = !led1;
SangSTBK 0:e16ffa7cb900 192 receive_data = spiRead(0x7f);
SangSTBK 0:e16ffa7cb900 193 resetFifos();
SangSTBK 0:e16ffa7cb900 194 status_03 = spiRead(0x03);
SangSTBK 0:e16ffa7cb900 195
SangSTBK 0:e16ffa7cb900 196 spiRead(0x04);
SangSTBK 0:e16ffa7cb900 197 spiWrite(RF22_REG_05_INTERRUPT_ENABLE1, RF22_ENTXFFAEM | RF22_ENRXFFAFULL | RF22_ENPKSENT | RF22_ENPKVALID | RF22_ENCRCERROR | RF22_ENFFERR);
SangSTBK 0:e16ffa7cb900 198 spiWrite(0x3e, 1);
SangSTBK 0:e16ffa7cb900 199 spiWrite(0x07, 5);
SangSTBK 0:e16ffa7cb900 200 //pc.printf("ch = %d",ch);
SangSTBK 0:e16ffa7cb900 201
SangSTBK 0:e16ffa7cb900 202 }
SangSTBK 0:e16ffa7cb900 203 // C++ level interrupt handler for this instance
SangSTBK 0:e16ffa7cb900 204
SangSTBK 0:e16ffa7cb900 205
SangSTBK 0:e16ffa7cb900 206 // These are low level functions that call the interrupt handler for the correct
SangSTBK 0:e16ffa7cb900 207 // instance of RF22.
SangSTBK 0:e16ffa7cb900 208 // 2 interrupts allows us to have 2 different devices
SangSTBK 0:e16ffa7cb900 209 void RF22::isr0()
SangSTBK 0:e16ffa7cb900 210 {
SangSTBK 0:e16ffa7cb900 211 //if (_RF22ForInterrupt[0])
SangSTBK 0:e16ffa7cb900 212 //_RF22ForInterrupt[0]->handleInterrupt();
SangSTBK 0:e16ffa7cb900 213 handleInterrupt();
SangSTBK 0:e16ffa7cb900 214 }
SangSTBK 0:e16ffa7cb900 215 /*
SangSTBK 0:e16ffa7cb900 216 void RF22::isr1()
SangSTBK 0:e16ffa7cb900 217 {
SangSTBK 0:e16ffa7cb900 218 if (_RF22ForInterrupt[1])
SangSTBK 0:e16ffa7cb900 219 _RF22ForInterrupt[1]->handleInterrupt();
SangSTBK 0:e16ffa7cb900 220 }
SangSTBK 0:e16ffa7cb900 221 */
SangSTBK 0:e16ffa7cb900 222 void RF22::reset()
SangSTBK 0:e16ffa7cb900 223 {
SangSTBK 0:e16ffa7cb900 224 spiWrite(RF22_REG_07_OPERATING_MODE1, RF22_SWRES);
SangSTBK 0:e16ffa7cb900 225 // Wait for it to settle
SangSTBK 0:e16ffa7cb900 226 //delay(1); // SWReset time is nominally 100usec
SangSTBK 0:e16ffa7cb900 227 wait_ms(1);
SangSTBK 0:e16ffa7cb900 228 }
SangSTBK 0:e16ffa7cb900 229
SangSTBK 0:e16ffa7cb900 230 uint8_t RF22::spiRead(uint8_t reg)
SangSTBK 0:e16ffa7cb900 231 {
SangSTBK 0:e16ffa7cb900 232 //digitalWrite(_slaveSelectPin, LOW);
SangSTBK 0:e16ffa7cb900 233 _slaveSelectPin=0;
SangSTBK 0:e16ffa7cb900 234 //_spi.write(reg & ~RF22_SPI_WRITE_MASK); // Send the address with the write mask off
SangSTBK 0:e16ffa7cb900 235 _spi.write(reg & ~RF22_SPI_WRITE_MASK); // Send the address with the write mask off
SangSTBK 0:e16ffa7cb900 236 uint8_t val = _spi.write(0); // The written value is ignored, reg value is read
SangSTBK 0:e16ffa7cb900 237 //digitalWrite(_slaveSelectPin, HIGH);
SangSTBK 0:e16ffa7cb900 238 _slaveSelectPin = 1;
SangSTBK 0:e16ffa7cb900 239 return val;
SangSTBK 0:e16ffa7cb900 240 }
SangSTBK 0:e16ffa7cb900 241
SangSTBK 0:e16ffa7cb900 242 void RF22::spiWrite(uint8_t reg, uint8_t val)
SangSTBK 0:e16ffa7cb900 243 {
SangSTBK 0:e16ffa7cb900 244 //digitalWrite(_slaveSelectPin, LOW);
SangSTBK 0:e16ffa7cb900 245 _slaveSelectPin = 0;
SangSTBK 0:e16ffa7cb900 246 _spi.write(reg | RF22_SPI_WRITE_MASK); // Send the address with the write mask on
SangSTBK 0:e16ffa7cb900 247 _spi.write(val); // New value follows
SangSTBK 0:e16ffa7cb900 248 //digitalWrite(_slaveSelectPin, HIGH);
SangSTBK 0:e16ffa7cb900 249 _slaveSelectPin = 1;
SangSTBK 0:e16ffa7cb900 250 }
SangSTBK 0:e16ffa7cb900 251
SangSTBK 0:e16ffa7cb900 252 void RF22::spiBurstRead(uint8_t reg, uint8_t* dest, uint8_t len)
SangSTBK 0:e16ffa7cb900 253 {
SangSTBK 0:e16ffa7cb900 254 //digitalWrite(_slaveSelectPin, LOW);
SangSTBK 0:e16ffa7cb900 255 _slaveSelectPin = 0;
SangSTBK 0:e16ffa7cb900 256 _spi.write(reg & ~RF22_SPI_WRITE_MASK); // Send the start address with the write mask off
SangSTBK 0:e16ffa7cb900 257 while (len--)
SangSTBK 0:e16ffa7cb900 258 *dest++ = _spi.write(0);
SangSTBK 0:e16ffa7cb900 259 //digitalWrite(_slaveSelectPin, HIGH);
SangSTBK 0:e16ffa7cb900 260 _slaveSelectPin = 1;
SangSTBK 0:e16ffa7cb900 261 }
SangSTBK 0:e16ffa7cb900 262
SangSTBK 0:e16ffa7cb900 263 void RF22::spiBurstWrite(uint8_t reg, uint8_t* src, uint8_t len)
SangSTBK 0:e16ffa7cb900 264 {
SangSTBK 0:e16ffa7cb900 265 //digitalWrite(_slaveSelectPin, LOW);
SangSTBK 0:e16ffa7cb900 266 _slaveSelectPin = 0;
SangSTBK 0:e16ffa7cb900 267 _spi.write(reg | RF22_SPI_WRITE_MASK); // Send the start address with the write mask on
SangSTBK 0:e16ffa7cb900 268 while (len--)
SangSTBK 0:e16ffa7cb900 269 _spi.write(*src++);
SangSTBK 0:e16ffa7cb900 270 //digitalWrite(_slaveSelectPin, HIGH);
SangSTBK 0:e16ffa7cb900 271 _slaveSelectPin = 1;
SangSTBK 0:e16ffa7cb900 272 }
SangSTBK 0:e16ffa7cb900 273
SangSTBK 0:e16ffa7cb900 274 uint8_t RF22::statusRead()
SangSTBK 0:e16ffa7cb900 275 {
SangSTBK 0:e16ffa7cb900 276 return spiRead(RF22_REG_02_DEVICE_STATUS);
SangSTBK 0:e16ffa7cb900 277 }
SangSTBK 0:e16ffa7cb900 278
SangSTBK 0:e16ffa7cb900 279 uint8_t RF22::adcRead(uint8_t adcsel,
SangSTBK 0:e16ffa7cb900 280 uint8_t adcref ,
SangSTBK 0:e16ffa7cb900 281 uint8_t adcgain,
SangSTBK 0:e16ffa7cb900 282 uint8_t adcoffs)
SangSTBK 0:e16ffa7cb900 283 {
SangSTBK 0:e16ffa7cb900 284 uint8_t configuration = adcsel | adcref | (adcgain & RF22_ADCGAIN);
SangSTBK 0:e16ffa7cb900 285 spiWrite(RF22_REG_0F_ADC_CONFIGURATION, configuration | RF22_ADCSTART);
SangSTBK 0:e16ffa7cb900 286 spiWrite(RF22_REG_10_ADC_SENSOR_AMP_OFFSET, adcoffs);
SangSTBK 0:e16ffa7cb900 287
SangSTBK 0:e16ffa7cb900 288 // Conversion time is nominally 305usec
SangSTBK 0:e16ffa7cb900 289 // Wait for the DONE bit
SangSTBK 0:e16ffa7cb900 290 while (!(spiRead(RF22_REG_0F_ADC_CONFIGURATION) & RF22_ADCDONE))
SangSTBK 0:e16ffa7cb900 291 ;
SangSTBK 0:e16ffa7cb900 292 // Return the value
SangSTBK 0:e16ffa7cb900 293 return spiRead(RF22_REG_11_ADC_VALUE);
SangSTBK 0:e16ffa7cb900 294 }
SangSTBK 0:e16ffa7cb900 295
SangSTBK 0:e16ffa7cb900 296 uint8_t RF22::temperatureRead(uint8_t tsrange, uint8_t tvoffs)
SangSTBK 0:e16ffa7cb900 297 {
SangSTBK 0:e16ffa7cb900 298 spiWrite(RF22_REG_12_TEMPERATURE_SENSOR_CALIBRATION, tsrange | RF22_ENTSOFFS);
SangSTBK 0:e16ffa7cb900 299 spiWrite(RF22_REG_13_TEMPERATURE_VALUE_OFFSET, tvoffs);
SangSTBK 0:e16ffa7cb900 300 return adcRead(RF22_ADCSEL_INTERNAL_TEMPERATURE_SENSOR | RF22_ADCREF_BANDGAP_VOLTAGE);
SangSTBK 0:e16ffa7cb900 301 }
SangSTBK 0:e16ffa7cb900 302
SangSTBK 0:e16ffa7cb900 303 uint16_t RF22::wutRead()
SangSTBK 0:e16ffa7cb900 304 {
SangSTBK 0:e16ffa7cb900 305 uint8_t buf[2];
SangSTBK 0:e16ffa7cb900 306 spiBurstRead(RF22_REG_17_WAKEUP_TIMER_VALUE1, buf, 2);
SangSTBK 0:e16ffa7cb900 307 return ((uint16_t)buf[0] << 8) | buf[1]; // Dont rely on byte order
SangSTBK 0:e16ffa7cb900 308 }
SangSTBK 0:e16ffa7cb900 309
SangSTBK 0:e16ffa7cb900 310 // RFM-22 doc appears to be wrong: WUT for wtm = 10000, r, = 0, d = 0 is about 1 sec
SangSTBK 0:e16ffa7cb900 311 void RF22::setWutPeriod(uint16_t wtm, uint8_t wtr, uint8_t wtd)
SangSTBK 0:e16ffa7cb900 312 {
SangSTBK 0:e16ffa7cb900 313 uint8_t period[3];
SangSTBK 0:e16ffa7cb900 314
SangSTBK 0:e16ffa7cb900 315 period[0] = ((wtr & 0xf) << 2) | (wtd & 0x3);
SangSTBK 0:e16ffa7cb900 316 period[1] = wtm >> 8;
SangSTBK 0:e16ffa7cb900 317 period[2] = wtm & 0xff;
SangSTBK 0:e16ffa7cb900 318 spiBurstWrite(RF22_REG_14_WAKEUP_TIMER_PERIOD1, period, sizeof(period));
SangSTBK 0:e16ffa7cb900 319 }
SangSTBK 0:e16ffa7cb900 320
SangSTBK 0:e16ffa7cb900 321 // Returns true if centre + (fhch * fhs) is within limits
SangSTBK 0:e16ffa7cb900 322 // Caution, different versions of the RF22 suport different max freq
SangSTBK 0:e16ffa7cb900 323 // so YMMV
SangSTBK 0:e16ffa7cb900 324 boolean RF22::setFrequency(float centre)
SangSTBK 0:e16ffa7cb900 325 {
SangSTBK 0:e16ffa7cb900 326 uint8_t fbsel = RF22_SBSEL;
SangSTBK 0:e16ffa7cb900 327 if (centre < 240.0 || centre > 960.0) // 930.0 for early silicon
SangSTBK 0:e16ffa7cb900 328 return false;
SangSTBK 0:e16ffa7cb900 329 if (centre >= 480.0)
SangSTBK 0:e16ffa7cb900 330 {
SangSTBK 0:e16ffa7cb900 331 centre /= 2;
SangSTBK 0:e16ffa7cb900 332 fbsel |= RF22_HBSEL;
SangSTBK 0:e16ffa7cb900 333 }
SangSTBK 0:e16ffa7cb900 334 centre /= 10.0;
SangSTBK 0:e16ffa7cb900 335 float integerPart = floor(centre);
SangSTBK 0:e16ffa7cb900 336 float fractionalPart = centre - integerPart;
SangSTBK 0:e16ffa7cb900 337
SangSTBK 0:e16ffa7cb900 338 uint8_t fb = (uint8_t)integerPart - 24; // Range 0 to 23
SangSTBK 0:e16ffa7cb900 339 fbsel |= fb;
SangSTBK 0:e16ffa7cb900 340 uint16_t fc = fractionalPart * 64000;
SangSTBK 0:e16ffa7cb900 341 spiWrite(RF22_REG_73_FREQUENCY_OFFSET1, 0); // REVISIT
SangSTBK 0:e16ffa7cb900 342 spiWrite(RF22_REG_74_FREQUENCY_OFFSET2, 0);
SangSTBK 0:e16ffa7cb900 343 spiWrite(RF22_REG_75_FREQUENCY_BAND_SELECT, fbsel);
SangSTBK 0:e16ffa7cb900 344 spiWrite(RF22_REG_76_NOMINAL_CARRIER_FREQUENCY1, fc >> 8);
SangSTBK 0:e16ffa7cb900 345 spiWrite(RF22_REG_77_NOMINAL_CARRIER_FREQUENCY0, fc & 0xff);
SangSTBK 0:e16ffa7cb900 346 return !(statusRead() & RF22_FREQERR);
SangSTBK 0:e16ffa7cb900 347 }
SangSTBK 0:e16ffa7cb900 348
SangSTBK 0:e16ffa7cb900 349 // Step size in 10kHz increments
SangSTBK 0:e16ffa7cb900 350 // Returns true if centre + (fhch * fhs) is within limits
SangSTBK 0:e16ffa7cb900 351 boolean RF22::setFHStepSize(uint8_t fhs)
SangSTBK 0:e16ffa7cb900 352 {
SangSTBK 0:e16ffa7cb900 353 spiWrite(RF22_REG_7A_FREQUENCY_HOPPING_STEP_SIZE, fhs);
SangSTBK 0:e16ffa7cb900 354 return !(statusRead() & RF22_FREQERR);
SangSTBK 0:e16ffa7cb900 355 }
SangSTBK 0:e16ffa7cb900 356
SangSTBK 0:e16ffa7cb900 357 // Adds fhch * fhs to centre frequency
SangSTBK 0:e16ffa7cb900 358 // Returns true if centre + (fhch * fhs) is within limits
SangSTBK 0:e16ffa7cb900 359 boolean RF22::setFHChannel(uint8_t fhch)
SangSTBK 0:e16ffa7cb900 360 {
SangSTBK 0:e16ffa7cb900 361 spiWrite(RF22_REG_79_FREQUENCY_HOPPING_CHANNEL_SELECT, fhch);
SangSTBK 0:e16ffa7cb900 362 return !(statusRead() & RF22_FREQERR);
SangSTBK 0:e16ffa7cb900 363 }
SangSTBK 0:e16ffa7cb900 364
SangSTBK 0:e16ffa7cb900 365 uint8_t RF22::rssiRead()
SangSTBK 0:e16ffa7cb900 366 {
SangSTBK 0:e16ffa7cb900 367 return spiRead(RF22_REG_26_RSSI);
SangSTBK 0:e16ffa7cb900 368 }
SangSTBK 0:e16ffa7cb900 369
SangSTBK 0:e16ffa7cb900 370 uint8_t RF22::ezmacStatusRead()
SangSTBK 0:e16ffa7cb900 371 {
SangSTBK 0:e16ffa7cb900 372 return spiRead(RF22_REG_31_EZMAC_STATUS);
SangSTBK 0:e16ffa7cb900 373 }
SangSTBK 0:e16ffa7cb900 374
SangSTBK 0:e16ffa7cb900 375 void RF22::setMode(uint8_t mode)
SangSTBK 0:e16ffa7cb900 376 {
SangSTBK 0:e16ffa7cb900 377 spiWrite(RF22_REG_07_OPERATING_MODE1, mode);
SangSTBK 0:e16ffa7cb900 378 }
SangSTBK 0:e16ffa7cb900 379
SangSTBK 0:e16ffa7cb900 380 void RF22::setModeIdle()
SangSTBK 0:e16ffa7cb900 381 {
SangSTBK 0:e16ffa7cb900 382 if (_mode != RF22_MODE_IDLE)
SangSTBK 0:e16ffa7cb900 383 {
SangSTBK 0:e16ffa7cb900 384 setMode(_idleMode);
SangSTBK 0:e16ffa7cb900 385 _mode = RF22_MODE_IDLE;
SangSTBK 0:e16ffa7cb900 386 }
SangSTBK 0:e16ffa7cb900 387 }
SangSTBK 0:e16ffa7cb900 388
SangSTBK 0:e16ffa7cb900 389 void RF22::setModeRx()
SangSTBK 0:e16ffa7cb900 390 {
SangSTBK 0:e16ffa7cb900 391 if (_mode != RF22_MODE_RX)
SangSTBK 0:e16ffa7cb900 392 {
SangSTBK 0:e16ffa7cb900 393 setMode(_idleMode | RF22_RXON);
SangSTBK 0:e16ffa7cb900 394 _mode = RF22_MODE_RX;
SangSTBK 0:e16ffa7cb900 395 }
SangSTBK 0:e16ffa7cb900 396 }
SangSTBK 0:e16ffa7cb900 397
SangSTBK 0:e16ffa7cb900 398 void RF22::setModeTx()
SangSTBK 0:e16ffa7cb900 399 {
SangSTBK 0:e16ffa7cb900 400 if (_mode != RF22_MODE_TX)
SangSTBK 0:e16ffa7cb900 401 {
SangSTBK 0:e16ffa7cb900 402 setMode(_idleMode | RF22_TXON);
SangSTBK 0:e16ffa7cb900 403 _mode = RF22_MODE_TX;
SangSTBK 0:e16ffa7cb900 404 }
SangSTBK 0:e16ffa7cb900 405 }
SangSTBK 0:e16ffa7cb900 406
SangSTBK 0:e16ffa7cb900 407 void RF22::setTxPower(uint8_t power)
SangSTBK 0:e16ffa7cb900 408 {
SangSTBK 0:e16ffa7cb900 409 spiWrite(RF22_REG_6D_TX_POWER, power);
SangSTBK 0:e16ffa7cb900 410 }
SangSTBK 0:e16ffa7cb900 411
SangSTBK 0:e16ffa7cb900 412 // Sets registers from a canned modem configuration structure
SangSTBK 0:e16ffa7cb900 413 void RF22::setModemRegisters(ModemConfig* config)
SangSTBK 0:e16ffa7cb900 414 {
SangSTBK 0:e16ffa7cb900 415 spiWrite(RF22_REG_1C_IF_FILTER_BANDWIDTH, config->reg_1c);
SangSTBK 0:e16ffa7cb900 416 spiWrite(RF22_REG_1F_CLOCK_RECOVERY_GEARSHIFT_OVERRIDE, config->reg_1f);
SangSTBK 0:e16ffa7cb900 417 spiBurstWrite(RF22_REG_20_CLOCK_RECOVERY_OVERSAMPLING_RATE, &config->reg_20, 6);
SangSTBK 0:e16ffa7cb900 418 spiBurstWrite(RF22_REG_2C_OOK_COUNTER_VALUE_1, &config->reg_2c, 3);
SangSTBK 0:e16ffa7cb900 419 spiWrite(RF22_REG_58_CHARGE_PUMP_CURRENT_TRIMMING, config->reg_58);
SangSTBK 0:e16ffa7cb900 420 spiWrite(RF22_REG_69_AGC_OVERRIDE1, config->reg_69);
SangSTBK 0:e16ffa7cb900 421 spiBurstWrite(RF22_REG_6E_TX_DATA_RATE1, &config->reg_6e, 5);
SangSTBK 0:e16ffa7cb900 422 }
SangSTBK 0:e16ffa7cb900 423
SangSTBK 0:e16ffa7cb900 424 // Set one of the canned FSK Modem configs
SangSTBK 0:e16ffa7cb900 425 // Returns true if its a valid choice
SangSTBK 0:e16ffa7cb900 426 boolean RF22::setModemConfig(ModemConfigChoice index)
SangSTBK 0:e16ffa7cb900 427 {
SangSTBK 0:e16ffa7cb900 428 if (index > (sizeof(MODEM_CONFIG_TABLE) / sizeof(ModemConfig)))
SangSTBK 0:e16ffa7cb900 429 return false;
SangSTBK 0:e16ffa7cb900 430
SangSTBK 0:e16ffa7cb900 431 RF22::ModemConfig cfg;
SangSTBK 0:e16ffa7cb900 432 memcpy(&cfg, &MODEM_CONFIG_TABLE[index], sizeof(RF22::ModemConfig));
SangSTBK 0:e16ffa7cb900 433 setModemRegisters(&cfg);
SangSTBK 0:e16ffa7cb900 434
SangSTBK 0:e16ffa7cb900 435 return true;
SangSTBK 0:e16ffa7cb900 436 }
SangSTBK 0:e16ffa7cb900 437
SangSTBK 0:e16ffa7cb900 438 // REVISIT: top bit is in Header Control 2 0x33
SangSTBK 0:e16ffa7cb900 439 void RF22::setPreambleLength(uint8_t nibbles)
SangSTBK 0:e16ffa7cb900 440 {
SangSTBK 0:e16ffa7cb900 441 spiWrite(RF22_REG_34_PREAMBLE_LENGTH, nibbles);
SangSTBK 0:e16ffa7cb900 442 }
SangSTBK 0:e16ffa7cb900 443
SangSTBK 0:e16ffa7cb900 444 // Caution doesnt set sync word len in Header Control 2 0x33
SangSTBK 0:e16ffa7cb900 445 void RF22::setSyncWords(uint8_t* syncWords, uint8_t len)
SangSTBK 0:e16ffa7cb900 446 {
SangSTBK 0:e16ffa7cb900 447 spiBurstWrite(RF22_REG_36_SYNC_WORD3, syncWords, len);
SangSTBK 0:e16ffa7cb900 448 }
SangSTBK 0:e16ffa7cb900 449
SangSTBK 0:e16ffa7cb900 450 void RF22::clearRxBuf()
SangSTBK 0:e16ffa7cb900 451 {
SangSTBK 0:e16ffa7cb900 452 _bufLen = 0;
SangSTBK 0:e16ffa7cb900 453 _rxBufValid = false;
SangSTBK 0:e16ffa7cb900 454 }
SangSTBK 0:e16ffa7cb900 455
SangSTBK 0:e16ffa7cb900 456 boolean RF22::available()
SangSTBK 0:e16ffa7cb900 457 {
SangSTBK 0:e16ffa7cb900 458 setModeRx();
SangSTBK 0:e16ffa7cb900 459 return _rxBufValid;
SangSTBK 0:e16ffa7cb900 460 }
SangSTBK 0:e16ffa7cb900 461
SangSTBK 0:e16ffa7cb900 462 // Blocks until a valid message is received
SangSTBK 0:e16ffa7cb900 463 void RF22::waitAvailable()
SangSTBK 0:e16ffa7cb900 464 {
SangSTBK 0:e16ffa7cb900 465 while (!available())
SangSTBK 0:e16ffa7cb900 466 ;
SangSTBK 0:e16ffa7cb900 467 }
SangSTBK 0:e16ffa7cb900 468
SangSTBK 0:e16ffa7cb900 469 // Blocks until a valid message is received or timeout expires
SangSTBK 0:e16ffa7cb900 470 // Return true if there is a message available
SangSTBK 0:e16ffa7cb900 471 bool RF22::waitAvailableTimeout(uint16_t timeout)
SangSTBK 0:e16ffa7cb900 472 {
SangSTBK 0:e16ffa7cb900 473 Timer t;
SangSTBK 0:e16ffa7cb900 474 t.start();
SangSTBK 0:e16ffa7cb900 475 unsigned long endtime = t.read_ms() + timeout;
SangSTBK 0:e16ffa7cb900 476 while (t.read_ms() < endtime)
SangSTBK 0:e16ffa7cb900 477 if (available())
SangSTBK 0:e16ffa7cb900 478 return true;
SangSTBK 0:e16ffa7cb900 479 return false;
SangSTBK 0:e16ffa7cb900 480 }
SangSTBK 0:e16ffa7cb900 481
SangSTBK 0:e16ffa7cb900 482 void RF22::waitPacketSent()
SangSTBK 0:e16ffa7cb900 483 {
SangSTBK 0:e16ffa7cb900 484 while (!_txPacketSent)
SangSTBK 0:e16ffa7cb900 485 ;
SangSTBK 0:e16ffa7cb900 486 }
SangSTBK 0:e16ffa7cb900 487
SangSTBK 0:e16ffa7cb900 488 boolean RF22::recv(uint8_t* buf, uint8_t* len)
SangSTBK 0:e16ffa7cb900 489 {
SangSTBK 0:e16ffa7cb900 490 if (!available())
SangSTBK 0:e16ffa7cb900 491 return false;
SangSTBK 0:e16ffa7cb900 492 if (*len > _bufLen)
SangSTBK 0:e16ffa7cb900 493 *len = _bufLen;
SangSTBK 0:e16ffa7cb900 494 memcpy(buf, _buf, *len);
SangSTBK 0:e16ffa7cb900 495 clearRxBuf();
SangSTBK 0:e16ffa7cb900 496 return true;
SangSTBK 0:e16ffa7cb900 497 }
SangSTBK 0:e16ffa7cb900 498
SangSTBK 0:e16ffa7cb900 499 void RF22::clearTxBuf()
SangSTBK 0:e16ffa7cb900 500 {
SangSTBK 0:e16ffa7cb900 501 _bufLen = 0;
SangSTBK 0:e16ffa7cb900 502 _txBufSentIndex = 0;
SangSTBK 0:e16ffa7cb900 503 _txPacketSent = false;
SangSTBK 0:e16ffa7cb900 504 }
SangSTBK 0:e16ffa7cb900 505
SangSTBK 0:e16ffa7cb900 506 void RF22::startTransmit()
SangSTBK 0:e16ffa7cb900 507 {
SangSTBK 0:e16ffa7cb900 508 sendNextFragment(); // Actually the first fragment
SangSTBK 0:e16ffa7cb900 509 spiWrite(RF22_REG_3E_PACKET_LENGTH, _bufLen); // Total length that will be sent
SangSTBK 0:e16ffa7cb900 510 setModeTx(); // Start the transmitter, turns off the receiver
SangSTBK 0:e16ffa7cb900 511 }
SangSTBK 0:e16ffa7cb900 512
SangSTBK 0:e16ffa7cb900 513 // Restart the trasnmission of a packet that had a problem
SangSTBK 0:e16ffa7cb900 514 void RF22::restartTransmit()
SangSTBK 0:e16ffa7cb900 515 {
SangSTBK 0:e16ffa7cb900 516 _mode = RF22_MODE_IDLE;
SangSTBK 0:e16ffa7cb900 517 _txBufSentIndex = 0;
SangSTBK 0:e16ffa7cb900 518 _txPacketSent = false;
SangSTBK 0:e16ffa7cb900 519 // Serial.println("Restart");
SangSTBK 0:e16ffa7cb900 520 startTransmit();
SangSTBK 0:e16ffa7cb900 521 }
SangSTBK 0:e16ffa7cb900 522
SangSTBK 0:e16ffa7cb900 523 boolean RF22::send(uint8_t* data, uint8_t len)
SangSTBK 0:e16ffa7cb900 524 {
SangSTBK 0:e16ffa7cb900 525 setModeIdle();
SangSTBK 0:e16ffa7cb900 526 fillTxBuf(data, len);
SangSTBK 0:e16ffa7cb900 527 startTransmit();
SangSTBK 0:e16ffa7cb900 528 return true;
SangSTBK 0:e16ffa7cb900 529 }
SangSTBK 0:e16ffa7cb900 530
SangSTBK 0:e16ffa7cb900 531 boolean RF22::fillTxBuf(uint8_t* data, uint8_t len)
SangSTBK 0:e16ffa7cb900 532 {
SangSTBK 0:e16ffa7cb900 533 clearTxBuf();
SangSTBK 0:e16ffa7cb900 534 return appendTxBuf(data, len);
SangSTBK 0:e16ffa7cb900 535 }
SangSTBK 0:e16ffa7cb900 536
SangSTBK 0:e16ffa7cb900 537 boolean RF22::appendTxBuf(uint8_t* data, uint8_t len)
SangSTBK 0:e16ffa7cb900 538 {
SangSTBK 0:e16ffa7cb900 539 if (((uint16_t)_bufLen + len) > RF22_MAX_MESSAGE_LEN)
SangSTBK 0:e16ffa7cb900 540 return false;
SangSTBK 0:e16ffa7cb900 541 memcpy(_buf + _bufLen, data, len);
SangSTBK 0:e16ffa7cb900 542 _bufLen += len;
SangSTBK 0:e16ffa7cb900 543 return true;
SangSTBK 0:e16ffa7cb900 544 }
SangSTBK 0:e16ffa7cb900 545
SangSTBK 0:e16ffa7cb900 546 // Assumption: there is currently <= RF22_TXFFAEM_THRESHOLD bytes in the Tx FIFO
SangSTBK 0:e16ffa7cb900 547 void RF22::sendNextFragment()
SangSTBK 0:e16ffa7cb900 548 {
SangSTBK 0:e16ffa7cb900 549 if (_txBufSentIndex < _bufLen)
SangSTBK 0:e16ffa7cb900 550 {
SangSTBK 0:e16ffa7cb900 551 // Some left to send
SangSTBK 0:e16ffa7cb900 552 uint8_t len = _bufLen - _txBufSentIndex;
SangSTBK 0:e16ffa7cb900 553 // But dont send too much
SangSTBK 0:e16ffa7cb900 554 if (len > (RF22_FIFO_SIZE - RF22_TXFFAEM_THRESHOLD - 1))
SangSTBK 0:e16ffa7cb900 555 len = (RF22_FIFO_SIZE - RF22_TXFFAEM_THRESHOLD - 1);
SangSTBK 0:e16ffa7cb900 556 spiBurstWrite(RF22_REG_7F_FIFO_ACCESS, _buf + _txBufSentIndex, len);
SangSTBK 0:e16ffa7cb900 557 _txBufSentIndex += len;
SangSTBK 0:e16ffa7cb900 558 }
SangSTBK 0:e16ffa7cb900 559 }
SangSTBK 0:e16ffa7cb900 560
SangSTBK 0:e16ffa7cb900 561 // Assumption: there are at least RF22_RXFFAFULL_THRESHOLD in the RX FIFO
SangSTBK 0:e16ffa7cb900 562 // That means it should only be called after a RXAFULL interrupt
SangSTBK 0:e16ffa7cb900 563 void RF22::readNextFragment()
SangSTBK 0:e16ffa7cb900 564 {
SangSTBK 0:e16ffa7cb900 565 if (((uint16_t)_bufLen + RF22_RXFFAFULL_THRESHOLD) > RF22_MAX_MESSAGE_LEN)
SangSTBK 0:e16ffa7cb900 566 {
SangSTBK 0:e16ffa7cb900 567 // Hmmm receiver overflow. Should never occur
SangSTBK 0:e16ffa7cb900 568 return;
SangSTBK 0:e16ffa7cb900 569 }
SangSTBK 0:e16ffa7cb900 570 // Read the RF22_RXFFAFULL_THRESHOLD octets that should be there
SangSTBK 0:e16ffa7cb900 571 spiBurstRead(RF22_REG_7F_FIFO_ACCESS, _buf + _bufLen, RF22_RXFFAFULL_THRESHOLD);
SangSTBK 0:e16ffa7cb900 572 _bufLen += RF22_RXFFAFULL_THRESHOLD;
SangSTBK 0:e16ffa7cb900 573 }
SangSTBK 0:e16ffa7cb900 574
SangSTBK 0:e16ffa7cb900 575 // Clear the FIFOs
SangSTBK 0:e16ffa7cb900 576 void RF22::resetFifos()
SangSTBK 0:e16ffa7cb900 577 {
SangSTBK 0:e16ffa7cb900 578 spiWrite(RF22_REG_08_OPERATING_MODE2, RF22_FFCLRRX | RF22_FFCLRTX);
SangSTBK 0:e16ffa7cb900 579 spiWrite(RF22_REG_08_OPERATING_MODE2, 0);
SangSTBK 0:e16ffa7cb900 580 }
SangSTBK 0:e16ffa7cb900 581
SangSTBK 0:e16ffa7cb900 582 // Clear the Rx FIFO
SangSTBK 0:e16ffa7cb900 583 void RF22::resetRxFifo()
SangSTBK 0:e16ffa7cb900 584 {
SangSTBK 0:e16ffa7cb900 585 spiWrite(RF22_REG_08_OPERATING_MODE2, RF22_FFCLRRX);
SangSTBK 0:e16ffa7cb900 586 spiWrite(RF22_REG_08_OPERATING_MODE2, 0);
SangSTBK 0:e16ffa7cb900 587 }
SangSTBK 0:e16ffa7cb900 588
SangSTBK 0:e16ffa7cb900 589 // CLear the TX FIFO
SangSTBK 0:e16ffa7cb900 590 void RF22::resetTxFifo()
SangSTBK 0:e16ffa7cb900 591 {
SangSTBK 0:e16ffa7cb900 592 spiWrite(RF22_REG_08_OPERATING_MODE2, RF22_FFCLRTX);
SangSTBK 0:e16ffa7cb900 593 spiWrite(RF22_REG_08_OPERATING_MODE2, 0);
SangSTBK 0:e16ffa7cb900 594 }
SangSTBK 0:e16ffa7cb900 595
SangSTBK 0:e16ffa7cb900 596 // Default implmentation does nothing. Override if you wish
SangSTBK 0:e16ffa7cb900 597 void RF22::handleExternalInterrupt()
SangSTBK 0:e16ffa7cb900 598 {
SangSTBK 0:e16ffa7cb900 599 }
SangSTBK 0:e16ffa7cb900 600
SangSTBK 0:e16ffa7cb900 601 // Default implmentation does nothing. Override if you wish
SangSTBK 0:e16ffa7cb900 602 void RF22::handleWakeupTimerInterrupt()
SangSTBK 0:e16ffa7cb900 603 {
SangSTBK 0:e16ffa7cb900 604 }
SangSTBK 0:e16ffa7cb900 605
SangSTBK 0:e16ffa7cb900 606 void RF22::setHeaderTo(uint8_t to)
SangSTBK 0:e16ffa7cb900 607 {
SangSTBK 0:e16ffa7cb900 608 spiWrite(RF22_REG_3A_TRANSMIT_HEADER3, to);
SangSTBK 0:e16ffa7cb900 609 }
SangSTBK 0:e16ffa7cb900 610
SangSTBK 0:e16ffa7cb900 611 void RF22::setHeaderFrom(uint8_t from)
SangSTBK 0:e16ffa7cb900 612 {
SangSTBK 0:e16ffa7cb900 613 spiWrite(RF22_REG_3B_TRANSMIT_HEADER2, from);
SangSTBK 0:e16ffa7cb900 614 }
SangSTBK 0:e16ffa7cb900 615
SangSTBK 0:e16ffa7cb900 616 void RF22::setHeaderId(uint8_t id)
SangSTBK 0:e16ffa7cb900 617 {
SangSTBK 0:e16ffa7cb900 618 spiWrite(RF22_REG_3C_TRANSMIT_HEADER1, id);
SangSTBK 0:e16ffa7cb900 619 }
SangSTBK 0:e16ffa7cb900 620
SangSTBK 0:e16ffa7cb900 621 void RF22::setHeaderFlags(uint8_t flags)
SangSTBK 0:e16ffa7cb900 622 {
SangSTBK 0:e16ffa7cb900 623 spiWrite(RF22_REG_3D_TRANSMIT_HEADER0, flags);
SangSTBK 0:e16ffa7cb900 624 }
SangSTBK 0:e16ffa7cb900 625
SangSTBK 0:e16ffa7cb900 626 uint8_t RF22::headerTo()
SangSTBK 0:e16ffa7cb900 627 {
SangSTBK 0:e16ffa7cb900 628 return spiRead(RF22_REG_47_RECEIVED_HEADER3);
SangSTBK 0:e16ffa7cb900 629 }
SangSTBK 0:e16ffa7cb900 630
SangSTBK 0:e16ffa7cb900 631 uint8_t RF22::headerFrom()
SangSTBK 0:e16ffa7cb900 632 {
SangSTBK 0:e16ffa7cb900 633 return spiRead(RF22_REG_48_RECEIVED_HEADER2);
SangSTBK 0:e16ffa7cb900 634 }
SangSTBK 0:e16ffa7cb900 635
SangSTBK 0:e16ffa7cb900 636 uint8_t RF22::headerId()
SangSTBK 0:e16ffa7cb900 637 {
SangSTBK 0:e16ffa7cb900 638 return spiRead(RF22_REG_49_RECEIVED_HEADER1);
SangSTBK 0:e16ffa7cb900 639 }
SangSTBK 0:e16ffa7cb900 640
SangSTBK 0:e16ffa7cb900 641 uint8_t RF22::headerFlags()
SangSTBK 0:e16ffa7cb900 642 {
SangSTBK 0:e16ffa7cb900 643 return spiRead(RF22_REG_4A_RECEIVED_HEADER0);
SangSTBK 0:e16ffa7cb900 644 }
SangSTBK 0:e16ffa7cb900 645
SangSTBK 0:e16ffa7cb900 646 uint8_t RF22::lastRssi()
SangSTBK 0:e16ffa7cb900 647 {
SangSTBK 0:e16ffa7cb900 648 return _lastRssi;
SangSTBK 0:e16ffa7cb900 649 }
SangSTBK 0:e16ffa7cb900 650
SangSTBK 0:e16ffa7cb900 651 void RF22::setPromiscuous(boolean promiscuous)
SangSTBK 0:e16ffa7cb900 652 {
SangSTBK 0:e16ffa7cb900 653 spiWrite(RF22_REG_43_HEADER_ENABLE3, promiscuous ? 0x00 : 0xff);
SangSTBK 0:e16ffa7cb900 654 }