Руслан Урядинский / libuavcan

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Dependents:   UAVCAN UAVCAN_Subscriber

libuavcan_drivers/stm32/driver/src/internal.hpp@0:dfe6edabb8ec, 2018-04-14 (annotated)

Committer:
RuslanUrya
Date:
Sat Apr 14 10:25:32 2018 +0000
Revision:
0:dfe6edabb8ec
Initial commit

Who changed what in which revision?

UserRevisionLine numberNew contents of line
RuslanUrya 0:dfe6edabb8ec 1 /*
RuslanUrya 0:dfe6edabb8ec 2 * Copyright (C) 2014 Pavel Kirienko <pavel.kirienko@gmail.com>
RuslanUrya 0:dfe6edabb8ec 3 */
RuslanUrya 0:dfe6edabb8ec 4
RuslanUrya 0:dfe6edabb8ec 5 #pragma once
RuslanUrya 0:dfe6edabb8ec 6
RuslanUrya 0:dfe6edabb8ec 7 #include <uavcan_stm32/build_config.hpp>
RuslanUrya 0:dfe6edabb8ec 8
RuslanUrya 0:dfe6edabb8ec 9 #if UAVCAN_STM32_CHIBIOS
RuslanUrya 0:dfe6edabb8ec 10 # include <hal.h>
RuslanUrya 0:dfe6edabb8ec 11 #elif UAVCAN_STM32_NUTTX
RuslanUrya 0:dfe6edabb8ec 12 # include <nuttx/arch.h>
RuslanUrya 0:dfe6edabb8ec 13 # include <arch/board/board.h>
RuslanUrya 0:dfe6edabb8ec 14 # include <chip/stm32_tim.h>
RuslanUrya 0:dfe6edabb8ec 15 # include <syslog.h>
RuslanUrya 0:dfe6edabb8ec 16 #elif UAVCAN_STM32_BAREMETAL
RuslanUrya 0:dfe6edabb8ec 17 #include <chip.h> // See http://uavcan.org/Implementations/Libuavcan/Platforms/STM32/
RuslanUrya 0:dfe6edabb8ec 18 #elif UAVCAN_STM32_FREERTOS
RuslanUrya 0:dfe6edabb8ec 19 # include <chip.h>
RuslanUrya 0:dfe6edabb8ec 20 # include <cmsis_os.h>
RuslanUrya 0:dfe6edabb8ec 21 #else
RuslanUrya 0:dfe6edabb8ec 22 # error "Unknown OS"
RuslanUrya 0:dfe6edabb8ec 23 #endif
RuslanUrya 0:dfe6edabb8ec 24
RuslanUrya 0:dfe6edabb8ec 25 /**
RuslanUrya 0:dfe6edabb8ec 26 * Debug output
RuslanUrya 0:dfe6edabb8ec 27 */
RuslanUrya 0:dfe6edabb8ec 28 #ifndef UAVCAN_STM32_LOG
RuslanUrya 0:dfe6edabb8ec 29 // syslog() crashes the system in this context
RuslanUrya 0:dfe6edabb8ec 30 // # if UAVCAN_STM32_NUTTX && CONFIG_ARCH_LOWPUTC
RuslanUrya 0:dfe6edabb8ec 31 # if 0
RuslanUrya 0:dfe6edabb8ec 32 # define UAVCAN_STM32_LOG(fmt, ...) syslog("uavcan_stm32: " fmt "\n", ##__VA_ARGS__)
RuslanUrya 0:dfe6edabb8ec 33 # else
RuslanUrya 0:dfe6edabb8ec 34 # define UAVCAN_STM32_LOG(...) ((void)0)
RuslanUrya 0:dfe6edabb8ec 35 # endif
RuslanUrya 0:dfe6edabb8ec 36 #endif
RuslanUrya 0:dfe6edabb8ec 37
RuslanUrya 0:dfe6edabb8ec 38 /**
RuslanUrya 0:dfe6edabb8ec 39 * IRQ handler macros
RuslanUrya 0:dfe6edabb8ec 40 */
RuslanUrya 0:dfe6edabb8ec 41 #if UAVCAN_STM32_CHIBIOS
RuslanUrya 0:dfe6edabb8ec 42 # define UAVCAN_STM32_IRQ_HANDLER(id) CH_IRQ_HANDLER(id)
RuslanUrya 0:dfe6edabb8ec 43 # define UAVCAN_STM32_IRQ_PROLOGUE() CH_IRQ_PROLOGUE()
RuslanUrya 0:dfe6edabb8ec 44 # define UAVCAN_STM32_IRQ_EPILOGUE() CH_IRQ_EPILOGUE()
RuslanUrya 0:dfe6edabb8ec 45 #elif UAVCAN_STM32_NUTTX
RuslanUrya 0:dfe6edabb8ec 46 # define UAVCAN_STM32_IRQ_HANDLER(id) int id(int irq, FAR void* context)
RuslanUrya 0:dfe6edabb8ec 47 # define UAVCAN_STM32_IRQ_PROLOGUE()
RuslanUrya 0:dfe6edabb8ec 48 # define UAVCAN_STM32_IRQ_EPILOGUE() return 0;
RuslanUrya 0:dfe6edabb8ec 49 #else
RuslanUrya 0:dfe6edabb8ec 50 # define UAVCAN_STM32_IRQ_HANDLER(id) void id(void)
RuslanUrya 0:dfe6edabb8ec 51 # define UAVCAN_STM32_IRQ_PROLOGUE()
RuslanUrya 0:dfe6edabb8ec 52 # define UAVCAN_STM32_IRQ_EPILOGUE()
RuslanUrya 0:dfe6edabb8ec 53 #endif
RuslanUrya 0:dfe6edabb8ec 54
RuslanUrya 0:dfe6edabb8ec 55 #if UAVCAN_STM32_CHIBIOS
RuslanUrya 0:dfe6edabb8ec 56 /**
RuslanUrya 0:dfe6edabb8ec 57 * Priority mask for timer and CAN interrupts.
RuslanUrya 0:dfe6edabb8ec 58 */
RuslanUrya 0:dfe6edabb8ec 59 # ifndef UAVCAN_STM32_IRQ_PRIORITY_MASK
RuslanUrya 0:dfe6edabb8ec 60 # if (CH_KERNEL_MAJOR == 2)
RuslanUrya 0:dfe6edabb8ec 61 # define UAVCAN_STM32_IRQ_PRIORITY_MASK CORTEX_PRIORITY_MASK(CORTEX_MAX_KERNEL_PRIORITY)
RuslanUrya 0:dfe6edabb8ec 62 # else // ChibiOS 3+
RuslanUrya 0:dfe6edabb8ec 63 # define UAVCAN_STM32_IRQ_PRIORITY_MASK CORTEX_MAX_KERNEL_PRIORITY
RuslanUrya 0:dfe6edabb8ec 64 # endif
RuslanUrya 0:dfe6edabb8ec 65 # endif
RuslanUrya 0:dfe6edabb8ec 66 #endif
RuslanUrya 0:dfe6edabb8ec 67
RuslanUrya 0:dfe6edabb8ec 68 #if UAVCAN_STM32_BAREMETAL
RuslanUrya 0:dfe6edabb8ec 69 /**
RuslanUrya 0:dfe6edabb8ec 70 * Priority mask for timer and CAN interrupts.
RuslanUrya 0:dfe6edabb8ec 71 */
RuslanUrya 0:dfe6edabb8ec 72 # ifndef UAVCAN_STM32_IRQ_PRIORITY_MASK
RuslanUrya 0:dfe6edabb8ec 73 # define UAVCAN_STM32_IRQ_PRIORITY_MASK 0
RuslanUrya 0:dfe6edabb8ec 74 # endif
RuslanUrya 0:dfe6edabb8ec 75 #endif
RuslanUrya 0:dfe6edabb8ec 76
RuslanUrya 0:dfe6edabb8ec 77 #if UAVCAN_STM32_FREERTOS
RuslanUrya 0:dfe6edabb8ec 78 /**
RuslanUrya 0:dfe6edabb8ec 79 * Priority mask for timer and CAN interrupts.
RuslanUrya 0:dfe6edabb8ec 80 */
RuslanUrya 0:dfe6edabb8ec 81 # ifndef UAVCAN_STM32_IRQ_PRIORITY_MASK
RuslanUrya 0:dfe6edabb8ec 82 # define UAVCAN_STM32_IRQ_PRIORITY_MASK configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY
RuslanUrya 0:dfe6edabb8ec 83 # endif
RuslanUrya 0:dfe6edabb8ec 84 #endif
RuslanUrya 0:dfe6edabb8ec 85
RuslanUrya 0:dfe6edabb8ec 86 /**
RuslanUrya 0:dfe6edabb8ec 87 * Glue macros
RuslanUrya 0:dfe6edabb8ec 88 */
RuslanUrya 0:dfe6edabb8ec 89 #define UAVCAN_STM32_GLUE2_(A, B) A##B
RuslanUrya 0:dfe6edabb8ec 90 #define UAVCAN_STM32_GLUE2(A, B) UAVCAN_STM32_GLUE2_(A, B)
RuslanUrya 0:dfe6edabb8ec 91
RuslanUrya 0:dfe6edabb8ec 92 #define UAVCAN_STM32_GLUE3_(A, B, C) A##B##C
RuslanUrya 0:dfe6edabb8ec 93 #define UAVCAN_STM32_GLUE3(A, B, C) UAVCAN_STM32_GLUE3_(A, B, C)
RuslanUrya 0:dfe6edabb8ec 94
RuslanUrya 0:dfe6edabb8ec 95 namespace uavcan_stm32
RuslanUrya 0:dfe6edabb8ec 96 {
RuslanUrya 0:dfe6edabb8ec 97 #if UAVCAN_STM32_CHIBIOS
RuslanUrya 0:dfe6edabb8ec 98
RuslanUrya 0:dfe6edabb8ec 99 struct CriticalSectionLocker
RuslanUrya 0:dfe6edabb8ec 100 {
RuslanUrya 0:dfe6edabb8ec 101 CriticalSectionLocker() { chSysSuspend(); }
RuslanUrya 0:dfe6edabb8ec 102 ~CriticalSectionLocker() { chSysEnable(); }
RuslanUrya 0:dfe6edabb8ec 103 };
RuslanUrya 0:dfe6edabb8ec 104
RuslanUrya 0:dfe6edabb8ec 105 #elif UAVCAN_STM32_NUTTX
RuslanUrya 0:dfe6edabb8ec 106
RuslanUrya 0:dfe6edabb8ec 107 struct CriticalSectionLocker
RuslanUrya 0:dfe6edabb8ec 108 {
RuslanUrya 0:dfe6edabb8ec 109 const irqstate_t flags_;
RuslanUrya 0:dfe6edabb8ec 110
RuslanUrya 0:dfe6edabb8ec 111 CriticalSectionLocker()
RuslanUrya 0:dfe6edabb8ec 112 : flags_(enter_critical_section())
RuslanUrya 0:dfe6edabb8ec 113 { }
RuslanUrya 0:dfe6edabb8ec 114
RuslanUrya 0:dfe6edabb8ec 115 ~CriticalSectionLocker()
RuslanUrya 0:dfe6edabb8ec 116 {
RuslanUrya 0:dfe6edabb8ec 117 leave_critical_section(flags_);
RuslanUrya 0:dfe6edabb8ec 118 }
RuslanUrya 0:dfe6edabb8ec 119 };
RuslanUrya 0:dfe6edabb8ec 120
RuslanUrya 0:dfe6edabb8ec 121 #elif UAVCAN_STM32_BAREMETAL
RuslanUrya 0:dfe6edabb8ec 122
RuslanUrya 0:dfe6edabb8ec 123 struct CriticalSectionLocker
RuslanUrya 0:dfe6edabb8ec 124 {
RuslanUrya 0:dfe6edabb8ec 125
RuslanUrya 0:dfe6edabb8ec 126 CriticalSectionLocker()
RuslanUrya 0:dfe6edabb8ec 127 {
RuslanUrya 0:dfe6edabb8ec 128 __disable_irq();
RuslanUrya 0:dfe6edabb8ec 129 }
RuslanUrya 0:dfe6edabb8ec 130
RuslanUrya 0:dfe6edabb8ec 131 ~CriticalSectionLocker()
RuslanUrya 0:dfe6edabb8ec 132 {
RuslanUrya 0:dfe6edabb8ec 133 __enable_irq();
RuslanUrya 0:dfe6edabb8ec 134 }
RuslanUrya 0:dfe6edabb8ec 135 };
RuslanUrya 0:dfe6edabb8ec 136
RuslanUrya 0:dfe6edabb8ec 137 #elif UAVCAN_STM32_FREERTOS
RuslanUrya 0:dfe6edabb8ec 138
RuslanUrya 0:dfe6edabb8ec 139 struct CriticalSectionLocker
RuslanUrya 0:dfe6edabb8ec 140 {
RuslanUrya 0:dfe6edabb8ec 141
RuslanUrya 0:dfe6edabb8ec 142 CriticalSectionLocker()
RuslanUrya 0:dfe6edabb8ec 143 {
RuslanUrya 0:dfe6edabb8ec 144 taskENTER_CRITICAL();
RuslanUrya 0:dfe6edabb8ec 145 }
RuslanUrya 0:dfe6edabb8ec 146
RuslanUrya 0:dfe6edabb8ec 147 ~CriticalSectionLocker()
RuslanUrya 0:dfe6edabb8ec 148 {
RuslanUrya 0:dfe6edabb8ec 149 taskEXIT_CRITICAL();
RuslanUrya 0:dfe6edabb8ec 150 }
RuslanUrya 0:dfe6edabb8ec 151 };
RuslanUrya 0:dfe6edabb8ec 152
RuslanUrya 0:dfe6edabb8ec 153 #endif
RuslanUrya 0:dfe6edabb8ec 154
RuslanUrya 0:dfe6edabb8ec 155 namespace clock
RuslanUrya 0:dfe6edabb8ec 156 {
RuslanUrya 0:dfe6edabb8ec 157 uavcan::uint64_t getUtcUSecFromCanInterrupt();
RuslanUrya 0:dfe6edabb8ec 158 }
RuslanUrya 0:dfe6edabb8ec 159 }