Fork of TFTLCD with new support for SSD1963 ad HX8352-A controller.

Dependents:   TFTLCD_Fork_Test

Fork of TFTLCD by Todor Todorov

Revision:
24:ac6e35658037
Parent:
23:eca4414196ca
Child:
25:6cffb758c075
diff -r eca4414196ca -r ac6e35658037 ili9328.cpp
--- a/ili9328.cpp	Thu Jun 13 03:47:51 2013 +0000
+++ b/ili9328.cpp	Sat Jun 15 05:34:53 2013 +0000
@@ -22,58 +22,6 @@
 #include "ili9328.h"
 #include "helpers.h"
 
-#define REG_START_OSC                   0x00
-
-#define REG_DRIV_OUT_CTRL               0x01
-#define REG_DRIV_WAV_CTRL               0x02
-#define REG_ENTRY_MOD                   0x03
-#define REG_RESIZE_CTRL                 0x04
-#define REG_DISP_CTRL1                  0x07
-#define REG_DISP_CTRL2                  0x08
-#define REG_DISP_CTRL3                  0x09
-#define REG_DISP_CTRL4                  0x0A
-#define REG_RGB_DISP_IF_CTRL1           0x0C
-#define REG_FRM_MARKER_POS              0x0D
-#define REG_RGB_DISP_IF_CTRL2           0x0F
-#define REG_PWR_CTRL1                   0x10
-#define REG_PWR_CTRL2                   0x11
-#define REG_PWR_CTRL3                   0x12
-#define REG_PWR_CTRL4                   0x13
-#define REG_GRAM_HORIZONTAL_ADDR        0x20
-#define REG_GRAM_VERTICAL_ADDR          0x21
-#define REG_GRAM_READWRITE              0x22
-#define REG_PWR_CTRL7                   0x29
-#define REG_FRM_RATE_COL_CTRL           0x2B
-#define REG_GAMMA_CTRL1                 0x30
-#define REG_GAMMA_CTRL2                 0x31
-#define REG_GAMMA_CTRL3                 0x32
-#define REG_GAMMA_CTRL4                 0x35
-#define REG_GAMMA_CTRL5                 0x36
-#define REG_GAMMA_CTRL6                 0x37
-#define REG_GAMMA_CTRL7                 0x38
-#define REG_GAMMA_CTRL8                 0x39
-#define REG_GAMMA_CTRL9                 0x3C
-#define REG_GAMMA_CTRL10                0x3D
-#define REG_HORIZONTAL_START_ADDR       0x50
-#define REG_HORIZONTAL_END_ADDR         0x51
-#define REG_VERTICAL_START_ADDR         0x52
-#define REG_VERTICAL_END_ADDR           0x53
-#define REG_GATE_SCAN_CTRL1             0x60
-#define REG_GATE_SCAN_CTRL2             0x61
-#define REG_GATE_SCAN_CTRL3             0x6A
-#define REG_PART_IMG1_DISP_POS          0x80
-#define REG_PART_IMG1_START_ADDR        0x81
-#define REG_PART_IMG1_END_ADDR          0x82
-#define REG_PART_IMG2_DISP_POS          0x83
-#define REG_PART_IMG2_START_ADDR        0x84
-#define REG_PART_IMG2_END_ADDR          0x85
-#define REG_PANEL_IF_CTRL1              0x90
-#define REG_PANEL_IF_CTRL2              0x92
-#define REG_PANEL_IF_CTRL3              0x93
-#define REG_PANEL_IF_CTRL4              0x95
-#define REG_PANEL_IF_CTRL5              0x97
-#define REG_PANEL_IF_CTRL6              0x98
-
 ILI9328_LCD::ILI9328_LCD( PinName CS, PinName RESET, PinName RS, PinName WR, BusOut* DATA_PORT, PinName BL, PinName RD, backlight_t blType, float defaultBackLightLevel )
     : LCD( 240, 320, CS, RS, RESET, BL, blType, defaultBackLightLevel ), _lcd_pin_wr( WR )
 {
@@ -104,50 +52,85 @@
     wait_ms( 15 );
     
     Activate();
-    //WriteCmdData( 0x00, 0x0001 ); // oscillator: 1 = on, 0 = off
-    //wait_ms( 1 );
-    WriteCmdData( REG_DRIV_OUT_CTRL, 0x0100 );  // Driver Output Control Register (R01h)
-    WriteCmdData( REG_DRIV_WAV_CTRL, 0x0700 );  // LCD Driving Waveform Control (R02h)
-    WriteCmdData( REG_ENTRY_MOD, 0x1030 );      // Entry Mode (R03h) (BGR=on;ID1=on;ID2=on;AM=0)
-    WriteCmdData( REG_DISP_CTRL2, 0x0302 );
-    WriteCmdData( REG_DISP_CTRL3, 0x0000 );
-    WriteCmdData( REG_DISP_CTRL4, 0x0000 );     // Fmark On
-    WriteCmdData( REG_PWR_CTRL1, 0x0000 );      // Power Control 1 (R10h)
-    WriteCmdData( REG_PWR_CTRL2, 0x0007 );      // Power Control 2 (R11h)
-    WriteCmdData( REG_PWR_CTRL3, 0x0000 );      // Power Control 3 (R12h)
-    WriteCmdData( REG_PWR_CTRL4, 0x0000 );      // Power Control 4 (R13h)
-    wait_ms( 1000 );  
-    WriteCmdData( REG_PWR_CTRL1, 0x14B0 );      // Power Control 1 (R10h)  
-    wait_ms( 500 );  
-    WriteCmdData( REG_PWR_CTRL2, 0x0007 );      // Power Control 2 (R11h)  
-    wait_ms( 500 );  
-    WriteCmdData( REG_PWR_CTRL3, 0x008E );      // Power Control 3 (R12h)
-    WriteCmdData( REG_PWR_CTRL4, 0x0C00 );      // Power Control 4 (R13h)
-    WriteCmdData( REG_PWR_CTRL7, 0x0015 );      // NVM read data 2 (R29h)
-    wait_ms( 500 );
-    WriteCmdData( REG_GAMMA_CTRL1, 0x0000 );         // Gamma Control 1
-    WriteCmdData( REG_GAMMA_CTRL2, 0x0107 );         // Gamma Control 2
-    WriteCmdData( REG_GAMMA_CTRL3, 0x0000 );         // Gamma Control 3
-    WriteCmdData( REG_GAMMA_CTRL4, 0x0203 );         // Gamma Control 4
-    WriteCmdData( REG_GAMMA_CTRL5, 0x0402 );         // Gamma Control 5
-    WriteCmdData( REG_GAMMA_CTRL6, 0x0000 );         // Gamma Control 6
-    WriteCmdData( REG_GAMMA_CTRL7, 0x0207 );         // Gamma Control 7
-    WriteCmdData( REG_GAMMA_CTRL8, 0x0000 );         // Gamma Control 8
-    WriteCmdData( REG_GAMMA_CTRL9, 0x0203 );         // Gamma Control 9
-    WriteCmdData( REG_GAMMA_CTRL10, 0x0403 );        // Gamma Control 10
-    WriteCmdData( REG_HORIZONTAL_START_ADDR, 0x0000 );                      // Window Horizontal RAM Address Start (R50h)
-    WriteCmdData( REG_HORIZONTAL_END_ADDR, _disp_width - 1);   // Window Horizontal RAM Address End (R51h)
-    WriteCmdData( REG_VERTICAL_START_ADDR, 0x0000 );                        // Window Vertical RAM Address Start (R52h)
-    WriteCmdData( REG_VERTICAL_END_ADDR, _disp_height - 1);    // Window Vertical RAM Address End (R53h)
-    WriteCmdData( REG_GATE_SCAN_CTRL1, 0xa700 );    // Driver Output Control (R60h)
-    WriteCmdData( REG_GATE_SCAN_CTRL2, 0x0003 ); // Driver Output Control (R61h) - enable VLE
-    WriteCmdData( REG_PANEL_IF_CTRL1, 0x0010 );  // Panel Interface Control 1 (R90h)
-
-    // Display On
-    WriteCmdData( REG_DISP_CTRL1, 0x0133 );     // Display Control (R07h)
-    wait_ms( 500 );
-    WriteCmd( REG_GRAM_READWRITE );
-  
+    /*
+    short payload = 0;
+    switch ( _orientation )
+    {
+        case PORTRAIT:
+        default:
+            payload |= 0x0020;
+            break;
+    }
+    switch ( _colorDepth )
+    {
+        case RGB16:
+        default:
+            payload |= 0x1000;
+            break;
+    }
+    //WriteCmdData( REG_ENTRY_MOD, payload );
+    */
+    
+    WriteCmdData( 0xE5, 0x78F0 ); // set SRAM internal timing
+    WriteCmdData( 0x01, 0x0100 ); // set Driver Output Control
+    WriteCmdData( 0x02, 0x0200 ); // set 1 line inversion
+    WriteCmdData( 0x03, 0x1030 ); // set GRAM write direction and BGR=1.
+    WriteCmdData( 0x04, 0x0000 ); // Resize register
+    WriteCmdData( 0x08, 0x0207 ); // set the back porch and front porch
+    WriteCmdData( 0x09, 0x0000 ); // set non-display area refresh cycle ISC[3:0]
+    WriteCmdData( 0x0A, 0x0000 ); // FMARK function
+    WriteCmdData( 0x0C, 0x0000 ); // RGB interface setting
+    WriteCmdData( 0x0D, 0x0000 ); // Frame marker Position
+    WriteCmdData( 0x0F, 0x0000 ); // RGB interface polarity
+    // ----------- Power On sequence ----------- //
+    WriteCmdData( 0x10, 0x0000 ); // SAP, BT[3:0], AP, DSTB, SLP, STB
+    WriteCmdData( 0x11, 0x0007 ); // DC1[2:0], DC0[2:0], VC[2:0]
+    WriteCmdData( 0x12, 0x0000 ); // VREG1OUT voltage
+    WriteCmdData( 0x13, 0x0000 ); // VDV[4:0] for VCOM amplitude
+    WriteCmdData( 0x07, 0x0001 );
+    wait_ms( 200 ); // Dis-charge capacitor power voltage
+    WriteCmdData( 0x10, 0x1690 ); // SAP, BT[3:0], AP, DSTB, SLP, STB
+    WriteCmdData( 0x11, 0x0227 ); // Set DC1[2:0], DC0[2:0], VC[2:0]
+    wait_ms( 50 ); // Delay 50ms
+    WriteCmdData( 0x12, 0x000D ); // 0012
+    wait_ms( 50 ); // Delay 50ms
+    WriteCmdData( 0x13, 0x1200 ); // VDV[4:0] for VCOM amplitude
+    WriteCmdData( 0x29, 0x000A ); // 04  VCM[5:0] for VCOMH
+    WriteCmdData( 0x2B, 0x000D ); // Set Frame Rate
+    wait_ms( 50 ); // Delay 50ms
+    WriteCmdData( 0x20, 0x0000 ); // GRAM horizontal Address
+    WriteCmdData( 0x21, 0x0000 ); // GRAM Vertical Address
+    // ----------- Adjust the Gamma Curve ----------//
+    WriteCmdData( 0x30, 0x0000 );
+    WriteCmdData( 0x31, 0x0404 );
+    WriteCmdData( 0x32, 0x0003 );
+    WriteCmdData( 0x35, 0x0405 );
+    WriteCmdData( 0x36, 0x0808 );
+    WriteCmdData( 0x37, 0x0407 );
+    WriteCmdData( 0x38, 0x0303 );
+    WriteCmdData( 0x39, 0x0707 );
+    WriteCmdData( 0x3C, 0x0504 );
+    WriteCmdData( 0x3D, 0x0808 );
+    //------------------ Set GRAM area ---------------//
+    WriteCmdData( 0x50, 0x0000 ); // Horizontal GRAM Start Address
+    WriteCmdData( 0x51, 0x00EF ); // Horizontal GRAM End Address
+    WriteCmdData( 0x52, 0x0000 ); // Vertical GRAM Start Address
+    WriteCmdData( 0x53, 0x013F ); // Vertical GRAM Start Address
+    WriteCmdData( 0x60, 0xA700 ); // Gate Scan Line
+    WriteCmdData( 0x61, 0x0000 ); // NDL,VLE, REV
+    WriteCmdData( 0x6A, 0x0000 ); // set scrolling line
+    //-------------- Partial Display Control ---------//
+    WriteCmdData( 0x80, 0x0000 );
+    WriteCmdData( 0x81, 0x0000 );
+    WriteCmdData( 0x82, 0x0000 );
+    WriteCmdData( 0x83, 0x0000 );
+    WriteCmdData( 0x84, 0x0000 );
+    WriteCmdData( 0x85, 0x0000 );
+    //-------------- Panel Control -------------------//
+    WriteCmdData( 0x90, 0x0010 ); 
+    WriteCmdData( 0x92, 0x0000 );
+    WriteCmdData( 0x07, 0x0133 ); // 262K color and display ON
+    
     Deactivate();
 }
 
@@ -179,30 +162,12 @@
 
 void ILI9328_LCD::SetXY( unsigned short x1, unsigned short y1, unsigned short x2, unsigned short y2 )
 {
-    /*
-    if ( _orientation == PORTRAIT || _orientation == PORTRAIT_REV )
-    {
-        WriteCmdData( 0x44, ( x2 << 8 ) + x1 );
-        WriteCmdData( 0x45, y1 );
-        WriteCmdData( 0x46, y2 );
-        WriteCmdData( 0x4e, x1 );
-        WriteCmdData( 0x4f, y1 );
-    }
-    else
-    {
-        WriteCmdData( 0x44, ( y2 << 8 ) + y1 );
-        WriteCmdData( 0x45, x1 );
-        WriteCmdData( 0x46, x2 );
-        WriteCmdData( 0x4e, y1 );
-        WriteCmdData( 0x4f, x1 );
-    }
-    */
-    WriteCmdData( REG_HORIZONTAL_START_ADDR, x1 );
-    WriteCmdData( REG_HORIZONTAL_END_ADDR, x2 );
-    WriteCmdData( REG_VERTICAL_START_ADDR, y1 );
-    WriteCmdData( REG_VERTICAL_END_ADDR, y2 );
-    WriteCmdData( REG_GRAM_HORIZONTAL_ADDR, x1 );
-    WriteCmdData( REG_GRAM_VERTICAL_ADDR, y1 );
+    WriteCmdData( 0x20, x1 );
+    WriteCmdData( 0x21, y1 );
+    WriteCmdData( 0x50, x1 );
+    WriteCmdData( 0x52, y1 );
+    WriteCmdData( 0x51, x2 );
+    WriteCmdData( 0x53, y2 );
     WriteCmd( 0x22 );
 }