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targets/TARGET_Freescale/TARGET_KSDK2_MCUS/TARGET_K22F/drivers/fsl_flexbus.h@0:f269e3021894, 2016-10-23 (annotated)

Committer:
elessair
Date:
Sun Oct 23 15:10:02 2016 +0000
Revision:
0:f269e3021894
Initial commit

Who changed what in which revision?

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elessair 0:f269e3021894 1 /*
elessair 0:f269e3021894 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
elessair 0:f269e3021894 3 * All rights reserved.
elessair 0:f269e3021894 4 *
elessair 0:f269e3021894 5 * Redistribution and use in source and binary forms, with or without modification,
elessair 0:f269e3021894 6 * are permitted provided that the following conditions are met:
elessair 0:f269e3021894 7 *
elessair 0:f269e3021894 8 * o Redistributions of source code must retain the above copyright notice, this list
elessair 0:f269e3021894 9 * of conditions and the following disclaimer.
elessair 0:f269e3021894 10 *
elessair 0:f269e3021894 11 * o Redistributions in binary form must reproduce the above copyright notice, this
elessair 0:f269e3021894 12 * list of conditions and the following disclaimer in the documentation and/or
elessair 0:f269e3021894 13 * other materials provided with the distribution.
elessair 0:f269e3021894 14 *
elessair 0:f269e3021894 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
elessair 0:f269e3021894 16 * contributors may be used to endorse or promote products derived from this
elessair 0:f269e3021894 17 * software without specific prior written permission.
elessair 0:f269e3021894 18 *
elessair 0:f269e3021894 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
elessair 0:f269e3021894 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
elessair 0:f269e3021894 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
elessair 0:f269e3021894 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
elessair 0:f269e3021894 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
elessair 0:f269e3021894 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
elessair 0:f269e3021894 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
elessair 0:f269e3021894 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
elessair 0:f269e3021894 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
elessair 0:f269e3021894 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
elessair 0:f269e3021894 29 */
elessair 0:f269e3021894 30
elessair 0:f269e3021894 31 #ifndef _FSL_FLEXBUS_H_
elessair 0:f269e3021894 32 #define _FSL_FLEXBUS_H_
elessair 0:f269e3021894 33
elessair 0:f269e3021894 34 #include "fsl_common.h"
elessair 0:f269e3021894 35
elessair 0:f269e3021894 36 /*!
elessair 0:f269e3021894 37 * @addtogroup flexbus
elessair 0:f269e3021894 38 * @{
elessair 0:f269e3021894 39 */
elessair 0:f269e3021894 40
elessair 0:f269e3021894 41 /*! @file */
elessair 0:f269e3021894 42
elessair 0:f269e3021894 43 /*******************************************************************************
elessair 0:f269e3021894 44 * Definitions
elessair 0:f269e3021894 45 ******************************************************************************/
elessair 0:f269e3021894 46
elessair 0:f269e3021894 47 /*! @name Driver version */
elessair 0:f269e3021894 48 /*@{*/
elessair 0:f269e3021894 49 #define FSL_FLEXBUS_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
elessair 0:f269e3021894 50 /*@}*/
elessair 0:f269e3021894 51
elessair 0:f269e3021894 52 /*!
elessair 0:f269e3021894 53 * @brief Defines port size for FlexBus peripheral.
elessair 0:f269e3021894 54 */
elessair 0:f269e3021894 55 typedef enum _flexbus_port_size
elessair 0:f269e3021894 56 {
elessair 0:f269e3021894 57 kFLEXBUS_4Bytes = 0x00U, /*!< 32-bit port size */
elessair 0:f269e3021894 58 kFLEXBUS_1Byte = 0x01U, /*!< 8-bit port size */
elessair 0:f269e3021894 59 kFLEXBUS_2Bytes = 0x02U /*!< 16-bit port size */
elessair 0:f269e3021894 60 } flexbus_port_size_t;
elessair 0:f269e3021894 61
elessair 0:f269e3021894 62 /*!
elessair 0:f269e3021894 63 * @brief Defines number of cycles to hold address and attributes for FlexBus peripheral.
elessair 0:f269e3021894 64 */
elessair 0:f269e3021894 65 typedef enum _flexbus_write_address_hold
elessair 0:f269e3021894 66 {
elessair 0:f269e3021894 67 kFLEXBUS_Hold1Cycle = 0x00U, /*!< Hold address and attributes one cycles after FB_CSn negates on writes */
elessair 0:f269e3021894 68 kFLEXBUS_Hold2Cycles = 0x01U, /*!< Hold address and attributes two cycles after FB_CSn negates on writes */
elessair 0:f269e3021894 69 kFLEXBUS_Hold3Cycles = 0x02U, /*!< Hold address and attributes three cycles after FB_CSn negates on writes */
elessair 0:f269e3021894 70 kFLEXBUS_Hold4Cycles = 0x03U /*!< Hold address and attributes four cycles after FB_CSn negates on writes */
elessair 0:f269e3021894 71 } flexbus_write_address_hold_t;
elessair 0:f269e3021894 72
elessair 0:f269e3021894 73 /*!
elessair 0:f269e3021894 74 * @brief Defines number of cycles to hold address and attributes for FlexBus peripheral.
elessair 0:f269e3021894 75 */
elessair 0:f269e3021894 76 typedef enum _flexbus_read_address_hold
elessair 0:f269e3021894 77 {
elessair 0:f269e3021894 78 kFLEXBUS_Hold1Or0Cycles = 0x00U, /*!< Hold address and attributes 1 or 0 cycles on reads */
elessair 0:f269e3021894 79 kFLEXBUS_Hold2Or1Cycles = 0x01U, /*!< Hold address and attributes 2 or 1 cycles on reads */
elessair 0:f269e3021894 80 kFLEXBUS_Hold3Or2Cycle = 0x02U, /*!< Hold address and attributes 3 or 2 cycles on reads */
elessair 0:f269e3021894 81 kFLEXBUS_Hold4Or3Cycle = 0x03U /*!< Hold address and attributes 4 or 3 cycles on reads */
elessair 0:f269e3021894 82 } flexbus_read_address_hold_t;
elessair 0:f269e3021894 83
elessair 0:f269e3021894 84 /*!
elessair 0:f269e3021894 85 * @brief Address setup for FlexBus peripheral.
elessair 0:f269e3021894 86 */
elessair 0:f269e3021894 87 typedef enum _flexbus_address_setup
elessair 0:f269e3021894 88 {
elessair 0:f269e3021894 89 kFLEXBUS_FirstRisingEdge = 0x00U, /*!< Assert FB_CSn on first rising clock edge after address is asserted */
elessair 0:f269e3021894 90 kFLEXBUS_SecondRisingEdge = 0x01U, /*!< Assert FB_CSn on second rising clock edge after address is asserted */
elessair 0:f269e3021894 91 kFLEXBUS_ThirdRisingEdge = 0x02U, /*!< Assert FB_CSn on third rising clock edge after address is asserted */
elessair 0:f269e3021894 92 kFLEXBUS_FourthRisingEdge = 0x03U, /*!< Assert FB_CSn on fourth rising clock edge after address is asserted */
elessair 0:f269e3021894 93 } flexbus_address_setup_t;
elessair 0:f269e3021894 94
elessair 0:f269e3021894 95 /*!
elessair 0:f269e3021894 96 * @brief Defines byte-lane shift for FlexBus peripheral.
elessair 0:f269e3021894 97 */
elessair 0:f269e3021894 98 typedef enum _flexbus_bytelane_shift
elessair 0:f269e3021894 99 {
elessair 0:f269e3021894 100 kFLEXBUS_NotShifted = 0x00U, /*!< Not shifted. Data is left-justified on FB_AD */
elessair 0:f269e3021894 101 kFLEXBUS_Shifted = 0x01U, /*!< Shifted. Data is right justified on FB_AD */
elessair 0:f269e3021894 102 } flexbus_bytelane_shift_t;
elessair 0:f269e3021894 103
elessair 0:f269e3021894 104 /*!
elessair 0:f269e3021894 105 * @brief Defines multiplex group1 valid signals.
elessair 0:f269e3021894 106 */
elessair 0:f269e3021894 107 typedef enum _flexbus_multiplex_group1_signal
elessair 0:f269e3021894 108 {
elessair 0:f269e3021894 109 kFLEXBUS_MultiplexGroup1_FB_ALE = 0x00U, /*!< FB_ALE */
elessair 0:f269e3021894 110 kFLEXBUS_MultiplexGroup1_FB_CS1 = 0x01U, /*!< FB_CS1 */
elessair 0:f269e3021894 111 kFLEXBUS_MultiplexGroup1_FB_TS = 0x02U, /*!< FB_TS */
elessair 0:f269e3021894 112 } flexbus_multiplex_group1_t;
elessair 0:f269e3021894 113
elessair 0:f269e3021894 114 /*!
elessair 0:f269e3021894 115 * @brief Defines multiplex group2 valid signals.
elessair 0:f269e3021894 116 */
elessair 0:f269e3021894 117 typedef enum _flexbus_multiplex_group2_signal
elessair 0:f269e3021894 118 {
elessair 0:f269e3021894 119 kFLEXBUS_MultiplexGroup2_FB_CS4 = 0x00U, /*!< FB_CS4 */
elessair 0:f269e3021894 120 kFLEXBUS_MultiplexGroup2_FB_TSIZ0 = 0x01U, /*!< FB_TSIZ0 */
elessair 0:f269e3021894 121 kFLEXBUS_MultiplexGroup2_FB_BE_31_24 = 0x02U, /*!< FB_BE_31_24 */
elessair 0:f269e3021894 122 } flexbus_multiplex_group2_t;
elessair 0:f269e3021894 123
elessair 0:f269e3021894 124 /*!
elessair 0:f269e3021894 125 * @brief Defines multiplex group3 valid signals.
elessair 0:f269e3021894 126 */
elessair 0:f269e3021894 127 typedef enum _flexbus_multiplex_group3_signal
elessair 0:f269e3021894 128 {
elessair 0:f269e3021894 129 kFLEXBUS_MultiplexGroup3_FB_CS5 = 0x00U, /*!< FB_CS5 */
elessair 0:f269e3021894 130 kFLEXBUS_MultiplexGroup3_FB_TSIZ1 = 0x01U, /*!< FB_TSIZ1 */
elessair 0:f269e3021894 131 kFLEXBUS_MultiplexGroup3_FB_BE_23_16 = 0x02U, /*!< FB_BE_23_16 */
elessair 0:f269e3021894 132 } flexbus_multiplex_group3_t;
elessair 0:f269e3021894 133
elessair 0:f269e3021894 134 /*!
elessair 0:f269e3021894 135 * @brief Defines multiplex group4 valid signals.
elessair 0:f269e3021894 136 */
elessair 0:f269e3021894 137 typedef enum _flexbus_multiplex_group4_signal
elessair 0:f269e3021894 138 {
elessair 0:f269e3021894 139 kFLEXBUS_MultiplexGroup4_FB_TBST = 0x00U, /*!< FB_TBST */
elessair 0:f269e3021894 140 kFLEXBUS_MultiplexGroup4_FB_CS2 = 0x01U, /*!< FB_CS2 */
elessair 0:f269e3021894 141 kFLEXBUS_MultiplexGroup4_FB_BE_15_8 = 0x02U, /*!< FB_BE_15_8 */
elessair 0:f269e3021894 142 } flexbus_multiplex_group4_t;
elessair 0:f269e3021894 143
elessair 0:f269e3021894 144 /*!
elessair 0:f269e3021894 145 * @brief Defines multiplex group5 valid signals.
elessair 0:f269e3021894 146 */
elessair 0:f269e3021894 147 typedef enum _flexbus_multiplex_group5_signal
elessair 0:f269e3021894 148 {
elessair 0:f269e3021894 149 kFLEXBUS_MultiplexGroup5_FB_TA = 0x00U, /*!< FB_TA */
elessair 0:f269e3021894 150 kFLEXBUS_MultiplexGroup5_FB_CS3 = 0x01U, /*!< FB_CS3 */
elessair 0:f269e3021894 151 kFLEXBUS_MultiplexGroup5_FB_BE_7_0 = 0x02U, /*!< FB_BE_7_0 */
elessair 0:f269e3021894 152 } flexbus_multiplex_group5_t;
elessair 0:f269e3021894 153
elessair 0:f269e3021894 154 /*!
elessair 0:f269e3021894 155 * @brief Configuration structure that the user needs to set.
elessair 0:f269e3021894 156 */
elessair 0:f269e3021894 157 typedef struct _flexbus_config
elessair 0:f269e3021894 158 {
elessair 0:f269e3021894 159 uint8_t chip; /*!< Chip FlexBus for validation */
elessair 0:f269e3021894 160 uint8_t waitStates; /*!< Value of wait states */
elessair 0:f269e3021894 161 uint32_t chipBaseAddress; /*!< Chip base address for using FlexBus */
elessair 0:f269e3021894 162 uint32_t chipBaseAddressMask; /*!< Chip base address mask */
elessair 0:f269e3021894 163 bool writeProtect; /*!< Write protected */
elessair 0:f269e3021894 164 bool burstWrite; /*!< Burst-Write enable */
elessair 0:f269e3021894 165 bool burstRead; /*!< Burst-Read enable */
elessair 0:f269e3021894 166 bool byteEnableMode; /*!< Byte-enable mode support */
elessair 0:f269e3021894 167 bool autoAcknowledge; /*!< Auto acknowledge setting */
elessair 0:f269e3021894 168 bool extendTransferAddress; /*!< Extend transfer start/extend address latch enable */
elessair 0:f269e3021894 169 bool secondaryWaitStates; /*!< Secondary wait states number */
elessair 0:f269e3021894 170 flexbus_port_size_t portSize; /*!< Port size of transfer */
elessair 0:f269e3021894 171 flexbus_bytelane_shift_t byteLaneShift; /*!< Byte-lane shift enable */
elessair 0:f269e3021894 172 flexbus_write_address_hold_t writeAddressHold; /*!< Write address hold or deselect option */
elessair 0:f269e3021894 173 flexbus_read_address_hold_t readAddressHold; /*!< Read address hold or deselect option */
elessair 0:f269e3021894 174 flexbus_address_setup_t addressSetup; /*!< Address setup setting */
elessair 0:f269e3021894 175 flexbus_multiplex_group1_t group1MultiplexControl; /*!< FlexBus Signal Group 1 Multiplex control */
elessair 0:f269e3021894 176 flexbus_multiplex_group2_t group2MultiplexControl; /*!< FlexBus Signal Group 2 Multiplex control */
elessair 0:f269e3021894 177 flexbus_multiplex_group3_t group3MultiplexControl; /*!< FlexBus Signal Group 3 Multiplex control */
elessair 0:f269e3021894 178 flexbus_multiplex_group4_t group4MultiplexControl; /*!< FlexBus Signal Group 4 Multiplex control */
elessair 0:f269e3021894 179 flexbus_multiplex_group5_t group5MultiplexControl; /*!< FlexBus Signal Group 5 Multiplex control */
elessair 0:f269e3021894 180 } flexbus_config_t;
elessair 0:f269e3021894 181
elessair 0:f269e3021894 182 /*******************************************************************************
elessair 0:f269e3021894 183 * API
elessair 0:f269e3021894 184 ******************************************************************************/
elessair 0:f269e3021894 185
elessair 0:f269e3021894 186 #if defined(__cplusplus)
elessair 0:f269e3021894 187 extern "C" {
elessair 0:f269e3021894 188 #endif /* __cplusplus */
elessair 0:f269e3021894 189
elessair 0:f269e3021894 190 /*!
elessair 0:f269e3021894 191 * @name FlexBus functional operation
elessair 0:f269e3021894 192 * @{
elessair 0:f269e3021894 193 */
elessair 0:f269e3021894 194
elessair 0:f269e3021894 195 /*!
elessair 0:f269e3021894 196 * @brief Initializes and configures the FlexBus module.
elessair 0:f269e3021894 197 *
elessair 0:f269e3021894 198 * This function enables the clock gate for FlexBus module.
elessair 0:f269e3021894 199 * Only chip 0 is validated and set to known values. Other chips are disabled.
elessair 0:f269e3021894 200 * NOTE: In this function, certain parameters, depending on external memories, must
elessair 0:f269e3021894 201 * be set before using FLEXBUS_Init() function.
elessair 0:f269e3021894 202 * This example shows how to set up the uart_state_t and the
elessair 0:f269e3021894 203 * flexbus_config_t parameters and how to call the FLEXBUS_Init function by passing
elessair 0:f269e3021894 204 * in these parameters:
elessair 0:f269e3021894 205 @code
elessair 0:f269e3021894 206 flexbus_config_t flexbusConfig;
elessair 0:f269e3021894 207 FLEXBUS_GetDefaultConfig(&flexbusConfig);
elessair 0:f269e3021894 208 flexbusConfig.waitStates = 2U;
elessair 0:f269e3021894 209 flexbusConfig.chipBaseAddress = 0x60000000U;
elessair 0:f269e3021894 210 flexbusConfig.chipBaseAddressMask = 7U;
elessair 0:f269e3021894 211 FLEXBUS_Init(FB, &flexbusConfig);
elessair 0:f269e3021894 212 @endcode
elessair 0:f269e3021894 213 *
elessair 0:f269e3021894 214 * @param base FlexBus peripheral address.
elessair 0:f269e3021894 215 * @param config Pointer to the configure structure
elessair 0:f269e3021894 216 */
elessair 0:f269e3021894 217 void FLEXBUS_Init(FB_Type *base, const flexbus_config_t *config);
elessair 0:f269e3021894 218
elessair 0:f269e3021894 219 /*!
elessair 0:f269e3021894 220 * @brief De-initializes a FlexBus instance.
elessair 0:f269e3021894 221 *
elessair 0:f269e3021894 222 * This function disables the clock gate of the FlexBus module clock.
elessair 0:f269e3021894 223 *
elessair 0:f269e3021894 224 * @param base FlexBus peripheral address.
elessair 0:f269e3021894 225 */
elessair 0:f269e3021894 226 void FLEXBUS_Deinit(FB_Type *base);
elessair 0:f269e3021894 227
elessair 0:f269e3021894 228 /*!
elessair 0:f269e3021894 229 * @brief Initializes the FlexBus configuration structure.
elessair 0:f269e3021894 230 *
elessair 0:f269e3021894 231 * This function initializes the FlexBus configuration structure to default value. The default
elessair 0:f269e3021894 232 * values are:
elessair 0:f269e3021894 233 @code
elessair 0:f269e3021894 234 fbConfig->chip = 0;
elessair 0:f269e3021894 235 fbConfig->writeProtect = 0;
elessair 0:f269e3021894 236 fbConfig->burstWrite = 0;
elessair 0:f269e3021894 237 fbConfig->burstRead = 0;
elessair 0:f269e3021894 238 fbConfig->byteEnableMode = 0;
elessair 0:f269e3021894 239 fbConfig->autoAcknowledge = true;
elessair 0:f269e3021894 240 fbConfig->extendTransferAddress = 0;
elessair 0:f269e3021894 241 fbConfig->secondaryWaitStates = 0;
elessair 0:f269e3021894 242 fbConfig->byteLaneShift = kFLEXBUS_NotShifted;
elessair 0:f269e3021894 243 fbConfig->writeAddressHold = kFLEXBUS_Hold1Cycle;
elessair 0:f269e3021894 244 fbConfig->readAddressHold = kFLEXBUS_Hold1Or0Cycles;
elessair 0:f269e3021894 245 fbConfig->addressSetup = kFLEXBUS_FirstRisingEdge;
elessair 0:f269e3021894 246 fbConfig->portSize = kFLEXBUS_1Byte;
elessair 0:f269e3021894 247 fbConfig->group1MultiplexControl = kFLEXBUS_MultiplexGroup1_FB_ALE;
elessair 0:f269e3021894 248 fbConfig->group2MultiplexControl = kFLEXBUS_MultiplexGroup2_FB_CS4 ;
elessair 0:f269e3021894 249 fbConfig->group3MultiplexControl = kFLEXBUS_MultiplexGroup3_FB_CS5;
elessair 0:f269e3021894 250 fbConfig->group4MultiplexControl = kFLEXBUS_MultiplexGroup4_FB_TBST;
elessair 0:f269e3021894 251 fbConfig->group5MultiplexControl = kFLEXBUS_MultiplexGroup5_FB_TA;
elessair 0:f269e3021894 252 @endcode
elessair 0:f269e3021894 253 * @param config Pointer to the initialization structure.
elessair 0:f269e3021894 254 * @see FLEXBUS_Init
elessair 0:f269e3021894 255 */
elessair 0:f269e3021894 256 void FLEXBUS_GetDefaultConfig(flexbus_config_t *config);
elessair 0:f269e3021894 257
elessair 0:f269e3021894 258 /*! @}*/
elessair 0:f269e3021894 259
elessair 0:f269e3021894 260 #if defined(__cplusplus)
elessair 0:f269e3021894 261 }
elessair 0:f269e3021894 262 #endif /* __cplusplus */
elessair 0:f269e3021894 263
elessair 0:f269e3021894 264 /*! @}*/
elessair 0:f269e3021894 265
elessair 0:f269e3021894 266 #endif /* _FSL_FLEXBUS_H_ */