Motoo Tanaka / S11059

HAMAMATSU's I2C color sensor S11059

Dependents:   test_S11059

S11059.cpp@0:cfdb96085fb7, 2017-05-12 (annotated)

Committer:
Rhyme
Date:
Fri May 12 02:10:35 2017 +0000
Revision:
0:cfdb96085fb7
commit before publishing

Who changed what in which revision?

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Rhyme 0:cfdb96085fb7 1 /*
Rhyme 0:cfdb96085fb7 2 * HAMAMATSU Color Senosr S11059
Rhyme 0:cfdb96085fb7 3 *
Rhyme 0:cfdb96085fb7 4 */
Rhyme 0:cfdb96085fb7 5 #include "mbed.h"
Rhyme 0:cfdb96085fb7 6 #include "S11059.h"
Rhyme 0:cfdb96085fb7 7
Rhyme 0:cfdb96085fb7 8 /* S11059 Register Address */
Rhyme 0:cfdb96085fb7 9 #define REG_CONTROL 0x00
Rhyme 0:cfdb96085fb7 10 #define REG_TIMING_DATA 0x01
Rhyme 0:cfdb96085fb7 11 #define REG_TIMING_MSB 0x01
Rhyme 0:cfdb96085fb7 12 #define REG_TIMING_LSB 0x02
Rhyme 0:cfdb96085fb7 13 #define REG_R_DATA 0x03
Rhyme 0:cfdb96085fb7 14 #define REG_R_MSB 0x03
Rhyme 0:cfdb96085fb7 15 #define REG_R_LSB 0x04
Rhyme 0:cfdb96085fb7 16 #define REG_G_DATA 0x05
Rhyme 0:cfdb96085fb7 17 #define REG_G_MSB 0x05
Rhyme 0:cfdb96085fb7 18 #define REG_G_LSB 0x06
Rhyme 0:cfdb96085fb7 19 #define REG_B_DATA 0x07
Rhyme 0:cfdb96085fb7 20 #define REG_B_MSB 0x07
Rhyme 0:cfdb96085fb7 21 #define REG_B_LSB 0x08
Rhyme 0:cfdb96085fb7 22 #define REG_IR_DATA 0x09
Rhyme 0:cfdb96085fb7 23 #define REG_IR_MSB 0x09
Rhyme 0:cfdb96085fb7 24 #define REG_IR_LSB 0x0A
Rhyme 0:cfdb96085fb7 25
Rhyme 0:cfdb96085fb7 26 /* register bits */
Rhyme 0:cfdb96085fb7 27 /* REG_CONTROL (00) */
Rhyme 0:cfdb96085fb7 28 // bit[7] ADC Reset 0:normal 1:reset
Rhyme 0:cfdb96085fb7 29 #define BIT_ADC_RESET 0x80
Rhyme 0:cfdb96085fb7 30 // bit[6] Sleep function 0:normal 1:standby
Rhyme 0:cfdb96085fb7 31 #define BIT_SLEEP_MODE 0x40
Rhyme 0:cfdb96085fb7 32 // bit[5] Sleeep function monitor bit
Rhyme 0:cfdb96085fb7 33 #define BIT_SLEEP_MONITOR 0x20
Rhyme 0:cfdb96085fb7 34 // bit[4] (reserved)
Rhyme 0:cfdb96085fb7 35 // bit[3] Gain select 0:Low Gain 1:High Gain
Rhyme 0:cfdb96085fb7 36 #define BIT_HIGH_GAIN 0x08
Rhyme 0:cfdb96085fb7 37 // bit[2] Ingegration mode 0:Fixed 1:Manual
Rhyme 0:cfdb96085fb7 38 #define BIT_INT_MANUAL 0x02
Rhyme 0:cfdb96085fb7 39 // bit[1:0] Integration Time
Rhyme 0:cfdb96085fb7 40 #define BIT_INT_LEN0 0x00 /* 87.5 us */
Rhyme 0:cfdb96085fb7 41 #define BIT_INT_LEN1 0x01 /* 1.4 ms */
Rhyme 0:cfdb96085fb7 42 #define BIT_INT_LEN2 0x02 /* 22.4 ms */
Rhyme 0:cfdb96085fb7 43 #define BIT_INT_LEN3 0x03 /* 179.2 ms */
Rhyme 0:cfdb96085fb7 44
Rhyme 0:cfdb96085fb7 45 /* constructor and destructor */
Rhyme 0:cfdb96085fb7 46
Rhyme 0:cfdb96085fb7 47 S11059::S11059(PinName sda, PinName scl, int addr) : m_i2c(sda, scl), m_addr(addr<<1) {
Rhyme 0:cfdb96085fb7 48 // activate the peripheral
Rhyme 0:cfdb96085fb7 49 }
Rhyme 0:cfdb96085fb7 50
Rhyme 0:cfdb96085fb7 51 S11059::~S11059() { }
Rhyme 0:cfdb96085fb7 52
Rhyme 0:cfdb96085fb7 53 float S11059::getR(void) // return float value of Red
Rhyme 0:cfdb96085fb7 54 {
Rhyme 0:cfdb96085fb7 55 uint16_t r_data ;
Rhyme 0:cfdb96085fb7 56 float data ;
Rhyme 0:cfdb96085fb7 57 getRData(&r_data) ;
Rhyme 0:cfdb96085fb7 58 data = (float)r_data / 65535.0 ;
Rhyme 0:cfdb96085fb7 59 return(data) ;
Rhyme 0:cfdb96085fb7 60 }
Rhyme 0:cfdb96085fb7 61
Rhyme 0:cfdb96085fb7 62 float S11059::getG(void) // return float value of Green
Rhyme 0:cfdb96085fb7 63 {
Rhyme 0:cfdb96085fb7 64 uint16_t g_data ;
Rhyme 0:cfdb96085fb7 65 float data ;
Rhyme 0:cfdb96085fb7 66 getGData(&g_data) ;
Rhyme 0:cfdb96085fb7 67 data = (float)g_data / 65535.0 ;
Rhyme 0:cfdb96085fb7 68 return(data) ;
Rhyme 0:cfdb96085fb7 69 }
Rhyme 0:cfdb96085fb7 70
Rhyme 0:cfdb96085fb7 71 float S11059::getB(void) // return float value of Blue
Rhyme 0:cfdb96085fb7 72 {
Rhyme 0:cfdb96085fb7 73 uint16_t b_data ;
Rhyme 0:cfdb96085fb7 74 float data ;
Rhyme 0:cfdb96085fb7 75 getBData(&b_data) ;
Rhyme 0:cfdb96085fb7 76 data = (float)b_data / 65535.0 ;
Rhyme 0:cfdb96085fb7 77 return(data) ;
Rhyme 0:cfdb96085fb7 78 }
Rhyme 0:cfdb96085fb7 79
Rhyme 0:cfdb96085fb7 80 float S11059::getIR(void) // return float value of Infrared
Rhyme 0:cfdb96085fb7 81 {
Rhyme 0:cfdb96085fb7 82 uint16_t ir_data ;
Rhyme 0:cfdb96085fb7 83 float data ;
Rhyme 0:cfdb96085fb7 84 getIRData(&ir_data) ;
Rhyme 0:cfdb96085fb7 85 data = (float)ir_data / 65535.0 ;
Rhyme 0:cfdb96085fb7 86 return(data) ;
Rhyme 0:cfdb96085fb7 87 }
Rhyme 0:cfdb96085fb7 88
Rhyme 0:cfdb96085fb7 89 void S11059::getRData(uint16_t *rdata)
Rhyme 0:cfdb96085fb7 90 {
Rhyme 0:cfdb96085fb7 91 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 92 readRegs(REG_R_DATA, data, 2) ;
Rhyme 0:cfdb96085fb7 93 *rdata = (data[0]<<8) | data[1] ;
Rhyme 0:cfdb96085fb7 94 }
Rhyme 0:cfdb96085fb7 95
Rhyme 0:cfdb96085fb7 96 void S11059::getGData(uint16_t *gdata)
Rhyme 0:cfdb96085fb7 97 {
Rhyme 0:cfdb96085fb7 98 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 99 readRegs(REG_G_DATA, data, 2) ;
Rhyme 0:cfdb96085fb7 100 *gdata = (data[0]<<8) | data[1] ;
Rhyme 0:cfdb96085fb7 101 }
Rhyme 0:cfdb96085fb7 102
Rhyme 0:cfdb96085fb7 103 void S11059::getBData(uint16_t *bdata)
Rhyme 0:cfdb96085fb7 104 {
Rhyme 0:cfdb96085fb7 105 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 106 readRegs(REG_B_DATA, data, 2) ;
Rhyme 0:cfdb96085fb7 107 *bdata = (data[0]<<8) | data[1] ;
Rhyme 0:cfdb96085fb7 108 }
Rhyme 0:cfdb96085fb7 109
Rhyme 0:cfdb96085fb7 110 void S11059::getIRData(uint16_t *irdata)
Rhyme 0:cfdb96085fb7 111 {
Rhyme 0:cfdb96085fb7 112 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 113 readRegs(REG_IR_DATA, data, 2) ;
Rhyme 0:cfdb96085fb7 114 *irdata = (data[0]<<8) | data[1] ;
Rhyme 0:cfdb96085fb7 115 }
Rhyme 0:cfdb96085fb7 116
Rhyme 0:cfdb96085fb7 117 void S11059::getAllData(uint16_t *data)
Rhyme 0:cfdb96085fb7 118 {
Rhyme 0:cfdb96085fb7 119 uint8_t raw_data[8] ;
Rhyme 0:cfdb96085fb7 120 readRegs(REG_R_DATA, raw_data, 8) ;
Rhyme 0:cfdb96085fb7 121 data[0] = (raw_data[0] << 8) | raw_data[1] ;
Rhyme 0:cfdb96085fb7 122 data[1] = (raw_data[2] << 8) | raw_data[3] ;
Rhyme 0:cfdb96085fb7 123 data[2] = (raw_data[4] << 8) | raw_data[5] ;
Rhyme 0:cfdb96085fb7 124 data[3] = (raw_data[6] << 8) | raw_data[7] ;
Rhyme 0:cfdb96085fb7 125 }
Rhyme 0:cfdb96085fb7 126
Rhyme 0:cfdb96085fb7 127 uint8_t S11059::getControl(void)
Rhyme 0:cfdb96085fb7 128 {
Rhyme 0:cfdb96085fb7 129 uint8_t data[1] ;
Rhyme 0:cfdb96085fb7 130 readRegs(REG_CONTROL, data, 1) ;
Rhyme 0:cfdb96085fb7 131 return(data[0]) ;
Rhyme 0:cfdb96085fb7 132 }
Rhyme 0:cfdb96085fb7 133
Rhyme 0:cfdb96085fb7 134 void S11059::setControl(uint8_t ctrlValue)
Rhyme 0:cfdb96085fb7 135 {
Rhyme 0:cfdb96085fb7 136 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 137 data[0] = REG_CONTROL ;
Rhyme 0:cfdb96085fb7 138 data[1] = ctrlValue ;
Rhyme 0:cfdb96085fb7 139 writeRegs(data, 2) ;
Rhyme 0:cfdb96085fb7 140 }
Rhyme 0:cfdb96085fb7 141
Rhyme 0:cfdb96085fb7 142 uint16_t S11059::getTiming(void)
Rhyme 0:cfdb96085fb7 143 {
Rhyme 0:cfdb96085fb7 144 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 145 uint16_t timing ;
Rhyme 0:cfdb96085fb7 146 readRegs(REG_TIMING_DATA, data, 2) ;
Rhyme 0:cfdb96085fb7 147 timing = (data[0] << 8) | data[1] ;
Rhyme 0:cfdb96085fb7 148 return(timing) ;
Rhyme 0:cfdb96085fb7 149 }
Rhyme 0:cfdb96085fb7 150
Rhyme 0:cfdb96085fb7 151 void S11059::setTiming(uint16_t timingValue)
Rhyme 0:cfdb96085fb7 152 {
Rhyme 0:cfdb96085fb7 153 uint8_t data[3] ;
Rhyme 0:cfdb96085fb7 154 data[0] = REG_TIMING_DATA ;
Rhyme 0:cfdb96085fb7 155 data[1] = (timingValue >> 8) & 0xFF ;
Rhyme 0:cfdb96085fb7 156 data[2] = timingValue & 0xFF ;
Rhyme 0:cfdb96085fb7 157 writeRegs(data, 3) ;
Rhyme 0:cfdb96085fb7 158 }
Rhyme 0:cfdb96085fb7 159
Rhyme 0:cfdb96085fb7 160 void S11059::setADCReset(int mode)
Rhyme 0:cfdb96085fb7 161 {
Rhyme 0:cfdb96085fb7 162 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 163 data[0] = REG_CONTROL ;
Rhyme 0:cfdb96085fb7 164 readRegs(data[0], &data[1], 1) ;
Rhyme 0:cfdb96085fb7 165 if (mode == 0) {
Rhyme 0:cfdb96085fb7 166 data[1] ^= BIT_ADC_RESET ;
Rhyme 0:cfdb96085fb7 167 } else {
Rhyme 0:cfdb96085fb7 168 data[1] |= BIT_ADC_RESET ; /* 0x80 */
Rhyme 0:cfdb96085fb7 169 }
Rhyme 0:cfdb96085fb7 170 writeRegs(data, 2) ;
Rhyme 0:cfdb96085fb7 171 }
Rhyme 0:cfdb96085fb7 172
Rhyme 0:cfdb96085fb7 173 int S11059::getADCReset(void)
Rhyme 0:cfdb96085fb7 174 {
Rhyme 0:cfdb96085fb7 175 uint8_t data[1] ;
Rhyme 0:cfdb96085fb7 176 int result = 0 ;
Rhyme 0:cfdb96085fb7 177 readRegs(REG_CONTROL, data, 1) ;
Rhyme 0:cfdb96085fb7 178 if (data[0] & BIT_ADC_RESET) {
Rhyme 0:cfdb96085fb7 179 result = 1 ;
Rhyme 0:cfdb96085fb7 180 }
Rhyme 0:cfdb96085fb7 181 return(result) ;
Rhyme 0:cfdb96085fb7 182 }
Rhyme 0:cfdb96085fb7 183
Rhyme 0:cfdb96085fb7 184 void S11059::setSleepMode(int mode)
Rhyme 0:cfdb96085fb7 185 {
Rhyme 0:cfdb96085fb7 186 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 187 data[0] = REG_CONTROL ;
Rhyme 0:cfdb96085fb7 188 readRegs(data[0], &data[1], 1) ;
Rhyme 0:cfdb96085fb7 189 if (mode == 0) {
Rhyme 0:cfdb96085fb7 190 data[1] ^= BIT_SLEEP_MODE ;
Rhyme 0:cfdb96085fb7 191 } else {
Rhyme 0:cfdb96085fb7 192 data[1] |= BIT_SLEEP_MODE ;
Rhyme 0:cfdb96085fb7 193 }
Rhyme 0:cfdb96085fb7 194 writeRegs(data, 2) ;
Rhyme 0:cfdb96085fb7 195 }
Rhyme 0:cfdb96085fb7 196
Rhyme 0:cfdb96085fb7 197 int S11059::getSleepMode(void)
Rhyme 0:cfdb96085fb7 198 {
Rhyme 0:cfdb96085fb7 199 uint8_t data[1] ;
Rhyme 0:cfdb96085fb7 200 int result = 0 ;
Rhyme 0:cfdb96085fb7 201 readRegs(REG_CONTROL, data, 1) ;
Rhyme 0:cfdb96085fb7 202 if (data[0] & BIT_SLEEP_MODE) {
Rhyme 0:cfdb96085fb7 203 result = 1 ;
Rhyme 0:cfdb96085fb7 204 }
Rhyme 0:cfdb96085fb7 205 return(result) ;
Rhyme 0:cfdb96085fb7 206 }
Rhyme 0:cfdb96085fb7 207
Rhyme 0:cfdb96085fb7 208 void S11059::setGain(int mode)
Rhyme 0:cfdb96085fb7 209 {
Rhyme 0:cfdb96085fb7 210 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 211 data[0] = REG_CONTROL ;
Rhyme 0:cfdb96085fb7 212 readRegs(data[0], &data[1], 1) ;
Rhyme 0:cfdb96085fb7 213 if (mode == 0) {
Rhyme 0:cfdb96085fb7 214 data[1] ^= BIT_HIGH_GAIN ;
Rhyme 0:cfdb96085fb7 215 } else {
Rhyme 0:cfdb96085fb7 216 data[1] |= BIT_HIGH_GAIN ;
Rhyme 0:cfdb96085fb7 217 }
Rhyme 0:cfdb96085fb7 218 }
Rhyme 0:cfdb96085fb7 219
Rhyme 0:cfdb96085fb7 220 int S11059::getGain(void)
Rhyme 0:cfdb96085fb7 221 {
Rhyme 0:cfdb96085fb7 222 uint8_t data[1] ;
Rhyme 0:cfdb96085fb7 223 int result = 0 ;
Rhyme 0:cfdb96085fb7 224 readRegs(REG_CONTROL, data, 1) ;
Rhyme 0:cfdb96085fb7 225 if (data[0] & BIT_HIGH_GAIN) {
Rhyme 0:cfdb96085fb7 226 result = 1 ;
Rhyme 0:cfdb96085fb7 227 }
Rhyme 0:cfdb96085fb7 228 return(result) ;
Rhyme 0:cfdb96085fb7 229 }
Rhyme 0:cfdb96085fb7 230
Rhyme 0:cfdb96085fb7 231 void S11059::setIntegralMode(int mode)
Rhyme 0:cfdb96085fb7 232 {
Rhyme 0:cfdb96085fb7 233 uint8_t data[2] ;
Rhyme 0:cfdb96085fb7 234 data[0] = REG_CONTROL ;
Rhyme 0:cfdb96085fb7 235 readRegs(data[0], &data[1], 1) ;
Rhyme 0:cfdb96085fb7 236 if (mode == 0) {
Rhyme 0:cfdb96085fb7 237 data[1] ^= BIT_INT_MANUAL ;
Rhyme 0:cfdb96085fb7 238 } else {
Rhyme 0:cfdb96085fb7 239 data[1] |= BIT_INT_MANUAL ;
Rhyme 0:cfdb96085fb7 240 }
Rhyme 0:cfdb96085fb7 241 }
Rhyme 0:cfdb96085fb7 242
Rhyme 0:cfdb96085fb7 243 int S11059::getIntegralMode(void)
Rhyme 0:cfdb96085fb7 244 {
Rhyme 0:cfdb96085fb7 245 uint8_t data[1] ;
Rhyme 0:cfdb96085fb7 246 int result = 0 ;
Rhyme 0:cfdb96085fb7 247 readRegs(REG_CONTROL, data, 1) ;
Rhyme 0:cfdb96085fb7 248 if (data[0] & BIT_INT_MANUAL) {
Rhyme 0:cfdb96085fb7 249 result = 1 ;
Rhyme 0:cfdb96085fb7 250 }
Rhyme 0:cfdb96085fb7 251 return(result) ;
Rhyme 0:cfdb96085fb7 252 }
Rhyme 0:cfdb96085fb7 253
Rhyme 0:cfdb96085fb7 254 void S11059::readRegs(int addr, uint8_t * data, int len) {
Rhyme 0:cfdb96085fb7 255 char t[1] = {addr};
Rhyme 0:cfdb96085fb7 256 m_i2c.write(m_addr, t, 1, true);
Rhyme 0:cfdb96085fb7 257 m_i2c.read(m_addr, (char *)data, len);
Rhyme 0:cfdb96085fb7 258 }
Rhyme 0:cfdb96085fb7 259
Rhyme 0:cfdb96085fb7 260 void S11059::writeRegs(uint8_t * data, int len) {
Rhyme 0:cfdb96085fb7 261 m_i2c.write(m_addr, (char *)data, len);
Rhyme 0:cfdb96085fb7 262 }
Rhyme 0:cfdb96085fb7 263