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PokittoLib

Library for programming Pokitto hardware

How to Use

  1. Import this library to online compiler (see button "import" on the right hand side
  2. DO NOT import mbed-src anymore, a better version is now included inside PokittoLib
  3. Change My_settings.h according to your project
  4. Start coding!

mbed-pokitto/targets/cmsis/core_cmInstr.h@63:7d1c08cdde5c, 2018-10-23 (annotated)

Committer:
Pokitto
Date:
Tue Oct 23 16:21:01 2018 +0000
Revision:
63:7d1c08cdde5c
Parent:
5:ea7377f3d1af 
Graphics bug fixed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pokitto 5:ea7377f3d1af 1 /**************************************************************************//**
Pokitto 5:ea7377f3d1af 2 * @file core_cmInstr.h
Pokitto 5:ea7377f3d1af 3 * @brief CMSIS Cortex-M Core Instruction Access Header File
Pokitto 5:ea7377f3d1af 4 * @version V3.20
Pokitto 5:ea7377f3d1af 5 * @date 05. March 2013
Pokitto 5:ea7377f3d1af 6 *
Pokitto 5:ea7377f3d1af 7 * @note
Pokitto 5:ea7377f3d1af 8 *
Pokitto 5:ea7377f3d1af 9 ******************************************************************************/
Pokitto 5:ea7377f3d1af 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
Pokitto 5:ea7377f3d1af 11
Pokitto 5:ea7377f3d1af 12 All rights reserved.
Pokitto 5:ea7377f3d1af 13 Redistribution and use in source and binary forms, with or without
Pokitto 5:ea7377f3d1af 14 modification, are permitted provided that the following conditions are met:
Pokitto 5:ea7377f3d1af 15 - Redistributions of source code must retain the above copyright
Pokitto 5:ea7377f3d1af 16 notice, this list of conditions and the following disclaimer.
Pokitto 5:ea7377f3d1af 17 - Redistributions in binary form must reproduce the above copyright
Pokitto 5:ea7377f3d1af 18 notice, this list of conditions and the following disclaimer in the
Pokitto 5:ea7377f3d1af 19 documentation and/or other materials provided with the distribution.
Pokitto 5:ea7377f3d1af 20 - Neither the name of ARM nor the names of its contributors may be used
Pokitto 5:ea7377f3d1af 21 to endorse or promote products derived from this software without
Pokitto 5:ea7377f3d1af 22 specific prior written permission.
Pokitto 5:ea7377f3d1af 23 *
Pokitto 5:ea7377f3d1af 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Pokitto 5:ea7377f3d1af 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Pokitto 5:ea7377f3d1af 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
Pokitto 5:ea7377f3d1af 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
Pokitto 5:ea7377f3d1af 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Pokitto 5:ea7377f3d1af 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
Pokitto 5:ea7377f3d1af 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
Pokitto 5:ea7377f3d1af 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
Pokitto 5:ea7377f3d1af 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
Pokitto 5:ea7377f3d1af 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
Pokitto 5:ea7377f3d1af 34 POSSIBILITY OF SUCH DAMAGE.
Pokitto 5:ea7377f3d1af 35 ---------------------------------------------------------------------------*/
Pokitto 5:ea7377f3d1af 36
Pokitto 5:ea7377f3d1af 37
Pokitto 5:ea7377f3d1af 38 #ifndef __CORE_CMINSTR_H
Pokitto 5:ea7377f3d1af 39 #define __CORE_CMINSTR_H
Pokitto 5:ea7377f3d1af 40
Pokitto 5:ea7377f3d1af 41
Pokitto 5:ea7377f3d1af 42 /* ########################## Core Instruction Access ######################### */
Pokitto 5:ea7377f3d1af 43 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
Pokitto 5:ea7377f3d1af 44 Access to dedicated instructions
Pokitto 5:ea7377f3d1af 45 @{
Pokitto 5:ea7377f3d1af 46 */
Pokitto 5:ea7377f3d1af 47
Pokitto 5:ea7377f3d1af 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
Pokitto 5:ea7377f3d1af 49 /* ARM armcc specific functions */
Pokitto 5:ea7377f3d1af 50
Pokitto 5:ea7377f3d1af 51 #if (__ARMCC_VERSION < 400677)
Pokitto 5:ea7377f3d1af 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
Pokitto 5:ea7377f3d1af 53 #endif
Pokitto 5:ea7377f3d1af 54
Pokitto 5:ea7377f3d1af 55
Pokitto 5:ea7377f3d1af 56 /** \brief No Operation
Pokitto 5:ea7377f3d1af 57
Pokitto 5:ea7377f3d1af 58 No Operation does nothing. This instruction can be used for code alignment purposes.
Pokitto 5:ea7377f3d1af 59 */
Pokitto 5:ea7377f3d1af 60 #define __NOP __nop
Pokitto 5:ea7377f3d1af 61
Pokitto 5:ea7377f3d1af 62
Pokitto 5:ea7377f3d1af 63 /** \brief Wait For Interrupt
Pokitto 5:ea7377f3d1af 64
Pokitto 5:ea7377f3d1af 65 Wait For Interrupt is a hint instruction that suspends execution
Pokitto 5:ea7377f3d1af 66 until one of a number of events occurs.
Pokitto 5:ea7377f3d1af 67 */
Pokitto 5:ea7377f3d1af 68 #define __WFI __wfi
Pokitto 5:ea7377f3d1af 69
Pokitto 5:ea7377f3d1af 70
Pokitto 5:ea7377f3d1af 71 /** \brief Wait For Event
Pokitto 5:ea7377f3d1af 72
Pokitto 5:ea7377f3d1af 73 Wait For Event is a hint instruction that permits the processor to enter
Pokitto 5:ea7377f3d1af 74 a low-power state until one of a number of events occurs.
Pokitto 5:ea7377f3d1af 75 */
Pokitto 5:ea7377f3d1af 76 #define __WFE __wfe
Pokitto 5:ea7377f3d1af 77
Pokitto 5:ea7377f3d1af 78
Pokitto 5:ea7377f3d1af 79 /** \brief Send Event
Pokitto 5:ea7377f3d1af 80
Pokitto 5:ea7377f3d1af 81 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Pokitto 5:ea7377f3d1af 82 */
Pokitto 5:ea7377f3d1af 83 #define __SEV __sev
Pokitto 5:ea7377f3d1af 84
Pokitto 5:ea7377f3d1af 85
Pokitto 5:ea7377f3d1af 86 /** \brief Instruction Synchronization Barrier
Pokitto 5:ea7377f3d1af 87
Pokitto 5:ea7377f3d1af 88 Instruction Synchronization Barrier flushes the pipeline in the processor,
Pokitto 5:ea7377f3d1af 89 so that all instructions following the ISB are fetched from cache or
Pokitto 5:ea7377f3d1af 90 memory, after the instruction has been completed.
Pokitto 5:ea7377f3d1af 91 */
Pokitto 5:ea7377f3d1af 92 #define __ISB() __isb(0xF)
Pokitto 5:ea7377f3d1af 93
Pokitto 5:ea7377f3d1af 94
Pokitto 5:ea7377f3d1af 95 /** \brief Data Synchronization Barrier
Pokitto 5:ea7377f3d1af 96
Pokitto 5:ea7377f3d1af 97 This function acts as a special kind of Data Memory Barrier.
Pokitto 5:ea7377f3d1af 98 It completes when all explicit memory accesses before this instruction complete.
Pokitto 5:ea7377f3d1af 99 */
Pokitto 5:ea7377f3d1af 100 #define __DSB() __dsb(0xF)
Pokitto 5:ea7377f3d1af 101
Pokitto 5:ea7377f3d1af 102
Pokitto 5:ea7377f3d1af 103 /** \brief Data Memory Barrier
Pokitto 5:ea7377f3d1af 104
Pokitto 5:ea7377f3d1af 105 This function ensures the apparent order of the explicit memory operations before
Pokitto 5:ea7377f3d1af 106 and after the instruction, without ensuring their completion.
Pokitto 5:ea7377f3d1af 107 */
Pokitto 5:ea7377f3d1af 108 #define __DMB() __dmb(0xF)
Pokitto 5:ea7377f3d1af 109
Pokitto 5:ea7377f3d1af 110
Pokitto 5:ea7377f3d1af 111 /** \brief Reverse byte order (32 bit)
Pokitto 5:ea7377f3d1af 112
Pokitto 5:ea7377f3d1af 113 This function reverses the byte order in integer value.
Pokitto 5:ea7377f3d1af 114
Pokitto 5:ea7377f3d1af 115 \param [in] value Value to reverse
Pokitto 5:ea7377f3d1af 116 \return Reversed value
Pokitto 5:ea7377f3d1af 117 */
Pokitto 5:ea7377f3d1af 118 #define __REV __rev
Pokitto 5:ea7377f3d1af 119
Pokitto 5:ea7377f3d1af 120
Pokitto 5:ea7377f3d1af 121 /** \brief Reverse byte order (16 bit)
Pokitto 5:ea7377f3d1af 122
Pokitto 5:ea7377f3d1af 123 This function reverses the byte order in two unsigned short values.
Pokitto 5:ea7377f3d1af 124
Pokitto 5:ea7377f3d1af 125 \param [in] value Value to reverse
Pokitto 5:ea7377f3d1af 126 \return Reversed value
Pokitto 5:ea7377f3d1af 127 */
Pokitto 5:ea7377f3d1af 128 #ifndef __NO_EMBEDDED_ASM
Pokitto 5:ea7377f3d1af 129 __attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
Pokitto 5:ea7377f3d1af 130 {
Pokitto 5:ea7377f3d1af 131 rev16 r0, r0
Pokitto 5:ea7377f3d1af 132 bx lr
Pokitto 5:ea7377f3d1af 133 }
Pokitto 5:ea7377f3d1af 134 #endif
Pokitto 5:ea7377f3d1af 135
Pokitto 5:ea7377f3d1af 136 /** \brief Reverse byte order in signed short value
Pokitto 5:ea7377f3d1af 137
Pokitto 5:ea7377f3d1af 138 This function reverses the byte order in a signed short value with sign extension to integer.
Pokitto 5:ea7377f3d1af 139
Pokitto 5:ea7377f3d1af 140 \param [in] value Value to reverse
Pokitto 5:ea7377f3d1af 141 \return Reversed value
Pokitto 5:ea7377f3d1af 142 */
Pokitto 5:ea7377f3d1af 143 #ifndef __NO_EMBEDDED_ASM
Pokitto 5:ea7377f3d1af 144 __attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
Pokitto 5:ea7377f3d1af 145 {
Pokitto 5:ea7377f3d1af 146 revsh r0, r0
Pokitto 5:ea7377f3d1af 147 bx lr
Pokitto 5:ea7377f3d1af 148 }
Pokitto 5:ea7377f3d1af 149 #endif
Pokitto 5:ea7377f3d1af 150
Pokitto 5:ea7377f3d1af 151
Pokitto 5:ea7377f3d1af 152 /** \brief Rotate Right in unsigned value (32 bit)
Pokitto 5:ea7377f3d1af 153
Pokitto 5:ea7377f3d1af 154 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Pokitto 5:ea7377f3d1af 155
Pokitto 5:ea7377f3d1af 156 \param [in] value Value to rotate
Pokitto 5:ea7377f3d1af 157 \param [in] value Number of Bits to rotate
Pokitto 5:ea7377f3d1af 158 \return Rotated value
Pokitto 5:ea7377f3d1af 159 */
Pokitto 5:ea7377f3d1af 160 #define __ROR __ror
Pokitto 5:ea7377f3d1af 161
Pokitto 5:ea7377f3d1af 162
Pokitto 5:ea7377f3d1af 163 /** \brief Breakpoint
Pokitto 5:ea7377f3d1af 164
Pokitto 5:ea7377f3d1af 165 This function causes the processor to enter Debug state.
Pokitto 5:ea7377f3d1af 166 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Pokitto 5:ea7377f3d1af 167
Pokitto 5:ea7377f3d1af 168 \param [in] value is ignored by the processor.
Pokitto 5:ea7377f3d1af 169 If required, a debugger can use it to store additional information about the breakpoint.
Pokitto 5:ea7377f3d1af 170 */
Pokitto 5:ea7377f3d1af 171 #define __BKPT(value) __breakpoint(value)
Pokitto 5:ea7377f3d1af 172
Pokitto 5:ea7377f3d1af 173
Pokitto 5:ea7377f3d1af 174 #if (__CORTEX_M >= 0x03)
Pokitto 5:ea7377f3d1af 175
Pokitto 5:ea7377f3d1af 176 /** \brief Reverse bit order of value
Pokitto 5:ea7377f3d1af 177
Pokitto 5:ea7377f3d1af 178 This function reverses the bit order of the given value.
Pokitto 5:ea7377f3d1af 179
Pokitto 5:ea7377f3d1af 180 \param [in] value Value to reverse
Pokitto 5:ea7377f3d1af 181 \return Reversed value
Pokitto 5:ea7377f3d1af 182 */
Pokitto 5:ea7377f3d1af 183 #define __RBIT __rbit
Pokitto 5:ea7377f3d1af 184
Pokitto 5:ea7377f3d1af 185
Pokitto 5:ea7377f3d1af 186 /** \brief LDR Exclusive (8 bit)
Pokitto 5:ea7377f3d1af 187
Pokitto 5:ea7377f3d1af 188 This function performs a exclusive LDR command for 8 bit value.
Pokitto 5:ea7377f3d1af 189
Pokitto 5:ea7377f3d1af 190 \param [in] ptr Pointer to data
Pokitto 5:ea7377f3d1af 191 \return value of type uint8_t at (*ptr)
Pokitto 5:ea7377f3d1af 192 */
Pokitto 5:ea7377f3d1af 193 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
Pokitto 5:ea7377f3d1af 194
Pokitto 5:ea7377f3d1af 195
Pokitto 5:ea7377f3d1af 196 /** \brief LDR Exclusive (16 bit)
Pokitto 5:ea7377f3d1af 197
Pokitto 5:ea7377f3d1af 198 This function performs a exclusive LDR command for 16 bit values.
Pokitto 5:ea7377f3d1af 199
Pokitto 5:ea7377f3d1af 200 \param [in] ptr Pointer to data
Pokitto 5:ea7377f3d1af 201 \return value of type uint16_t at (*ptr)
Pokitto 5:ea7377f3d1af 202 */
Pokitto 5:ea7377f3d1af 203 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
Pokitto 5:ea7377f3d1af 204
Pokitto 5:ea7377f3d1af 205
Pokitto 5:ea7377f3d1af 206 /** \brief LDR Exclusive (32 bit)
Pokitto 5:ea7377f3d1af 207
Pokitto 5:ea7377f3d1af 208 This function performs a exclusive LDR command for 32 bit values.
Pokitto 5:ea7377f3d1af 209
Pokitto 5:ea7377f3d1af 210 \param [in] ptr Pointer to data
Pokitto 5:ea7377f3d1af 211 \return value of type uint32_t at (*ptr)
Pokitto 5:ea7377f3d1af 212 */
Pokitto 5:ea7377f3d1af 213 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
Pokitto 5:ea7377f3d1af 214
Pokitto 5:ea7377f3d1af 215
Pokitto 5:ea7377f3d1af 216 /** \brief STR Exclusive (8 bit)
Pokitto 5:ea7377f3d1af 217
Pokitto 5:ea7377f3d1af 218 This function performs a exclusive STR command for 8 bit values.
Pokitto 5:ea7377f3d1af 219
Pokitto 5:ea7377f3d1af 220 \param [in] value Value to store
Pokitto 5:ea7377f3d1af 221 \param [in] ptr Pointer to location
Pokitto 5:ea7377f3d1af 222 \return 0 Function succeeded
Pokitto 5:ea7377f3d1af 223 \return 1 Function failed
Pokitto 5:ea7377f3d1af 224 */
Pokitto 5:ea7377f3d1af 225 #define __STREXB(value, ptr) __strex(value, ptr)
Pokitto 5:ea7377f3d1af 226
Pokitto 5:ea7377f3d1af 227
Pokitto 5:ea7377f3d1af 228 /** \brief STR Exclusive (16 bit)
Pokitto 5:ea7377f3d1af 229
Pokitto 5:ea7377f3d1af 230 This function performs a exclusive STR command for 16 bit values.
Pokitto 5:ea7377f3d1af 231
Pokitto 5:ea7377f3d1af 232 \param [in] value Value to store
Pokitto 5:ea7377f3d1af 233 \param [in] ptr Pointer to location
Pokitto 5:ea7377f3d1af 234 \return 0 Function succeeded
Pokitto 5:ea7377f3d1af 235 \return 1 Function failed
Pokitto 5:ea7377f3d1af 236 */
Pokitto 5:ea7377f3d1af 237 #define __STREXH(value, ptr) __strex(value, ptr)
Pokitto 5:ea7377f3d1af 238
Pokitto 5:ea7377f3d1af 239
Pokitto 5:ea7377f3d1af 240 /** \brief STR Exclusive (32 bit)
Pokitto 5:ea7377f3d1af 241
Pokitto 5:ea7377f3d1af 242 This function performs a exclusive STR command for 32 bit values.
Pokitto 5:ea7377f3d1af 243
Pokitto 5:ea7377f3d1af 244 \param [in] value Value to store
Pokitto 5:ea7377f3d1af 245 \param [in] ptr Pointer to location
Pokitto 5:ea7377f3d1af 246 \return 0 Function succeeded
Pokitto 5:ea7377f3d1af 247 \return 1 Function failed
Pokitto 5:ea7377f3d1af 248 */
Pokitto 5:ea7377f3d1af 249 #define __STREXW(value, ptr) __strex(value, ptr)
Pokitto 5:ea7377f3d1af 250
Pokitto 5:ea7377f3d1af 251
Pokitto 5:ea7377f3d1af 252 /** \brief Remove the exclusive lock
Pokitto 5:ea7377f3d1af 253
Pokitto 5:ea7377f3d1af 254 This function removes the exclusive lock which is created by LDREX.
Pokitto 5:ea7377f3d1af 255
Pokitto 5:ea7377f3d1af 256 */
Pokitto 5:ea7377f3d1af 257 #define __CLREX __clrex
Pokitto 5:ea7377f3d1af 258
Pokitto 5:ea7377f3d1af 259
Pokitto 5:ea7377f3d1af 260 /** \brief Signed Saturate
Pokitto 5:ea7377f3d1af 261
Pokitto 5:ea7377f3d1af 262 This function saturates a signed value.
Pokitto 5:ea7377f3d1af 263
Pokitto 5:ea7377f3d1af 264 \param [in] value Value to be saturated
Pokitto 5:ea7377f3d1af 265 \param [in] sat Bit position to saturate to (1..32)
Pokitto 5:ea7377f3d1af 266 \return Saturated value
Pokitto 5:ea7377f3d1af 267 */
Pokitto 5:ea7377f3d1af 268 #define __SSAT __ssat
Pokitto 5:ea7377f3d1af 269
Pokitto 5:ea7377f3d1af 270
Pokitto 5:ea7377f3d1af 271 /** \brief Unsigned Saturate
Pokitto 5:ea7377f3d1af 272
Pokitto 5:ea7377f3d1af 273 This function saturates an unsigned value.
Pokitto 5:ea7377f3d1af 274
Pokitto 5:ea7377f3d1af 275 \param [in] value Value to be saturated
Pokitto 5:ea7377f3d1af 276 \param [in] sat Bit position to saturate to (0..31)
Pokitto 5:ea7377f3d1af 277 \return Saturated value
Pokitto 5:ea7377f3d1af 278 */
Pokitto 5:ea7377f3d1af 279 #define __USAT __usat
Pokitto 5:ea7377f3d1af 280
Pokitto 5:ea7377f3d1af 281
Pokitto 5:ea7377f3d1af 282 /** \brief Count leading zeros
Pokitto 5:ea7377f3d1af 283
Pokitto 5:ea7377f3d1af 284 This function counts the number of leading zeros of a data value.
Pokitto 5:ea7377f3d1af 285
Pokitto 5:ea7377f3d1af 286 \param [in] value Value to count the leading zeros
Pokitto 5:ea7377f3d1af 287 \return number of leading zeros in value
Pokitto 5:ea7377f3d1af 288 */
Pokitto 5:ea7377f3d1af 289 #define __CLZ __clz
Pokitto 5:ea7377f3d1af 290
Pokitto 5:ea7377f3d1af 291 #endif /* (__CORTEX_M >= 0x03) */
Pokitto 5:ea7377f3d1af 292
Pokitto 5:ea7377f3d1af 293
Pokitto 5:ea7377f3d1af 294
Pokitto 5:ea7377f3d1af 295 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
Pokitto 5:ea7377f3d1af 296 /* IAR iccarm specific functions */
Pokitto 5:ea7377f3d1af 297
Pokitto 5:ea7377f3d1af 298 #include <cmsis_iar.h>
Pokitto 5:ea7377f3d1af 299
Pokitto 5:ea7377f3d1af 300
Pokitto 5:ea7377f3d1af 301 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
Pokitto 5:ea7377f3d1af 302 /* TI CCS specific functions */
Pokitto 5:ea7377f3d1af 303
Pokitto 5:ea7377f3d1af 304 #include <cmsis_ccs.h>
Pokitto 5:ea7377f3d1af 305
Pokitto 5:ea7377f3d1af 306
Pokitto 5:ea7377f3d1af 307 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
Pokitto 5:ea7377f3d1af 308 /* GNU gcc specific functions */
Pokitto 5:ea7377f3d1af 309
Pokitto 5:ea7377f3d1af 310 /* Define macros for porting to both thumb1 and thumb2.
Pokitto 5:ea7377f3d1af 311 * For thumb1, use low register (r0-r7), specified by constrant "l"
Pokitto 5:ea7377f3d1af 312 * Otherwise, use general registers, specified by constrant "r" */
Pokitto 5:ea7377f3d1af 313 #if defined (__thumb__) && !defined (__thumb2__)
Pokitto 5:ea7377f3d1af 314 #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
Pokitto 5:ea7377f3d1af 315 #define __CMSIS_GCC_USE_REG(r) "l" (r)
Pokitto 5:ea7377f3d1af 316 #else
Pokitto 5:ea7377f3d1af 317 #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
Pokitto 5:ea7377f3d1af 318 #define __CMSIS_GCC_USE_REG(r) "r" (r)
Pokitto 5:ea7377f3d1af 319 #endif
Pokitto 5:ea7377f3d1af 320
Pokitto 5:ea7377f3d1af 321 /** \brief No Operation
Pokitto 5:ea7377f3d1af 322
Pokitto 5:ea7377f3d1af 323 No Operation does nothing. This instruction can be used for code alignment purposes.
Pokitto 5:ea7377f3d1af 324 */
Pokitto 5:ea7377f3d1af 325 __attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
Pokitto 5:ea7377f3d1af 326 {
Pokitto 5:ea7377f3d1af 327 __ASM volatile ("nop");
Pokitto 5:ea7377f3d1af 328 }
Pokitto 5:ea7377f3d1af 329
Pokitto 5:ea7377f3d1af 330
Pokitto 5:ea7377f3d1af 331 /** \brief Wait For Interrupt
Pokitto 5:ea7377f3d1af 332
Pokitto 5:ea7377f3d1af 333 Wait For Interrupt is a hint instruction that suspends execution
Pokitto 5:ea7377f3d1af 334 until one of a number of events occurs.
Pokitto 5:ea7377f3d1af 335 */
Pokitto 5:ea7377f3d1af 336 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
Pokitto 5:ea7377f3d1af 337 {
Pokitto 5:ea7377f3d1af 338 __ASM volatile ("wfi");
Pokitto 5:ea7377f3d1af 339 }
Pokitto 5:ea7377f3d1af 340
Pokitto 5:ea7377f3d1af 341
Pokitto 5:ea7377f3d1af 342 /** \brief Wait For Event
Pokitto 5:ea7377f3d1af 343
Pokitto 5:ea7377f3d1af 344 Wait For Event is a hint instruction that permits the processor to enter
Pokitto 5:ea7377f3d1af 345 a low-power state until one of a number of events occurs.
Pokitto 5:ea7377f3d1af 346 */
Pokitto 5:ea7377f3d1af 347 __attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
Pokitto 5:ea7377f3d1af 348 {
Pokitto 5:ea7377f3d1af 349 __ASM volatile ("wfe");
Pokitto 5:ea7377f3d1af 350 }
Pokitto 5:ea7377f3d1af 351
Pokitto 5:ea7377f3d1af 352
Pokitto 5:ea7377f3d1af 353 /** \brief Send Event
Pokitto 5:ea7377f3d1af 354
Pokitto 5:ea7377f3d1af 355 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
Pokitto 5:ea7377f3d1af 356 */
Pokitto 5:ea7377f3d1af 357 __attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
Pokitto 5:ea7377f3d1af 358 {
Pokitto 5:ea7377f3d1af 359 __ASM volatile ("sev");
Pokitto 5:ea7377f3d1af 360 }
Pokitto 5:ea7377f3d1af 361
Pokitto 5:ea7377f3d1af 362
Pokitto 5:ea7377f3d1af 363 /** \brief Instruction Synchronization Barrier
Pokitto 5:ea7377f3d1af 364
Pokitto 5:ea7377f3d1af 365 Instruction Synchronization Barrier flushes the pipeline in the processor,
Pokitto 5:ea7377f3d1af 366 so that all instructions following the ISB are fetched from cache or
Pokitto 5:ea7377f3d1af 367 memory, after the instruction has been completed.
Pokitto 5:ea7377f3d1af 368 */
Pokitto 5:ea7377f3d1af 369 __attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
Pokitto 5:ea7377f3d1af 370 {
Pokitto 5:ea7377f3d1af 371 __ASM volatile ("isb");
Pokitto 5:ea7377f3d1af 372 }
Pokitto 5:ea7377f3d1af 373
Pokitto 5:ea7377f3d1af 374
Pokitto 5:ea7377f3d1af 375 /** \brief Data Synchronization Barrier
Pokitto 5:ea7377f3d1af 376
Pokitto 5:ea7377f3d1af 377 This function acts as a special kind of Data Memory Barrier.
Pokitto 5:ea7377f3d1af 378 It completes when all explicit memory accesses before this instruction complete.
Pokitto 5:ea7377f3d1af 379 */
Pokitto 5:ea7377f3d1af 380 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
Pokitto 5:ea7377f3d1af 381 {
Pokitto 5:ea7377f3d1af 382 __ASM volatile ("dsb");
Pokitto 5:ea7377f3d1af 383 }
Pokitto 5:ea7377f3d1af 384
Pokitto 5:ea7377f3d1af 385
Pokitto 5:ea7377f3d1af 386 /** \brief Data Memory Barrier
Pokitto 5:ea7377f3d1af 387
Pokitto 5:ea7377f3d1af 388 This function ensures the apparent order of the explicit memory operations before
Pokitto 5:ea7377f3d1af 389 and after the instruction, without ensuring their completion.
Pokitto 5:ea7377f3d1af 390 */
Pokitto 5:ea7377f3d1af 391 __attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
Pokitto 5:ea7377f3d1af 392 {
Pokitto 5:ea7377f3d1af 393 __ASM volatile ("dmb");
Pokitto 5:ea7377f3d1af 394 }
Pokitto 5:ea7377f3d1af 395
Pokitto 5:ea7377f3d1af 396
Pokitto 5:ea7377f3d1af 397 /** \brief Reverse byte order (32 bit)
Pokitto 5:ea7377f3d1af 398
Pokitto 5:ea7377f3d1af 399 This function reverses the byte order in integer value.
Pokitto 5:ea7377f3d1af 400
Pokitto 5:ea7377f3d1af 401 \param [in] value Value to reverse
Pokitto 5:ea7377f3d1af 402 \return Reversed value
Pokitto 5:ea7377f3d1af 403 */
Pokitto 5:ea7377f3d1af 404 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
Pokitto 5:ea7377f3d1af 405 {
Pokitto 5:ea7377f3d1af 406 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
Pokitto 5:ea7377f3d1af 407 return __builtin_bswap32(value);
Pokitto 5:ea7377f3d1af 408 #else
Pokitto 5:ea7377f3d1af 409 uint32_t result;
Pokitto 5:ea7377f3d1af 410
Pokitto 5:ea7377f3d1af 411 __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Pokitto 5:ea7377f3d1af 412 return(result);
Pokitto 5:ea7377f3d1af 413 #endif
Pokitto 5:ea7377f3d1af 414 }
Pokitto 5:ea7377f3d1af 415
Pokitto 5:ea7377f3d1af 416
Pokitto 5:ea7377f3d1af 417 /** \brief Reverse byte order (16 bit)
Pokitto 5:ea7377f3d1af 418
Pokitto 5:ea7377f3d1af 419 This function reverses the byte order in two unsigned short values.
Pokitto 5:ea7377f3d1af 420
Pokitto 5:ea7377f3d1af 421 \param [in] value Value to reverse
Pokitto 5:ea7377f3d1af 422 \return Reversed value
Pokitto 5:ea7377f3d1af 423 */
Pokitto 5:ea7377f3d1af 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
Pokitto 5:ea7377f3d1af 425 {
Pokitto 5:ea7377f3d1af 426 uint32_t result;
Pokitto 5:ea7377f3d1af 427
Pokitto 5:ea7377f3d1af 428 __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Pokitto 5:ea7377f3d1af 429 return(result);
Pokitto 5:ea7377f3d1af 430 }
Pokitto 5:ea7377f3d1af 431
Pokitto 5:ea7377f3d1af 432
Pokitto 5:ea7377f3d1af 433 /** \brief Reverse byte order in signed short value
Pokitto 5:ea7377f3d1af 434
Pokitto 5:ea7377f3d1af 435 This function reverses the byte order in a signed short value with sign extension to integer.
Pokitto 5:ea7377f3d1af 436
Pokitto 5:ea7377f3d1af 437 \param [in] value Value to reverse
Pokitto 5:ea7377f3d1af 438 \return Reversed value
Pokitto 5:ea7377f3d1af 439 */
Pokitto 5:ea7377f3d1af 440 __attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
Pokitto 5:ea7377f3d1af 441 {
Pokitto 5:ea7377f3d1af 442 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Pokitto 5:ea7377f3d1af 443 return (short)__builtin_bswap16(value);
Pokitto 5:ea7377f3d1af 444 #else
Pokitto 5:ea7377f3d1af 445 uint32_t result;
Pokitto 5:ea7377f3d1af 446
Pokitto 5:ea7377f3d1af 447 __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
Pokitto 5:ea7377f3d1af 448 return(result);
Pokitto 5:ea7377f3d1af 449 #endif
Pokitto 5:ea7377f3d1af 450 }
Pokitto 5:ea7377f3d1af 451
Pokitto 5:ea7377f3d1af 452
Pokitto 5:ea7377f3d1af 453 /** \brief Rotate Right in unsigned value (32 bit)
Pokitto 5:ea7377f3d1af 454
Pokitto 5:ea7377f3d1af 455 This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
Pokitto 5:ea7377f3d1af 456
Pokitto 5:ea7377f3d1af 457 \param [in] value Value to rotate
Pokitto 5:ea7377f3d1af 458 \param [in] value Number of Bits to rotate
Pokitto 5:ea7377f3d1af 459 \return Rotated value
Pokitto 5:ea7377f3d1af 460 */
Pokitto 5:ea7377f3d1af 461 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
Pokitto 5:ea7377f3d1af 462 {
Pokitto 5:ea7377f3d1af 463 return (op1 >> op2) | (op1 << (32 - op2));
Pokitto 5:ea7377f3d1af 464 }
Pokitto 5:ea7377f3d1af 465
Pokitto 5:ea7377f3d1af 466
Pokitto 5:ea7377f3d1af 467 /** \brief Breakpoint
Pokitto 5:ea7377f3d1af 468
Pokitto 5:ea7377f3d1af 469 This function causes the processor to enter Debug state.
Pokitto 5:ea7377f3d1af 470 Debug tools can use this to investigate system state when the instruction at a particular address is reached.
Pokitto 5:ea7377f3d1af 471
Pokitto 5:ea7377f3d1af 472 \param [in] value is ignored by the processor.
Pokitto 5:ea7377f3d1af 473 If required, a debugger can use it to store additional information about the breakpoint.
Pokitto 5:ea7377f3d1af 474 */
Pokitto 5:ea7377f3d1af 475 #define __BKPT(value) __ASM volatile ("bkpt "#value)
Pokitto 5:ea7377f3d1af 476
Pokitto 5:ea7377f3d1af 477
Pokitto 5:ea7377f3d1af 478 #if (__CORTEX_M >= 0x03)
Pokitto 5:ea7377f3d1af 479
Pokitto 5:ea7377f3d1af 480 /** \brief Reverse bit order of value
Pokitto 5:ea7377f3d1af 481
Pokitto 5:ea7377f3d1af 482 This function reverses the bit order of the given value.
Pokitto 5:ea7377f3d1af 483
Pokitto 5:ea7377f3d1af 484 \param [in] value Value to reverse
Pokitto 5:ea7377f3d1af 485 \return Reversed value
Pokitto 5:ea7377f3d1af 486 */
Pokitto 5:ea7377f3d1af 487 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
Pokitto 5:ea7377f3d1af 488 {
Pokitto 5:ea7377f3d1af 489 uint32_t result;
Pokitto 5:ea7377f3d1af 490
Pokitto 5:ea7377f3d1af 491 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
Pokitto 5:ea7377f3d1af 492 return(result);
Pokitto 5:ea7377f3d1af 493 }
Pokitto 5:ea7377f3d1af 494
Pokitto 5:ea7377f3d1af 495
Pokitto 5:ea7377f3d1af 496 /** \brief LDR Exclusive (8 bit)
Pokitto 5:ea7377f3d1af 497
Pokitto 5:ea7377f3d1af 498 This function performs a exclusive LDR command for 8 bit value.
Pokitto 5:ea7377f3d1af 499
Pokitto 5:ea7377f3d1af 500 \param [in] ptr Pointer to data
Pokitto 5:ea7377f3d1af 501 \return value of type uint8_t at (*ptr)
Pokitto 5:ea7377f3d1af 502 */
Pokitto 5:ea7377f3d1af 503 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
Pokitto 5:ea7377f3d1af 504 {
Pokitto 5:ea7377f3d1af 505 uint32_t result;
Pokitto 5:ea7377f3d1af 506
Pokitto 5:ea7377f3d1af 507 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Pokitto 5:ea7377f3d1af 508 __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
Pokitto 5:ea7377f3d1af 509 #else
Pokitto 5:ea7377f3d1af 510 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Pokitto 5:ea7377f3d1af 511 accepted by assembler. So has to use following less efficient pattern.
Pokitto 5:ea7377f3d1af 512 */
Pokitto 5:ea7377f3d1af 513 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Pokitto 5:ea7377f3d1af 514 #endif
Pokitto 5:ea7377f3d1af 515 return(result);
Pokitto 5:ea7377f3d1af 516 }
Pokitto 5:ea7377f3d1af 517
Pokitto 5:ea7377f3d1af 518
Pokitto 5:ea7377f3d1af 519 /** \brief LDR Exclusive (16 bit)
Pokitto 5:ea7377f3d1af 520
Pokitto 5:ea7377f3d1af 521 This function performs a exclusive LDR command for 16 bit values.
Pokitto 5:ea7377f3d1af 522
Pokitto 5:ea7377f3d1af 523 \param [in] ptr Pointer to data
Pokitto 5:ea7377f3d1af 524 \return value of type uint16_t at (*ptr)
Pokitto 5:ea7377f3d1af 525 */
Pokitto 5:ea7377f3d1af 526 __attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
Pokitto 5:ea7377f3d1af 527 {
Pokitto 5:ea7377f3d1af 528 uint32_t result;
Pokitto 5:ea7377f3d1af 529
Pokitto 5:ea7377f3d1af 530 #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
Pokitto 5:ea7377f3d1af 531 __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
Pokitto 5:ea7377f3d1af 532 #else
Pokitto 5:ea7377f3d1af 533 /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
Pokitto 5:ea7377f3d1af 534 accepted by assembler. So has to use following less efficient pattern.
Pokitto 5:ea7377f3d1af 535 */
Pokitto 5:ea7377f3d1af 536 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
Pokitto 5:ea7377f3d1af 537 #endif
Pokitto 5:ea7377f3d1af 538 return(result);
Pokitto 5:ea7377f3d1af 539 }
Pokitto 5:ea7377f3d1af 540
Pokitto 5:ea7377f3d1af 541
Pokitto 5:ea7377f3d1af 542 /** \brief LDR Exclusive (32 bit)
Pokitto 5:ea7377f3d1af 543
Pokitto 5:ea7377f3d1af 544 This function performs a exclusive LDR command for 32 bit values.
Pokitto 5:ea7377f3d1af 545
Pokitto 5:ea7377f3d1af 546 \param [in] ptr Pointer to data
Pokitto 5:ea7377f3d1af 547 \return value of type uint32_t at (*ptr)
Pokitto 5:ea7377f3d1af 548 */
Pokitto 5:ea7377f3d1af 549 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
Pokitto 5:ea7377f3d1af 550 {
Pokitto 5:ea7377f3d1af 551 uint32_t result;
Pokitto 5:ea7377f3d1af 552
Pokitto 5:ea7377f3d1af 553 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
Pokitto 5:ea7377f3d1af 554 return(result);
Pokitto 5:ea7377f3d1af 555 }
Pokitto 5:ea7377f3d1af 556
Pokitto 5:ea7377f3d1af 557
Pokitto 5:ea7377f3d1af 558 /** \brief STR Exclusive (8 bit)
Pokitto 5:ea7377f3d1af 559
Pokitto 5:ea7377f3d1af 560 This function performs a exclusive STR command for 8 bit values.
Pokitto 5:ea7377f3d1af 561
Pokitto 5:ea7377f3d1af 562 \param [in] value Value to store
Pokitto 5:ea7377f3d1af 563 \param [in] ptr Pointer to location
Pokitto 5:ea7377f3d1af 564 \return 0 Function succeeded
Pokitto 5:ea7377f3d1af 565 \return 1 Function failed
Pokitto 5:ea7377f3d1af 566 */
Pokitto 5:ea7377f3d1af 567 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
Pokitto 5:ea7377f3d1af 568 {
Pokitto 5:ea7377f3d1af 569 uint32_t result;
Pokitto 5:ea7377f3d1af 570
Pokitto 5:ea7377f3d1af 571 __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Pokitto 5:ea7377f3d1af 572 return(result);
Pokitto 5:ea7377f3d1af 573 }
Pokitto 5:ea7377f3d1af 574
Pokitto 5:ea7377f3d1af 575
Pokitto 5:ea7377f3d1af 576 /** \brief STR Exclusive (16 bit)
Pokitto 5:ea7377f3d1af 577
Pokitto 5:ea7377f3d1af 578 This function performs a exclusive STR command for 16 bit values.
Pokitto 5:ea7377f3d1af 579
Pokitto 5:ea7377f3d1af 580 \param [in] value Value to store
Pokitto 5:ea7377f3d1af 581 \param [in] ptr Pointer to location
Pokitto 5:ea7377f3d1af 582 \return 0 Function succeeded
Pokitto 5:ea7377f3d1af 583 \return 1 Function failed
Pokitto 5:ea7377f3d1af 584 */
Pokitto 5:ea7377f3d1af 585 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
Pokitto 5:ea7377f3d1af 586 {
Pokitto 5:ea7377f3d1af 587 uint32_t result;
Pokitto 5:ea7377f3d1af 588
Pokitto 5:ea7377f3d1af 589 __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Pokitto 5:ea7377f3d1af 590 return(result);
Pokitto 5:ea7377f3d1af 591 }
Pokitto 5:ea7377f3d1af 592
Pokitto 5:ea7377f3d1af 593
Pokitto 5:ea7377f3d1af 594 /** \brief STR Exclusive (32 bit)
Pokitto 5:ea7377f3d1af 595
Pokitto 5:ea7377f3d1af 596 This function performs a exclusive STR command for 32 bit values.
Pokitto 5:ea7377f3d1af 597
Pokitto 5:ea7377f3d1af 598 \param [in] value Value to store
Pokitto 5:ea7377f3d1af 599 \param [in] ptr Pointer to location
Pokitto 5:ea7377f3d1af 600 \return 0 Function succeeded
Pokitto 5:ea7377f3d1af 601 \return 1 Function failed
Pokitto 5:ea7377f3d1af 602 */
Pokitto 5:ea7377f3d1af 603 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
Pokitto 5:ea7377f3d1af 604 {
Pokitto 5:ea7377f3d1af 605 uint32_t result;
Pokitto 5:ea7377f3d1af 606
Pokitto 5:ea7377f3d1af 607 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
Pokitto 5:ea7377f3d1af 608 return(result);
Pokitto 5:ea7377f3d1af 609 }
Pokitto 5:ea7377f3d1af 610
Pokitto 5:ea7377f3d1af 611
Pokitto 5:ea7377f3d1af 612 /** \brief Remove the exclusive lock
Pokitto 5:ea7377f3d1af 613
Pokitto 5:ea7377f3d1af 614 This function removes the exclusive lock which is created by LDREX.
Pokitto 5:ea7377f3d1af 615
Pokitto 5:ea7377f3d1af 616 */
Pokitto 5:ea7377f3d1af 617 __attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
Pokitto 5:ea7377f3d1af 618 {
Pokitto 5:ea7377f3d1af 619 __ASM volatile ("clrex" ::: "memory");
Pokitto 5:ea7377f3d1af 620 }
Pokitto 5:ea7377f3d1af 621
Pokitto 5:ea7377f3d1af 622
Pokitto 5:ea7377f3d1af 623 /** \brief Signed Saturate
Pokitto 5:ea7377f3d1af 624
Pokitto 5:ea7377f3d1af 625 This function saturates a signed value.
Pokitto 5:ea7377f3d1af 626
Pokitto 5:ea7377f3d1af 627 \param [in] value Value to be saturated
Pokitto 5:ea7377f3d1af 628 \param [in] sat Bit position to saturate to (1..32)
Pokitto 5:ea7377f3d1af 629 \return Saturated value
Pokitto 5:ea7377f3d1af 630 */
Pokitto 5:ea7377f3d1af 631 #define __SSAT(ARG1,ARG2) \
Pokitto 5:ea7377f3d1af 632 ({ \
Pokitto 5:ea7377f3d1af 633 uint32_t __RES, __ARG1 = (ARG1); \
Pokitto 5:ea7377f3d1af 634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Pokitto 5:ea7377f3d1af 635 __RES; \
Pokitto 5:ea7377f3d1af 636 })
Pokitto 5:ea7377f3d1af 637
Pokitto 5:ea7377f3d1af 638
Pokitto 5:ea7377f3d1af 639 /** \brief Unsigned Saturate
Pokitto 5:ea7377f3d1af 640
Pokitto 5:ea7377f3d1af 641 This function saturates an unsigned value.
Pokitto 5:ea7377f3d1af 642
Pokitto 5:ea7377f3d1af 643 \param [in] value Value to be saturated
Pokitto 5:ea7377f3d1af 644 \param [in] sat Bit position to saturate to (0..31)
Pokitto 5:ea7377f3d1af 645 \return Saturated value
Pokitto 5:ea7377f3d1af 646 */
Pokitto 5:ea7377f3d1af 647 #define __USAT(ARG1,ARG2) \
Pokitto 5:ea7377f3d1af 648 ({ \
Pokitto 5:ea7377f3d1af 649 uint32_t __RES, __ARG1 = (ARG1); \
Pokitto 5:ea7377f3d1af 650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
Pokitto 5:ea7377f3d1af 651 __RES; \
Pokitto 5:ea7377f3d1af 652 })
Pokitto 5:ea7377f3d1af 653
Pokitto 5:ea7377f3d1af 654
Pokitto 5:ea7377f3d1af 655 /** \brief Count leading zeros
Pokitto 5:ea7377f3d1af 656
Pokitto 5:ea7377f3d1af 657 This function counts the number of leading zeros of a data value.
Pokitto 5:ea7377f3d1af 658
Pokitto 5:ea7377f3d1af 659 \param [in] value Value to count the leading zeros
Pokitto 5:ea7377f3d1af 660 \return number of leading zeros in value
Pokitto 5:ea7377f3d1af 661 */
Pokitto 5:ea7377f3d1af 662 __attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
Pokitto 5:ea7377f3d1af 663 {
Pokitto 5:ea7377f3d1af 664 uint32_t result;
Pokitto 5:ea7377f3d1af 665
Pokitto 5:ea7377f3d1af 666 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
Pokitto 5:ea7377f3d1af 667 return(result);
Pokitto 5:ea7377f3d1af 668 }
Pokitto 5:ea7377f3d1af 669
Pokitto 5:ea7377f3d1af 670 #endif /* (__CORTEX_M >= 0x03) */
Pokitto 5:ea7377f3d1af 671
Pokitto 5:ea7377f3d1af 672
Pokitto 5:ea7377f3d1af 673
Pokitto 5:ea7377f3d1af 674
Pokitto 5:ea7377f3d1af 675 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
Pokitto 5:ea7377f3d1af 676 /* TASKING carm specific functions */
Pokitto 5:ea7377f3d1af 677
Pokitto 5:ea7377f3d1af 678 /*
Pokitto 5:ea7377f3d1af 679 * The CMSIS functions have been implemented as intrinsics in the compiler.
Pokitto 5:ea7377f3d1af 680 * Please use "carm -?i" to get an up to date list of all intrinsics,
Pokitto 5:ea7377f3d1af 681 * Including the CMSIS ones.
Pokitto 5:ea7377f3d1af 682 */
Pokitto 5:ea7377f3d1af 683
Pokitto 5:ea7377f3d1af 684 #endif
Pokitto 5:ea7377f3d1af 685
Pokitto 5:ea7377f3d1af 686 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
Pokitto 5:ea7377f3d1af 687
Pokitto 5:ea7377f3d1af 688 #endif /* __CORE_CMINSTR_H */