Jonne Valola / PokittoLib Featured

PokittoLib is the library needed for programming the Pokitto DIY game console (www.pokitto.com)

Dependents:   YATTT sd_map_test cPong SnowDemo ... more

PokittoLib

Library for programming Pokitto hardware

How to Use

  1. Import this library to online compiler (see button "import" on the right hand side
  2. DO NOT import mbed-src anymore, a better version is now included inside PokittoLib
  3. Change My_settings.h according to your project
  4. Start coding!

POKITTO_HW/timer_11u6x.h@71:531419862202, 2019-12-25 (annotated)

Committer:
Pokitto
Date:
Wed Dec 25 23:59:52 2019 +0000
Revision:
71:531419862202
Parent:
30:796f9611d2ac 
Changed Mode2 C++ refresh code (graphical errors)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Pokitto 30:796f9611d2ac 1 /*
Pokitto 30:796f9611d2ac 2 * @brief LPC11u6x 16/32-bit Timer/PWM control functions
Pokitto 30:796f9611d2ac 3 *
Pokitto 30:796f9611d2ac 4 * @note
Pokitto 30:796f9611d2ac 5 * Copyright(C) NXP Semiconductors, 2013
Pokitto 30:796f9611d2ac 6 * All rights reserved.
Pokitto 30:796f9611d2ac 7 *
Pokitto 30:796f9611d2ac 8 * @par
Pokitto 30:796f9611d2ac 9 * Software that is described herein is for illustrative purposes only
Pokitto 30:796f9611d2ac 10 * which provides customers with programming information regarding the
Pokitto 30:796f9611d2ac 11 * LPC products. This software is supplied "AS IS" without any warranties of
Pokitto 30:796f9611d2ac 12 * any kind, and NXP Semiconductors and its licensor disclaim any and
Pokitto 30:796f9611d2ac 13 * all warranties, express or implied, including all implied warranties of
Pokitto 30:796f9611d2ac 14 * merchantability, fitness for a particular purpose and non-infringement of
Pokitto 30:796f9611d2ac 15 * intellectual property rights. NXP Semiconductors assumes no responsibility
Pokitto 30:796f9611d2ac 16 * or liability for the use of the software, conveys no license or rights under any
Pokitto 30:796f9611d2ac 17 * patent, copyright, mask work right, or any other intellectual property rights in
Pokitto 30:796f9611d2ac 18 * or to any products. NXP Semiconductors reserves the right to make changes
Pokitto 30:796f9611d2ac 19 * in the software without notification. NXP Semiconductors also makes no
Pokitto 30:796f9611d2ac 20 * representation or warranty that such application will be suitable for the
Pokitto 30:796f9611d2ac 21 * specified use without further testing or modification.
Pokitto 30:796f9611d2ac 22 *
Pokitto 30:796f9611d2ac 23 * @par
Pokitto 30:796f9611d2ac 24 * Permission to use, copy, modify, and distribute this software and its
Pokitto 30:796f9611d2ac 25 * documentation is hereby granted, under NXP Semiconductors' and its
Pokitto 30:796f9611d2ac 26 * licensor's relevant copyrights in the software, without fee, provided that it
Pokitto 30:796f9611d2ac 27 * is used in conjunction with NXP Semiconductors microcontrollers. This
Pokitto 30:796f9611d2ac 28 * copyright, permission, and disclaimer notice must appear in all copies of
Pokitto 30:796f9611d2ac 29 * this code.
Pokitto 30:796f9611d2ac 30 */
Pokitto 30:796f9611d2ac 31
Pokitto 30:796f9611d2ac 32 #ifndef __TIMER_11U6X_H_
Pokitto 30:796f9611d2ac 33 #define __TIMER_11U6X_H_
Pokitto 30:796f9611d2ac 34
Pokitto 30:796f9611d2ac 35 #include "lpc_defs.h"
Pokitto 30:796f9611d2ac 36 #include <stdint.h>
Pokitto 30:796f9611d2ac 37
Pokitto 30:796f9611d2ac 38 /* Static data/function define */
Pokitto 30:796f9611d2ac 39 #define STATIC static
Pokitto 30:796f9611d2ac 40 /* External data/function define */
Pokitto 30:796f9611d2ac 41 #define EXTERN extern
Pokitto 30:796f9611d2ac 42 #define INLINE inline
Pokitto 30:796f9611d2ac 43 #define bool uint8_t
Pokitto 30:796f9611d2ac 44
Pokitto 30:796f9611d2ac 45 #ifdef __cplusplus
Pokitto 30:796f9611d2ac 46 extern "C" {
Pokitto 30:796f9611d2ac 47 #endif
Pokitto 30:796f9611d2ac 48
Pokitto 30:796f9611d2ac 49 /** @defgroup TIMER_11U6X CHIP: LPC11u6x 16/32-bit Timer driver
Pokitto 30:796f9611d2ac 50 * @ingroup CHIP_11U6X_Drivers
Pokitto 30:796f9611d2ac 51 * <b>IMPORTANT NOTE ABOUT lpc11u6x TIMERS</b><br>
Pokitto 30:796f9611d2ac 52 * For timer 0 on both the 16-bit and 32-bit timers, the capture functions
Pokitto 30:796f9611d2ac 53 * use index 0 for capture 0 functions and index 2 for capture 1 functions,
Pokitto 30:796f9611d2ac 54 * while timer 1 for both the 16-bit and 32-bit timers uses index 0 and
Pokitto 30:796f9611d2ac 55 * index 1. Use care when selecting
Pokitto 30:796f9611d2ac 56 * The LPC11U6X User manual is inconsistent in it's designation of capture
Pokitto 30:796f9611d2ac 57 * channels for each timer. See the comments for each function for special
Pokitto 30:796f9611d2ac 58 * handling per timer when dealing with capture channels.
Pokitto 30:796f9611d2ac 59 * @{
Pokitto 30:796f9611d2ac 60 */
Pokitto 30:796f9611d2ac 61
Pokitto 30:796f9611d2ac 62 /**
Pokitto 30:796f9611d2ac 63 * @brief 32-bit Standard timer register block structure
Pokitto 30:796f9611d2ac 64 */
Pokitto 30:796f9611d2ac 65 typedef struct { /*!< TIMERn Structure */
Pokitto 30:796f9611d2ac 66 __IO uint32_t IR; /*!< Interrupt Register. The IR can be written to clear interrupts. The IR can be read to identify which of eight possible interrupt sources are pending. */
Pokitto 30:796f9611d2ac 67 __IO uint32_t TCR; /*!< Timer Control Register. The TCR is used to control the Timer Counter functions. The Timer Counter can be disabled or reset through the TCR. */
Pokitto 30:796f9611d2ac 68 __IO uint32_t TC; /*!< Timer Counter. The 32 bit TC is incremented every PR+1 cycles of PCLK. The TC is controlled through the TCR. */
Pokitto 30:796f9611d2ac 69 __IO uint32_t PR; /*!< Prescale Register. The Prescale Counter (below) is equal to this value, the next clock increments the TC and clears the PC. */
Pokitto 30:796f9611d2ac 70 __IO uint32_t PC; /*!< Prescale Counter. The 32 bit PC is a counter which is incremented to the value stored in PR. When the value in PR is reached, the TC is incremented and the PC is cleared. The PC is observable and controllable through the bus interface. */
Pokitto 30:796f9611d2ac 71 __IO uint32_t MCR; /*!< Match Control Register. The MCR is used to control if an interrupt is generated and if the TC is reset when a Match occurs. */
Pokitto 30:796f9611d2ac 72 __IO uint32_t MR[4]; /*!< Match Register. MR can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR matches the TC. */
Pokitto 30:796f9611d2ac 73 __IO uint32_t CCR; /*!< Capture Control Register. The CCR controls which edges of the capture inputs are used to load the Capture Registers and whether or not an interrupt is generated when a capture takes place. */
Pokitto 30:796f9611d2ac 74 __IO uint32_t CR[4]; /*!< Capture Register. CR is loaded with the value of TC when there is an event on the CAPn.0 input. */
Pokitto 30:796f9611d2ac 75 __IO uint32_t EMR; /*!< External Match Register. The EMR controls the external match pins MATn.0-3 (MAT0.0-3 and MAT1.0-3 respectively). */
Pokitto 30:796f9611d2ac 76 __I uint32_t RESERVED0[12];
Pokitto 30:796f9611d2ac 77 __IO uint32_t CTCR; /*!< Count Control Register. The CTCR selects between Timer and Counter mode, and in Counter mode selects the signal and edge(s) for counting. */
Pokitto 30:796f9611d2ac 78 __IO uint32_t PWMC;
Pokitto 30:796f9611d2ac 79 } LPC_TIMER_T;
Pokitto 30:796f9611d2ac 80
Pokitto 30:796f9611d2ac 81 /** Macro to clear interrupt pending */
Pokitto 30:796f9611d2ac 82 #define TIMER_IR_CLR(n) _BIT(n)
Pokitto 30:796f9611d2ac 83
Pokitto 30:796f9611d2ac 84 /** Macro for getting a timer match interrupt bit */
Pokitto 30:796f9611d2ac 85 #define TIMER_MATCH_INT(n) (_BIT((n) & 0x0F))
Pokitto 30:796f9611d2ac 86 /** Macro for getting a capture event interrupt bit */
Pokitto 30:796f9611d2ac 87 #define TIMER_CAP_INT(n) (_BIT((((n) & 0x0F) + 4)))
Pokitto 30:796f9611d2ac 88
Pokitto 30:796f9611d2ac 89 /** Timer/counter enable bit */
Pokitto 30:796f9611d2ac 90 #define TIMER_ENABLE ((uint32_t) (1 << 0))
Pokitto 30:796f9611d2ac 91 /** Timer/counter reset bit */
Pokitto 30:796f9611d2ac 92 #define TIMER_RESET ((uint32_t) (1 << 1))
Pokitto 30:796f9611d2ac 93
Pokitto 30:796f9611d2ac 94 /** Bit location for interrupt on MRx match, n = 0 to 3 */
Pokitto 30:796f9611d2ac 95 #define TIMER_INT_ON_MATCH(n) (_BIT(((n) * 3)))
Pokitto 30:796f9611d2ac 96 /** Bit location for reset on MRx match, n = 0 to 3 */
Pokitto 30:796f9611d2ac 97 #define TIMER_RESET_ON_MATCH(n) (_BIT((((n) * 3) + 1)))
Pokitto 30:796f9611d2ac 98 /** Bit location for stop on MRx match, n = 0 to 3 */
Pokitto 30:796f9611d2ac 99 #define TIMER_STOP_ON_MATCH(n) (_BIT((((n) * 3) + 2)))
Pokitto 30:796f9611d2ac 100
Pokitto 30:796f9611d2ac 101 /** Bit location for CAP.n on CRx rising edge, n = 0 to 3 */
Pokitto 30:796f9611d2ac 102 #define TIMER_CAP_RISING(n) (_BIT(((n) * 3)))
Pokitto 30:796f9611d2ac 103 /** Bit location for CAP.n on CRx falling edge, n = 0 to 3 */
Pokitto 30:796f9611d2ac 104 #define TIMER_CAP_FALLING(n) (_BIT((((n) * 3) + 1)))
Pokitto 30:796f9611d2ac 105 /** Bit location for CAP.n on CRx interrupt enable, n = 0 to 3 */
Pokitto 30:796f9611d2ac 106 #define TIMER_INT_ON_CAP(n) (_BIT((((n) * 3) + 2)))
Pokitto 30:796f9611d2ac 107
Pokitto 30:796f9611d2ac 108 /**
Pokitto 30:796f9611d2ac 109 * @brief Initialize a timer
Pokitto 30:796f9611d2ac 110 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 111 * @return Nothing
Pokitto 30:796f9611d2ac 112 */
Pokitto 30:796f9611d2ac 113 void Chip_TIMER_Init(LPC_TIMER_T *pTMR);
Pokitto 30:796f9611d2ac 114
Pokitto 30:796f9611d2ac 115 /**
Pokitto 30:796f9611d2ac 116 * @brief Shutdown a timer
Pokitto 30:796f9611d2ac 117 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 118 * @return Nothing
Pokitto 30:796f9611d2ac 119 */
Pokitto 30:796f9611d2ac 120 void Chip_TIMER_DeInit(LPC_TIMER_T *pTMR);
Pokitto 30:796f9611d2ac 121
Pokitto 30:796f9611d2ac 122 /**
Pokitto 30:796f9611d2ac 123 * @brief Determine if a match interrupt is pending
Pokitto 30:796f9611d2ac 124 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 125 * @param matchnum : Match interrupt number to check
Pokitto 30:796f9611d2ac 126 * @return false if the interrupt is not pending, otherwise true
Pokitto 30:796f9611d2ac 127 * @note Determine if the match interrupt for the passed timer and match
Pokitto 30:796f9611d2ac 128 * counter is pending.<br>
Pokitto 30:796f9611d2ac 129 */
Pokitto 30:796f9611d2ac 130 STATIC INLINE bool Chip_TIMER_MatchPending(LPC_TIMER_T *pTMR, int8_t matchnum)
Pokitto 30:796f9611d2ac 131 {
Pokitto 30:796f9611d2ac 132 return (bool) ((pTMR->IR & TIMER_MATCH_INT(matchnum)) != 0);
Pokitto 30:796f9611d2ac 133 }
Pokitto 30:796f9611d2ac 134
Pokitto 30:796f9611d2ac 135 /**
Pokitto 30:796f9611d2ac 136 * @brief Determine if a capture interrupt is pending
Pokitto 30:796f9611d2ac 137 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 138 * @param capnum : Capture interrupt number to check
Pokitto 30:796f9611d2ac 139 * @return false if the interrupt is not pending, otherwise true
Pokitto 30:796f9611d2ac 140 * @note Determine if the capture interrupt for the passed capture pin is
Pokitto 30:796f9611d2ac 141 * pending.<br>
Pokitto 30:796f9611d2ac 142 * <b>Special handling for timer 0</b><br>
Pokitto 30:796f9611d2ac 143 * For 16-bit and 32-bit timers 0, select channel 2 to check the capture
Pokitto 30:796f9611d2ac 144 * interrupt status for channel 1. For 16-bit and 32-bit timers 1, select
Pokitto 30:796f9611d2ac 145 * channel 1. (User manual designation of channel 1 is capture slot 2
Pokitto 30:796f9611d2ac 146 * for timer 0).
Pokitto 30:796f9611d2ac 147 */
Pokitto 30:796f9611d2ac 148 STATIC INLINE bool Chip_TIMER_CapturePending(LPC_TIMER_T *pTMR, int8_t capnum)
Pokitto 30:796f9611d2ac 149 {
Pokitto 30:796f9611d2ac 150 return (bool) ((pTMR->IR & TIMER_CAP_INT(capnum)) != 0);
Pokitto 30:796f9611d2ac 151 }
Pokitto 30:796f9611d2ac 152
Pokitto 30:796f9611d2ac 153 /**
Pokitto 30:796f9611d2ac 154 * @brief Clears a (pending) match interrupt
Pokitto 30:796f9611d2ac 155 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 156 * @param matchnum : Match interrupt number to clear
Pokitto 30:796f9611d2ac 157 * @return Nothing
Pokitto 30:796f9611d2ac 158 * @note Clears a pending timer match interrupt.<br>
Pokitto 30:796f9611d2ac 159 */
Pokitto 30:796f9611d2ac 160 STATIC INLINE void Chip_TIMER_ClearMatch(LPC_TIMER_T *pTMR, int8_t matchnum)
Pokitto 30:796f9611d2ac 161 {
Pokitto 30:796f9611d2ac 162 pTMR->IR = TIMER_IR_CLR(matchnum);
Pokitto 30:796f9611d2ac 163 }
Pokitto 30:796f9611d2ac 164
Pokitto 30:796f9611d2ac 165 /**
Pokitto 30:796f9611d2ac 166 * @brief Clears a (pending) capture interrupt
Pokitto 30:796f9611d2ac 167 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 168 * @param capnum : Capture interrupt number to clear
Pokitto 30:796f9611d2ac 169 * @return Nothing
Pokitto 30:796f9611d2ac 170 * @note Clears a pending timer capture interrupt.<br>
Pokitto 30:796f9611d2ac 171 * <b>Special handling for timer 0</b><br>
Pokitto 30:796f9611d2ac 172 * For 16-bit and 32-bit timers 0, select channel 2 to check the capture
Pokitto 30:796f9611d2ac 173 * interrupt status for channel 1. For 16-bit and 32-bit timers 1, select
Pokitto 30:796f9611d2ac 174 * channel 1. (User manual designation of channel 1 is capture slot 2
Pokitto 30:796f9611d2ac 175 * for timer 0).
Pokitto 30:796f9611d2ac 176 */
Pokitto 30:796f9611d2ac 177 STATIC INLINE void Chip_TIMER_ClearCapture(LPC_TIMER_T *pTMR, int8_t capnum)
Pokitto 30:796f9611d2ac 178 {
Pokitto 30:796f9611d2ac 179 pTMR->IR = (0x10 << capnum);
Pokitto 30:796f9611d2ac 180 }
Pokitto 30:796f9611d2ac 181
Pokitto 30:796f9611d2ac 182 /**
Pokitto 30:796f9611d2ac 183 * @brief Enables the timer (starts count)
Pokitto 30:796f9611d2ac 184 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 185 * @return Nothing
Pokitto 30:796f9611d2ac 186 * @note Enables the timer to start counting.
Pokitto 30:796f9611d2ac 187 */
Pokitto 30:796f9611d2ac 188 STATIC INLINE void Chip_TIMER_Enable(LPC_TIMER_T *pTMR)
Pokitto 30:796f9611d2ac 189 {
Pokitto 30:796f9611d2ac 190 pTMR->TCR |= TIMER_ENABLE;
Pokitto 30:796f9611d2ac 191 }
Pokitto 30:796f9611d2ac 192
Pokitto 30:796f9611d2ac 193 /**
Pokitto 30:796f9611d2ac 194 * @brief Disables the timer (stops count)
Pokitto 30:796f9611d2ac 195 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 196 * @return Nothing
Pokitto 30:796f9611d2ac 197 * @note Disables the timer to stop counting.
Pokitto 30:796f9611d2ac 198 */
Pokitto 30:796f9611d2ac 199 STATIC INLINE void Chip_TIMER_Disable(LPC_TIMER_T *pTMR)
Pokitto 30:796f9611d2ac 200 {
Pokitto 30:796f9611d2ac 201 pTMR->TCR &= ~TIMER_ENABLE;
Pokitto 30:796f9611d2ac 202 }
Pokitto 30:796f9611d2ac 203
Pokitto 30:796f9611d2ac 204 /**
Pokitto 30:796f9611d2ac 205 * @brief Returns the current timer count
Pokitto 30:796f9611d2ac 206 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 207 * @return Current timer terminal count value
Pokitto 30:796f9611d2ac 208 * @note Returns the current timer terminal count.
Pokitto 30:796f9611d2ac 209 */
Pokitto 30:796f9611d2ac 210 STATIC INLINE uint32_t Chip_TIMER_ReadCount(LPC_TIMER_T *pTMR)
Pokitto 30:796f9611d2ac 211 {
Pokitto 30:796f9611d2ac 212 return pTMR->TC;
Pokitto 30:796f9611d2ac 213 }
Pokitto 30:796f9611d2ac 214
Pokitto 30:796f9611d2ac 215 /**
Pokitto 30:796f9611d2ac 216 * @brief Returns the current prescale count
Pokitto 30:796f9611d2ac 217 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 218 * @return Current timer prescale count value
Pokitto 30:796f9611d2ac 219 * @note Returns the current prescale count.
Pokitto 30:796f9611d2ac 220 */
Pokitto 30:796f9611d2ac 221 STATIC INLINE uint32_t Chip_TIMER_ReadPrescale(LPC_TIMER_T *pTMR)
Pokitto 30:796f9611d2ac 222 {
Pokitto 30:796f9611d2ac 223 return pTMR->PC;
Pokitto 30:796f9611d2ac 224 }
Pokitto 30:796f9611d2ac 225
Pokitto 30:796f9611d2ac 226 /**
Pokitto 30:796f9611d2ac 227 * @brief Sets the prescaler value
Pokitto 30:796f9611d2ac 228 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 229 * @param prescale : Prescale value to set the prescale register to
Pokitto 30:796f9611d2ac 230 * @return Nothing
Pokitto 30:796f9611d2ac 231 * @note Sets the prescale count value.
Pokitto 30:796f9611d2ac 232 */
Pokitto 30:796f9611d2ac 233 STATIC INLINE void Chip_TIMER_PrescaleSet(LPC_TIMER_T *pTMR, uint32_t prescale)
Pokitto 30:796f9611d2ac 234 {
Pokitto 30:796f9611d2ac 235 pTMR->PR = prescale;
Pokitto 30:796f9611d2ac 236 }
Pokitto 30:796f9611d2ac 237
Pokitto 30:796f9611d2ac 238 /**
Pokitto 30:796f9611d2ac 239 * @brief Sets a timer match value
Pokitto 30:796f9611d2ac 240 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 241 * @param matchnum : Match timer to set match count for
Pokitto 30:796f9611d2ac 242 * @param matchval : Match value for the selected match count
Pokitto 30:796f9611d2ac 243 * @return Nothing
Pokitto 30:796f9611d2ac 244 * @note Sets one of the timer match values.
Pokitto 30:796f9611d2ac 245 */
Pokitto 30:796f9611d2ac 246 STATIC INLINE void Chip_TIMER_SetMatch(LPC_TIMER_T *pTMR, int8_t matchnum, uint32_t matchval)
Pokitto 30:796f9611d2ac 247 {
Pokitto 30:796f9611d2ac 248 pTMR->MR[matchnum] = matchval;
Pokitto 30:796f9611d2ac 249 }
Pokitto 30:796f9611d2ac 250
Pokitto 30:796f9611d2ac 251 /**
Pokitto 30:796f9611d2ac 252 * @brief Reads a capture register
Pokitto 30:796f9611d2ac 253 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 254 * @param capnum : Capture register to read
Pokitto 30:796f9611d2ac 255 * @return The selected capture register value
Pokitto 30:796f9611d2ac 256 * @note Returns the selected capture register value.<br>
Pokitto 30:796f9611d2ac 257 * <b>Special handling for timer 0</b><br>
Pokitto 30:796f9611d2ac 258 * For 16-bit and 32-bit timers 0, select channel 2 to get the capture
Pokitto 30:796f9611d2ac 259 * count for channel 1. For 16-bit and 32-bit timers 1, select
Pokitto 30:796f9611d2ac 260 * channel 1. (User manual designation of channel 1 is capture slot 2
Pokitto 30:796f9611d2ac 261 * for timer 0).
Pokitto 30:796f9611d2ac 262 */
Pokitto 30:796f9611d2ac 263 STATIC INLINE uint32_t Chip_TIMER_ReadCapture(LPC_TIMER_T *pTMR, int8_t capnum)
Pokitto 30:796f9611d2ac 264 {
Pokitto 30:796f9611d2ac 265 return pTMR->CR[capnum];
Pokitto 30:796f9611d2ac 266 }
Pokitto 30:796f9611d2ac 267
Pokitto 30:796f9611d2ac 268 /**
Pokitto 30:796f9611d2ac 269 * @brief Resets the timer terminal and prescale counts to 0
Pokitto 30:796f9611d2ac 270 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 271 * @return Nothing
Pokitto 30:796f9611d2ac 272 */
Pokitto 30:796f9611d2ac 273 void Chip_TIMER_Reset(LPC_TIMER_T *pTMR);
Pokitto 30:796f9611d2ac 274
Pokitto 30:796f9611d2ac 275 /**
Pokitto 30:796f9611d2ac 276 * @brief Enables a match interrupt that fires when the terminal count
Pokitto 30:796f9611d2ac 277 * matches the match counter value.
Pokitto 30:796f9611d2ac 278 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 279 * @param matchnum : Match timer, 0 to 3
Pokitto 30:796f9611d2ac 280 * @return Nothing
Pokitto 30:796f9611d2ac 281 */
Pokitto 30:796f9611d2ac 282 STATIC INLINE void Chip_TIMER_MatchEnableInt(LPC_TIMER_T *pTMR, int8_t matchnum)
Pokitto 30:796f9611d2ac 283 {
Pokitto 30:796f9611d2ac 284 pTMR->MCR |= TIMER_INT_ON_MATCH(matchnum);
Pokitto 30:796f9611d2ac 285 }
Pokitto 30:796f9611d2ac 286
Pokitto 30:796f9611d2ac 287 /**
Pokitto 30:796f9611d2ac 288 * @brief Disables a match interrupt for a match counter.
Pokitto 30:796f9611d2ac 289 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 290 * @param matchnum : Match timer, 0 to 3
Pokitto 30:796f9611d2ac 291 * @return Nothing
Pokitto 30:796f9611d2ac 292 */
Pokitto 30:796f9611d2ac 293 STATIC INLINE void Chip_TIMER_MatchDisableInt(LPC_TIMER_T *pTMR, int8_t matchnum)
Pokitto 30:796f9611d2ac 294 {
Pokitto 30:796f9611d2ac 295 pTMR->MCR &= ~TIMER_INT_ON_MATCH(matchnum);
Pokitto 30:796f9611d2ac 296 }
Pokitto 30:796f9611d2ac 297
Pokitto 30:796f9611d2ac 298 /**
Pokitto 30:796f9611d2ac 299 * @brief For the specific match counter, enables reset of the terminal count register when a match occurs
Pokitto 30:796f9611d2ac 300 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 301 * @param matchnum : Match timer, 0 to 3
Pokitto 30:796f9611d2ac 302 * @return Nothing
Pokitto 30:796f9611d2ac 303 */
Pokitto 30:796f9611d2ac 304 STATIC INLINE void Chip_TIMER_ResetOnMatchEnable(LPC_TIMER_T *pTMR, int8_t matchnum)
Pokitto 30:796f9611d2ac 305 {
Pokitto 30:796f9611d2ac 306 pTMR->MCR |= TIMER_RESET_ON_MATCH(matchnum);
Pokitto 30:796f9611d2ac 307 }
Pokitto 30:796f9611d2ac 308
Pokitto 30:796f9611d2ac 309 /**
Pokitto 30:796f9611d2ac 310 * @brief For the specific match counter, disables reset of the terminal count register when a match occurs
Pokitto 30:796f9611d2ac 311 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 312 * @param matchnum : Match timer, 0 to 3
Pokitto 30:796f9611d2ac 313 * @return Nothing
Pokitto 30:796f9611d2ac 314 */
Pokitto 30:796f9611d2ac 315 STATIC INLINE void Chip_TIMER_ResetOnMatchDisable(LPC_TIMER_T *pTMR, int8_t matchnum)
Pokitto 30:796f9611d2ac 316 {
Pokitto 30:796f9611d2ac 317 pTMR->MCR &= ~TIMER_RESET_ON_MATCH(matchnum);
Pokitto 30:796f9611d2ac 318 }
Pokitto 30:796f9611d2ac 319
Pokitto 30:796f9611d2ac 320 /**
Pokitto 30:796f9611d2ac 321 * @brief Enable a match timer to stop the terminal count when a
Pokitto 30:796f9611d2ac 322 * match count equals the terminal count.
Pokitto 30:796f9611d2ac 323 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 324 * @param matchnum : Match timer, 0 to 3
Pokitto 30:796f9611d2ac 325 * @return Nothing
Pokitto 30:796f9611d2ac 326 */
Pokitto 30:796f9611d2ac 327 STATIC INLINE void Chip_TIMER_StopOnMatchEnable(LPC_TIMER_T *pTMR, int8_t matchnum)
Pokitto 30:796f9611d2ac 328 {
Pokitto 30:796f9611d2ac 329 pTMR->MCR |= TIMER_STOP_ON_MATCH(matchnum);
Pokitto 30:796f9611d2ac 330 }
Pokitto 30:796f9611d2ac 331
Pokitto 30:796f9611d2ac 332 /**
Pokitto 30:796f9611d2ac 333 * @brief Disable stop on match for a match timer. Disables a match timer
Pokitto 30:796f9611d2ac 334 * to stop the terminal count when a match count equals the terminal count.
Pokitto 30:796f9611d2ac 335 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 336 * @param matchnum : Match timer, 0 to 3
Pokitto 30:796f9611d2ac 337 * @return Nothing
Pokitto 30:796f9611d2ac 338 */
Pokitto 30:796f9611d2ac 339 STATIC INLINE void Chip_TIMER_StopOnMatchDisable(LPC_TIMER_T *pTMR, int8_t matchnum)
Pokitto 30:796f9611d2ac 340 {
Pokitto 30:796f9611d2ac 341 pTMR->MCR &= ~TIMER_STOP_ON_MATCH(matchnum);
Pokitto 30:796f9611d2ac 342 }
Pokitto 30:796f9611d2ac 343
Pokitto 30:796f9611d2ac 344 /**
Pokitto 30:796f9611d2ac 345 * @brief Enables capture on on rising edge of selected CAP signal for the
Pokitto 30:796f9611d2ac 346 * selected capture register, enables the selected CAPn.capnum signal to load
Pokitto 30:796f9611d2ac 347 * the capture register with the terminal coount on a rising edge.
Pokitto 30:796f9611d2ac 348 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 349 * @param capnum : Capture signal/register to use
Pokitto 30:796f9611d2ac 350 * @return Nothing
Pokitto 30:796f9611d2ac 351 * @note <b>Special handling for timer 0</b><br>
Pokitto 30:796f9611d2ac 352 * For 16-bit and 32-bit timers 0, select channel 2 to set channel 1. For 16-bit and
Pokitto 30:796f9611d2ac 353 * 32-bit timers 1, select channel 1. (User manual designation of channel 1 is capture
Pokitto 30:796f9611d2ac 354 * slot 2).
Pokitto 30:796f9611d2ac 355 */
Pokitto 30:796f9611d2ac 356 STATIC INLINE void Chip_TIMER_CaptureRisingEdgeEnable(LPC_TIMER_T *pTMR, int8_t capnum)
Pokitto 30:796f9611d2ac 357 {
Pokitto 30:796f9611d2ac 358 pTMR->CCR |= TIMER_CAP_RISING(capnum);
Pokitto 30:796f9611d2ac 359 }
Pokitto 30:796f9611d2ac 360
Pokitto 30:796f9611d2ac 361 /**
Pokitto 30:796f9611d2ac 362 * @brief Disables capture on on rising edge of selected CAP signal. For the
Pokitto 30:796f9611d2ac 363 * selected capture register, disables the selected CAPn.capnum signal to load
Pokitto 30:796f9611d2ac 364 * the capture register with the terminal coount on a rising edge.
Pokitto 30:796f9611d2ac 365 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 366 * @param capnum : Capture signal/register to use
Pokitto 30:796f9611d2ac 367 * @return Nothing
Pokitto 30:796f9611d2ac 368 * @note <b>Special handling for timer 0</b><br>
Pokitto 30:796f9611d2ac 369 * For 16-bit and 32-bit timers 0, select channel 2 to set channel 1. For 16-bit and
Pokitto 30:796f9611d2ac 370 * 32-bit timers 1, select channel 1. (User manual designation of channel 1 is capture
Pokitto 30:796f9611d2ac 371 * slot 2).
Pokitto 30:796f9611d2ac 372 */
Pokitto 30:796f9611d2ac 373 STATIC INLINE void Chip_TIMER_CaptureRisingEdgeDisable(LPC_TIMER_T *pTMR, int8_t capnum)
Pokitto 30:796f9611d2ac 374 {
Pokitto 30:796f9611d2ac 375 pTMR->CCR &= ~TIMER_CAP_RISING(capnum);
Pokitto 30:796f9611d2ac 376 }
Pokitto 30:796f9611d2ac 377
Pokitto 30:796f9611d2ac 378 /**
Pokitto 30:796f9611d2ac 379 * @brief Enables capture on on falling edge of selected CAP signal. For the
Pokitto 30:796f9611d2ac 380 * selected capture register, enables the selected CAPn.capnum signal to load
Pokitto 30:796f9611d2ac 381 * the capture register with the terminal coount on a falling edge.
Pokitto 30:796f9611d2ac 382 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 383 * @param capnum : Capture signal/register to use
Pokitto 30:796f9611d2ac 384 * @return Nothing
Pokitto 30:796f9611d2ac 385 * @note <b>Special handling for timer 0</b><br>
Pokitto 30:796f9611d2ac 386 * For 16-bit and 32-bit timers 0, select channel 2 to set channel 1. For 16-bit and
Pokitto 30:796f9611d2ac 387 * 32-bit timers 1, select channel 1. (User manual designation of channel 1 is capture
Pokitto 30:796f9611d2ac 388 * slot 2).
Pokitto 30:796f9611d2ac 389 */
Pokitto 30:796f9611d2ac 390 STATIC INLINE void Chip_TIMER_CaptureFallingEdgeEnable(LPC_TIMER_T *pTMR, int8_t capnum)
Pokitto 30:796f9611d2ac 391 {
Pokitto 30:796f9611d2ac 392 pTMR->CCR |= TIMER_CAP_FALLING(capnum);
Pokitto 30:796f9611d2ac 393 }
Pokitto 30:796f9611d2ac 394
Pokitto 30:796f9611d2ac 395 /**
Pokitto 30:796f9611d2ac 396 * @brief Disables capture on on falling edge of selected CAP signal. For the
Pokitto 30:796f9611d2ac 397 * selected capture register, disables the selected CAPn.capnum signal to load
Pokitto 30:796f9611d2ac 398 * the capture register with the terminal coount on a falling edge.
Pokitto 30:796f9611d2ac 399 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 400 * @param capnum : Capture signal/register to use
Pokitto 30:796f9611d2ac 401 * @return Nothing
Pokitto 30:796f9611d2ac 402 * @note <b>Special handling for timer 0</b><br>
Pokitto 30:796f9611d2ac 403 * For 16-bit and 32-bit timers 0, select channel 2 to set channel 1. For 16-bit and
Pokitto 30:796f9611d2ac 404 * 32-bit timers 1, select channel 1. (User manual designation of channel 1 is capture
Pokitto 30:796f9611d2ac 405 * slot 2).
Pokitto 30:796f9611d2ac 406 */
Pokitto 30:796f9611d2ac 407 STATIC INLINE void Chip_TIMER_CaptureFallingEdgeDisable(LPC_TIMER_T *pTMR, int8_t capnum)
Pokitto 30:796f9611d2ac 408 {
Pokitto 30:796f9611d2ac 409 pTMR->CCR &= ~TIMER_CAP_FALLING(capnum);
Pokitto 30:796f9611d2ac 410 }
Pokitto 30:796f9611d2ac 411
Pokitto 30:796f9611d2ac 412 /**
Pokitto 30:796f9611d2ac 413 * @brief Enables interrupt on capture of selected CAP signal. For the
Pokitto 30:796f9611d2ac 414 * selected capture register, an interrupt will be generated when the enabled
Pokitto 30:796f9611d2ac 415 * rising or falling edge on CAPn.capnum is detected.
Pokitto 30:796f9611d2ac 416 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 417 * @param capnum : Capture signal/register to use
Pokitto 30:796f9611d2ac 418 * @return Nothing
Pokitto 30:796f9611d2ac 419 * @note <b>Special handling for timer 0</b><br>
Pokitto 30:796f9611d2ac 420 * For 16-bit and 32-bit timers 0, select channel 2 to set channel 1. For 16-bit and
Pokitto 30:796f9611d2ac 421 * 32-bit timers 1, select channel 1. (User manual designation of channel 1 is capture
Pokitto 30:796f9611d2ac 422 * slot 2).
Pokitto 30:796f9611d2ac 423 */
Pokitto 30:796f9611d2ac 424 STATIC INLINE void Chip_TIMER_CaptureEnableInt(LPC_TIMER_T *pTMR, int8_t capnum)
Pokitto 30:796f9611d2ac 425 {
Pokitto 30:796f9611d2ac 426 pTMR->CCR |= TIMER_INT_ON_CAP(capnum);
Pokitto 30:796f9611d2ac 427 }
Pokitto 30:796f9611d2ac 428
Pokitto 30:796f9611d2ac 429 /**
Pokitto 30:796f9611d2ac 430 * @brief Disables interrupt on capture of selected CAP signal
Pokitto 30:796f9611d2ac 431 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 432 * @param capnum : Capture signal/register to use
Pokitto 30:796f9611d2ac 433 * @return Nothing
Pokitto 30:796f9611d2ac 434 * @note <b>Special handling for timer 0</b><br>
Pokitto 30:796f9611d2ac 435 * For 16-bit and 32-bit timers 0, select channel 2 to set channel 1. For 16-bit and
Pokitto 30:796f9611d2ac 436 * 32-bit timers 1, select channel 1. (User manual designation of channel 1 is capture
Pokitto 30:796f9611d2ac 437 * slot 2).
Pokitto 30:796f9611d2ac 438 */
Pokitto 30:796f9611d2ac 439 STATIC INLINE void Chip_TIMER_CaptureDisableInt(LPC_TIMER_T *pTMR, int8_t capnum)
Pokitto 30:796f9611d2ac 440 {
Pokitto 30:796f9611d2ac 441 pTMR->CCR &= ~TIMER_INT_ON_CAP(capnum);
Pokitto 30:796f9611d2ac 442 }
Pokitto 30:796f9611d2ac 443
Pokitto 30:796f9611d2ac 444 /**
Pokitto 30:796f9611d2ac 445 * @brief Standard timer initial match pin state and change state
Pokitto 30:796f9611d2ac 446 */
Pokitto 30:796f9611d2ac 447 typedef enum IP_TIMER_PIN_MATCH_STATE {
Pokitto 30:796f9611d2ac 448 TIMER_EXTMATCH_DO_NOTHING = 0, /*!< Timer match state does nothing on match pin */
Pokitto 30:796f9611d2ac 449 TIMER_EXTMATCH_CLEAR = 1, /*!< Timer match state sets match pin low */
Pokitto 30:796f9611d2ac 450 TIMER_EXTMATCH_SET = 2, /*!< Timer match state sets match pin high */
Pokitto 30:796f9611d2ac 451 TIMER_EXTMATCH_TOGGLE = 3 /*!< Timer match state toggles match pin */
Pokitto 30:796f9611d2ac 452 } TIMER_PIN_MATCH_STATE_T;
Pokitto 30:796f9611d2ac 453
Pokitto 30:796f9611d2ac 454 /**
Pokitto 30:796f9611d2ac 455 * @brief Sets external match control (MATn.matchnum) pin control. For the pin
Pokitto 30:796f9611d2ac 456 * selected with matchnum, sets the function of the pin that occurs on
Pokitto 30:796f9611d2ac 457 * a terminal count match for the match count.
Pokitto 30:796f9611d2ac 458 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 459 * @param initial_state : Initial state of the pin, high(1) or low(0)
Pokitto 30:796f9611d2ac 460 * @param matchState : Selects the match state for the pin
Pokitto 30:796f9611d2ac 461 * @param matchnum : MATn.matchnum signal to use
Pokitto 30:796f9611d2ac 462 * @return Nothing
Pokitto 30:796f9611d2ac 463 * @note For the pin selected with matchnum, sets the function of the pin that occurs on
Pokitto 30:796f9611d2ac 464 * a terminal count match for the match count.
Pokitto 30:796f9611d2ac 465 */
Pokitto 30:796f9611d2ac 466 void Chip_TIMER_ExtMatchControlSet(LPC_TIMER_T *pTMR, int8_t initial_state,
Pokitto 30:796f9611d2ac 467 TIMER_PIN_MATCH_STATE_T matchState, int8_t matchnum);
Pokitto 30:796f9611d2ac 468
Pokitto 30:796f9611d2ac 469 /**
Pokitto 30:796f9611d2ac 470 * @brief Standard timer clock and edge for count source
Pokitto 30:796f9611d2ac 471 */
Pokitto 30:796f9611d2ac 472 typedef enum IP_TIMER_CAP_SRC_STATE {
Pokitto 30:796f9611d2ac 473 TIMER_CAPSRC_RISING_PCLK = 0, /*!< Timer ticks on PCLK rising edge */
Pokitto 30:796f9611d2ac 474 TIMER_CAPSRC_RISING_CAPN = 1, /*!< Timer ticks on CAPn.x rising edge */
Pokitto 30:796f9611d2ac 475 TIMER_CAPSRC_FALLING_CAPN = 2, /*!< Timer ticks on CAPn.x falling edge */
Pokitto 30:796f9611d2ac 476 TIMER_CAPSRC_BOTH_CAPN = 3 /*!< Timer ticks on CAPn.x both edges */
Pokitto 30:796f9611d2ac 477 } TIMER_CAP_SRC_STATE_T;
Pokitto 30:796f9611d2ac 478
Pokitto 30:796f9611d2ac 479 /**
Pokitto 30:796f9611d2ac 480 * @brief Sets timer count source and edge with the selected passed from CapSrc.
Pokitto 30:796f9611d2ac 481 * If CapSrc selected a CAPn pin, select the specific CAPn pin with the capnum value.
Pokitto 30:796f9611d2ac 482 * @param pTMR : Pointer to timer IP register address
Pokitto 30:796f9611d2ac 483 * @param capSrc : timer clock source and edge
Pokitto 30:796f9611d2ac 484 * @param capnum : CAPn.capnum pin to use (if used)
Pokitto 30:796f9611d2ac 485 * @return Nothing
Pokitto 30:796f9611d2ac 486 * @note If CapSrc selected a CAPn pin, select the specific CAPn pin with the capnum value.
Pokitto 30:796f9611d2ac 487 */
Pokitto 30:796f9611d2ac 488 STATIC INLINE void Chip_TIMER_TIMER_SetCountClockSrc(LPC_TIMER_T *pTMR,
Pokitto 30:796f9611d2ac 489 TIMER_CAP_SRC_STATE_T capSrc,
Pokitto 30:796f9611d2ac 490 int8_t capnum)
Pokitto 30:796f9611d2ac 491 {
Pokitto 30:796f9611d2ac 492 pTMR->CTCR = (uint32_t) capSrc | ((uint32_t) capnum) << 2;
Pokitto 30:796f9611d2ac 493 }
Pokitto 30:796f9611d2ac 494
Pokitto 30:796f9611d2ac 495 /**
Pokitto 30:796f9611d2ac 496 * @}
Pokitto 30:796f9611d2ac 497 */
Pokitto 30:796f9611d2ac 498
Pokitto 30:796f9611d2ac 499 #ifdef __cplusplus
Pokitto 30:796f9611d2ac 500 }
Pokitto 30:796f9611d2ac 501 #endif
Pokitto 30:796f9611d2ac 502
Pokitto 30:796f9611d2ac 503 #endif /* __TIMER_11U6X_H_ */
Pokitto 30:796f9611d2ac 504