Pinmanee Truz
get an input from RFID to control the LCD
Fork of
LCD4884
by 
Dan Ghiciulescu
MFRC522.h@4:5977fe753a55, 2017-12-11 (annotated)
- Committer:
- Pinmanee
- Date:
- Mon Dec 11 15:10:01 2017 +0000
- Revision:
- 4:5977fe753a55
- Parent:
- 1:baf91b6482eb
LCD that can show graph
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Pinmanee | 1:baf91b6482eb | 1 | /** |
| Pinmanee | 1:baf91b6482eb | 2 | * MFRC522.h - Library to use ARDUINO RFID MODULE KIT 13.56 MHZ WITH TAGS SPI W AND R BY COOQROBOT. |
| Pinmanee | 1:baf91b6482eb | 3 | * Based on code Dr.Leong ( WWW.B2CQSHOP.COM ) |
| Pinmanee | 1:baf91b6482eb | 4 | * Created by Miguel Balboa (circuitito.com), Jan, 2012. |
| Pinmanee | 1:baf91b6482eb | 5 | * Rewritten by Soren Thing Andersen (access.thing.dk), fall of 2013 (Translation to English, refactored, comments, anti collision, cascade levels.) |
| Pinmanee | 1:baf91b6482eb | 6 | * Ported to mbed by Martin Olejar, Dec, 2013 |
| Pinmanee | 1:baf91b6482eb | 7 | * |
| Pinmanee | 1:baf91b6482eb | 8 | * Please read this file for an overview and then MFRC522.cpp for comments on the specific functions. |
| Pinmanee | 1:baf91b6482eb | 9 | * Search for "mf-rc522" on ebay.com to purchase the MF-RC522 board. |
| Pinmanee | 1:baf91b6482eb | 10 | * |
| Pinmanee | 1:baf91b6482eb | 11 | * There are three hardware components involved: |
| Pinmanee | 1:baf91b6482eb | 12 | * 1) The micro controller: An Arduino |
| Pinmanee | 1:baf91b6482eb | 13 | * 2) The PCD (short for Proximity Coupling Device): NXP MFRC522 Contactless Reader IC |
| Pinmanee | 1:baf91b6482eb | 14 | * 3) The PICC (short for Proximity Integrated Circuit Card): A card or tag using the ISO 14443A interface, eg Mifare or NTAG203. |
| Pinmanee | 1:baf91b6482eb | 15 | * |
| Pinmanee | 1:baf91b6482eb | 16 | * The microcontroller and card reader uses SPI for communication. |
| Pinmanee | 1:baf91b6482eb | 17 | * The protocol is described in the MFRC522 datasheet: http://www.nxp.com/documents/data_sheet/MFRC522.pdf |
| Pinmanee | 1:baf91b6482eb | 18 | * |
| Pinmanee | 1:baf91b6482eb | 19 | * The card reader and the tags communicate using a 13.56MHz electromagnetic field. |
| Pinmanee | 1:baf91b6482eb | 20 | * The protocol is defined in ISO/IEC 14443-3 Identification cards -- Contactless integrated circuit cards -- Proximity cards -- Part 3: Initialization and anticollision". |
| Pinmanee | 1:baf91b6482eb | 21 | * A free version of the final draft can be found at http://wg8.de/wg8n1496_17n3613_Ballot_FCD14443-3.pdf |
| Pinmanee | 1:baf91b6482eb | 22 | * Details are found in chapter 6, Type A: Initialization and anticollision. |
| Pinmanee | 1:baf91b6482eb | 23 | * |
| Pinmanee | 1:baf91b6482eb | 24 | * If only the PICC UID is wanted, the above documents has all the needed information. |
| Pinmanee | 1:baf91b6482eb | 25 | * To read and write from MIFARE PICCs, the MIFARE protocol is used after the PICC has been selected. |
| Pinmanee | 1:baf91b6482eb | 26 | * The MIFARE Classic chips and protocol is described in the datasheets: |
| Pinmanee | 1:baf91b6482eb | 27 | * 1K: http://www.nxp.com/documents/data_sheet/MF1S503x.pdf |
| Pinmanee | 1:baf91b6482eb | 28 | * 4K: http://www.nxp.com/documents/data_sheet/MF1S703x.pdf |
| Pinmanee | 1:baf91b6482eb | 29 | * Mini: http://www.idcardmarket.com/download/mifare_S20_datasheet.pdf |
| Pinmanee | 1:baf91b6482eb | 30 | * The MIFARE Ultralight chip and protocol is described in the datasheets: |
| Pinmanee | 1:baf91b6482eb | 31 | * Ultralight: http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf |
| Pinmanee | 1:baf91b6482eb | 32 | * Ultralight C: http://www.nxp.com/documents/short_data_sheet/MF0ICU2_SDS.pdf |
| Pinmanee | 1:baf91b6482eb | 33 | * |
| Pinmanee | 1:baf91b6482eb | 34 | * MIFARE Classic 1K (MF1S503x): |
| Pinmanee | 1:baf91b6482eb | 35 | * Has 16 sectors * 4 blocks/sector * 16 bytes/block = 1024 bytes. |
| Pinmanee | 1:baf91b6482eb | 36 | * The blocks are numbered 0-63. |
| Pinmanee | 1:baf91b6482eb | 37 | * Block 3 in each sector is the Sector Trailer. See http://www.nxp.com/documents/data_sheet/MF1S503x.pdf sections 8.6 and 8.7: |
| Pinmanee | 1:baf91b6482eb | 38 | * Bytes 0-5: Key A |
| Pinmanee | 1:baf91b6482eb | 39 | * Bytes 6-8: Access Bits |
| Pinmanee | 1:baf91b6482eb | 40 | * Bytes 9: User data |
| Pinmanee | 1:baf91b6482eb | 41 | * Bytes 10-15: Key B (or user data) |
| Pinmanee | 1:baf91b6482eb | 42 | * Block 0 is read only manufacturer data. |
| Pinmanee | 1:baf91b6482eb | 43 | * To access a block, an authentication using a key from the block's sector must be performed first. |
| Pinmanee | 1:baf91b6482eb | 44 | * Example: To read from block 10, first authenticate using a key from sector 3 (blocks 8-11). |
| Pinmanee | 1:baf91b6482eb | 45 | * All keys are set to FFFFFFFFFFFFh at chip delivery. |
| Pinmanee | 1:baf91b6482eb | 46 | * Warning: Please read section 8.7 "Memory Access". It includes this text: if the PICC detects a format violation the whole sector is irreversibly blocked. |
| Pinmanee | 1:baf91b6482eb | 47 | * To use a block in "value block" mode (for Increment/Decrement operations) you need to change the sector trailer. Use PICC_SetAccessBits() to calculate the bit patterns. |
| Pinmanee | 1:baf91b6482eb | 48 | * MIFARE Classic 4K (MF1S703x): |
| Pinmanee | 1:baf91b6482eb | 49 | * Has (32 sectors * 4 blocks/sector + 8 sectors * 16 blocks/sector) * 16 bytes/block = 4096 bytes. |
| Pinmanee | 1:baf91b6482eb | 50 | * The blocks are numbered 0-255. |
| Pinmanee | 1:baf91b6482eb | 51 | * The last block in each sector is the Sector Trailer like above. |
| Pinmanee | 1:baf91b6482eb | 52 | * MIFARE Classic Mini (MF1 IC S20): |
| Pinmanee | 1:baf91b6482eb | 53 | * Has 5 sectors * 4 blocks/sector * 16 bytes/block = 320 bytes. |
| Pinmanee | 1:baf91b6482eb | 54 | * The blocks are numbered 0-19. |
| Pinmanee | 1:baf91b6482eb | 55 | * The last block in each sector is the Sector Trailer like above. |
| Pinmanee | 1:baf91b6482eb | 56 | * |
| Pinmanee | 1:baf91b6482eb | 57 | * MIFARE Ultralight (MF0ICU1): |
| Pinmanee | 1:baf91b6482eb | 58 | * Has 16 pages of 4 bytes = 64 bytes. |
| Pinmanee | 1:baf91b6482eb | 59 | * Pages 0 + 1 is used for the 7-byte UID. |
| Pinmanee | 1:baf91b6482eb | 60 | * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2) |
| Pinmanee | 1:baf91b6482eb | 61 | * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0. |
| Pinmanee | 1:baf91b6482eb | 62 | * Pages 4-15 are read/write unless blocked by the lock bytes in page 2. |
| Pinmanee | 1:baf91b6482eb | 63 | * MIFARE Ultralight C (MF0ICU2): |
| Pinmanee | 1:baf91b6482eb | 64 | * Has 48 pages of 4 bytes = 64 bytes. |
| Pinmanee | 1:baf91b6482eb | 65 | * Pages 0 + 1 is used for the 7-byte UID. |
| Pinmanee | 1:baf91b6482eb | 66 | * Page 2 contains the last chech digit for the UID, one byte manufacturer internal data, and the lock bytes (see http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf section 8.5.2) |
| Pinmanee | 1:baf91b6482eb | 67 | * Page 3 is OTP, One Time Programmable bits. Once set to 1 they cannot revert to 0. |
| Pinmanee | 1:baf91b6482eb | 68 | * Pages 4-39 are read/write unless blocked by the lock bytes in page 2. |
| Pinmanee | 1:baf91b6482eb | 69 | * Page 40 Lock bytes |
| Pinmanee | 1:baf91b6482eb | 70 | * Page 41 16 bit one way counter |
| Pinmanee | 1:baf91b6482eb | 71 | * Pages 42-43 Authentication configuration |
| Pinmanee | 1:baf91b6482eb | 72 | * Pages 44-47 Authentication key |
| Pinmanee | 1:baf91b6482eb | 73 | */ |
| Pinmanee | 1:baf91b6482eb | 74 | #ifndef MFRC522_h |
| Pinmanee | 1:baf91b6482eb | 75 | #define MFRC522_h |
| Pinmanee | 1:baf91b6482eb | 76 | |
| Pinmanee | 1:baf91b6482eb | 77 | #include "mbed.h" |
| Pinmanee | 1:baf91b6482eb | 78 | |
| Pinmanee | 1:baf91b6482eb | 79 | /** |
| Pinmanee | 1:baf91b6482eb | 80 | * MFRC522 example |
| Pinmanee | 1:baf91b6482eb | 81 | * |
| Pinmanee | 1:baf91b6482eb | 82 | * @code |
| Pinmanee | 1:baf91b6482eb | 83 | * #include "mbed.h" |
| Pinmanee | 1:baf91b6482eb | 84 | * #include "MFRC522.h" |
| Pinmanee | 1:baf91b6482eb | 85 | * |
| Pinmanee | 1:baf91b6482eb | 86 | * //KL25Z Pins for MFRC522 SPI interface |
| Pinmanee | 1:baf91b6482eb | 87 | * #define SPI_MOSI PTC6 |
| Pinmanee | 1:baf91b6482eb | 88 | * #define SPI_MISO PTC7 |
| Pinmanee | 1:baf91b6482eb | 89 | * #define SPI_SCLK PTC5 |
| Pinmanee | 1:baf91b6482eb | 90 | * #define SPI_CS PTC4 |
| Pinmanee | 1:baf91b6482eb | 91 | * // KL25Z Pin for MFRC522 reset |
| Pinmanee | 1:baf91b6482eb | 92 | * #define MF_RESET PTC3 |
| Pinmanee | 1:baf91b6482eb | 93 | * // KL25Z Pins for Debug UART port |
| Pinmanee | 1:baf91b6482eb | 94 | * #define UART_RX PTA1 |
| Pinmanee | 1:baf91b6482eb | 95 | * #define UART_TX PTA2 |
| Pinmanee | 1:baf91b6482eb | 96 | * |
| Pinmanee | 1:baf91b6482eb | 97 | * DigitalOut LedRed (LED_RED); |
| Pinmanee | 1:baf91b6482eb | 98 | * DigitalOut LedGreen (LED_GREEN); |
| Pinmanee | 1:baf91b6482eb | 99 | * |
| Pinmanee | 1:baf91b6482eb | 100 | * Serial DebugUART(UART_TX, UART_RX); |
| Pinmanee | 1:baf91b6482eb | 101 | * MFRC522 RfChip (SPI_MOSI, SPI_MISO, SPI_SCLK, SPI_CS, MF_RESET); |
| Pinmanee | 1:baf91b6482eb | 102 | * |
| Pinmanee | 1:baf91b6482eb | 103 | * int main(void) { |
| Pinmanee | 1:baf91b6482eb | 104 | * // Set debug UART speed |
| Pinmanee | 1:baf91b6482eb | 105 | * DebugUART.baud(115200); |
| Pinmanee | 1:baf91b6482eb | 106 | * |
| Pinmanee | 1:baf91b6482eb | 107 | * // Init. RC522 Chip |
| Pinmanee | 1:baf91b6482eb | 108 | * RfChip.PCD_Init(); |
| Pinmanee | 1:baf91b6482eb | 109 | * |
| Pinmanee | 1:baf91b6482eb | 110 | * while (true) { |
| Pinmanee | 1:baf91b6482eb | 111 | * LedRed = 1; |
| Pinmanee | 1:baf91b6482eb | 112 | * LedGreen = 1; |
| Pinmanee | 1:baf91b6482eb | 113 | * |
| Pinmanee | 1:baf91b6482eb | 114 | * // Look for new cards |
| Pinmanee | 1:baf91b6482eb | 115 | * if ( ! RfChip.PICC_IsNewCardPresent()) |
| Pinmanee | 1:baf91b6482eb | 116 | * { |
| Pinmanee | 1:baf91b6482eb | 117 | * wait_ms(500); |
| Pinmanee | 1:baf91b6482eb | 118 | * continue; |
| Pinmanee | 1:baf91b6482eb | 119 | * } |
| Pinmanee | 1:baf91b6482eb | 120 | * |
| Pinmanee | 1:baf91b6482eb | 121 | * LedRed = 0; |
| Pinmanee | 1:baf91b6482eb | 122 | * |
| Pinmanee | 1:baf91b6482eb | 123 | * // Select one of the cards |
| Pinmanee | 1:baf91b6482eb | 124 | * if ( ! RfChip.PICC_ReadCardSerial()) |
| Pinmanee | 1:baf91b6482eb | 125 | * { |
| Pinmanee | 1:baf91b6482eb | 126 | * wait_ms(500); |
| Pinmanee | 1:baf91b6482eb | 127 | * continue; |
| Pinmanee | 1:baf91b6482eb | 128 | * } |
| Pinmanee | 1:baf91b6482eb | 129 | * |
| Pinmanee | 1:baf91b6482eb | 130 | * LedRed = 1; |
| Pinmanee | 1:baf91b6482eb | 131 | * LedGreen = 0; |
| Pinmanee | 1:baf91b6482eb | 132 | * |
| Pinmanee | 1:baf91b6482eb | 133 | * // Print Card UID |
| Pinmanee | 1:baf91b6482eb | 134 | * printf("Card UID: "); |
| Pinmanee | 1:baf91b6482eb | 135 | * for (uint8_t i = 0; i < RfChip.uid.size; i++) |
| Pinmanee | 1:baf91b6482eb | 136 | * { |
| Pinmanee | 1:baf91b6482eb | 137 | * printf(" %X02", RfChip.uid.uidByte[i]); |
| Pinmanee | 1:baf91b6482eb | 138 | * } |
| Pinmanee | 1:baf91b6482eb | 139 | * printf("\n\r"); |
| Pinmanee | 1:baf91b6482eb | 140 | * |
| Pinmanee | 1:baf91b6482eb | 141 | * // Print Card type |
| Pinmanee | 1:baf91b6482eb | 142 | * uint8_t piccType = RfChip.PICC_GetType(RfChip.uid.sak); |
| Pinmanee | 1:baf91b6482eb | 143 | * printf("PICC Type: %s \n\r", RfChip.PICC_GetTypeName(piccType)); |
| Pinmanee | 1:baf91b6482eb | 144 | * wait_ms(1000); |
| Pinmanee | 1:baf91b6482eb | 145 | * } |
| Pinmanee | 1:baf91b6482eb | 146 | * } |
| Pinmanee | 1:baf91b6482eb | 147 | * @endcode |
| Pinmanee | 1:baf91b6482eb | 148 | */ |
| Pinmanee | 1:baf91b6482eb | 149 | |
| Pinmanee | 1:baf91b6482eb | 150 | class MFRC522 { |
| Pinmanee | 1:baf91b6482eb | 151 | public: |
| Pinmanee | 1:baf91b6482eb | 152 | |
| Pinmanee | 1:baf91b6482eb | 153 | /** |
| Pinmanee | 1:baf91b6482eb | 154 | * MFRC522 registers (described in chapter 9 of the datasheet). |
| Pinmanee | 1:baf91b6482eb | 155 | * When using SPI all addresses are shifted one bit left in the "SPI address byte" (section 8.1.2.3) |
| Pinmanee | 1:baf91b6482eb | 156 | */ |
| Pinmanee | 1:baf91b6482eb | 157 | enum PCD_Register { |
| Pinmanee | 1:baf91b6482eb | 158 | // Page 0: Command and status |
| Pinmanee | 1:baf91b6482eb | 159 | // 0x00 // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 160 | CommandReg = 0x01 << 1, // starts and stops command execution |
| Pinmanee | 1:baf91b6482eb | 161 | ComIEnReg = 0x02 << 1, // enable and disable interrupt request control bits |
| Pinmanee | 1:baf91b6482eb | 162 | DivIEnReg = 0x03 << 1, // enable and disable interrupt request control bits |
| Pinmanee | 1:baf91b6482eb | 163 | ComIrqReg = 0x04 << 1, // interrupt request bits |
| Pinmanee | 1:baf91b6482eb | 164 | DivIrqReg = 0x05 << 1, // interrupt request bits |
| Pinmanee | 1:baf91b6482eb | 165 | ErrorReg = 0x06 << 1, // error bits showing the error status of the last command executed |
| Pinmanee | 1:baf91b6482eb | 166 | Status1Reg = 0x07 << 1, // communication status bits |
| Pinmanee | 1:baf91b6482eb | 167 | Status2Reg = 0x08 << 1, // receiver and transmitter status bits |
| Pinmanee | 1:baf91b6482eb | 168 | FIFODataReg = 0x09 << 1, // input and output of 64 byte FIFO buffer |
| Pinmanee | 1:baf91b6482eb | 169 | FIFOLevelReg = 0x0A << 1, // number of bytes stored in the FIFO buffer |
| Pinmanee | 1:baf91b6482eb | 170 | WaterLevelReg = 0x0B << 1, // level for FIFO underflow and overflow warning |
| Pinmanee | 1:baf91b6482eb | 171 | ControlReg = 0x0C << 1, // miscellaneous control registers |
| Pinmanee | 1:baf91b6482eb | 172 | BitFramingReg = 0x0D << 1, // adjustments for bit-oriented frames |
| Pinmanee | 1:baf91b6482eb | 173 | CollReg = 0x0E << 1, // bit position of the first bit-collision detected on the RF interface |
| Pinmanee | 1:baf91b6482eb | 174 | // 0x0F // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 175 | |
| Pinmanee | 1:baf91b6482eb | 176 | // Page 1:Command |
| Pinmanee | 1:baf91b6482eb | 177 | // 0x10 // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 178 | ModeReg = 0x11 << 1, // defines general modes for transmitting and receiving |
| Pinmanee | 1:baf91b6482eb | 179 | TxModeReg = 0x12 << 1, // defines transmission data rate and framing |
| Pinmanee | 1:baf91b6482eb | 180 | RxModeReg = 0x13 << 1, // defines reception data rate and framing |
| Pinmanee | 1:baf91b6482eb | 181 | TxControlReg = 0x14 << 1, // controls the logical behavior of the antenna driver pins TX1 and TX2 |
| Pinmanee | 1:baf91b6482eb | 182 | TxASKReg = 0x15 << 1, // controls the setting of the transmission modulation |
| Pinmanee | 1:baf91b6482eb | 183 | TxSelReg = 0x16 << 1, // selects the internal sources for the antenna driver |
| Pinmanee | 1:baf91b6482eb | 184 | RxSelReg = 0x17 << 1, // selects internal receiver settings |
| Pinmanee | 1:baf91b6482eb | 185 | RxThresholdReg = 0x18 << 1, // selects thresholds for the bit decoder |
| Pinmanee | 1:baf91b6482eb | 186 | DemodReg = 0x19 << 1, // defines demodulator settings |
| Pinmanee | 1:baf91b6482eb | 187 | // 0x1A // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 188 | // 0x1B // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 189 | MfTxReg = 0x1C << 1, // controls some MIFARE communication transmit parameters |
| Pinmanee | 1:baf91b6482eb | 190 | MfRxReg = 0x1D << 1, // controls some MIFARE communication receive parameters |
| Pinmanee | 1:baf91b6482eb | 191 | // 0x1E // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 192 | SerialSpeedReg = 0x1F << 1, // selects the speed of the serial UART interface |
| Pinmanee | 1:baf91b6482eb | 193 | |
| Pinmanee | 1:baf91b6482eb | 194 | // Page 2: Configuration |
| Pinmanee | 1:baf91b6482eb | 195 | // 0x20 // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 196 | CRCResultRegH = 0x21 << 1, // shows the MSB and LSB values of the CRC calculation |
| Pinmanee | 1:baf91b6482eb | 197 | CRCResultRegL = 0x22 << 1, |
| Pinmanee | 1:baf91b6482eb | 198 | // 0x23 // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 199 | ModWidthReg = 0x24 << 1, // controls the ModWidth setting? |
| Pinmanee | 1:baf91b6482eb | 200 | // 0x25 // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 201 | RFCfgReg = 0x26 << 1, // configures the receiver gain |
| Pinmanee | 1:baf91b6482eb | 202 | GsNReg = 0x27 << 1, // selects the conductance of the antenna driver pins TX1 and TX2 for modulation |
| Pinmanee | 1:baf91b6482eb | 203 | CWGsPReg = 0x28 << 1, // defines the conductance of the p-driver output during periods of no modulation |
| Pinmanee | 1:baf91b6482eb | 204 | ModGsPReg = 0x29 << 1, // defines the conductance of the p-driver output during periods of modulation |
| Pinmanee | 1:baf91b6482eb | 205 | TModeReg = 0x2A << 1, // defines settings for the internal timer |
| Pinmanee | 1:baf91b6482eb | 206 | TPrescalerReg = 0x2B << 1, // the lower 8 bits of the TPrescaler value. The 4 high bits are in TModeReg. |
| Pinmanee | 1:baf91b6482eb | 207 | TReloadRegH = 0x2C << 1, // defines the 16-bit timer reload value |
| Pinmanee | 1:baf91b6482eb | 208 | TReloadRegL = 0x2D << 1, |
| Pinmanee | 1:baf91b6482eb | 209 | TCntValueRegH = 0x2E << 1, // shows the 16-bit timer value |
| Pinmanee | 1:baf91b6482eb | 210 | TCntValueRegL = 0x2F << 1, |
| Pinmanee | 1:baf91b6482eb | 211 | |
| Pinmanee | 1:baf91b6482eb | 212 | // Page 3:Test Registers |
| Pinmanee | 1:baf91b6482eb | 213 | // 0x30 // reserved for future use |
| Pinmanee | 1:baf91b6482eb | 214 | TestSel1Reg = 0x31 << 1, // general test signal configuration |
| Pinmanee | 1:baf91b6482eb | 215 | TestSel2Reg = 0x32 << 1, // general test signal configuration |
| Pinmanee | 1:baf91b6482eb | 216 | TestPinEnReg = 0x33 << 1, // enables pin output driver on pins D1 to D7 |
| Pinmanee | 1:baf91b6482eb | 217 | TestPinValueReg = 0x34 << 1, // defines the values for D1 to D7 when it is used as an I/O bus |
| Pinmanee | 1:baf91b6482eb | 218 | TestBusReg = 0x35 << 1, // shows the status of the internal test bus |
| Pinmanee | 1:baf91b6482eb | 219 | AutoTestReg = 0x36 << 1, // controls the digital self test |
| Pinmanee | 1:baf91b6482eb | 220 | VersionReg = 0x37 << 1, // shows the software version |
| Pinmanee | 1:baf91b6482eb | 221 | AnalogTestReg = 0x38 << 1, // controls the pins AUX1 and AUX2 |
| Pinmanee | 1:baf91b6482eb | 222 | TestDAC1Reg = 0x39 << 1, // defines the test value for TestDAC1 |
| Pinmanee | 1:baf91b6482eb | 223 | TestDAC2Reg = 0x3A << 1, // defines the test value for TestDAC2 |
| Pinmanee | 1:baf91b6482eb | 224 | TestADCReg = 0x3B << 1 // shows the value of ADC I and Q channels |
| Pinmanee | 1:baf91b6482eb | 225 | // 0x3C // reserved for production tests |
| Pinmanee | 1:baf91b6482eb | 226 | // 0x3D // reserved for production tests |
| Pinmanee | 1:baf91b6482eb | 227 | // 0x3E // reserved for production tests |
| Pinmanee | 1:baf91b6482eb | 228 | // 0x3F // reserved for production tests |
| Pinmanee | 1:baf91b6482eb | 229 | }; |
| Pinmanee | 1:baf91b6482eb | 230 | |
| Pinmanee | 1:baf91b6482eb | 231 | // MFRC522 commands Described in chapter 10 of the datasheet. |
| Pinmanee | 1:baf91b6482eb | 232 | enum PCD_Command { |
| Pinmanee | 1:baf91b6482eb | 233 | PCD_Idle = 0x00, // no action, cancels current command execution |
| Pinmanee | 1:baf91b6482eb | 234 | PCD_Mem = 0x01, // stores 25 bytes into the internal buffer |
| Pinmanee | 1:baf91b6482eb | 235 | PCD_GenerateRandomID = 0x02, // generates a 10-byte random ID number |
| Pinmanee | 1:baf91b6482eb | 236 | PCD_CalcCRC = 0x03, // activates the CRC coprocessor or performs a self test |
| Pinmanee | 1:baf91b6482eb | 237 | PCD_Transmit = 0x04, // transmits data from the FIFO buffer |
| Pinmanee | 1:baf91b6482eb | 238 | PCD_NoCmdChange = 0x07, // no command change, can be used to modify the CommandReg register bits without affecting the command, for example, the PowerDown bit |
| Pinmanee | 1:baf91b6482eb | 239 | PCD_Receive = 0x08, // activates the receiver circuits |
| Pinmanee | 1:baf91b6482eb | 240 | PCD_Transceive = 0x0C, // transmits data from FIFO buffer to antenna and automatically activates the receiver after transmission |
| Pinmanee | 1:baf91b6482eb | 241 | PCD_MFAuthent = 0x0E, // performs the MIFARE standard authentication as a reader |
| Pinmanee | 1:baf91b6482eb | 242 | PCD_SoftReset = 0x0F // resets the MFRC522 |
| Pinmanee | 1:baf91b6482eb | 243 | }; |
| Pinmanee | 1:baf91b6482eb | 244 | |
| Pinmanee | 1:baf91b6482eb | 245 | // Commands sent to the PICC. |
| Pinmanee | 1:baf91b6482eb | 246 | enum PICC_Command { |
| Pinmanee | 1:baf91b6482eb | 247 | // The commands used by the PCD to manage communication with several PICCs (ISO 14443-3, Type A, section 6.4) |
| Pinmanee | 1:baf91b6482eb | 248 | PICC_CMD_REQA = 0x26, // REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame. |
| Pinmanee | 1:baf91b6482eb | 249 | PICC_CMD_WUPA = 0x52, // Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame. |
| Pinmanee | 1:baf91b6482eb | 250 | PICC_CMD_CT = 0x88, // Cascade Tag. Not really a command, but used during anti collision. |
| Pinmanee | 1:baf91b6482eb | 251 | PICC_CMD_SEL_CL1 = 0x93, // Anti collision/Select, Cascade Level 1 |
| Pinmanee | 1:baf91b6482eb | 252 | PICC_CMD_SEL_CL2 = 0x95, // Anti collision/Select, Cascade Level 1 |
| Pinmanee | 1:baf91b6482eb | 253 | PICC_CMD_SEL_CL3 = 0x97, // Anti collision/Select, Cascade Level 1 |
| Pinmanee | 1:baf91b6482eb | 254 | PICC_CMD_HLTA = 0x50, // HaLT command, Type A. Instructs an ACTIVE PICC to go to state HALT. |
| Pinmanee | 1:baf91b6482eb | 255 | |
| Pinmanee | 1:baf91b6482eb | 256 | // The commands used for MIFARE Classic (from http://www.nxp.com/documents/data_sheet/MF1S503x.pdf, Section 9) |
| Pinmanee | 1:baf91b6482eb | 257 | // Use PCD_MFAuthent to authenticate access to a sector, then use these commands to read/write/modify the blocks on the sector. |
| Pinmanee | 1:baf91b6482eb | 258 | // The read/write commands can also be used for MIFARE Ultralight. |
| Pinmanee | 1:baf91b6482eb | 259 | PICC_CMD_MF_AUTH_KEY_A = 0x60, // Perform authentication with Key A |
| Pinmanee | 1:baf91b6482eb | 260 | PICC_CMD_MF_AUTH_KEY_B = 0x61, // Perform authentication with Key B |
| Pinmanee | 1:baf91b6482eb | 261 | PICC_CMD_MF_READ = 0x30, // Reads one 16 byte block from the authenticated sector of the PICC. Also used for MIFARE Ultralight. |
| Pinmanee | 1:baf91b6482eb | 262 | PICC_CMD_MF_WRITE = 0xA0, // Writes one 16 byte block to the authenticated sector of the PICC. Called "COMPATIBILITY WRITE" for MIFARE Ultralight. |
| Pinmanee | 1:baf91b6482eb | 263 | PICC_CMD_MF_DECREMENT = 0xC0, // Decrements the contents of a block and stores the result in the internal data register. |
| Pinmanee | 1:baf91b6482eb | 264 | PICC_CMD_MF_INCREMENT = 0xC1, // Increments the contents of a block and stores the result in the internal data register. |
| Pinmanee | 1:baf91b6482eb | 265 | PICC_CMD_MF_RESTORE = 0xC2, // Reads the contents of a block into the internal data register. |
| Pinmanee | 1:baf91b6482eb | 266 | PICC_CMD_MF_TRANSFER = 0xB0, // Writes the contents of the internal data register to a block. |
| Pinmanee | 1:baf91b6482eb | 267 | |
| Pinmanee | 1:baf91b6482eb | 268 | // The commands used for MIFARE Ultralight (from http://www.nxp.com/documents/data_sheet/MF0ICU1.pdf, Section 8.6) |
| Pinmanee | 1:baf91b6482eb | 269 | // The PICC_CMD_MF_READ and PICC_CMD_MF_WRITE can also be used for MIFARE Ultralight. |
| Pinmanee | 1:baf91b6482eb | 270 | PICC_CMD_UL_WRITE = 0xA2 // Writes one 4 byte page to the PICC. |
| Pinmanee | 1:baf91b6482eb | 271 | }; |
| Pinmanee | 1:baf91b6482eb | 272 | |
| Pinmanee | 1:baf91b6482eb | 273 | // MIFARE constants that does not fit anywhere else |
| Pinmanee | 1:baf91b6482eb | 274 | enum MIFARE_Misc { |
| Pinmanee | 1:baf91b6482eb | 275 | MF_ACK = 0xA, // The MIFARE Classic uses a 4 bit ACK/NAK. Any other value than 0xA is NAK. |
| Pinmanee | 1:baf91b6482eb | 276 | MF_KEY_SIZE = 6 // A Mifare Crypto1 key is 6 bytes. |
| Pinmanee | 1:baf91b6482eb | 277 | }; |
| Pinmanee | 1:baf91b6482eb | 278 | |
| Pinmanee | 1:baf91b6482eb | 279 | // PICC types we can detect. Remember to update PICC_GetTypeName() if you add more. |
| Pinmanee | 1:baf91b6482eb | 280 | enum PICC_Type { |
| Pinmanee | 1:baf91b6482eb | 281 | PICC_TYPE_UNKNOWN = 0, |
| Pinmanee | 1:baf91b6482eb | 282 | PICC_TYPE_ISO_14443_4 = 1, // PICC compliant with ISO/IEC 14443-4 |
| Pinmanee | 1:baf91b6482eb | 283 | PICC_TYPE_ISO_18092 = 2, // PICC compliant with ISO/IEC 18092 (NFC) |
| Pinmanee | 1:baf91b6482eb | 284 | PICC_TYPE_MIFARE_MINI = 3, // MIFARE Classic protocol, 320 bytes |
| Pinmanee | 1:baf91b6482eb | 285 | PICC_TYPE_MIFARE_1K = 4, // MIFARE Classic protocol, 1KB |
| Pinmanee | 1:baf91b6482eb | 286 | PICC_TYPE_MIFARE_4K = 5, // MIFARE Classic protocol, 4KB |
| Pinmanee | 1:baf91b6482eb | 287 | PICC_TYPE_MIFARE_UL = 6, // MIFARE Ultralight or Ultralight C |
| Pinmanee | 1:baf91b6482eb | 288 | PICC_TYPE_MIFARE_PLUS = 7, // MIFARE Plus |
| Pinmanee | 1:baf91b6482eb | 289 | PICC_TYPE_TNP3XXX = 8, // Only mentioned in NXP AN 10833 MIFARE Type Identification Procedure |
| Pinmanee | 1:baf91b6482eb | 290 | PICC_TYPE_NOT_COMPLETE = 255 // SAK indicates UID is not complete. |
| Pinmanee | 1:baf91b6482eb | 291 | }; |
| Pinmanee | 1:baf91b6482eb | 292 | |
| Pinmanee | 1:baf91b6482eb | 293 | // Return codes from the functions in this class. Remember to update GetStatusCodeName() if you add more. |
| Pinmanee | 1:baf91b6482eb | 294 | enum StatusCode { |
| Pinmanee | 1:baf91b6482eb | 295 | STATUS_OK = 1, // Success |
| Pinmanee | 1:baf91b6482eb | 296 | STATUS_ERROR = 2, // Error in communication |
| Pinmanee | 1:baf91b6482eb | 297 | STATUS_COLLISION = 3, // Collision detected |
| Pinmanee | 1:baf91b6482eb | 298 | STATUS_TIMEOUT = 4, // Timeout in communication. |
| Pinmanee | 1:baf91b6482eb | 299 | STATUS_NO_ROOM = 5, // A buffer is not big enough. |
| Pinmanee | 1:baf91b6482eb | 300 | STATUS_INTERNAL_ERROR = 6, // Internal error in the code. Should not happen ;-) |
| Pinmanee | 1:baf91b6482eb | 301 | STATUS_INVALID = 7, // Invalid argument. |
| Pinmanee | 1:baf91b6482eb | 302 | STATUS_CRC_WRONG = 8, // The CRC_A does not match |
| Pinmanee | 1:baf91b6482eb | 303 | STATUS_MIFARE_NACK = 9 // A MIFARE PICC responded with NAK. |
| Pinmanee | 1:baf91b6482eb | 304 | }; |
| Pinmanee | 1:baf91b6482eb | 305 | |
| Pinmanee | 1:baf91b6482eb | 306 | // A struct used for passing the UID of a PICC. |
| Pinmanee | 1:baf91b6482eb | 307 | typedef struct { |
| Pinmanee | 1:baf91b6482eb | 308 | uint8_t size; // Number of bytes in the UID. 4, 7 or 10. |
| Pinmanee | 1:baf91b6482eb | 309 | uint8_t uidByte[10]; |
| Pinmanee | 1:baf91b6482eb | 310 | uint8_t sak; // The SAK (Select acknowledge) byte returned from the PICC after successful selection. |
| Pinmanee | 1:baf91b6482eb | 311 | } Uid; |
| Pinmanee | 1:baf91b6482eb | 312 | |
| Pinmanee | 1:baf91b6482eb | 313 | // A struct used for passing a MIFARE Crypto1 key |
| Pinmanee | 1:baf91b6482eb | 314 | typedef struct { |
| Pinmanee | 1:baf91b6482eb | 315 | uint8_t keyByte[MF_KEY_SIZE]; |
| Pinmanee | 1:baf91b6482eb | 316 | } MIFARE_Key; |
| Pinmanee | 1:baf91b6482eb | 317 | |
| Pinmanee | 1:baf91b6482eb | 318 | // Member variables |
| Pinmanee | 1:baf91b6482eb | 319 | Uid uid; // Used by PICC_ReadCardSerial(). |
| Pinmanee | 1:baf91b6482eb | 320 | |
| Pinmanee | 1:baf91b6482eb | 321 | // Size of the MFRC522 FIFO |
| Pinmanee | 1:baf91b6482eb | 322 | static const uint8_t FIFO_SIZE = 64; // The FIFO is 64 bytes. |
| Pinmanee | 1:baf91b6482eb | 323 | |
| Pinmanee | 1:baf91b6482eb | 324 | /** |
| Pinmanee | 1:baf91b6482eb | 325 | * MFRC522 constructor |
| Pinmanee | 1:baf91b6482eb | 326 | * |
| Pinmanee | 1:baf91b6482eb | 327 | * @param mosi SPI MOSI pin |
| Pinmanee | 1:baf91b6482eb | 328 | * @param miso SPI MISO pin |
| Pinmanee | 1:baf91b6482eb | 329 | * @param sclk SPI SCLK pin |
| Pinmanee | 1:baf91b6482eb | 330 | * @param cs SPI CS pin |
| Pinmanee | 1:baf91b6482eb | 331 | * @param reset Reset pin |
| Pinmanee | 1:baf91b6482eb | 332 | */ |
| Pinmanee | 1:baf91b6482eb | 333 | MFRC522(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset); |
| Pinmanee | 1:baf91b6482eb | 334 | |
| Pinmanee | 1:baf91b6482eb | 335 | /** |
| Pinmanee | 1:baf91b6482eb | 336 | * MFRC522 destructor |
| Pinmanee | 1:baf91b6482eb | 337 | */ |
| Pinmanee | 1:baf91b6482eb | 338 | ~MFRC522(); |
| Pinmanee | 1:baf91b6482eb | 339 | |
| Pinmanee | 1:baf91b6482eb | 340 | |
| Pinmanee | 1:baf91b6482eb | 341 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 342 | //! @name Functions for manipulating the MFRC522 |
| Pinmanee | 1:baf91b6482eb | 343 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 344 | //@{ |
| Pinmanee | 1:baf91b6482eb | 345 | |
| Pinmanee | 1:baf91b6482eb | 346 | /** |
| Pinmanee | 1:baf91b6482eb | 347 | * Initializes the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 348 | */ |
| Pinmanee | 1:baf91b6482eb | 349 | void PCD_Init (void); |
| Pinmanee | 1:baf91b6482eb | 350 | |
| Pinmanee | 1:baf91b6482eb | 351 | /** |
| Pinmanee | 1:baf91b6482eb | 352 | * Performs a soft reset on the MFRC522 chip and waits for it to be ready again. |
| Pinmanee | 1:baf91b6482eb | 353 | */ |
| Pinmanee | 1:baf91b6482eb | 354 | void PCD_Reset (void); |
| Pinmanee | 1:baf91b6482eb | 355 | |
| Pinmanee | 1:baf91b6482eb | 356 | /** |
| Pinmanee | 1:baf91b6482eb | 357 | * Turns the antenna on by enabling pins TX1 and TX2. |
| Pinmanee | 1:baf91b6482eb | 358 | * After a reset these pins disabled. |
| Pinmanee | 1:baf91b6482eb | 359 | */ |
| Pinmanee | 1:baf91b6482eb | 360 | void PCD_AntennaOn (void); |
| Pinmanee | 1:baf91b6482eb | 361 | |
| Pinmanee | 1:baf91b6482eb | 362 | /** |
| Pinmanee | 1:baf91b6482eb | 363 | * Writes a byte to the specified register in the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 364 | * The interface is described in the datasheet section 8.1.2. |
| Pinmanee | 1:baf91b6482eb | 365 | * |
| Pinmanee | 1:baf91b6482eb | 366 | * @param reg The register to write to. One of the PCD_Register enums. |
| Pinmanee | 1:baf91b6482eb | 367 | * @param value The value to write. |
| Pinmanee | 1:baf91b6482eb | 368 | */ |
| Pinmanee | 1:baf91b6482eb | 369 | void PCD_WriteRegister (uint8_t reg, uint8_t value); |
| Pinmanee | 1:baf91b6482eb | 370 | |
| Pinmanee | 1:baf91b6482eb | 371 | /** |
| Pinmanee | 1:baf91b6482eb | 372 | * Writes a number of bytes to the specified register in the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 373 | * The interface is described in the datasheet section 8.1.2. |
| Pinmanee | 1:baf91b6482eb | 374 | * |
| Pinmanee | 1:baf91b6482eb | 375 | * @param reg The register to write to. One of the PCD_Register enums. |
| Pinmanee | 1:baf91b6482eb | 376 | * @param count The number of bytes to write to the register |
| Pinmanee | 1:baf91b6482eb | 377 | * @param values The values to write. Byte array. |
| Pinmanee | 1:baf91b6482eb | 378 | */ |
| Pinmanee | 1:baf91b6482eb | 379 | void PCD_WriteRegister (uint8_t reg, uint8_t count, uint8_t *values); |
| Pinmanee | 1:baf91b6482eb | 380 | |
| Pinmanee | 1:baf91b6482eb | 381 | /** |
| Pinmanee | 1:baf91b6482eb | 382 | * Reads a byte from the specified register in the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 383 | * The interface is described in the datasheet section 8.1.2. |
| Pinmanee | 1:baf91b6482eb | 384 | * |
| Pinmanee | 1:baf91b6482eb | 385 | * @param reg The register to read from. One of the PCD_Register enums. |
| Pinmanee | 1:baf91b6482eb | 386 | * @returns Register value |
| Pinmanee | 1:baf91b6482eb | 387 | */ |
| Pinmanee | 1:baf91b6482eb | 388 | uint8_t PCD_ReadRegister (uint8_t reg); |
| Pinmanee | 1:baf91b6482eb | 389 | |
| Pinmanee | 1:baf91b6482eb | 390 | /** |
| Pinmanee | 1:baf91b6482eb | 391 | * Reads a number of bytes from the specified register in the MFRC522 chip. |
| Pinmanee | 1:baf91b6482eb | 392 | * The interface is described in the datasheet section 8.1.2. |
| Pinmanee | 1:baf91b6482eb | 393 | * |
| Pinmanee | 1:baf91b6482eb | 394 | * @param reg The register to read from. One of the PCD_Register enums. |
| Pinmanee | 1:baf91b6482eb | 395 | * @param count The number of bytes to read. |
| Pinmanee | 1:baf91b6482eb | 396 | * @param values Byte array to store the values in. |
| Pinmanee | 1:baf91b6482eb | 397 | * @param rxAlign Only bit positions rxAlign..7 in values[0] are updated. |
| Pinmanee | 1:baf91b6482eb | 398 | */ |
| Pinmanee | 1:baf91b6482eb | 399 | void PCD_ReadRegister (uint8_t reg, uint8_t count, uint8_t *values, uint8_t rxAlign = 0); |
| Pinmanee | 1:baf91b6482eb | 400 | |
| Pinmanee | 1:baf91b6482eb | 401 | /** |
| Pinmanee | 1:baf91b6482eb | 402 | * Sets the bits given in mask in register reg. |
| Pinmanee | 1:baf91b6482eb | 403 | * |
| Pinmanee | 1:baf91b6482eb | 404 | * @param reg The register to update. One of the PCD_Register enums. |
| Pinmanee | 1:baf91b6482eb | 405 | * @param mask The bits to set. |
| Pinmanee | 1:baf91b6482eb | 406 | */ |
| Pinmanee | 1:baf91b6482eb | 407 | void PCD_SetRegisterBits(uint8_t reg, uint8_t mask); |
| Pinmanee | 1:baf91b6482eb | 408 | |
| Pinmanee | 1:baf91b6482eb | 409 | /** |
| Pinmanee | 1:baf91b6482eb | 410 | * Clears the bits given in mask from register reg. |
| Pinmanee | 1:baf91b6482eb | 411 | * |
| Pinmanee | 1:baf91b6482eb | 412 | * @param reg The register to update. One of the PCD_Register enums. |
| Pinmanee | 1:baf91b6482eb | 413 | * @param mask The bits to clear. |
| Pinmanee | 1:baf91b6482eb | 414 | */ |
| Pinmanee | 1:baf91b6482eb | 415 | void PCD_ClrRegisterBits(uint8_t reg, uint8_t mask); |
| Pinmanee | 1:baf91b6482eb | 416 | |
| Pinmanee | 1:baf91b6482eb | 417 | /** |
| Pinmanee | 1:baf91b6482eb | 418 | * Use the CRC coprocessor in the MFRC522 to calculate a CRC_A. |
| Pinmanee | 1:baf91b6482eb | 419 | * |
| Pinmanee | 1:baf91b6482eb | 420 | * @param data Pointer to the data to transfer to the FIFO for CRC calculation. |
| Pinmanee | 1:baf91b6482eb | 421 | * @param length The number of bytes to transfer. |
| Pinmanee | 1:baf91b6482eb | 422 | * @param result Pointer to result buffer. Result is written to result[0..1], low byte first. |
| Pinmanee | 1:baf91b6482eb | 423 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 424 | */ |
| Pinmanee | 1:baf91b6482eb | 425 | uint8_t PCD_CalculateCRC (uint8_t *data, uint8_t length, uint8_t *result); |
| Pinmanee | 1:baf91b6482eb | 426 | |
| Pinmanee | 1:baf91b6482eb | 427 | /** |
| Pinmanee | 1:baf91b6482eb | 428 | * Executes the Transceive command. |
| Pinmanee | 1:baf91b6482eb | 429 | * CRC validation can only be done if backData and backLen are specified. |
| Pinmanee | 1:baf91b6482eb | 430 | * |
| Pinmanee | 1:baf91b6482eb | 431 | * @param sendData Pointer to the data to transfer to the FIFO. |
| Pinmanee | 1:baf91b6482eb | 432 | * @param sendLen Number of bytes to transfer to the FIFO. |
| Pinmanee | 1:baf91b6482eb | 433 | * @param backData NULL or pointer to buffer if data should be read back after executing the command. |
| Pinmanee | 1:baf91b6482eb | 434 | * @param backLen Max number of bytes to write to *backData. Out: The number of bytes returned. |
| Pinmanee | 1:baf91b6482eb | 435 | * @param validBits The number of valid bits in the last byte. 0 for 8 valid bits. Default NULL. |
| Pinmanee | 1:baf91b6482eb | 436 | * @param rxAlign Defines the bit position in backData[0] for the first bit received. Default 0. |
| Pinmanee | 1:baf91b6482eb | 437 | * @param checkCRC True => The last two bytes of the response is assumed to be a CRC_A that must be validated. |
| Pinmanee | 1:baf91b6482eb | 438 | * |
| Pinmanee | 1:baf91b6482eb | 439 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 440 | */ |
| Pinmanee | 1:baf91b6482eb | 441 | uint8_t PCD_TransceiveData (uint8_t *sendData, |
| Pinmanee | 1:baf91b6482eb | 442 | uint8_t sendLen, |
| Pinmanee | 1:baf91b6482eb | 443 | uint8_t *backData, |
| Pinmanee | 1:baf91b6482eb | 444 | uint8_t *backLen, |
| Pinmanee | 1:baf91b6482eb | 445 | uint8_t *validBits = NULL, |
| Pinmanee | 1:baf91b6482eb | 446 | uint8_t rxAlign = 0, |
| Pinmanee | 1:baf91b6482eb | 447 | bool checkCRC = false); |
| Pinmanee | 1:baf91b6482eb | 448 | |
| Pinmanee | 1:baf91b6482eb | 449 | |
| Pinmanee | 1:baf91b6482eb | 450 | /** |
| Pinmanee | 1:baf91b6482eb | 451 | * Transfers data to the MFRC522 FIFO, executes a commend, waits for completion and transfers data back from the FIFO. |
| Pinmanee | 1:baf91b6482eb | 452 | * CRC validation can only be done if backData and backLen are specified. |
| Pinmanee | 1:baf91b6482eb | 453 | * |
| Pinmanee | 1:baf91b6482eb | 454 | * @param command The command to execute. One of the PCD_Command enums. |
| Pinmanee | 1:baf91b6482eb | 455 | * @param waitIRq The bits in the ComIrqReg register that signals successful completion of the command. |
| Pinmanee | 1:baf91b6482eb | 456 | * @param sendData Pointer to the data to transfer to the FIFO. |
| Pinmanee | 1:baf91b6482eb | 457 | * @param sendLen Number of bytes to transfer to the FIFO. |
| Pinmanee | 1:baf91b6482eb | 458 | * @param backData NULL or pointer to buffer if data should be read back after executing the command. |
| Pinmanee | 1:baf91b6482eb | 459 | * @param backLen In: Max number of bytes to write to *backData. Out: The number of bytes returned. |
| Pinmanee | 1:baf91b6482eb | 460 | * @param validBits In/Out: The number of valid bits in the last byte. 0 for 8 valid bits. |
| Pinmanee | 1:baf91b6482eb | 461 | * @param rxAlign In: Defines the bit position in backData[0] for the first bit received. Default 0. |
| Pinmanee | 1:baf91b6482eb | 462 | * @param checkCRC In: True => The last two bytes of the response is assumed to be a CRC_A that must be validated. |
| Pinmanee | 1:baf91b6482eb | 463 | * |
| Pinmanee | 1:baf91b6482eb | 464 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 465 | */ |
| Pinmanee | 1:baf91b6482eb | 466 | uint8_t PCD_CommunicateWithPICC(uint8_t command, |
| Pinmanee | 1:baf91b6482eb | 467 | uint8_t waitIRq, |
| Pinmanee | 1:baf91b6482eb | 468 | uint8_t *sendData, |
| Pinmanee | 1:baf91b6482eb | 469 | uint8_t sendLen, |
| Pinmanee | 1:baf91b6482eb | 470 | uint8_t *backData = NULL, |
| Pinmanee | 1:baf91b6482eb | 471 | uint8_t *backLen = NULL, |
| Pinmanee | 1:baf91b6482eb | 472 | uint8_t *validBits = NULL, |
| Pinmanee | 1:baf91b6482eb | 473 | uint8_t rxAlign = 0, |
| Pinmanee | 1:baf91b6482eb | 474 | bool checkCRC = false); |
| Pinmanee | 1:baf91b6482eb | 475 | |
| Pinmanee | 1:baf91b6482eb | 476 | /** |
| Pinmanee | 1:baf91b6482eb | 477 | * Transmits a REQuest command, Type A. Invites PICCs in state IDLE to go to READY and prepare for anticollision or selection. 7 bit frame. |
| Pinmanee | 1:baf91b6482eb | 478 | * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design. |
| Pinmanee | 1:baf91b6482eb | 479 | * |
| Pinmanee | 1:baf91b6482eb | 480 | * @param bufferATQA The buffer to store the ATQA (Answer to request) in |
| Pinmanee | 1:baf91b6482eb | 481 | * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK. |
| Pinmanee | 1:baf91b6482eb | 482 | * |
| Pinmanee | 1:baf91b6482eb | 483 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 484 | */ |
| Pinmanee | 1:baf91b6482eb | 485 | uint8_t PICC_RequestA (uint8_t *bufferATQA, uint8_t *bufferSize); |
| Pinmanee | 1:baf91b6482eb | 486 | |
| Pinmanee | 1:baf91b6482eb | 487 | /** |
| Pinmanee | 1:baf91b6482eb | 488 | * Transmits a Wake-UP command, Type A. Invites PICCs in state IDLE and HALT to go to READY(*) and prepare for anticollision or selection. 7 bit frame. |
| Pinmanee | 1:baf91b6482eb | 489 | * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design. |
| Pinmanee | 1:baf91b6482eb | 490 | * |
| Pinmanee | 1:baf91b6482eb | 491 | * @param bufferATQA The buffer to store the ATQA (Answer to request) in |
| Pinmanee | 1:baf91b6482eb | 492 | * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK. |
| Pinmanee | 1:baf91b6482eb | 493 | * |
| Pinmanee | 1:baf91b6482eb | 494 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 495 | */ |
| Pinmanee | 1:baf91b6482eb | 496 | uint8_t PICC_WakeupA (uint8_t *bufferATQA, uint8_t *bufferSize); |
| Pinmanee | 1:baf91b6482eb | 497 | |
| Pinmanee | 1:baf91b6482eb | 498 | /** |
| Pinmanee | 1:baf91b6482eb | 499 | * Transmits REQA or WUPA commands. |
| Pinmanee | 1:baf91b6482eb | 500 | * Beware: When two PICCs are in the field at the same time I often get STATUS_TIMEOUT - probably due do bad antenna design. |
| Pinmanee | 1:baf91b6482eb | 501 | * |
| Pinmanee | 1:baf91b6482eb | 502 | * @param command The command to send - PICC_CMD_REQA or PICC_CMD_WUPA |
| Pinmanee | 1:baf91b6482eb | 503 | * @param bufferATQA The buffer to store the ATQA (Answer to request) in |
| Pinmanee | 1:baf91b6482eb | 504 | * @param bufferSize Buffer size, at least two bytes. Also number of bytes returned if STATUS_OK. |
| Pinmanee | 1:baf91b6482eb | 505 | * |
| Pinmanee | 1:baf91b6482eb | 506 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 507 | */ |
| Pinmanee | 1:baf91b6482eb | 508 | uint8_t PICC_REQA_or_WUPA (uint8_t command, uint8_t *bufferATQA, uint8_t *bufferSize); |
| Pinmanee | 1:baf91b6482eb | 509 | |
| Pinmanee | 1:baf91b6482eb | 510 | /** |
| Pinmanee | 1:baf91b6482eb | 511 | * Transmits SELECT/ANTICOLLISION commands to select a single PICC. |
| Pinmanee | 1:baf91b6482eb | 512 | * Before calling this function the PICCs must be placed in the READY(*) state by calling PICC_RequestA() or PICC_WakeupA(). |
| Pinmanee | 1:baf91b6482eb | 513 | * On success: |
| Pinmanee | 1:baf91b6482eb | 514 | * - The chosen PICC is in state ACTIVE(*) and all other PICCs have returned to state IDLE/HALT. (Figure 7 of the ISO/IEC 14443-3 draft.) |
| Pinmanee | 1:baf91b6482eb | 515 | * - The UID size and value of the chosen PICC is returned in *uid along with the SAK. |
| Pinmanee | 1:baf91b6482eb | 516 | * |
| Pinmanee | 1:baf91b6482eb | 517 | * A PICC UID consists of 4, 7 or 10 bytes. |
| Pinmanee | 1:baf91b6482eb | 518 | * Only 4 bytes can be specified in a SELECT command, so for the longer UIDs two or three iterations are used: |
| Pinmanee | 1:baf91b6482eb | 519 | * |
| Pinmanee | 1:baf91b6482eb | 520 | * UID size Number of UID bytes Cascade levels Example of PICC |
| Pinmanee | 1:baf91b6482eb | 521 | * ======== =================== ============== =============== |
| Pinmanee | 1:baf91b6482eb | 522 | * single 4 1 MIFARE Classic |
| Pinmanee | 1:baf91b6482eb | 523 | * double 7 2 MIFARE Ultralight |
| Pinmanee | 1:baf91b6482eb | 524 | * triple 10 3 Not currently in use? |
| Pinmanee | 1:baf91b6482eb | 525 | * |
| Pinmanee | 1:baf91b6482eb | 526 | * |
| Pinmanee | 1:baf91b6482eb | 527 | * @param uid Pointer to Uid struct. Normally output, but can also be used to supply a known UID. |
| Pinmanee | 1:baf91b6482eb | 528 | * @param validBits The number of known UID bits supplied in *uid. Normally 0. If set you must also supply uid->size. |
| Pinmanee | 1:baf91b6482eb | 529 | * |
| Pinmanee | 1:baf91b6482eb | 530 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 531 | */ |
| Pinmanee | 1:baf91b6482eb | 532 | uint8_t PICC_Select (Uid *uid, uint8_t validBits = 0); |
| Pinmanee | 1:baf91b6482eb | 533 | |
| Pinmanee | 1:baf91b6482eb | 534 | /** |
| Pinmanee | 1:baf91b6482eb | 535 | * Instructs a PICC in state ACTIVE(*) to go to state HALT. |
| Pinmanee | 1:baf91b6482eb | 536 | * |
| Pinmanee | 1:baf91b6482eb | 537 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 538 | */ |
| Pinmanee | 1:baf91b6482eb | 539 | uint8_t PICC_HaltA (void); |
| Pinmanee | 1:baf91b6482eb | 540 | |
| Pinmanee | 1:baf91b6482eb | 541 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 542 | //@} |
| Pinmanee | 1:baf91b6482eb | 543 | |
| Pinmanee | 1:baf91b6482eb | 544 | |
| Pinmanee | 1:baf91b6482eb | 545 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 546 | //! @name Functions for communicating with MIFARE PICCs |
| Pinmanee | 1:baf91b6482eb | 547 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 548 | //@{ |
| Pinmanee | 1:baf91b6482eb | 549 | |
| Pinmanee | 1:baf91b6482eb | 550 | /** |
| Pinmanee | 1:baf91b6482eb | 551 | * Executes the MFRC522 MFAuthent command. |
| Pinmanee | 1:baf91b6482eb | 552 | * This command manages MIFARE authentication to enable a secure communication to any MIFARE Mini, MIFARE 1K and MIFARE 4K card. |
| Pinmanee | 1:baf91b6482eb | 553 | * The authentication is described in the MFRC522 datasheet section 10.3.1.9 and http://www.nxp.com/documents/data_sheet/MF1S503x.pdf section 10.1. |
| Pinmanee | 1:baf91b6482eb | 554 | * For use with MIFARE Classic PICCs. |
| Pinmanee | 1:baf91b6482eb | 555 | * The PICC must be selected - ie in state ACTIVE(*) - before calling this function. |
| Pinmanee | 1:baf91b6482eb | 556 | * Remember to call PCD_StopCrypto1() after communicating with the authenticated PICC - otherwise no new communications can start. |
| Pinmanee | 1:baf91b6482eb | 557 | * |
| Pinmanee | 1:baf91b6482eb | 558 | * All keys are set to FFFFFFFFFFFFh at chip delivery. |
| Pinmanee | 1:baf91b6482eb | 559 | * |
| Pinmanee | 1:baf91b6482eb | 560 | * @param command PICC_CMD_MF_AUTH_KEY_A or PICC_CMD_MF_AUTH_KEY_B |
| Pinmanee | 1:baf91b6482eb | 561 | * @param blockAddr The block number. See numbering in the comments in the .h file. |
| Pinmanee | 1:baf91b6482eb | 562 | * @param key Pointer to the Crypteo1 key to use (6 bytes) |
| Pinmanee | 1:baf91b6482eb | 563 | * @param uid Pointer to Uid struct. The first 4 bytes of the UID is used. |
| Pinmanee | 1:baf91b6482eb | 564 | * |
| Pinmanee | 1:baf91b6482eb | 565 | * @return STATUS_OK on success, STATUS_??? otherwise. Probably STATUS_TIMEOUT if you supply the wrong key. |
| Pinmanee | 1:baf91b6482eb | 566 | */ |
| Pinmanee | 1:baf91b6482eb | 567 | uint8_t PCD_Authenticate (uint8_t command, uint8_t blockAddr, MIFARE_Key *key, Uid *uid); |
| Pinmanee | 1:baf91b6482eb | 568 | |
| Pinmanee | 1:baf91b6482eb | 569 | /** |
| Pinmanee | 1:baf91b6482eb | 570 | * Used to exit the PCD from its authenticated state. |
| Pinmanee | 1:baf91b6482eb | 571 | * Remember to call this function after communicating with an authenticated PICC - otherwise no new communications can start. |
| Pinmanee | 1:baf91b6482eb | 572 | */ |
| Pinmanee | 1:baf91b6482eb | 573 | void PCD_StopCrypto1 (void); |
| Pinmanee | 1:baf91b6482eb | 574 | |
| Pinmanee | 1:baf91b6482eb | 575 | /** |
| Pinmanee | 1:baf91b6482eb | 576 | * Reads 16 bytes (+ 2 bytes CRC_A) from the active PICC. |
| Pinmanee | 1:baf91b6482eb | 577 | * |
| Pinmanee | 1:baf91b6482eb | 578 | * For MIFARE Classic the sector containing the block must be authenticated before calling this function. |
| Pinmanee | 1:baf91b6482eb | 579 | * |
| Pinmanee | 1:baf91b6482eb | 580 | * For MIFARE Ultralight only addresses 00h to 0Fh are decoded. |
| Pinmanee | 1:baf91b6482eb | 581 | * The MF0ICU1 returns a NAK for higher addresses. |
| Pinmanee | 1:baf91b6482eb | 582 | * The MF0ICU1 responds to the READ command by sending 16 bytes starting from the page address defined by the command argument. |
| Pinmanee | 1:baf91b6482eb | 583 | * For example; if blockAddr is 03h then pages 03h, 04h, 05h, 06h are returned. |
| Pinmanee | 1:baf91b6482eb | 584 | * A roll-back is implemented: If blockAddr is 0Eh, then the contents of pages 0Eh, 0Fh, 00h and 01h are returned. |
| Pinmanee | 1:baf91b6482eb | 585 | * |
| Pinmanee | 1:baf91b6482eb | 586 | * The buffer must be at least 18 bytes because a CRC_A is also returned. |
| Pinmanee | 1:baf91b6482eb | 587 | * Checks the CRC_A before returning STATUS_OK. |
| Pinmanee | 1:baf91b6482eb | 588 | * |
| Pinmanee | 1:baf91b6482eb | 589 | * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The first page to return data from. |
| Pinmanee | 1:baf91b6482eb | 590 | * @param buffer The buffer to store the data in |
| Pinmanee | 1:baf91b6482eb | 591 | * @param bufferSize Buffer size, at least 18 bytes. Also number of bytes returned if STATUS_OK. |
| Pinmanee | 1:baf91b6482eb | 592 | * |
| Pinmanee | 1:baf91b6482eb | 593 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 594 | */ |
| Pinmanee | 1:baf91b6482eb | 595 | uint8_t MIFARE_Read (uint8_t blockAddr, uint8_t *buffer, uint8_t *bufferSize); |
| Pinmanee | 1:baf91b6482eb | 596 | |
| Pinmanee | 1:baf91b6482eb | 597 | /** |
| Pinmanee | 1:baf91b6482eb | 598 | * Writes 16 bytes to the active PICC. |
| Pinmanee | 1:baf91b6482eb | 599 | * |
| Pinmanee | 1:baf91b6482eb | 600 | * For MIFARE Classic the sector containing the block must be authenticated before calling this function. |
| Pinmanee | 1:baf91b6482eb | 601 | * |
| Pinmanee | 1:baf91b6482eb | 602 | * For MIFARE Ultralight the opretaion is called "COMPATIBILITY WRITE". |
| Pinmanee | 1:baf91b6482eb | 603 | * Even though 16 bytes are transferred to the Ultralight PICC, only the least significant 4 bytes (bytes 0 to 3) |
| Pinmanee | 1:baf91b6482eb | 604 | * are written to the specified address. It is recommended to set the remaining bytes 04h to 0Fh to all logic 0. |
| Pinmanee | 1:baf91b6482eb | 605 | * |
| Pinmanee | 1:baf91b6482eb | 606 | * @param blockAddr MIFARE Classic: The block (0-0xff) number. MIFARE Ultralight: The page (2-15) to write to. |
| Pinmanee | 1:baf91b6482eb | 607 | * @param buffer The 16 bytes to write to the PICC |
| Pinmanee | 1:baf91b6482eb | 608 | * @param bufferSize Buffer size, must be at least 16 bytes. Exactly 16 bytes are written. |
| Pinmanee | 1:baf91b6482eb | 609 | * |
| Pinmanee | 1:baf91b6482eb | 610 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 611 | */ |
| Pinmanee | 1:baf91b6482eb | 612 | uint8_t MIFARE_Write (uint8_t blockAddr, uint8_t *buffer, uint8_t bufferSize); |
| Pinmanee | 1:baf91b6482eb | 613 | |
| Pinmanee | 1:baf91b6482eb | 614 | /** |
| Pinmanee | 1:baf91b6482eb | 615 | * Writes a 4 byte page to the active MIFARE Ultralight PICC. |
| Pinmanee | 1:baf91b6482eb | 616 | * |
| Pinmanee | 1:baf91b6482eb | 617 | * @param page The page (2-15) to write to. |
| Pinmanee | 1:baf91b6482eb | 618 | * @param buffer The 4 bytes to write to the PICC |
| Pinmanee | 1:baf91b6482eb | 619 | * @param bufferSize Buffer size, must be at least 4 bytes. Exactly 4 bytes are written. |
| Pinmanee | 1:baf91b6482eb | 620 | * |
| Pinmanee | 1:baf91b6482eb | 621 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 622 | */ |
| Pinmanee | 1:baf91b6482eb | 623 | uint8_t MIFARE_UltralightWrite(uint8_t page, uint8_t *buffer, uint8_t bufferSize); |
| Pinmanee | 1:baf91b6482eb | 624 | |
| Pinmanee | 1:baf91b6482eb | 625 | /** |
| Pinmanee | 1:baf91b6482eb | 626 | * MIFARE Decrement subtracts the delta from the value of the addressed block, and stores the result in a volatile memory. |
| Pinmanee | 1:baf91b6482eb | 627 | * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function. |
| Pinmanee | 1:baf91b6482eb | 628 | * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001]. |
| Pinmanee | 1:baf91b6482eb | 629 | * Use MIFARE_Transfer() to store the result in a block. |
| Pinmanee | 1:baf91b6482eb | 630 | * |
| Pinmanee | 1:baf91b6482eb | 631 | * @param blockAddr The block (0-0xff) number. |
| Pinmanee | 1:baf91b6482eb | 632 | * @param delta This number is subtracted from the value of block blockAddr. |
| Pinmanee | 1:baf91b6482eb | 633 | * |
| Pinmanee | 1:baf91b6482eb | 634 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 635 | */ |
| Pinmanee | 1:baf91b6482eb | 636 | uint8_t MIFARE_Decrement (uint8_t blockAddr, uint32_t delta); |
| Pinmanee | 1:baf91b6482eb | 637 | |
| Pinmanee | 1:baf91b6482eb | 638 | /** |
| Pinmanee | 1:baf91b6482eb | 639 | * MIFARE Increment adds the delta to the value of the addressed block, and stores the result in a volatile memory. |
| Pinmanee | 1:baf91b6482eb | 640 | * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function. |
| Pinmanee | 1:baf91b6482eb | 641 | * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001]. |
| Pinmanee | 1:baf91b6482eb | 642 | * Use MIFARE_Transfer() to store the result in a block. |
| Pinmanee | 1:baf91b6482eb | 643 | * |
| Pinmanee | 1:baf91b6482eb | 644 | * @param blockAddr The block (0-0xff) number. |
| Pinmanee | 1:baf91b6482eb | 645 | * @param delta This number is added to the value of block blockAddr. |
| Pinmanee | 1:baf91b6482eb | 646 | * |
| Pinmanee | 1:baf91b6482eb | 647 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 648 | */ |
| Pinmanee | 1:baf91b6482eb | 649 | uint8_t MIFARE_Increment (uint8_t blockAddr, uint32_t delta); |
| Pinmanee | 1:baf91b6482eb | 650 | |
| Pinmanee | 1:baf91b6482eb | 651 | /** |
| Pinmanee | 1:baf91b6482eb | 652 | * MIFARE Restore copies the value of the addressed block into a volatile memory. |
| Pinmanee | 1:baf91b6482eb | 653 | * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function. |
| Pinmanee | 1:baf91b6482eb | 654 | * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001]. |
| Pinmanee | 1:baf91b6482eb | 655 | * Use MIFARE_Transfer() to store the result in a block. |
| Pinmanee | 1:baf91b6482eb | 656 | * |
| Pinmanee | 1:baf91b6482eb | 657 | * @param blockAddr The block (0-0xff) number. |
| Pinmanee | 1:baf91b6482eb | 658 | * |
| Pinmanee | 1:baf91b6482eb | 659 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 660 | */ |
| Pinmanee | 1:baf91b6482eb | 661 | uint8_t MIFARE_Restore (uint8_t blockAddr); |
| Pinmanee | 1:baf91b6482eb | 662 | |
| Pinmanee | 1:baf91b6482eb | 663 | /** |
| Pinmanee | 1:baf91b6482eb | 664 | * MIFARE Transfer writes the value stored in the volatile memory into one MIFARE Classic block. |
| Pinmanee | 1:baf91b6482eb | 665 | * For MIFARE Classic only. The sector containing the block must be authenticated before calling this function. |
| Pinmanee | 1:baf91b6482eb | 666 | * Only for blocks in "value block" mode, ie with access bits [C1 C2 C3] = [110] or [001]. |
| Pinmanee | 1:baf91b6482eb | 667 | * |
| Pinmanee | 1:baf91b6482eb | 668 | * @param blockAddr The block (0-0xff) number. |
| Pinmanee | 1:baf91b6482eb | 669 | * |
| Pinmanee | 1:baf91b6482eb | 670 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 671 | */ |
| Pinmanee | 1:baf91b6482eb | 672 | uint8_t MIFARE_Transfer (uint8_t blockAddr); |
| Pinmanee | 1:baf91b6482eb | 673 | |
| Pinmanee | 1:baf91b6482eb | 674 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 675 | //@} |
| Pinmanee | 1:baf91b6482eb | 676 | |
| Pinmanee | 1:baf91b6482eb | 677 | |
| Pinmanee | 1:baf91b6482eb | 678 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 679 | //! @name Support functions |
| Pinmanee | 1:baf91b6482eb | 680 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 681 | //@{ |
| Pinmanee | 1:baf91b6482eb | 682 | |
| Pinmanee | 1:baf91b6482eb | 683 | /** |
| Pinmanee | 1:baf91b6482eb | 684 | * Wrapper for MIFARE protocol communication. |
| Pinmanee | 1:baf91b6482eb | 685 | * Adds CRC_A, executes the Transceive command and checks that the response is MF_ACK or a timeout. |
| Pinmanee | 1:baf91b6482eb | 686 | * |
| Pinmanee | 1:baf91b6482eb | 687 | * @param sendData Pointer to the data to transfer to the FIFO. Do NOT include the CRC_A. |
| Pinmanee | 1:baf91b6482eb | 688 | * @param sendLen Number of bytes in sendData. |
| Pinmanee | 1:baf91b6482eb | 689 | * @param acceptTimeout True => A timeout is also success |
| Pinmanee | 1:baf91b6482eb | 690 | * |
| Pinmanee | 1:baf91b6482eb | 691 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 692 | */ |
| Pinmanee | 1:baf91b6482eb | 693 | uint8_t PCD_MIFARE_Transceive(uint8_t *sendData, uint8_t sendLen, bool acceptTimeout = false); |
| Pinmanee | 1:baf91b6482eb | 694 | |
| Pinmanee | 1:baf91b6482eb | 695 | /** |
| Pinmanee | 1:baf91b6482eb | 696 | * Translates the SAK (Select Acknowledge) to a PICC type. |
| Pinmanee | 1:baf91b6482eb | 697 | * |
| Pinmanee | 1:baf91b6482eb | 698 | * @param sak The SAK byte returned from PICC_Select(). |
| Pinmanee | 1:baf91b6482eb | 699 | * |
| Pinmanee | 1:baf91b6482eb | 700 | * @return PICC_Type |
| Pinmanee | 1:baf91b6482eb | 701 | */ |
| Pinmanee | 1:baf91b6482eb | 702 | uint8_t PICC_GetType (uint8_t sak); |
| Pinmanee | 1:baf91b6482eb | 703 | |
| Pinmanee | 1:baf91b6482eb | 704 | /** |
| Pinmanee | 1:baf91b6482eb | 705 | * Returns a string pointer to the PICC type name. |
| Pinmanee | 1:baf91b6482eb | 706 | * |
| Pinmanee | 1:baf91b6482eb | 707 | * @param type One of the PICC_Type enums. |
| Pinmanee | 1:baf91b6482eb | 708 | * |
| Pinmanee | 1:baf91b6482eb | 709 | * @return A string pointer to the PICC type name. |
| Pinmanee | 1:baf91b6482eb | 710 | */ |
| Pinmanee | 1:baf91b6482eb | 711 | char* PICC_GetTypeName (uint8_t type); |
| Pinmanee | 1:baf91b6482eb | 712 | |
| Pinmanee | 1:baf91b6482eb | 713 | /** |
| Pinmanee | 1:baf91b6482eb | 714 | * Returns a string pointer to a status code name. |
| Pinmanee | 1:baf91b6482eb | 715 | * |
| Pinmanee | 1:baf91b6482eb | 716 | * @param code One of the StatusCode enums. |
| Pinmanee | 1:baf91b6482eb | 717 | * |
| Pinmanee | 1:baf91b6482eb | 718 | * @return A string pointer to a status code name. |
| Pinmanee | 1:baf91b6482eb | 719 | */ |
| Pinmanee | 1:baf91b6482eb | 720 | char* GetStatusCodeName (uint8_t code); |
| Pinmanee | 1:baf91b6482eb | 721 | |
| Pinmanee | 1:baf91b6482eb | 722 | /** |
| Pinmanee | 1:baf91b6482eb | 723 | * Calculates the bit pattern needed for the specified access bits. In the [C1 C2 C3] tupples C1 is MSB (=4) and C3 is LSB (=1). |
| Pinmanee | 1:baf91b6482eb | 724 | * |
| Pinmanee | 1:baf91b6482eb | 725 | * @param accessBitBuffer Pointer to byte 6, 7 and 8 in the sector trailer. Bytes [0..2] will be set. |
| Pinmanee | 1:baf91b6482eb | 726 | * @param g0 Access bits [C1 C2 C3] for block 0 (for sectors 0-31) or blocks 0-4 (for sectors 32-39) |
| Pinmanee | 1:baf91b6482eb | 727 | * @param g1 Access bits [C1 C2 C3] for block 1 (for sectors 0-31) or blocks 5-9 (for sectors 32-39) |
| Pinmanee | 1:baf91b6482eb | 728 | * @param g2 Access bits [C1 C2 C3] for block 2 (for sectors 0-31) or blocks 10-14 (for sectors 32-39) |
| Pinmanee | 1:baf91b6482eb | 729 | * @param g3 Access bits [C1 C2 C3] for the sector trailer, block 3 (for sectors 0-31) or block 15 (for sectors 32-39) |
| Pinmanee | 1:baf91b6482eb | 730 | */ |
| Pinmanee | 1:baf91b6482eb | 731 | void MIFARE_SetAccessBits (uint8_t *accessBitBuffer, |
| Pinmanee | 1:baf91b6482eb | 732 | uint8_t g0, |
| Pinmanee | 1:baf91b6482eb | 733 | uint8_t g1, |
| Pinmanee | 1:baf91b6482eb | 734 | uint8_t g2, |
| Pinmanee | 1:baf91b6482eb | 735 | uint8_t g3); |
| Pinmanee | 1:baf91b6482eb | 736 | |
| Pinmanee | 1:baf91b6482eb | 737 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 738 | //@} |
| Pinmanee | 1:baf91b6482eb | 739 | |
| Pinmanee | 1:baf91b6482eb | 740 | |
| Pinmanee | 1:baf91b6482eb | 741 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 742 | //! @name Convenience functions - does not add extra functionality |
| Pinmanee | 1:baf91b6482eb | 743 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 744 | //@{ |
| Pinmanee | 1:baf91b6482eb | 745 | |
| Pinmanee | 1:baf91b6482eb | 746 | /** |
| Pinmanee | 1:baf91b6482eb | 747 | * Returns true if a PICC responds to PICC_CMD_REQA. |
| Pinmanee | 1:baf91b6482eb | 748 | * Only "new" cards in state IDLE are invited. Sleeping cards in state HALT are ignored. |
| Pinmanee | 1:baf91b6482eb | 749 | * |
| Pinmanee | 1:baf91b6482eb | 750 | * @return bool |
| Pinmanee | 1:baf91b6482eb | 751 | */ |
| Pinmanee | 1:baf91b6482eb | 752 | bool PICC_IsNewCardPresent(void); |
| Pinmanee | 1:baf91b6482eb | 753 | |
| Pinmanee | 1:baf91b6482eb | 754 | /** |
| Pinmanee | 1:baf91b6482eb | 755 | * Simple wrapper around PICC_Select. |
| Pinmanee | 1:baf91b6482eb | 756 | * Returns true if a UID could be read. |
| Pinmanee | 1:baf91b6482eb | 757 | * Remember to call PICC_IsNewCardPresent(), PICC_RequestA() or PICC_WakeupA() first. |
| Pinmanee | 1:baf91b6482eb | 758 | * The read UID is available in the class variable uid. |
| Pinmanee | 1:baf91b6482eb | 759 | * |
| Pinmanee | 1:baf91b6482eb | 760 | * @return bool |
| Pinmanee | 1:baf91b6482eb | 761 | */ |
| Pinmanee | 1:baf91b6482eb | 762 | bool PICC_ReadCardSerial (void); |
| Pinmanee | 1:baf91b6482eb | 763 | |
| Pinmanee | 1:baf91b6482eb | 764 | // ************************************************************************************ |
| Pinmanee | 1:baf91b6482eb | 765 | //@} |
| Pinmanee | 1:baf91b6482eb | 766 | |
| Pinmanee | 1:baf91b6482eb | 767 | |
| Pinmanee | 1:baf91b6482eb | 768 | private: |
| Pinmanee | 1:baf91b6482eb | 769 | SPI m_SPI; |
| Pinmanee | 1:baf91b6482eb | 770 | DigitalOut m_CS; |
| Pinmanee | 1:baf91b6482eb | 771 | DigitalOut m_RESET; |
| Pinmanee | 1:baf91b6482eb | 772 | |
| Pinmanee | 1:baf91b6482eb | 773 | /** |
| Pinmanee | 1:baf91b6482eb | 774 | * Helper function for the two-step MIFARE Classic protocol operations Decrement, Increment and Restore. |
| Pinmanee | 1:baf91b6482eb | 775 | * |
| Pinmanee | 1:baf91b6482eb | 776 | * @param command The command to use |
| Pinmanee | 1:baf91b6482eb | 777 | * @param blockAddr The block (0-0xff) number. |
| Pinmanee | 1:baf91b6482eb | 778 | * @param data The data to transfer in step 2 |
| Pinmanee | 1:baf91b6482eb | 779 | * |
| Pinmanee | 1:baf91b6482eb | 780 | * @return STATUS_OK on success, STATUS_??? otherwise. |
| Pinmanee | 1:baf91b6482eb | 781 | */ |
| Pinmanee | 1:baf91b6482eb | 782 | uint8_t MIFARE_TwoStepHelper(uint8_t command, uint8_t blockAddr, uint32_t data); |
| Pinmanee | 1:baf91b6482eb | 783 | }; |
| Pinmanee | 1:baf91b6482eb | 784 | |
| Pinmanee | 1:baf91b6482eb | 785 | #endif |