Diff: DmTftSsd2119.cpp

Revision:

15:0c36e018a6cc

Parent:

14:2db7065edbec

--- a/DmTftSsd2119.cpp	Mon Oct 12 08:35:35 2015 +0000
+++ b/DmTftSsd2119.cpp	Mon Dec 14 12:49:46 2015 +0000
@@ -164,7 +164,7 @@
   sendCommand(0x03);    // Power Control 1, VGH，VGL
   sendData(0x6A38);     // Set dct=fline*4, VGH=2 x VCIX2 + VCI,VGL=-(VGH) + VCix2, DC=Fline × 8, AP=Medium to large   
    
-  sendCommand(0X0B);    // Frame Cycle Control.
+  sendCommand(0x0B);    // Frame Cycle Control.
   sendData(0x5308);     // SET NO SDT=1 clock cycle (POR) ,Sets the equalizing period,    
 
   sendCommand(0x0C);    // Power Control 2 VCIX2
@@ -176,7 +176,7 @@
   sendCommand(0x0E);    // SET VCOMG VDV .VCOM
   sendData(0x2B00);     // SET VCOMG=1,VCOM=VLCD63*  //2A 
 
-  sendCommand(0X0F);    // Gate Scan Position.
+  sendCommand(0x0F);    // Gate Scan Position.
   sendData(0x0000);     // The valid range is from 1 to 240.   
 
   sendCommand(0x1E);    // SET nOTP VCOMH ,VCOMH