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Dependents: LCD_Proj LCD_imagetest LCD_Proj_rtc
Fork of DmTftLibrary by
DmTftSsd2119.cpp@0:d6ff5fa503e8, 2014-05-13 (annotated)
- Committer:
- displaymodule
- Date:
- Tue May 13 09:31:24 2014 +0000
- Revision:
- 0:d6ff5fa503e8
- Child:
- 7:6cd8c36cbdb3
First version
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
displaymodule | 0:d6ff5fa503e8 | 1 | /********************************************************************************************** |
displaymodule | 0:d6ff5fa503e8 | 2 | Copyright (c) 2014 DisplayModule. All rights reserved. |
displaymodule | 0:d6ff5fa503e8 | 3 | |
displaymodule | 0:d6ff5fa503e8 | 4 | Redistribution and use of this source code, part of this source code or any compiled binary |
displaymodule | 0:d6ff5fa503e8 | 5 | based on this source code is permitted as long as the above copyright notice and following |
displaymodule | 0:d6ff5fa503e8 | 6 | disclaimer is retained. |
displaymodule | 0:d6ff5fa503e8 | 7 | |
displaymodule | 0:d6ff5fa503e8 | 8 | DISCLAIMER: |
displaymodule | 0:d6ff5fa503e8 | 9 | THIS SOFTWARE IS SUPPLIED "AS IS" WITHOUT ANY WARRANTIES AND SUPPORT. DISPLAYMODULE ASSUMES |
displaymodule | 0:d6ff5fa503e8 | 10 | NO RESPONSIBILITY OR LIABILITY FOR THE USE OF THE SOFTWARE. |
displaymodule | 0:d6ff5fa503e8 | 11 | ********************************************************************************************/ |
displaymodule | 0:d6ff5fa503e8 | 12 | |
displaymodule | 0:d6ff5fa503e8 | 13 | #include "DmTftSsd2119.h" |
displaymodule | 0:d6ff5fa503e8 | 14 | #if defined (DM_TOOLCHAIN_ARDUINO) |
displaymodule | 0:d6ff5fa503e8 | 15 | DmTftSsd2119::DmTftSsd2119(uint8_t cs, uint8_t dc) |
displaymodule | 0:d6ff5fa503e8 | 16 | #elif defined (DM_TOOLCHAIN_MBED) |
displaymodule | 0:d6ff5fa503e8 | 17 | DmTftSsd2119::DmTftSsd2119(uint8_t cs, uint8_t dc, uint8_t miso, uint8_t mosi, uint8_t clk) |
displaymodule | 0:d6ff5fa503e8 | 18 | #endif |
displaymodule | 0:d6ff5fa503e8 | 19 | : DmTftBase(320, 240){ // Display is in landscape mode by default width: 320, height: 240 |
displaymodule | 0:d6ff5fa503e8 | 20 | _cs = cs; |
displaymodule | 0:d6ff5fa503e8 | 21 | _dc = dc; |
displaymodule | 0:d6ff5fa503e8 | 22 | #if defined (DM_TOOLCHAIN_MBED) |
displaymodule | 0:d6ff5fa503e8 | 23 | _miso = miso; |
displaymodule | 0:d6ff5fa503e8 | 24 | _mosi = mosi; |
displaymodule | 0:d6ff5fa503e8 | 25 | _clk = clk; |
displaymodule | 0:d6ff5fa503e8 | 26 | #endif |
displaymodule | 0:d6ff5fa503e8 | 27 | } |
displaymodule | 0:d6ff5fa503e8 | 28 | |
displaymodule | 0:d6ff5fa503e8 | 29 | DmTftSsd2119::~DmTftSsd2119() { |
displaymodule | 0:d6ff5fa503e8 | 30 | #if defined (DM_TOOLCHAIN_MBED) |
displaymodule | 0:d6ff5fa503e8 | 31 | delete _pinCS; |
displaymodule | 0:d6ff5fa503e8 | 32 | delete _pinDC; |
displaymodule | 0:d6ff5fa503e8 | 33 | delete _spi; |
displaymodule | 0:d6ff5fa503e8 | 34 | |
displaymodule | 0:d6ff5fa503e8 | 35 | _pinCS = NULL; |
displaymodule | 0:d6ff5fa503e8 | 36 | _pinDC = NULL; |
displaymodule | 0:d6ff5fa503e8 | 37 | _spi = NULL; |
displaymodule | 0:d6ff5fa503e8 | 38 | #endif |
displaymodule | 0:d6ff5fa503e8 | 39 | } |
displaymodule | 0:d6ff5fa503e8 | 40 | |
displaymodule | 0:d6ff5fa503e8 | 41 | void DmTftSsd2119::writeBus(uint8_t data) { |
displaymodule | 0:d6ff5fa503e8 | 42 | #if defined (DM_TOOLCHAIN_ARDUINO) |
displaymodule | 0:d6ff5fa503e8 | 43 | SPCR = _spiSettings; // SPI Control Register |
displaymodule | 0:d6ff5fa503e8 | 44 | SPDR = data; // SPI Data Register |
displaymodule | 0:d6ff5fa503e8 | 45 | while(!(SPSR & _BV(SPIF))); // SPI Status Register Wait for transmission to finish |
displaymodule | 0:d6ff5fa503e8 | 46 | #elif defined (DM_TOOLCHAIN_MBED) |
displaymodule | 0:d6ff5fa503e8 | 47 | _spi->write(data); |
displaymodule | 0:d6ff5fa503e8 | 48 | #endif |
displaymodule | 0:d6ff5fa503e8 | 49 | } |
displaymodule | 0:d6ff5fa503e8 | 50 | |
displaymodule | 0:d6ff5fa503e8 | 51 | void DmTftSsd2119::sendCommand(uint8_t index) { |
displaymodule | 0:d6ff5fa503e8 | 52 | // cbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 53 | cbi(_pinDC, _bitmaskDC); |
displaymodule | 0:d6ff5fa503e8 | 54 | |
displaymodule | 0:d6ff5fa503e8 | 55 | writeBus(0x00); // Temp |
displaymodule | 0:d6ff5fa503e8 | 56 | writeBus(index); |
displaymodule | 0:d6ff5fa503e8 | 57 | // sbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 58 | } |
displaymodule | 0:d6ff5fa503e8 | 59 | |
displaymodule | 0:d6ff5fa503e8 | 60 | void DmTftSsd2119::send8BitData(uint8_t data) { |
displaymodule | 0:d6ff5fa503e8 | 61 | //cbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 62 | sbi(_pinDC, _bitmaskDC); |
displaymodule | 0:d6ff5fa503e8 | 63 | writeBus(data); |
displaymodule | 0:d6ff5fa503e8 | 64 | //sbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 65 | } |
displaymodule | 0:d6ff5fa503e8 | 66 | |
displaymodule | 0:d6ff5fa503e8 | 67 | void DmTftSsd2119::sendData(uint16_t data) { |
displaymodule | 0:d6ff5fa503e8 | 68 | uint8_t dh = data>>8; |
displaymodule | 0:d6ff5fa503e8 | 69 | uint8_t dl = data&0xff; |
displaymodule | 0:d6ff5fa503e8 | 70 | |
displaymodule | 0:d6ff5fa503e8 | 71 | //cbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 72 | sbi(_pinDC, _bitmaskDC); |
displaymodule | 0:d6ff5fa503e8 | 73 | writeBus(dh); |
displaymodule | 0:d6ff5fa503e8 | 74 | writeBus(dl); |
displaymodule | 0:d6ff5fa503e8 | 75 | //sbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 76 | } |
displaymodule | 0:d6ff5fa503e8 | 77 | |
displaymodule | 0:d6ff5fa503e8 | 78 | void DmTftSsd2119::setAddress(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1) { |
displaymodule | 0:d6ff5fa503e8 | 79 | // Set Start and End Vertical RAM address position |
displaymodule | 0:d6ff5fa503e8 | 80 | uint16_t verticalStartEndAddress; |
displaymodule | 0:d6ff5fa503e8 | 81 | verticalStartEndAddress = y0&0xff; // Start vertical RAM address |
displaymodule | 0:d6ff5fa503e8 | 82 | verticalStartEndAddress += (y1&0xff)<<8; // End vertical RAM address |
displaymodule | 0:d6ff5fa503e8 | 83 | |
displaymodule | 0:d6ff5fa503e8 | 84 | sendCommand(0x44); |
displaymodule | 0:d6ff5fa503e8 | 85 | sendData(verticalStartEndAddress); |
displaymodule | 0:d6ff5fa503e8 | 86 | |
displaymodule | 0:d6ff5fa503e8 | 87 | sendCommand(0x45); // Set Start Horizontal RAM address position |
displaymodule | 0:d6ff5fa503e8 | 88 | sendData(x0); |
displaymodule | 0:d6ff5fa503e8 | 89 | |
displaymodule | 0:d6ff5fa503e8 | 90 | sendCommand(0x46); // Set End Horizontal RAM address position |
displaymodule | 0:d6ff5fa503e8 | 91 | sendData(x1); |
displaymodule | 0:d6ff5fa503e8 | 92 | |
displaymodule | 0:d6ff5fa503e8 | 93 | // Set start position |
displaymodule | 0:d6ff5fa503e8 | 94 | sendCommand(0x4e); // Set Column, RAM address X (max 320) |
displaymodule | 0:d6ff5fa503e8 | 95 | sendData(x0); |
displaymodule | 0:d6ff5fa503e8 | 96 | sendCommand(0x4f); // Set Page, RAM address Y (max 240) |
displaymodule | 0:d6ff5fa503e8 | 97 | sendData(y0); |
displaymodule | 0:d6ff5fa503e8 | 98 | sendCommand(0x22); // RAM data write |
displaymodule | 0:d6ff5fa503e8 | 99 | } |
displaymodule | 0:d6ff5fa503e8 | 100 | |
displaymodule | 0:d6ff5fa503e8 | 101 | // Separate setPixel, because setAddress is to many instructions |
displaymodule | 0:d6ff5fa503e8 | 102 | void DmTftSsd2119::setPixel(uint16_t x, uint16_t y, uint16_t color) { |
displaymodule | 0:d6ff5fa503e8 | 103 | cbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 104 | |
displaymodule | 0:d6ff5fa503e8 | 105 | // setAddress(x, y, x, y); |
displaymodule | 0:d6ff5fa503e8 | 106 | sendCommand(0x4e); // Set Column, RAM address X (max 320) |
displaymodule | 0:d6ff5fa503e8 | 107 | sendData(x); |
displaymodule | 0:d6ff5fa503e8 | 108 | |
displaymodule | 0:d6ff5fa503e8 | 109 | sendCommand(0x4f); // Set Page, RAM address Y (max 240) |
displaymodule | 0:d6ff5fa503e8 | 110 | sendData(y); |
displaymodule | 0:d6ff5fa503e8 | 111 | |
displaymodule | 0:d6ff5fa503e8 | 112 | sendCommand(0x22); |
displaymodule | 0:d6ff5fa503e8 | 113 | sendData(color); |
displaymodule | 0:d6ff5fa503e8 | 114 | |
displaymodule | 0:d6ff5fa503e8 | 115 | sbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 116 | } |
displaymodule | 0:d6ff5fa503e8 | 117 | |
displaymodule | 0:d6ff5fa503e8 | 118 | |
displaymodule | 0:d6ff5fa503e8 | 119 | |
displaymodule | 0:d6ff5fa503e8 | 120 | void DmTftSsd2119::init(void) { |
displaymodule | 0:d6ff5fa503e8 | 121 | setTextColor(BLACK, WHITE); |
displaymodule | 0:d6ff5fa503e8 | 122 | #if defined (DM_TOOLCHAIN_ARDUINO) |
displaymodule | 0:d6ff5fa503e8 | 123 | _pinCS = portOutputRegister(digitalPinToPort(_cs)); |
displaymodule | 0:d6ff5fa503e8 | 124 | _bitmaskCS = digitalPinToBitMask(_cs); |
displaymodule | 0:d6ff5fa503e8 | 125 | _pinDC = portOutputRegister(digitalPinToPort(_dc)); |
displaymodule | 0:d6ff5fa503e8 | 126 | _bitmaskDC = digitalPinToBitMask(_dc); |
displaymodule | 0:d6ff5fa503e8 | 127 | pinMode(_cs,OUTPUT); |
displaymodule | 0:d6ff5fa503e8 | 128 | pinMode(_dc,OUTPUT); |
displaymodule | 0:d6ff5fa503e8 | 129 | |
displaymodule | 0:d6ff5fa503e8 | 130 | sbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 131 | |
displaymodule | 0:d6ff5fa503e8 | 132 | SPI.begin(); |
displaymodule | 0:d6ff5fa503e8 | 133 | SPI.setClockDivider(SPI_CLOCK_DIV2); // 8 MHz (full! speed!) |
displaymodule | 0:d6ff5fa503e8 | 134 | SPI.setBitOrder(MSBFIRST); |
displaymodule | 0:d6ff5fa503e8 | 135 | SPI.setDataMode(SPI_MODE0); |
displaymodule | 0:d6ff5fa503e8 | 136 | _spiSettings = SPCR; |
displaymodule | 0:d6ff5fa503e8 | 137 | #elif defined (DM_TOOLCHAIN_MBED) |
displaymodule | 0:d6ff5fa503e8 | 138 | _pinCS = new DigitalOut((PinName)_cs); |
displaymodule | 0:d6ff5fa503e8 | 139 | _pinDC = new DigitalOut((PinName)_dc); |
displaymodule | 0:d6ff5fa503e8 | 140 | sbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 141 | |
displaymodule | 0:d6ff5fa503e8 | 142 | _spi = new SPI((PinName)_mosi, (PinName)_miso, (PinName)_clk); |
displaymodule | 0:d6ff5fa503e8 | 143 | _spi->format(8,0); |
displaymodule | 0:d6ff5fa503e8 | 144 | _spi->frequency(8000000); // Max SPI speed for display is 10 and for 17 for LPC15xx |
displaymodule | 0:d6ff5fa503e8 | 145 | #endif |
displaymodule | 0:d6ff5fa503e8 | 146 | cbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 147 | delay(135); // This much delay needed?? |
displaymodule | 0:d6ff5fa503e8 | 148 | |
displaymodule | 0:d6ff5fa503e8 | 149 | delay(120); |
displaymodule | 0:d6ff5fa503e8 | 150 | |
displaymodule | 0:d6ff5fa503e8 | 151 | sendCommand(0x28); // VCOM OTP |
displaymodule | 0:d6ff5fa503e8 | 152 | sendData(0x0006); |
displaymodule | 0:d6ff5fa503e8 | 153 | |
displaymodule | 0:d6ff5fa503e8 | 154 | sendCommand(0x00); // Start Oscillator |
displaymodule | 0:d6ff5fa503e8 | 155 | sendData(0x0001); |
displaymodule | 0:d6ff5fa503e8 | 156 | |
displaymodule | 0:d6ff5fa503e8 | 157 | sendCommand(0x10); // Set Sleep mode |
displaymodule | 0:d6ff5fa503e8 | 158 | sendData(0x0000); // Sleep out |
displaymodule | 0:d6ff5fa503e8 | 159 | delay(30); |
displaymodule | 0:d6ff5fa503e8 | 160 | |
displaymodule | 0:d6ff5fa503e8 | 161 | sendCommand(0x11); // Entry Mode ,SET LCM interface Mode. |
displaymodule | 0:d6ff5fa503e8 | 162 | sendData(0x6870); // SET 65K colors,MCU interface Mode.TypeB ,ID=11 AM=0 the address counter is updated in the horizontal direction. |
displaymodule | 0:d6ff5fa503e8 | 163 | |
displaymodule | 0:d6ff5fa503e8 | 164 | sendCommand(0x15); // Generic Interface Control. DOCLK,HSYNC,VSYNC,DE |
displaymodule | 0:d6ff5fa503e8 | 165 | sendData(0x0000); |
displaymodule | 0:d6ff5fa503e8 | 166 | |
displaymodule | 0:d6ff5fa503e8 | 167 | sendCommand(0x01); // Driver Output Control |
displaymodule | 0:d6ff5fa503e8 | 168 | sendData(0x72EF); // Set REV,GD,BGR,SM,RL,TB |
displaymodule | 0:d6ff5fa503e8 | 169 | |
displaymodule | 0:d6ff5fa503e8 | 170 | sendCommand(0x02); // LCD Driving Waveform Control,LCD |
displaymodule | 0:d6ff5fa503e8 | 171 | sendData(0x0600); |
displaymodule | 0:d6ff5fa503e8 | 172 | |
displaymodule | 0:d6ff5fa503e8 | 173 | sendCommand(0x08); // Set the scanning starting position of the gate driver. |
displaymodule | 0:d6ff5fa503e8 | 174 | sendData(0x0000); // The valid range is from 1 to 240 |
displaymodule | 0:d6ff5fa503e8 | 175 | |
displaymodule | 0:d6ff5fa503e8 | 176 | // LCD POWER CONTROL |
displaymodule | 0:d6ff5fa503e8 | 177 | sendCommand(0x03); // Power Control 1, VGH,VGL |
displaymodule | 0:d6ff5fa503e8 | 178 | sendData(0x6A38); // Set dct=fline*4, VGH=2 x VCIX2 + VCI,VGL=-(VGH) + VCix2, DC=Fline × 8, AP=Medium to large |
displaymodule | 0:d6ff5fa503e8 | 179 | |
displaymodule | 0:d6ff5fa503e8 | 180 | sendCommand(0X0B); // Frame Cycle Control. |
displaymodule | 0:d6ff5fa503e8 | 181 | sendData(0x5308); // SET NO SDT=1 clock cycle (POR) ,Sets the equalizing period, |
displaymodule | 0:d6ff5fa503e8 | 182 | |
displaymodule | 0:d6ff5fa503e8 | 183 | sendCommand(0x0C); // Power Control 2 设VCIX2 电压 |
displaymodule | 0:d6ff5fa503e8 | 184 | sendData(0x0003); // Adjust VCIX2 output voltage=5.7V |
displaymodule | 0:d6ff5fa503e8 | 185 | |
displaymodule | 0:d6ff5fa503e8 | 186 | sendCommand(0x0D); // Set amplitude magnification of VLCD63 |
displaymodule | 0:d6ff5fa503e8 | 187 | sendData(0x000A); // vlcd63=VREF(2.0V)* 2.335V |
displaymodule | 0:d6ff5fa503e8 | 188 | |
displaymodule | 0:d6ff5fa503e8 | 189 | sendCommand(0x0E); // SET VCOMG VDV .设VCOM电压 |
displaymodule | 0:d6ff5fa503e8 | 190 | sendData(0x2B00); // SET VCOMG=1,VCOM=VLCD63* //2A |
displaymodule | 0:d6ff5fa503e8 | 191 | |
displaymodule | 0:d6ff5fa503e8 | 192 | sendCommand(0X0F); // Gate Scan Position. |
displaymodule | 0:d6ff5fa503e8 | 193 | sendData(0x0000); // The valid range is from 1 to 240. |
displaymodule | 0:d6ff5fa503e8 | 194 | |
displaymodule | 0:d6ff5fa503e8 | 195 | sendCommand(0x1E); // SET nOTP VCOMH ,设VCOMH电压 |
displaymodule | 0:d6ff5fa503e8 | 196 | sendData(0x00B7); // SET nOTP=0, VCOMH=VLCD63* //B8 |
displaymodule | 0:d6ff5fa503e8 | 197 | |
displaymodule | 0:d6ff5fa503e8 | 198 | sendCommand(0x25); // Frame Frequency Control |
displaymodule | 0:d6ff5fa503e8 | 199 | sendData(0x8000); // SET OSC 65Hz //0A-70hz |
displaymodule | 0:d6ff5fa503e8 | 200 | |
displaymodule | 0:d6ff5fa503e8 | 201 | sendCommand(0x26); // Analog setting |
displaymodule | 0:d6ff5fa503e8 | 202 | sendData(0x3800); |
displaymodule | 0:d6ff5fa503e8 | 203 | |
displaymodule | 0:d6ff5fa503e8 | 204 | sendCommand(0x27); // Analog setting |
displaymodule | 0:d6ff5fa503e8 | 205 | sendData(0x0078); |
displaymodule | 0:d6ff5fa503e8 | 206 | |
displaymodule | 0:d6ff5fa503e8 | 207 | // |
displaymodule | 0:d6ff5fa503e8 | 208 | sendCommand(0x12); // Sleep mode |
displaymodule | 0:d6ff5fa503e8 | 209 | sendData(0xD999); |
displaymodule | 0:d6ff5fa503e8 | 210 | |
displaymodule | 0:d6ff5fa503e8 | 211 | // SET WINDOW |
displaymodule | 0:d6ff5fa503e8 | 212 | sendCommand(0x4E); // Ram Address Set |
displaymodule | 0:d6ff5fa503e8 | 213 | sendData(0x0000); |
displaymodule | 0:d6ff5fa503e8 | 214 | |
displaymodule | 0:d6ff5fa503e8 | 215 | sendCommand(0x4F); // Ram Address Set |
displaymodule | 0:d6ff5fa503e8 | 216 | sendData(0x0000); |
displaymodule | 0:d6ff5fa503e8 | 217 | |
displaymodule | 0:d6ff5fa503e8 | 218 | // Gamma Control |
displaymodule | 0:d6ff5fa503e8 | 219 | sendCommand(0x30); |
displaymodule | 0:d6ff5fa503e8 | 220 | sendData(0x0000);//1 |
displaymodule | 0:d6ff5fa503e8 | 221 | |
displaymodule | 0:d6ff5fa503e8 | 222 | sendCommand(0x31); |
displaymodule | 0:d6ff5fa503e8 | 223 | sendData(0x0104);//2 |
displaymodule | 0:d6ff5fa503e8 | 224 | |
displaymodule | 0:d6ff5fa503e8 | 225 | sendCommand(0x32); |
displaymodule | 0:d6ff5fa503e8 | 226 | sendData(0x0100);//3 |
displaymodule | 0:d6ff5fa503e8 | 227 | |
displaymodule | 0:d6ff5fa503e8 | 228 | sendCommand(0x33); |
displaymodule | 0:d6ff5fa503e8 | 229 | sendData(0x0305);//4 |
displaymodule | 0:d6ff5fa503e8 | 230 | |
displaymodule | 0:d6ff5fa503e8 | 231 | sendCommand(0x34); |
displaymodule | 0:d6ff5fa503e8 | 232 | sendData(0x0505);//4 |
displaymodule | 0:d6ff5fa503e8 | 233 | |
displaymodule | 0:d6ff5fa503e8 | 234 | sendCommand(0x35); |
displaymodule | 0:d6ff5fa503e8 | 235 | sendData(0x0305);//5 |
displaymodule | 0:d6ff5fa503e8 | 236 | |
displaymodule | 0:d6ff5fa503e8 | 237 | sendCommand(0x36); |
displaymodule | 0:d6ff5fa503e8 | 238 | sendData(0x0707);//6 |
displaymodule | 0:d6ff5fa503e8 | 239 | |
displaymodule | 0:d6ff5fa503e8 | 240 | sendCommand(0x37); |
displaymodule | 0:d6ff5fa503e8 | 241 | sendData(0x0300);//7 |
displaymodule | 0:d6ff5fa503e8 | 242 | |
displaymodule | 0:d6ff5fa503e8 | 243 | sendCommand(0x3A); |
displaymodule | 0:d6ff5fa503e8 | 244 | sendData(0x1200);//8 |
displaymodule | 0:d6ff5fa503e8 | 245 | |
displaymodule | 0:d6ff5fa503e8 | 246 | sendCommand(0x3B); |
displaymodule | 0:d6ff5fa503e8 | 247 | sendData(0x0800);//9 |
displaymodule | 0:d6ff5fa503e8 | 248 | |
displaymodule | 0:d6ff5fa503e8 | 249 | // Final init |
displaymodule | 0:d6ff5fa503e8 | 250 | delay(300); |
displaymodule | 0:d6ff5fa503e8 | 251 | sendCommand(0x07); // Display Control |
displaymodule | 0:d6ff5fa503e8 | 252 | |
displaymodule | 0:d6ff5fa503e8 | 253 | sendData(0x0033); // Display on |
displaymodule | 0:d6ff5fa503e8 | 254 | delay(100); |
displaymodule | 0:d6ff5fa503e8 | 255 | |
displaymodule | 0:d6ff5fa503e8 | 256 | sendCommand(0x22); // RAM data write/read |
displaymodule | 0:d6ff5fa503e8 | 257 | |
displaymodule | 0:d6ff5fa503e8 | 258 | delay(50); |
displaymodule | 0:d6ff5fa503e8 | 259 | sbi(_pinCS, _bitmaskCS); |
displaymodule | 0:d6ff5fa503e8 | 260 | clearScreen(); |
displaymodule | 0:d6ff5fa503e8 | 261 | } |
displaymodule | 0:d6ff5fa503e8 | 262 | |
displaymodule | 0:d6ff5fa503e8 | 263 | /********************************************************************************************************* |
displaymodule | 0:d6ff5fa503e8 | 264 | END FILE |
displaymodule | 0:d6ff5fa503e8 | 265 | *********************************************************************************************************/ |
displaymodule | 0:d6ff5fa503e8 | 266 | |
displaymodule | 0:d6ff5fa503e8 | 267 |