AD9249.cpp

00001 #include <mbed.h>
00002 
00003 #include "AD9249.h"
00004 #include "SWSPI_BI.h"
00005 
00006 
00007 #define AD9249_SRC_VER  "1.22" 
00008 
00009 #define CS_POL 1
00010 #define NCS_POL 0
00011 /*
00012  const u16 AD9249::configreg=           0x0;
00013     const u16 AD9249::chip_id_reg=         0x1;
00014     const u16 AD9249::chip_grade_reg=      0x2;
00015    // const u16 AD9249::unused_reg= { 0x3, 0x07, 0xA, 0xE, 0xF ,0x11, 0x12,0x13, 0x17, 0x1D, 0x1E, 0x1F,0x20 };
00016     const u16 AD9249::dev_index2_reg=      0x4;
00017     const u16 AD9249::dev_index1_reg=      0x4;
00018     const u16 AD9249::transfer_reg=      0xFF;
00019     const u16 AD9249::power_mode_reg=      0x8;
00020     const u16 AD9249::clock_gobal_reg=      0x9;
00021     const u16 AD9249::clock_divide_reg=      0xB;
00022     const u16 AD9249::enhancement_ctr_reg=      0xC;
00023     const u16 AD9249::test_mode_reg=      0xD;
00024     const u16 AD9249::offset_adj_reg=      0x10;
00025     const u16 AD9249::output_mode_reg=      0x14;
00026     const u16 AD9249::output_adj_reg=      0x15;
00027     const u16 AD9249::output_phase_reg=      0x16;
00028     const u16 AD9249::vref_reg=      0x18;
00029     const u16 AD9249::usserpatt1_LSB_reg=      0x19;
00030     const u16 AD9249::usserpatt1_MSB_reg=      0x1A;
00031     const u16 AD9249::usserpatt2_LSB_reg=      0x1B;
00032     const u16 AD9249::usserpatt2_MSB_reg=      0x1C;
00033     const u16 AD9249::serial_out_cntr_reg=      0x21;
00034     const u16 AD9249::serial_status_reg=      0x22;
00035     const u16 AD9249::sample_rate_reg=      0x100;
00036     const u16 AD9249::user_io_ctr2_reg=      0x101;
00037     const u16 AD9249::user_io_ctr3_reg=      0x102;
00038     const u16 AD9249::sync_reg=      0x109;
00039   */ 
00040 
00041 
00042 AD9249::AD9249(SWSPI_BI * spi_dev, DigitalOut * csb_pin):
00043     getVersion(AD9249_HDR_VER, AD9249_SRC_VER, __TIME__, __DATE__)
00044 {  
00045     spi = spi_dev;
00046     csb = csb_pin;
00047 }
00048 
00049 
00050 AD9249::u32 AD9249::spi_cycle(u16 reg, bool rw, u16 nrbytes, u32 data) {
00051     // format instruction 
00052     u32 read = 0;
00053     reg = 0x1FFF & reg;  
00054     if (rw) reg |= 0x8000;
00055     if (nrbytes > 2) return 0; // this function doesn't support stream 
00056     u32 stnrbytes = (nrbytes - 1);
00057     stnrbytes = stnrbytes << 13;
00058     reg |= stnrbytes;  // reg is now the instruction 
00059     spi->format(16, 0); // should make sure the sclk is high 
00060     printf("send %04X \n\r", reg);
00061     if (rw) {
00062         spi->write(reg, csb, false, CS_POL, true);
00063         spi->format((nrbytes) * 8, 0); 
00064         read=spi->read(csb, true, CS_POL);                                        
00065     } else{
00066         spi->write(reg, csb, false, CS_POL);
00067         spi->format((nrbytes) * 8, 0);
00068         spi->write(data, csb, true, CS_POL);
00069     }         
00070     return read;
00071 }
00072     
00073     
00074 bool AD9249::getDevInfo(u8& chipid, u8& grade, u16 &rb) {
00075     u32 data = spi_cycle(chip_grade_reg, true, 2, 0);
00076     rb = data;
00077     chipid = data & 0XFF;
00078     grade = (data >> 8) & 0xFF;
00079     return true;
00080 }
00081          
00082 bool AD9249::getDevId(u8& chipid){
00083     bool rv = readReg8(chip_id_reg, chipid); 
00084     return rv;
00085 }
00086 
00087 bool AD9249::getGrade(u8& chipid){          
00088     bool rv = readReg8(chip_grade_reg, chipid);                       
00089     return rv;
00090 }      
00091   
00092 bool AD9249::readReg16(u16 regaddr, u16& data) {
00093     u32 datai = spi_cycle(regaddr, true, 2, 0);
00094     data = (u16) (datai & 0XFFFF);
00095     return true;
00096 }
00097        
00098 bool AD9249::readReg8(u16 regaddr, u8& data) {
00099     u32 datai = spi_cycle(regaddr, true, 1, 0);
00100     data = (u8) (datai & 0XFF);
00101     return true;
00102 }         
00103           
00104 bool AD9249::setReg16(u16 regaddr, u16 data) {
00105     u32 datai = spi_cycle(regaddr, false, 2, (u32) data);
00106     return true;
00107 }
00108     
00109 bool AD9249::setReg8 (u16 regaddr, u8 data) {
00110     u32 datai = spi_cycle(regaddr, false, 1, (u32) data);
00111     return true;
00112 }
00113     
00114          
00115 bool AD9249::setPattern1(u16 pattern) {
00116     bool rv = setReg16(usserpatt1_MSB_reg, pattern);
00117     return rv;
00118 }
00119 
00120 bool AD9249::setPattern2(u16 pattern) {
00121     bool rv = setReg16(usserpatt2_MSB_reg, pattern);
00122     return rv;
00123 }
00124    
00125 bool AD9249::readPattern1(u16& pattern) {
00126     bool rv = readReg16(usserpatt1_MSB_reg, pattern);
00127     return rv;
00128 }
00129 
00130 bool AD9249::readPattern2(u16& pattern) {
00131     bool rv = readReg16(usserpatt2_MSB_reg, pattern);
00132     return rv;
00133 }
00134        
00135 void AD9249::init1(){}
00136 
00137 void AD9249::init2(){}