AD9249 ADC

Fork of adc_ad9249 by wimbeaumont Project

Committer:
wbeaumont
Date:
Tue Sep 23 08:25:23 2014 +0000
Revision:
0:9efb460e962b
Child:
1:01459a6ab296
version with repsonse from ADC

Who changed what in which revision?

UserRevisionLine numberNew contents of line
wbeaumont 0:9efb460e962b 1 /* SWSPI, Software SPI library
wbeaumont 0:9efb460e962b 2 * Copyright (c) 2012-2014, David R. Van Wagner, http://techwithdave.blogspot.com
wbeaumont 0:9efb460e962b 3 *
wbeaumont 0:9efb460e962b 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
wbeaumont 0:9efb460e962b 5 * of this software and associated documentation files (the "Software"), to deal
wbeaumont 0:9efb460e962b 6 * in the Software without restriction, including without limitation the rights
wbeaumont 0:9efb460e962b 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
wbeaumont 0:9efb460e962b 8 * copies of the Software, and to permit persons to whom the Software is
wbeaumont 0:9efb460e962b 9 * furnished to do so, subject to the following conditions:
wbeaumont 0:9efb460e962b 10 *
wbeaumont 0:9efb460e962b 11 * The above copyright notice and this permission notice shall be included in
wbeaumont 0:9efb460e962b 12 * all copies or substantial portions of the Software.
wbeaumont 0:9efb460e962b 13 *
wbeaumont 0:9efb460e962b 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
wbeaumont 0:9efb460e962b 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
wbeaumont 0:9efb460e962b 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
wbeaumont 0:9efb460e962b 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
wbeaumont 0:9efb460e962b 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
wbeaumont 0:9efb460e962b 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
wbeaumont 0:9efb460e962b 20 * THE SOFTWARE.
wbeaumont 0:9efb460e962b 21 */
wbeaumont 0:9efb460e962b 22 /*
wbeaumont 0:9efb460e962b 23 * modified the software for adapt to the AD9249 ADC ( bi directional ) with LVDS interface
wbeaumont 0:9efb460e962b 24
wbeaumont 0:9efb460e962b 25
wbeaumont 0:9efb460e962b 26 */
wbeaumont 0:9efb460e962b 27
wbeaumont 0:9efb460e962b 28 #include <mbed.h>
wbeaumont 0:9efb460e962b 29 #include "SWSPI_BI.h"
wbeaumont 0:9efb460e962b 30 #include "S_SCTRL_SM1_hwfunct.h"
wbeaumont 0:9efb460e962b 31
wbeaumont 0:9efb460e962b 32 /**
wbeaumont 0:9efb460e962b 33 PARAM
wbeaumont 0:9efb460e962b 34 @misopin pointer to the input / output pin for the data communication
wbeaumont 0:9efb460e962b 35 @rdir_pin pointer to the output pin that sets the remote LVDS buffer to read / write
wbeaumont 0:9efb460e962b 36 @ldir_pin pointer to the output pin that sets the local LVDS buffer to read / write
wbeaumont 0:9efb460e962b 37 @sclk_pin pointer to the output pin that act as the clock signal for the interface
wbeaumont 0:9efb460e962b 38
wbeaumont 0:9efb460e962b 39 */
wbeaumont 0:9efb460e962b 40 SWSPI_BI::SWSPI_BI(DigitalInOut *msio_pin, DigitalOut *rdir_pin,DigitalOut *ldir_pin, DigitalOut *sclk_pin) {
wbeaumont 0:9efb460e962b 41
wbeaumont 0:9efb460e962b 42 msio = msio_pin;
wbeaumont 0:9efb460e962b 43 rdir = rdir_pin;
wbeaumont 0:9efb460e962b 44 ldir = ldir_pin;
wbeaumont 0:9efb460e962b 45 sclk = sclk_pin;
wbeaumont 0:9efb460e962b 46 set_bi_spi_mo(1, msio,ldir,rdir);
wbeaumont 0:9efb460e962b 47
wbeaumont 0:9efb460e962b 48 format(8);
wbeaumont 0:9efb460e962b 49 frequency(500000);
wbeaumont 0:9efb460e962b 50 }
wbeaumont 0:9efb460e962b 51
wbeaumont 0:9efb460e962b 52 SWSPI_BI::~SWSPI_BI()
wbeaumont 0:9efb460e962b 53 {
wbeaumont 0:9efb460e962b 54 }
wbeaumont 0:9efb460e962b 55
wbeaumont 0:9efb460e962b 56 void SWSPI_BI::format( int bitsin, int modein ){
wbeaumont 0:9efb460e962b 57 bits = bitsin;
wbeaumont 0:9efb460e962b 58 mode = modein;
wbeaumont 0:9efb460e962b 59 polarity = !((modein >> 1) & 1);
wbeaumont 0:9efb460e962b 60 phase = modein & 1;
wbeaumont 0:9efb460e962b 61 sclk->write(polarity);
wbeaumont 0:9efb460e962b 62 }
wbeaumont 0:9efb460e962b 63
wbeaumont 0:9efb460e962b 64 void SWSPI_BI::frequency(int hz)
wbeaumont 0:9efb460e962b 65 {
wbeaumont 0:9efb460e962b 66 this->freq = hz;
wbeaumont 0:9efb460e962b 67 }
wbeaumont 0:9efb460e962b 68
wbeaumont 0:9efb460e962b 69 void SWSPI_BI::write(unsigned int value, DigitalOut * cs, bool lastdata, int cs_pol,bool nxtrd ){
wbeaumont 0:9efb460e962b 70
wbeaumont 0:9efb460e962b 71 // write data to output
wbeaumont 0:9efb460e962b 72 // assumption is that the cs line was just set from high to low so that the SPI slave is in read mode
wbeaumont 0:9efb460e962b 73 value= ~value;
wbeaumont 0:9efb460e962b 74 set_bi_spi_mo(1,msio,ldir,rdir);
wbeaumont 0:9efb460e962b 75 cs->write(cs_pol);
wbeaumont 0:9efb460e962b 76 for (int bit = bits-1; bit >= 0; --bit) {
wbeaumont 0:9efb460e962b 77 msio->write(((value >> bit) & 0x01) != 0);
wbeaumont 0:9efb460e962b 78 if(phase) { sclk->write(!polarity); wait(1.0/freq/2); sclk->write(polarity);
wbeaumont 0:9efb460e962b 79 if(!bit and nxtrd) set_bi_spi_mo(0,msio,ldir,rdir); // set already to input mode
wbeaumont 0:9efb460e962b 80 wait(1.0/freq/2); }
wbeaumont 0:9efb460e962b 81 else { wait(1.0/freq/2); sclk->write(!polarity); wait(1.0/freq/2); sclk->write(polarity); }
wbeaumont 0:9efb460e962b 82
wbeaumont 0:9efb460e962b 83
wbeaumont 0:9efb460e962b 84 }
wbeaumont 0:9efb460e962b 85 if( lastdata) {
wbeaumont 0:9efb460e962b 86 set_bi_spi_mo(0,msio,ldir,rdir);
wbeaumont 0:9efb460e962b 87 cs->write(!cs_pol);
wbeaumont 0:9efb460e962b 88 }
wbeaumont 0:9efb460e962b 89 else {
wbeaumont 0:9efb460e962b 90 }
wbeaumont 0:9efb460e962b 91 }
wbeaumont 0:9efb460e962b 92
wbeaumont 0:9efb460e962b 93 unsigned int SWSPI_BI::read( DigitalOut * cs, bool lastdata, int cs_pol ){
wbeaumont 0:9efb460e962b 94 unsigned int read = 0;
wbeaumont 0:9efb460e962b 95 set_bi_spi_mo(0,msio,ldir,rdir);
wbeaumont 0:9efb460e962b 96 cs->write(cs_pol);
wbeaumont 0:9efb460e962b 97 wait(1.0/freq/2);
wbeaumont 0:9efb460e962b 98 for (int bit = bits-1; bit >= 0; --bit) {
wbeaumont 0:9efb460e962b 99 if (phase == 0) {
wbeaumont 0:9efb460e962b 100 if (msio->read()) read |= (1 << bit);
wbeaumont 0:9efb460e962b 101
wbeaumont 0:9efb460e962b 102 }
wbeaumont 0:9efb460e962b 103 sclk->write(!polarity);
wbeaumont 0:9efb460e962b 104 wait(1.0/freq/2);
wbeaumont 0:9efb460e962b 105 if (phase == 1) {
wbeaumont 0:9efb460e962b 106 if (msio->read()) read |= (1 << bit);
wbeaumont 0:9efb460e962b 107 }
wbeaumont 0:9efb460e962b 108
wbeaumont 0:9efb460e962b 109 sclk->write(polarity);
wbeaumont 0:9efb460e962b 110 wait(1.0/freq/2);
wbeaumont 0:9efb460e962b 111 }
wbeaumont 0:9efb460e962b 112 if( lastdata) {
wbeaumont 0:9efb460e962b 113 cs->write(!cs_pol);
wbeaumont 0:9efb460e962b 114 }
wbeaumont 0:9efb460e962b 115 // else keep current io config
wbeaumont 0:9efb460e962b 116
wbeaumont 0:9efb460e962b 117
wbeaumont 0:9efb460e962b 118 return ~read;
wbeaumont 0:9efb460e962b 119 }
wbeaumont 0:9efb460e962b 120