Nordic stack and drivers for the mbed BLE API
Fork of nRF51822 by
TARGET_MCU_NRF51822/sdk/source/libraries/bootloader_dfu/bootloader_util.c@640:c90ae1400bf2, 2016-09-14 (annotated)
- Committer:
- Vincent Coubard
- Date:
- Wed Sep 14 14:39:43 2016 +0100
- Revision:
- 640:c90ae1400bf2
Sync with bdab10dc0f90748b6989c8b577771bb403ca6bd8 from ARMmbed/mbed-os.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Vincent Coubard |
640:c90ae1400bf2 | 1 | /* |
Vincent Coubard |
640:c90ae1400bf2 | 2 | * Copyright (c) Nordic Semiconductor ASA |
Vincent Coubard |
640:c90ae1400bf2 | 3 | * All rights reserved. |
Vincent Coubard |
640:c90ae1400bf2 | 4 | * |
Vincent Coubard |
640:c90ae1400bf2 | 5 | * Redistribution and use in source and binary forms, with or without modification, |
Vincent Coubard |
640:c90ae1400bf2 | 6 | * are permitted provided that the following conditions are met: |
Vincent Coubard |
640:c90ae1400bf2 | 7 | * |
Vincent Coubard |
640:c90ae1400bf2 | 8 | * 1. Redistributions of source code must retain the above copyright notice, this |
Vincent Coubard |
640:c90ae1400bf2 | 9 | * list of conditions and the following disclaimer. |
Vincent Coubard |
640:c90ae1400bf2 | 10 | * |
Vincent Coubard |
640:c90ae1400bf2 | 11 | * 2. Redistributions in binary form must reproduce the above copyright notice, this |
Vincent Coubard |
640:c90ae1400bf2 | 12 | * list of conditions and the following disclaimer in the documentation and/or |
Vincent Coubard |
640:c90ae1400bf2 | 13 | * other materials provided with the distribution. |
Vincent Coubard |
640:c90ae1400bf2 | 14 | * |
Vincent Coubard |
640:c90ae1400bf2 | 15 | * 3. Neither the name of Nordic Semiconductor ASA nor the names of other |
Vincent Coubard |
640:c90ae1400bf2 | 16 | * contributors to this software may be used to endorse or promote products |
Vincent Coubard |
640:c90ae1400bf2 | 17 | * derived from this software without specific prior written permission. |
Vincent Coubard |
640:c90ae1400bf2 | 18 | * |
Vincent Coubard |
640:c90ae1400bf2 | 19 | * |
Vincent Coubard |
640:c90ae1400bf2 | 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
Vincent Coubard |
640:c90ae1400bf2 | 21 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
Vincent Coubard |
640:c90ae1400bf2 | 22 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
Vincent Coubard |
640:c90ae1400bf2 | 23 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
Vincent Coubard |
640:c90ae1400bf2 | 24 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
Vincent Coubard |
640:c90ae1400bf2 | 25 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
Vincent Coubard |
640:c90ae1400bf2 | 26 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
Vincent Coubard |
640:c90ae1400bf2 | 27 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
Vincent Coubard |
640:c90ae1400bf2 | 28 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
Vincent Coubard |
640:c90ae1400bf2 | 29 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Vincent Coubard |
640:c90ae1400bf2 | 30 | * |
Vincent Coubard |
640:c90ae1400bf2 | 31 | */ |
Vincent Coubard |
640:c90ae1400bf2 | 32 | |
Vincent Coubard |
640:c90ae1400bf2 | 33 | #include "bootloader_util.h" |
Vincent Coubard |
640:c90ae1400bf2 | 34 | #include <stdint.h> |
Vincent Coubard |
640:c90ae1400bf2 | 35 | #include <string.h> |
Vincent Coubard |
640:c90ae1400bf2 | 36 | |
Vincent Coubard |
640:c90ae1400bf2 | 37 | |
Vincent Coubard |
640:c90ae1400bf2 | 38 | /** |
Vincent Coubard |
640:c90ae1400bf2 | 39 | * @brief Function for aborting current application/bootloader jump to to other app/bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 40 | * |
Vincent Coubard |
640:c90ae1400bf2 | 41 | * @details This functions will use the address provide to swap the stack pointer and then load |
Vincent Coubard |
640:c90ae1400bf2 | 42 | * the address of the reset handler to be executed. It will check current system mode |
Vincent Coubard |
640:c90ae1400bf2 | 43 | * (thread/handler) and if in thread mode it will reset into other application. |
Vincent Coubard |
640:c90ae1400bf2 | 44 | * If in handler mode \ref isr_abort will be executed to ensure correct exit of handler |
Vincent Coubard |
640:c90ae1400bf2 | 45 | * mode and jump into reset handler of other application. |
Vincent Coubard |
640:c90ae1400bf2 | 46 | * |
Vincent Coubard |
640:c90ae1400bf2 | 47 | * @param[in] start_addr Start address of other application. This address must point to the |
Vincent Coubard |
640:c90ae1400bf2 | 48 | initial stack pointer of the application. |
Vincent Coubard |
640:c90ae1400bf2 | 49 | * |
Vincent Coubard |
640:c90ae1400bf2 | 50 | * @note This function will never return but issue a reset into provided application. |
Vincent Coubard |
640:c90ae1400bf2 | 51 | */ |
Vincent Coubard |
640:c90ae1400bf2 | 52 | #if defined ( __CC_ARM ) |
Vincent Coubard |
640:c90ae1400bf2 | 53 | __asm static void bootloader_util_reset(uint32_t start_addr) |
Vincent Coubard |
640:c90ae1400bf2 | 54 | { |
Vincent Coubard |
640:c90ae1400bf2 | 55 | LDR R5, [R0] ; Get App initial MSP for bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 56 | MSR MSP, R5 ; Set the main stack pointer to the applications MSP. |
Vincent Coubard |
640:c90ae1400bf2 | 57 | LDR R0, [R0, #0x04] ; Load Reset handler into R0. This will be first argument to branch instruction (BX). |
Vincent Coubard |
640:c90ae1400bf2 | 58 | |
Vincent Coubard |
640:c90ae1400bf2 | 59 | MOVS R4, #0xFF ; Load ones to R4. |
Vincent Coubard |
640:c90ae1400bf2 | 60 | SXTB R4, R4 ; Sign extend R4 to obtain 0xFFFFFFFF instead of 0xFF. |
Vincent Coubard |
640:c90ae1400bf2 | 61 | MRS R5, IPSR ; Load IPSR to R5 to check for handler or thread mode. |
Vincent Coubard |
640:c90ae1400bf2 | 62 | CMP R5, #0x00 ; Compare, if 0 then we are in thread mode and can continue to reset handler of bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 63 | BNE isr_abort ; If not zero we need to exit current ISR and jump to reset handler of bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 64 | |
Vincent Coubard |
640:c90ae1400bf2 | 65 | MOV LR, R4 ; Clear the link register and set to ones to ensure no return, R4 = 0xFFFFFFFF. |
Vincent Coubard |
640:c90ae1400bf2 | 66 | BX R0 ; Branch to reset handler of bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 67 | |
Vincent Coubard |
640:c90ae1400bf2 | 68 | isr_abort |
Vincent Coubard |
640:c90ae1400bf2 | 69 | ; R4 contains ones from line above. Will be popped as R12 when exiting ISR (Cleaning up the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 70 | MOV R5, R4 ; Fill with ones before jumping to reset handling. We be popped as LR when exiting ISR. Ensures no return to application. |
Vincent Coubard |
640:c90ae1400bf2 | 71 | MOV R6, R0 ; Move address of reset handler to R6. Will be popped as PC when exiting ISR. Ensures the reset handler will be executed when exist ISR. |
Vincent Coubard |
640:c90ae1400bf2 | 72 | MOVS r7, #0x21 ; Move MSB reset value of xPSR to R7. Will be popped as xPSR when exiting ISR. xPSR is 0x21000000 thus MSB is 0x21. |
Vincent Coubard |
640:c90ae1400bf2 | 73 | REV r7, r7 ; Reverse byte order to put 0x21 as MSB. |
Vincent Coubard |
640:c90ae1400bf2 | 74 | PUSH {r4-r7} ; Push everything to new stack to allow interrupt handler to fetch it on exiting the ISR. |
Vincent Coubard |
640:c90ae1400bf2 | 75 | |
Vincent Coubard |
640:c90ae1400bf2 | 76 | MOVS R4, #0x00 ; Fill with zeros before jumping to reset handling. We be popped as R0 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 77 | MOVS R5, #0x00 ; Fill with zeros before jumping to reset handling. We be popped as R1 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 78 | MOVS R6, #0x00 ; Fill with zeros before jumping to reset handling. We be popped as R2 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 79 | MOVS R7, #0x00 ; Fill with zeros before jumping to reset handling. We be popped as R3 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 80 | PUSH {r4-r7} ; Push zeros (R4-R7) to stack to prepare for exiting the interrupt routine. |
Vincent Coubard |
640:c90ae1400bf2 | 81 | |
Vincent Coubard |
640:c90ae1400bf2 | 82 | MOVS R0, #0xF9 ; Move the execution return command into register, 0xFFFFFFF9. |
Vincent Coubard |
640:c90ae1400bf2 | 83 | SXTB R0, R0 ; Sign extend R0 to obtain 0xFFFFFFF9 instead of 0xF9. |
Vincent Coubard |
640:c90ae1400bf2 | 84 | BX R0 ; No return - Handler mode will be exited. Stack will be popped and execution will continue in reset handler initializing other application. |
Vincent Coubard |
640:c90ae1400bf2 | 85 | ALIGN |
Vincent Coubard |
640:c90ae1400bf2 | 86 | } |
Vincent Coubard |
640:c90ae1400bf2 | 87 | #elif defined ( __GNUC__ ) |
Vincent Coubard |
640:c90ae1400bf2 | 88 | static inline void bootloader_util_reset(uint32_t start_addr) |
Vincent Coubard |
640:c90ae1400bf2 | 89 | { |
Vincent Coubard |
640:c90ae1400bf2 | 90 | __asm volatile( |
Vincent Coubard |
640:c90ae1400bf2 | 91 | "ldr r0, [%0]\t\n" // Get App initial MSP for bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 92 | "msr msp, r0\t\n" // Set the main stack pointer to the applications MSP. |
Vincent Coubard |
640:c90ae1400bf2 | 93 | "ldr r0, [%0, #0x04]\t\n" // Load Reset handler into R0. |
Vincent Coubard |
640:c90ae1400bf2 | 94 | |
Vincent Coubard |
640:c90ae1400bf2 | 95 | "movs r4, #0xFF\t\n" // Move ones to R4. |
Vincent Coubard |
640:c90ae1400bf2 | 96 | "sxtb r4, r4\t\n" // Sign extend R4 to obtain 0xFFFFFFFF instead of 0xFF. |
Vincent Coubard |
640:c90ae1400bf2 | 97 | |
Vincent Coubard |
640:c90ae1400bf2 | 98 | "mrs r5, IPSR\t\n" // Load IPSR to R5 to check for handler or thread mode. |
Vincent Coubard |
640:c90ae1400bf2 | 99 | "cmp r5, #0x00\t\n" // Compare, if 0 then we are in thread mode and can continue to reset handler of bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 100 | "bne isr_abort\t\n" // If not zero we need to exit current ISR and jump to reset handler of bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 101 | |
Vincent Coubard |
640:c90ae1400bf2 | 102 | "mov lr, r4\t\n" // Clear the link register and set to ones to ensure no return. |
Vincent Coubard |
640:c90ae1400bf2 | 103 | "bx r0\t\n" // Branch to reset handler of bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 104 | |
Vincent Coubard |
640:c90ae1400bf2 | 105 | "isr_abort: \t\n" |
Vincent Coubard |
640:c90ae1400bf2 | 106 | |
Vincent Coubard |
640:c90ae1400bf2 | 107 | "mov r5, r4\t\n" // Fill with ones before jumping to reset handling. Will be popped as LR when exiting ISR. Ensures no return to application. |
Vincent Coubard |
640:c90ae1400bf2 | 108 | "mov r6, r0\t\n" // Move address of reset handler to R6. Will be popped as PC when exiting ISR. Ensures the reset handler will be executed when exist ISR. |
Vincent Coubard |
640:c90ae1400bf2 | 109 | "movs r7, #0x21\t\n" // Move MSB reset value of xPSR to R7. Will be popped as xPSR when exiting ISR. xPSR is 0x21000000 thus MSB is 0x21. |
Vincent Coubard |
640:c90ae1400bf2 | 110 | "rev r7, r7\t\n" // Reverse byte order to put 0x21 as MSB. |
Vincent Coubard |
640:c90ae1400bf2 | 111 | "push {r4-r7}\t\n" // Push everything to new stack to allow interrupt handler to fetch it on exiting the ISR. |
Vincent Coubard |
640:c90ae1400bf2 | 112 | |
Vincent Coubard |
640:c90ae1400bf2 | 113 | "movs r4, #0x00\t\n" // Fill with zeros before jumping to reset handling. We be popped as R0 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 114 | "movs r5, #0x00\t\n" // Fill with zeros before jumping to reset handling. We be popped as R1 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 115 | "movs r6, #0x00\t\n" // Fill with zeros before jumping to reset handling. We be popped as R2 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 116 | "movs r7, #0x00\t\n" // Fill with zeros before jumping to reset handling. We be popped as R3 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 117 | "push {r4-r7}\t\n" // Push zeros (R4-R7) to stack to prepare for exiting the interrupt routine. |
Vincent Coubard |
640:c90ae1400bf2 | 118 | |
Vincent Coubard |
640:c90ae1400bf2 | 119 | "movs r0, #0xF9\t\n" // Move the execution return command into register, 0xFFFFFFF9. |
Vincent Coubard |
640:c90ae1400bf2 | 120 | "sxtb r0, r0\t\n" // Sign extend R0 to obtain 0xFFFFFFF9 instead of 0xF9. |
Vincent Coubard |
640:c90ae1400bf2 | 121 | "bx r0\t\n" // No return - Handler mode will be exited. Stack will be popped and execution will continue in reset handler initializing other application. |
Vincent Coubard |
640:c90ae1400bf2 | 122 | ".align\t\n" |
Vincent Coubard |
640:c90ae1400bf2 | 123 | :: "r" (start_addr) // Argument list for the gcc assembly. start_addr is %0. |
Vincent Coubard |
640:c90ae1400bf2 | 124 | : "r0", "r4", "r5", "r6", "r7" // List of register maintained manually. |
Vincent Coubard |
640:c90ae1400bf2 | 125 | ); |
Vincent Coubard |
640:c90ae1400bf2 | 126 | } |
Vincent Coubard |
640:c90ae1400bf2 | 127 | #elif defined ( __ICCARM__ ) |
Vincent Coubard |
640:c90ae1400bf2 | 128 | static inline void bootloader_util_reset(uint32_t start_addr) |
Vincent Coubard |
640:c90ae1400bf2 | 129 | { |
Vincent Coubard |
640:c90ae1400bf2 | 130 | asm("ldr r5, [%0]\n" // Get App initial MSP for bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 131 | "msr msp, r5\n" // Set the main stack pointer to the applications MSP. |
Vincent Coubard |
640:c90ae1400bf2 | 132 | "ldr r0, [%0, #0x04]\n" // Load Reset handler into R0. |
Vincent Coubard |
640:c90ae1400bf2 | 133 | |
Vincent Coubard |
640:c90ae1400bf2 | 134 | "movs r4, #0x00\n" // Load zero into R4. |
Vincent Coubard |
640:c90ae1400bf2 | 135 | "mvns r4, r4\n" // Invert R4 to ensure it contain ones. |
Vincent Coubard |
640:c90ae1400bf2 | 136 | |
Vincent Coubard |
640:c90ae1400bf2 | 137 | "mrs r5, IPSR\n" // Load IPSR to R5 to check for handler or thread mode |
Vincent Coubard |
640:c90ae1400bf2 | 138 | "cmp r5, #0x00\n" // Compare, if 0 then we are in thread mode and can continue to reset handler of bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 139 | "bne isr_abort\n" // If not zero we need to exit current ISR and jump to reset handler of bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 140 | |
Vincent Coubard |
640:c90ae1400bf2 | 141 | "mov lr, r4\n" // Clear the link register and set to ones to ensure no return. |
Vincent Coubard |
640:c90ae1400bf2 | 142 | "bx r0\n" // Branch to reset handler of bootloader. |
Vincent Coubard |
640:c90ae1400bf2 | 143 | |
Vincent Coubard |
640:c90ae1400bf2 | 144 | "isr_abort: \n" |
Vincent Coubard |
640:c90ae1400bf2 | 145 | // R4 contains ones from line above. We be popped as R12 when exiting ISR (Cleaning up the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 146 | "mov r5, r4\n" // Fill with ones before jumping to reset handling. Will be popped as LR when exiting ISR. Ensures no return to application. |
Vincent Coubard |
640:c90ae1400bf2 | 147 | "mov r6, r0\n" // Move address of reset handler to R6. Will be popped as PC when exiting ISR. Ensures the reset handler will be executed when exist ISR. |
Vincent Coubard |
640:c90ae1400bf2 | 148 | "movs r7, #0x21\n" // Move MSB reset value of xPSR to R7. Will be popped as xPSR when exiting ISR. xPSR is 0x21000000 thus MSB is 0x21. |
Vincent Coubard |
640:c90ae1400bf2 | 149 | "rev r7, r7\n" // Reverse byte order to put 0x21 as MSB. |
Vincent Coubard |
640:c90ae1400bf2 | 150 | "push {r4-r7}\n" // Push everything to new stack to allow interrupt handler to fetch it on exiting the ISR. |
Vincent Coubard |
640:c90ae1400bf2 | 151 | |
Vincent Coubard |
640:c90ae1400bf2 | 152 | "movs r4, #0x00\n" // Fill with zeros before jumping to reset handling. We be popped as R0 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 153 | "movs r5, #0x00\n" // Fill with zeros before jumping to reset handling. We be popped as R1 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 154 | "movs r6, #0x00\n" // Fill with zeros before jumping to reset handling. We be popped as R2 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 155 | "movs r7, #0x00\n" // Fill with zeros before jumping to reset handling. We be popped as R3 when exiting ISR (Cleaning up of the registers). |
Vincent Coubard |
640:c90ae1400bf2 | 156 | "push {r4-r7}\n" // Push zeros (R4-R7) to stack to prepare for exiting the interrupt routine. |
Vincent Coubard |
640:c90ae1400bf2 | 157 | |
Vincent Coubard |
640:c90ae1400bf2 | 158 | "movs r0, #0x06\n" // Load 0x06 into R6 to prepare for exec return command. |
Vincent Coubard |
640:c90ae1400bf2 | 159 | "mvns r0, r0\n" // Invert 0x06 to obtain EXEC_RETURN, 0xFFFFFFF9. |
Vincent Coubard |
640:c90ae1400bf2 | 160 | "bx r0\n" // No return - Handler mode will be exited. Stack will be popped and execution will continue in reset handler initializing other application. |
Vincent Coubard |
640:c90ae1400bf2 | 161 | :: "r" (start_addr) // Argument list for the IAR assembly. start_addr is %0. |
Vincent Coubard |
640:c90ae1400bf2 | 162 | : "r0", "r4", "r5", "r6", "r7"); // List of register maintained manually. |
Vincent Coubard |
640:c90ae1400bf2 | 163 | } |
Vincent Coubard |
640:c90ae1400bf2 | 164 | #else |
Vincent Coubard |
640:c90ae1400bf2 | 165 | #error Compiler not supported. |
Vincent Coubard |
640:c90ae1400bf2 | 166 | #endif |
Vincent Coubard |
640:c90ae1400bf2 | 167 | |
Vincent Coubard |
640:c90ae1400bf2 | 168 | |
Vincent Coubard |
640:c90ae1400bf2 | 169 | void bootloader_util_app_start(uint32_t start_addr) |
Vincent Coubard |
640:c90ae1400bf2 | 170 | { |
Vincent Coubard |
640:c90ae1400bf2 | 171 | bootloader_util_reset(start_addr); |
Vincent Coubard |
640:c90ae1400bf2 | 172 | } |