Neil Johnson / microbit-ARMBand

Official Sheffield ARMBand micro:bit program

microbit/microbit-dal/mbed-dev-bin/spi_api.h@0:b9164b348919, 2016-10-17 (annotated)

Committer:
MrBedfordVan
Date:
Mon Oct 17 12:41:20 2016 +0000
Revision:
0:b9164b348919
Official Sheffield ARMBand Micro:bit program

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MrBedfordVan 0:b9164b348919 1 /* mbed Microcontroller Library
MrBedfordVan 0:b9164b348919 2 * Copyright (c) 2006-2013 ARM Limited
MrBedfordVan 0:b9164b348919 3 *
MrBedfordVan 0:b9164b348919 4 * Licensed under the Apache License, Version 2.0 (the "License");
MrBedfordVan 0:b9164b348919 5 * you may not use this file except in compliance with the License.
MrBedfordVan 0:b9164b348919 6 * You may obtain a copy of the License at
MrBedfordVan 0:b9164b348919 7 *
MrBedfordVan 0:b9164b348919 8 * http://www.apache.org/licenses/LICENSE-2.0
MrBedfordVan 0:b9164b348919 9 *
MrBedfordVan 0:b9164b348919 10 * Unless required by applicable law or agreed to in writing, software
MrBedfordVan 0:b9164b348919 11 * distributed under the License is distributed on an "AS IS" BASIS,
MrBedfordVan 0:b9164b348919 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MrBedfordVan 0:b9164b348919 13 * See the License for the specific language governing permissions and
MrBedfordVan 0:b9164b348919 14 * limitations under the License.
MrBedfordVan 0:b9164b348919 15 */
MrBedfordVan 0:b9164b348919 16 #ifndef MBED_SPI_API_H
MrBedfordVan 0:b9164b348919 17 #define MBED_SPI_API_H
MrBedfordVan 0:b9164b348919 18
MrBedfordVan 0:b9164b348919 19 #include "device.h"
MrBedfordVan 0:b9164b348919 20 #include "dma_api.h"
MrBedfordVan 0:b9164b348919 21 #include "buffer.h"
MrBedfordVan 0:b9164b348919 22
MrBedfordVan 0:b9164b348919 23 #if DEVICE_SPI
MrBedfordVan 0:b9164b348919 24
MrBedfordVan 0:b9164b348919 25 #define SPI_EVENT_ERROR (1 << 1)
MrBedfordVan 0:b9164b348919 26 #define SPI_EVENT_COMPLETE (1 << 2)
MrBedfordVan 0:b9164b348919 27 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
MrBedfordVan 0:b9164b348919 28 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
MrBedfordVan 0:b9164b348919 29
MrBedfordVan 0:b9164b348919 30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
MrBedfordVan 0:b9164b348919 31
MrBedfordVan 0:b9164b348919 32 #define SPI_FILL_WORD (0xFFFF)
MrBedfordVan 0:b9164b348919 33
MrBedfordVan 0:b9164b348919 34 #if DEVICE_SPI_ASYNCH
MrBedfordVan 0:b9164b348919 35 /** Asynch spi hal structure
MrBedfordVan 0:b9164b348919 36 */
MrBedfordVan 0:b9164b348919 37 typedef struct {
MrBedfordVan 0:b9164b348919 38 struct spi_s spi; /**< Target specific spi structure */
MrBedfordVan 0:b9164b348919 39 struct buffer_s tx_buff; /**< Tx buffer */
MrBedfordVan 0:b9164b348919 40 struct buffer_s rx_buff; /**< Rx buffer */
MrBedfordVan 0:b9164b348919 41 } spi_t;
MrBedfordVan 0:b9164b348919 42
MrBedfordVan 0:b9164b348919 43 #else
MrBedfordVan 0:b9164b348919 44 /** Non-asynch spi hal structure
MrBedfordVan 0:b9164b348919 45 */
MrBedfordVan 0:b9164b348919 46 typedef struct spi_s spi_t;
MrBedfordVan 0:b9164b348919 47
MrBedfordVan 0:b9164b348919 48 #endif
MrBedfordVan 0:b9164b348919 49
MrBedfordVan 0:b9164b348919 50 #ifdef __cplusplus
MrBedfordVan 0:b9164b348919 51 extern "C" {
MrBedfordVan 0:b9164b348919 52 #endif
MrBedfordVan 0:b9164b348919 53
MrBedfordVan 0:b9164b348919 54 /**
MrBedfordVan 0:b9164b348919 55 * \defgroup GeneralSPI SPI Configuration Functions
MrBedfordVan 0:b9164b348919 56 * @{
MrBedfordVan 0:b9164b348919 57 */
MrBedfordVan 0:b9164b348919 58
MrBedfordVan 0:b9164b348919 59 /** Initialize the SPI peripheral
MrBedfordVan 0:b9164b348919 60 *
MrBedfordVan 0:b9164b348919 61 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
MrBedfordVan 0:b9164b348919 62 * @param[out] obj The SPI object to initialize
MrBedfordVan 0:b9164b348919 63 * @param[in] mosi The pin to use for MOSI
MrBedfordVan 0:b9164b348919 64 * @param[in] miso The pin to use for MISO
MrBedfordVan 0:b9164b348919 65 * @param[in] sclk The pin to use for SCLK
MrBedfordVan 0:b9164b348919 66 * @param[in] ssel The pin to use for SSEL
MrBedfordVan 0:b9164b348919 67 */
MrBedfordVan 0:b9164b348919 68 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
MrBedfordVan 0:b9164b348919 69
MrBedfordVan 0:b9164b348919 70 /** Release a SPI object
MrBedfordVan 0:b9164b348919 71 *
MrBedfordVan 0:b9164b348919 72 * TODO: spi_free is currently unimplemented
MrBedfordVan 0:b9164b348919 73 * This will require reference counting at the C++ level to be safe
MrBedfordVan 0:b9164b348919 74 *
MrBedfordVan 0:b9164b348919 75 * Return the pins owned by the SPI object to their reset state
MrBedfordVan 0:b9164b348919 76 * Disable the SPI peripheral
MrBedfordVan 0:b9164b348919 77 * Disable the SPI clock
MrBedfordVan 0:b9164b348919 78 * @param[in] obj The SPI object to deinitialize
MrBedfordVan 0:b9164b348919 79 */
MrBedfordVan 0:b9164b348919 80 void spi_free(spi_t *obj);
MrBedfordVan 0:b9164b348919 81
MrBedfordVan 0:b9164b348919 82 /** Configure the SPI format
MrBedfordVan 0:b9164b348919 83 *
MrBedfordVan 0:b9164b348919 84 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
MrBedfordVan 0:b9164b348919 85 * @param[in,out] obj The SPI object to configure
MrBedfordVan 0:b9164b348919 86 * @param[in] bits The number of bits per frame
MrBedfordVan 0:b9164b348919 87 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
MrBedfordVan 0:b9164b348919 88 * @param[in] slave Zero for master mode or non-zero for slave mode
MrBedfordVan 0:b9164b348919 89 */
MrBedfordVan 0:b9164b348919 90 void spi_format(spi_t *obj, int bits, int mode, int slave);
MrBedfordVan 0:b9164b348919 91
MrBedfordVan 0:b9164b348919 92 /** Set the SPI baud rate
MrBedfordVan 0:b9164b348919 93 *
MrBedfordVan 0:b9164b348919 94 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
MrBedfordVan 0:b9164b348919 95 * Configures the SPI peripheral's baud rate
MrBedfordVan 0:b9164b348919 96 * @param[in,out] obj The SPI object to configure
MrBedfordVan 0:b9164b348919 97 * @param[in] hz The baud rate in Hz
MrBedfordVan 0:b9164b348919 98 */
MrBedfordVan 0:b9164b348919 99 void spi_frequency(spi_t *obj, int hz);
MrBedfordVan 0:b9164b348919 100
MrBedfordVan 0:b9164b348919 101 /**@}*/
MrBedfordVan 0:b9164b348919 102 /**
MrBedfordVan 0:b9164b348919 103 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
MrBedfordVan 0:b9164b348919 104 * @{
MrBedfordVan 0:b9164b348919 105 */
MrBedfordVan 0:b9164b348919 106
MrBedfordVan 0:b9164b348919 107 /** Write a byte out in master mode and receive a value
MrBedfordVan 0:b9164b348919 108 *
MrBedfordVan 0:b9164b348919 109 * @param[in] obj The SPI peripheral to use for sending
MrBedfordVan 0:b9164b348919 110 * @param[in] value The value to send
MrBedfordVan 0:b9164b348919 111 * @return Returns the value received during send
MrBedfordVan 0:b9164b348919 112 */
MrBedfordVan 0:b9164b348919 113 int spi_master_write(spi_t *obj, int value);
MrBedfordVan 0:b9164b348919 114
MrBedfordVan 0:b9164b348919 115 /** Check if a value is available to read
MrBedfordVan 0:b9164b348919 116 *
MrBedfordVan 0:b9164b348919 117 * @param[in] obj The SPI peripheral to check
MrBedfordVan 0:b9164b348919 118 * @return non-zero if a value is available
MrBedfordVan 0:b9164b348919 119 */
MrBedfordVan 0:b9164b348919 120 int spi_slave_receive(spi_t *obj);
MrBedfordVan 0:b9164b348919 121
MrBedfordVan 0:b9164b348919 122 /** Get a received value out of the SPI receive buffer in slave mode
MrBedfordVan 0:b9164b348919 123 *
MrBedfordVan 0:b9164b348919 124 * Blocks until a value is available
MrBedfordVan 0:b9164b348919 125 * @param[in] obj The SPI peripheral to read
MrBedfordVan 0:b9164b348919 126 * @return The value received
MrBedfordVan 0:b9164b348919 127 */
MrBedfordVan 0:b9164b348919 128 int spi_slave_read(spi_t *obj);
MrBedfordVan 0:b9164b348919 129
MrBedfordVan 0:b9164b348919 130 /** Write a value to the SPI peripheral in slave mode
MrBedfordVan 0:b9164b348919 131 *
MrBedfordVan 0:b9164b348919 132 * Blocks until the SPI peripheral can be written to
MrBedfordVan 0:b9164b348919 133 * @param[in] obj The SPI peripheral to write
MrBedfordVan 0:b9164b348919 134 * @param[in] value The value to write
MrBedfordVan 0:b9164b348919 135 */
MrBedfordVan 0:b9164b348919 136 void spi_slave_write(spi_t *obj, int value);
MrBedfordVan 0:b9164b348919 137
MrBedfordVan 0:b9164b348919 138 /** Checks if the specified SPI peripheral is in use
MrBedfordVan 0:b9164b348919 139 *
MrBedfordVan 0:b9164b348919 140 * @param[in] obj The SPI peripheral to check
MrBedfordVan 0:b9164b348919 141 * @return non-zero if the peripheral is currently transmitting
MrBedfordVan 0:b9164b348919 142 */
MrBedfordVan 0:b9164b348919 143 int spi_busy(spi_t *obj);
MrBedfordVan 0:b9164b348919 144
MrBedfordVan 0:b9164b348919 145 /** Get the module number
MrBedfordVan 0:b9164b348919 146 *
MrBedfordVan 0:b9164b348919 147 * @param[in] obj The SPI peripheral to check
MrBedfordVan 0:b9164b348919 148 * @return The module number
MrBedfordVan 0:b9164b348919 149 */
MrBedfordVan 0:b9164b348919 150 uint8_t spi_get_module(spi_t *obj);
MrBedfordVan 0:b9164b348919 151
MrBedfordVan 0:b9164b348919 152 /**@}*/
MrBedfordVan 0:b9164b348919 153
MrBedfordVan 0:b9164b348919 154 #if DEVICE_SPI_ASYNCH
MrBedfordVan 0:b9164b348919 155 /**
MrBedfordVan 0:b9164b348919 156 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
MrBedfordVan 0:b9164b348919 157 * @{
MrBedfordVan 0:b9164b348919 158 */
MrBedfordVan 0:b9164b348919 159
MrBedfordVan 0:b9164b348919 160 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
MrBedfordVan 0:b9164b348919 161 *
MrBedfordVan 0:b9164b348919 162 * @param[in] obj The SPI object which holds the transfer information
MrBedfordVan 0:b9164b348919 163 * @param[in] tx The buffer to send
MrBedfordVan 0:b9164b348919 164 * @param[in] tx_length The number of words to transmit
MrBedfordVan 0:b9164b348919 165 * @param[in] rx The buffer to receive
MrBedfordVan 0:b9164b348919 166 * @param[in] rx_length The number of words to receive
MrBedfordVan 0:b9164b348919 167 * @param[in] bit_width The bit width of buffer words
MrBedfordVan 0:b9164b348919 168 * @param[in] event The logical OR of events to be registered
MrBedfordVan 0:b9164b348919 169 * @param[in] handler SPI interrupt handler
MrBedfordVan 0:b9164b348919 170 * @param[in] hint A suggestion for how to use DMA with this transfer
MrBedfordVan 0:b9164b348919 171 */
MrBedfordVan 0:b9164b348919 172 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
MrBedfordVan 0:b9164b348919 173
MrBedfordVan 0:b9164b348919 174 /** The asynchronous IRQ handler
MrBedfordVan 0:b9164b348919 175 *
MrBedfordVan 0:b9164b348919 176 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
MrBedfordVan 0:b9164b348919 177 * conditions, such as buffer overflows or transfer complete.
MrBedfordVan 0:b9164b348919 178 * @param[in] obj The SPI object which holds the transfer information
MrBedfordVan 0:b9164b348919 179 * @return event flags if a transfer termination condition was met or 0 otherwise.
MrBedfordVan 0:b9164b348919 180 */
MrBedfordVan 0:b9164b348919 181 uint32_t spi_irq_handler_asynch(spi_t *obj);
MrBedfordVan 0:b9164b348919 182
MrBedfordVan 0:b9164b348919 183 /** Attempts to determine if the SPI peripheral is already in use.
MrBedfordVan 0:b9164b348919 184 *
MrBedfordVan 0:b9164b348919 185 * If a temporary DMA channel has been allocated, peripheral is in use.
MrBedfordVan 0:b9164b348919 186 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
MrBedfordVan 0:b9164b348919 187 * channel were allocated.
MrBedfordVan 0:b9164b348919 188 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
MrBedfordVan 0:b9164b348919 189 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
MrBedfordVan 0:b9164b348919 190 * there are any bytes in the FIFOs.
MrBedfordVan 0:b9164b348919 191 * @param[in] obj The SPI object to check for activity
MrBedfordVan 0:b9164b348919 192 * @return non-zero if the SPI port is active or zero if it is not.
MrBedfordVan 0:b9164b348919 193 */
MrBedfordVan 0:b9164b348919 194 uint8_t spi_active(spi_t *obj);
MrBedfordVan 0:b9164b348919 195
MrBedfordVan 0:b9164b348919 196 /** Abort an SPI transfer
MrBedfordVan 0:b9164b348919 197 *
MrBedfordVan 0:b9164b348919 198 * @param obj The SPI peripheral to stop
MrBedfordVan 0:b9164b348919 199 */
MrBedfordVan 0:b9164b348919 200 void spi_abort_asynch(spi_t *obj);
MrBedfordVan 0:b9164b348919 201
MrBedfordVan 0:b9164b348919 202
MrBedfordVan 0:b9164b348919 203 #endif
MrBedfordVan 0:b9164b348919 204
MrBedfordVan 0:b9164b348919 205 /**@}*/
MrBedfordVan 0:b9164b348919 206
MrBedfordVan 0:b9164b348919 207 #ifdef __cplusplus
MrBedfordVan 0:b9164b348919 208 }
MrBedfordVan 0:b9164b348919 209 #endif // __cplusplus
MrBedfordVan 0:b9164b348919 210
MrBedfordVan 0:b9164b348919 211 #endif // SPI_DEVICE
MrBedfordVan 0:b9164b348919 212
MrBedfordVan 0:b9164b348919 213 #endif // MBED_SPI_API_H