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Diff: TARGET_LPC1768/TOOLCHAIN_GCC_CR/LPC1768.ld
- Revision:
- 65:5798e58a58b1
- Parent:
- 64:e3affc9e7238
- Child:
- 66:9c8f0e3462fb
diff -r e3affc9e7238 -r 5798e58a58b1 TARGET_LPC1768/TOOLCHAIN_GCC_CR/LPC1768.ld --- a/TARGET_LPC1768/TOOLCHAIN_GCC_CR/LPC1768.ld Mon Aug 05 12:28:09 2013 +0300 +++ b/TARGET_LPC1768/TOOLCHAIN_GCC_CR/LPC1768.ld Mon Aug 12 13:17:46 2013 +0300 @@ -1,153 +1,153 @@ -/* mbed - LPC1768 linker script - * Based linker script generated by Code Red Technologies Red Suite 4.1 - */ -GROUP(libgcc.a libc.a libstdc++.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o) - -MEMORY -{ - /* Define each memory region */ - MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512k */ - RamLoc32 (rwx) : ORIGIN = 0x100000C8, LENGTH = 0x7F38 /* 32k */ - RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32k */ - -} - /* Define a symbol for the top of each memory region */ - __top_MFlash512 = 0x0 + 0x80000; - __top_RamLoc32 = 0x10000000 + 0x8000; - __top_RamAHB32 = 0x2007c000 + 0x8000; - -ENTRY(ResetISR) - -SECTIONS -{ - - /* MAIN TEXT SECTION */ - .text : ALIGN(4) - { - FILL(0xff) - KEEP(*(.isr_vector)) - - /* Global Section Table */ - . = ALIGN(4) ; - __section_table_start = .; - __data_section_table = .; - LONG(LOADADDR(.data)); - LONG( ADDR(.data)) ; - LONG( SIZEOF(.data)); - LONG(LOADADDR(.data_RAM2)); - LONG( ADDR(.data_RAM2)) ; - LONG( SIZEOF(.data_RAM2)); - __data_section_table_end = .; - __bss_section_table = .; - LONG( ADDR(.bss)); - LONG( SIZEOF(.bss)); - LONG( ADDR(.bss_RAM2)); - LONG( SIZEOF(.bss_RAM2)); - __bss_section_table_end = .; - __section_table_end = . ; - /* End of Global Section Table */ - - - *(.after_vectors*) - - *(.text*) - *(.rodata .rodata.*) - . = ALIGN(4); - - /* C++ constructors etc */ - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - KEEP(*(.fini)); - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - /* End C++ */ - } > MFlash512 - - /* - * for exception handling/unwind - some Newlib functions (in common - * with C++ and STDC++) use this. - */ - .ARM.extab : ALIGN(4) - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > MFlash512 - __exidx_start = .; - - .ARM.exidx : ALIGN(4) - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > MFlash512 - __exidx_end = .; - - _etext = .; - - - .data_RAM2 : ALIGN(4) - { - FILL(0xff) - *(.data.$RAM2*) - *(.data.$RamAHB32*) - . = ALIGN(4) ; - } > RamAHB32 AT>MFlash512 - - /* MAIN DATA SECTION */ - - .uninit_RESERVED : ALIGN(4) - { - KEEP(*(.bss.$RESERVED*)) - } > RamLoc32 - - .data : ALIGN(4) - { - FILL(0xff) - _data = .; - *(vtable) - *(.data*) - . = ALIGN(4) ; - _edata = .; - } > RamLoc32 AT>MFlash512 - - - .bss_RAM2 : ALIGN(4) - { - *(.bss.$RAM2*) - *(.bss.$RamAHB32*) - . = ALIGN(4) ; - } > RamAHB32 - - /* MAIN BSS SECTION */ - .bss : ALIGN(4) - { - _bss = .; - *(.bss*) - *(COMMON) - . = ALIGN(4) ; - _ebss = .; - PROVIDE(end = .); - } > RamLoc32 - - PROVIDE(_pvHeapStart = .); - PROVIDE(_vStackTop = __top_RamLoc32 - 0); -} +/* mbed - LPC1768 linker script + * Based linker script generated by Code Red Technologies Red Suite 4.1 + */ +GROUP(libgcc.a libc.a libstdc++.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o) + +MEMORY +{ + /* Define each memory region */ + MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512k */ + RamLoc32 (rwx) : ORIGIN = 0x100000C8, LENGTH = 0x7F38 /* 32k */ + RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32k */ + +} + /* Define a symbol for the top of each memory region */ + __top_MFlash512 = 0x0 + 0x80000; + __top_RamLoc32 = 0x10000000 + 0x8000; + __top_RamAHB32 = 0x2007c000 + 0x8000; + +ENTRY(ResetISR) + +SECTIONS +{ + + /* MAIN TEXT SECTION */ + .text : ALIGN(4) + { + FILL(0xff) + KEEP(*(.isr_vector)) + + /* Global Section Table */ + . = ALIGN(4) ; + __section_table_start = .; + __data_section_table = .; + LONG(LOADADDR(.data)); + LONG( ADDR(.data)) ; + LONG( SIZEOF(.data)); + LONG(LOADADDR(.data_RAM2)); + LONG( ADDR(.data_RAM2)) ; + LONG( SIZEOF(.data_RAM2)); + __data_section_table_end = .; + __bss_section_table = .; + LONG( ADDR(.bss)); + LONG( SIZEOF(.bss)); + LONG( ADDR(.bss_RAM2)); + LONG( SIZEOF(.bss_RAM2)); + __bss_section_table_end = .; + __section_table_end = . ; + /* End of Global Section Table */ + + + *(.after_vectors*) + + *(.text*) + *(.rodata .rodata.*) + . = ALIGN(4); + + /* C++ constructors etc */ + . = ALIGN(4); + KEEP(*(.init)) + + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + KEEP(*(.fini)); + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + /* End C++ */ + } > MFlash512 + + /* + * for exception handling/unwind - some Newlib functions (in common + * with C++ and STDC++) use this. + */ + .ARM.extab : ALIGN(4) + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > MFlash512 + __exidx_start = .; + + .ARM.exidx : ALIGN(4) + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > MFlash512 + __exidx_end = .; + + _etext = .; + + + .data_RAM2 : ALIGN(4) + { + FILL(0xff) + *(.data.$RAM2*) + *(.data.$RamAHB32*) + . = ALIGN(4) ; + } > RamAHB32 AT>MFlash512 + + /* MAIN DATA SECTION */ + + .uninit_RESERVED : ALIGN(4) + { + KEEP(*(.bss.$RESERVED*)) + } > RamLoc32 + + .data : ALIGN(4) + { + FILL(0xff) + _data = .; + *(vtable) + *(.data*) + . = ALIGN(4) ; + _edata = .; + } > RamLoc32 AT>MFlash512 + + + .bss_RAM2 : ALIGN(4) + { + *(.bss.$RAM2*) + *(.bss.$RamAHB32*) + . = ALIGN(4) ; + } > RamAHB32 + + /* MAIN BSS SECTION */ + .bss : ALIGN(4) + { + _bss = .; + *(.bss*) + *(COMMON) + . = ALIGN(4) ; + _ebss = .; + PROVIDE(end = .); + } > RamLoc32 + + PROVIDE(_pvHeapStart = .); + PROVIDE(_vStackTop = __top_RamLoc32 - 0); +}