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TARGET_RZ_A1H/bsc_iodefine.h@99:7f6c6de930c0, 2015-05-03 (annotated)
- Committer:
- Mikchel
- Date:
- Sun May 03 16:04:42 2015 +0000
- Revision:
- 99:7f6c6de930c0
- Parent:
- 92:4fc01daae5a5
12
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 92:4fc01daae5a5 | 1 | /******************************************************************************* |
bogdanm | 92:4fc01daae5a5 | 2 | * DISCLAIMER |
bogdanm | 92:4fc01daae5a5 | 3 | * This software is supplied by Renesas Electronics Corporation and is only |
bogdanm | 92:4fc01daae5a5 | 4 | * intended for use with Renesas products. No other uses are authorized. This |
bogdanm | 92:4fc01daae5a5 | 5 | * software is owned by Renesas Electronics Corporation and is protected under |
bogdanm | 92:4fc01daae5a5 | 6 | * all applicable laws, including copyright laws. |
bogdanm | 92:4fc01daae5a5 | 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING |
bogdanm | 92:4fc01daae5a5 | 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT |
bogdanm | 92:4fc01daae5a5 | 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE |
bogdanm | 92:4fc01daae5a5 | 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED. |
bogdanm | 92:4fc01daae5a5 | 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS |
bogdanm | 92:4fc01daae5a5 | 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE |
bogdanm | 92:4fc01daae5a5 | 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR |
bogdanm | 92:4fc01daae5a5 | 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE |
bogdanm | 92:4fc01daae5a5 | 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. |
bogdanm | 92:4fc01daae5a5 | 16 | * Renesas reserves the right, without notice, to make changes to this software |
bogdanm | 92:4fc01daae5a5 | 17 | * and to discontinue the availability of this software. By using this software, |
bogdanm | 92:4fc01daae5a5 | 18 | * you agree to the additional terms and conditions found by accessing the |
bogdanm | 92:4fc01daae5a5 | 19 | * following link: |
bogdanm | 92:4fc01daae5a5 | 20 | * http://www.renesas.com/disclaimer* |
bogdanm | 92:4fc01daae5a5 | 21 | * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved. |
bogdanm | 92:4fc01daae5a5 | 22 | *******************************************************************************/ |
bogdanm | 92:4fc01daae5a5 | 23 | /******************************************************************************* |
bogdanm | 92:4fc01daae5a5 | 24 | * File Name : bsc_iodefine.h |
bogdanm | 92:4fc01daae5a5 | 25 | * $Rev: $ |
bogdanm | 92:4fc01daae5a5 | 26 | * $Date:: $ |
bogdanm | 92:4fc01daae5a5 | 27 | * Description : Definition of I/O Register (V1.00a) |
bogdanm | 92:4fc01daae5a5 | 28 | ******************************************************************************/ |
bogdanm | 92:4fc01daae5a5 | 29 | #ifndef BSC_IODEFINE_H |
bogdanm | 92:4fc01daae5a5 | 30 | #define BSC_IODEFINE_H |
bogdanm | 92:4fc01daae5a5 | 31 | /* ->SEC M1.10.1 : Not magic number */ |
bogdanm | 92:4fc01daae5a5 | 32 | |
bogdanm | 92:4fc01daae5a5 | 33 | struct st_bsc |
bogdanm | 92:4fc01daae5a5 | 34 | { /* BSC */ |
bogdanm | 92:4fc01daae5a5 | 35 | volatile uint32_t CMNCR; /* CMNCR */ |
bogdanm | 92:4fc01daae5a5 | 36 | #define BSC_CSnBCR_COUNT 6 |
bogdanm | 92:4fc01daae5a5 | 37 | volatile uint32_t CS0BCR; /* CS0BCR */ |
bogdanm | 92:4fc01daae5a5 | 38 | volatile uint32_t CS1BCR; /* CS1BCR */ |
bogdanm | 92:4fc01daae5a5 | 39 | volatile uint32_t CS2BCR; /* CS2BCR */ |
bogdanm | 92:4fc01daae5a5 | 40 | volatile uint32_t CS3BCR; /* CS3BCR */ |
bogdanm | 92:4fc01daae5a5 | 41 | volatile uint32_t CS4BCR; /* CS4BCR */ |
bogdanm | 92:4fc01daae5a5 | 42 | volatile uint32_t CS5BCR; /* CS5BCR */ |
bogdanm | 92:4fc01daae5a5 | 43 | volatile uint8_t dummy4[12]; /* */ |
bogdanm | 92:4fc01daae5a5 | 44 | #define BSC_CSnWCR_COUNT 6 |
bogdanm | 92:4fc01daae5a5 | 45 | volatile uint32_t CS0WCR; /* CS0WCR */ |
bogdanm | 92:4fc01daae5a5 | 46 | volatile uint32_t CS1WCR; /* CS1WCR */ |
bogdanm | 92:4fc01daae5a5 | 47 | volatile uint32_t CS2WCR; /* CS2WCR */ |
bogdanm | 92:4fc01daae5a5 | 48 | volatile uint32_t CS3WCR; /* CS3WCR */ |
bogdanm | 92:4fc01daae5a5 | 49 | volatile uint32_t CS4WCR; /* CS4WCR */ |
bogdanm | 92:4fc01daae5a5 | 50 | volatile uint32_t CS5WCR; /* CS5WCR */ |
bogdanm | 92:4fc01daae5a5 | 51 | volatile uint8_t dummy5[12]; /* */ |
bogdanm | 92:4fc01daae5a5 | 52 | volatile uint32_t SDCR; /* SDCR */ |
bogdanm | 92:4fc01daae5a5 | 53 | volatile uint32_t RTCSR; /* RTCSR */ |
bogdanm | 92:4fc01daae5a5 | 54 | volatile uint32_t RTCNT; /* RTCNT */ |
bogdanm | 92:4fc01daae5a5 | 55 | volatile uint32_t RTCOR; /* RTCOR */ |
bogdanm | 92:4fc01daae5a5 | 56 | volatile uint8_t dummy6[4]; /* */ |
bogdanm | 92:4fc01daae5a5 | 57 | #define BSC_TOSCORn_COUNT 6 |
bogdanm | 92:4fc01daae5a5 | 58 | volatile uint32_t TOSCOR0; /* TOSCOR0 */ |
bogdanm | 92:4fc01daae5a5 | 59 | volatile uint32_t TOSCOR1; /* TOSCOR1 */ |
bogdanm | 92:4fc01daae5a5 | 60 | volatile uint32_t TOSCOR2; /* TOSCOR2 */ |
bogdanm | 92:4fc01daae5a5 | 61 | volatile uint32_t TOSCOR3; /* TOSCOR3 */ |
bogdanm | 92:4fc01daae5a5 | 62 | volatile uint32_t TOSCOR4; /* TOSCOR4 */ |
bogdanm | 92:4fc01daae5a5 | 63 | volatile uint32_t TOSCOR5; /* TOSCOR5 */ |
bogdanm | 92:4fc01daae5a5 | 64 | volatile uint8_t dummy7[8]; /* */ |
bogdanm | 92:4fc01daae5a5 | 65 | volatile uint32_t TOSTR; /* TOSTR */ |
bogdanm | 92:4fc01daae5a5 | 66 | volatile uint32_t TOENR; /* TOENR */ |
bogdanm | 92:4fc01daae5a5 | 67 | }; |
bogdanm | 92:4fc01daae5a5 | 68 | |
bogdanm | 92:4fc01daae5a5 | 69 | |
bogdanm | 92:4fc01daae5a5 | 70 | #define BSC (*(struct st_bsc *)0x3FFFC000uL) /* BSC */ |
bogdanm | 92:4fc01daae5a5 | 71 | |
bogdanm | 92:4fc01daae5a5 | 72 | |
bogdanm | 92:4fc01daae5a5 | 73 | #define BSCCMNCR BSC.CMNCR |
bogdanm | 92:4fc01daae5a5 | 74 | #define BSCCS0BCR BSC.CS0BCR |
bogdanm | 92:4fc01daae5a5 | 75 | #define BSCCS1BCR BSC.CS1BCR |
bogdanm | 92:4fc01daae5a5 | 76 | #define BSCCS2BCR BSC.CS2BCR |
bogdanm | 92:4fc01daae5a5 | 77 | #define BSCCS3BCR BSC.CS3BCR |
bogdanm | 92:4fc01daae5a5 | 78 | #define BSCCS4BCR BSC.CS4BCR |
bogdanm | 92:4fc01daae5a5 | 79 | #define BSCCS5BCR BSC.CS5BCR |
bogdanm | 92:4fc01daae5a5 | 80 | #define BSCCS0WCR BSC.CS0WCR |
bogdanm | 92:4fc01daae5a5 | 81 | #define BSCCS1WCR BSC.CS1WCR |
bogdanm | 92:4fc01daae5a5 | 82 | #define BSCCS2WCR BSC.CS2WCR |
bogdanm | 92:4fc01daae5a5 | 83 | #define BSCCS3WCR BSC.CS3WCR |
bogdanm | 92:4fc01daae5a5 | 84 | #define BSCCS4WCR BSC.CS4WCR |
bogdanm | 92:4fc01daae5a5 | 85 | #define BSCCS5WCR BSC.CS5WCR |
bogdanm | 92:4fc01daae5a5 | 86 | #define BSCSDCR BSC.SDCR |
bogdanm | 92:4fc01daae5a5 | 87 | #define BSCRTCSR BSC.RTCSR |
bogdanm | 92:4fc01daae5a5 | 88 | #define BSCRTCNT BSC.RTCNT |
bogdanm | 92:4fc01daae5a5 | 89 | #define BSCRTCOR BSC.RTCOR |
bogdanm | 92:4fc01daae5a5 | 90 | #define BSCTOSCOR0 BSC.TOSCOR0 |
bogdanm | 92:4fc01daae5a5 | 91 | #define BSCTOSCOR1 BSC.TOSCOR1 |
bogdanm | 92:4fc01daae5a5 | 92 | #define BSCTOSCOR2 BSC.TOSCOR2 |
bogdanm | 92:4fc01daae5a5 | 93 | #define BSCTOSCOR3 BSC.TOSCOR3 |
bogdanm | 92:4fc01daae5a5 | 94 | #define BSCTOSCOR4 BSC.TOSCOR4 |
bogdanm | 92:4fc01daae5a5 | 95 | #define BSCTOSCOR5 BSC.TOSCOR5 |
bogdanm | 92:4fc01daae5a5 | 96 | #define BSCTOSTR BSC.TOSTR |
bogdanm | 92:4fc01daae5a5 | 97 | #define BSCTOENR BSC.TOENR |
bogdanm | 92:4fc01daae5a5 | 98 | /* <-SEC M1.10.1 */ |
bogdanm | 92:4fc01daae5a5 | 99 | #endif |