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TARGET_NUCLEO_L152RE/stm32l1xx_hal_sram.h@99:7f6c6de930c0, 2015-05-03 (annotated)

Committer:
Mikchel
Date:
Sun May 03 16:04:42 2015 +0000
Revision:
99:7f6c6de930c0
Parent:
90:cb3d968589d8 
12

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 90:cb3d968589d8 1 /**
Kojto 90:cb3d968589d8 2 ******************************************************************************
Kojto 90:cb3d968589d8 3 * @file stm32l1xx_hal_sram.h
Kojto 90:cb3d968589d8 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.0.0
Kojto 90:cb3d968589d8 6 * @date 5-September-2014
Kojto 90:cb3d968589d8 7 * @brief Header file of SRAM HAL module.
Kojto 90:cb3d968589d8 8 ******************************************************************************
Kojto 90:cb3d968589d8 9 * @attention
Kojto 90:cb3d968589d8 10 *
Kojto 90:cb3d968589d8 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto 90:cb3d968589d8 12 *
Kojto 90:cb3d968589d8 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 90:cb3d968589d8 14 * are permitted provided that the following conditions are met:
Kojto 90:cb3d968589d8 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 90:cb3d968589d8 16 * this list of conditions and the following disclaimer.
Kojto 90:cb3d968589d8 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 90:cb3d968589d8 18 * this list of conditions and the following disclaimer in the documentation
Kojto 90:cb3d968589d8 19 * and/or other materials provided with the distribution.
Kojto 90:cb3d968589d8 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 90:cb3d968589d8 21 * may be used to endorse or promote products derived from this software
Kojto 90:cb3d968589d8 22 * without specific prior written permission.
Kojto 90:cb3d968589d8 23 *
Kojto 90:cb3d968589d8 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 90:cb3d968589d8 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 90:cb3d968589d8 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 90:cb3d968589d8 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 90:cb3d968589d8 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 90:cb3d968589d8 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 90:cb3d968589d8 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 90:cb3d968589d8 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 90:cb3d968589d8 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 90:cb3d968589d8 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 90:cb3d968589d8 34 *
Kojto 90:cb3d968589d8 35 ******************************************************************************
Kojto 90:cb3d968589d8 36 */
Kojto 90:cb3d968589d8 37
Kojto 90:cb3d968589d8 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 90:cb3d968589d8 39 #ifndef __STM32L1xx_HAL_SRAM_H
Kojto 90:cb3d968589d8 40 #define __STM32L1xx_HAL_SRAM_H
Kojto 90:cb3d968589d8 41
Kojto 90:cb3d968589d8 42 #ifdef __cplusplus
Kojto 90:cb3d968589d8 43 extern "C" {
Kojto 90:cb3d968589d8 44 #endif
Kojto 90:cb3d968589d8 45
Kojto 90:cb3d968589d8 46 /* Includes ------------------------------------------------------------------*/
Kojto 90:cb3d968589d8 47 #include "stm32l1xx_ll_fsmc.h"
Kojto 90:cb3d968589d8 48
Kojto 90:cb3d968589d8 49 /** @addtogroup STM32L1xx_HAL_Driver
Kojto 90:cb3d968589d8 50 * @{
Kojto 90:cb3d968589d8 51 */
Kojto 90:cb3d968589d8 52
Kojto 90:cb3d968589d8 53 /** @addtogroup SRAM
Kojto 90:cb3d968589d8 54 * @{
Kojto 90:cb3d968589d8 55 */
Kojto 90:cb3d968589d8 56
Kojto 90:cb3d968589d8 57 #if defined (STM32L151xD) || defined (STM32L152xD) || defined (STM32L162xD)
Kojto 90:cb3d968589d8 58
Kojto 90:cb3d968589d8 59 /* Exported typedef ----------------------------------------------------------*/
Kojto 90:cb3d968589d8 60
Kojto 90:cb3d968589d8 61 /** @defgroup SRAM_Exported_typedef SRAM Exported typedef
Kojto 90:cb3d968589d8 62 * @{
Kojto 90:cb3d968589d8 63 */
Kojto 90:cb3d968589d8 64
Kojto 90:cb3d968589d8 65 /**
Kojto 90:cb3d968589d8 66 * @brief HAL SRAM State structures definition
Kojto 90:cb3d968589d8 67 */
Kojto 90:cb3d968589d8 68 typedef enum
Kojto 90:cb3d968589d8 69 {
Kojto 90:cb3d968589d8 70 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
Kojto 90:cb3d968589d8 71 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
Kojto 90:cb3d968589d8 72 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
Kojto 90:cb3d968589d8 73 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
Kojto 90:cb3d968589d8 74 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
Kojto 90:cb3d968589d8 75
Kojto 90:cb3d968589d8 76 }HAL_SRAM_StateTypeDef;
Kojto 90:cb3d968589d8 77
Kojto 90:cb3d968589d8 78 /**
Kojto 90:cb3d968589d8 79 * @brief SRAM handle Structure definition
Kojto 90:cb3d968589d8 80 */
Kojto 90:cb3d968589d8 81 typedef struct
Kojto 90:cb3d968589d8 82 {
Kojto 90:cb3d968589d8 83 FSMC_NORSRAM_TYPEDEF *Instance; /*!< Register base address */
Kojto 90:cb3d968589d8 84
Kojto 90:cb3d968589d8 85 FSMC_NORSRAM_EXTENDED_TYPEDEF *Extended; /*!< Extended mode register base address */
Kojto 90:cb3d968589d8 86
Kojto 90:cb3d968589d8 87 FSMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
Kojto 90:cb3d968589d8 88
Kojto 90:cb3d968589d8 89 HAL_LockTypeDef Lock; /*!< SRAM locking object */
Kojto 90:cb3d968589d8 90
Kojto 90:cb3d968589d8 91 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
Kojto 90:cb3d968589d8 92
Kojto 90:cb3d968589d8 93 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
Kojto 90:cb3d968589d8 94
Kojto 90:cb3d968589d8 95 }SRAM_HandleTypeDef;
Kojto 90:cb3d968589d8 96
Kojto 90:cb3d968589d8 97 /**
Kojto 90:cb3d968589d8 98 * @}
Kojto 90:cb3d968589d8 99 */
Kojto 90:cb3d968589d8 100
Kojto 90:cb3d968589d8 101 /* Exported constants --------------------------------------------------------*/
Kojto 90:cb3d968589d8 102 /* Exported macro ------------------------------------------------------------*/
Kojto 90:cb3d968589d8 103
Kojto 90:cb3d968589d8 104 /** @defgroup SRAM_Exported_macro SRAM Exported macro
Kojto 90:cb3d968589d8 105 * @{
Kojto 90:cb3d968589d8 106 */
Kojto 90:cb3d968589d8 107
Kojto 90:cb3d968589d8 108 /** @brief Reset SRAM handle state
Kojto 90:cb3d968589d8 109 * @param __HANDLE__: SRAM handle
Kojto 90:cb3d968589d8 110 * @retval None
Kojto 90:cb3d968589d8 111 */
Kojto 90:cb3d968589d8 112 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
Kojto 90:cb3d968589d8 113
Kojto 90:cb3d968589d8 114 /**
Kojto 90:cb3d968589d8 115 * @}
Kojto 90:cb3d968589d8 116 */
Kojto 90:cb3d968589d8 117
Kojto 90:cb3d968589d8 118 /* Exported functions --------------------------------------------------------*/
Kojto 90:cb3d968589d8 119
Kojto 90:cb3d968589d8 120 /** @addtogroup SRAM_Exported_Functions
Kojto 90:cb3d968589d8 121 * @{
Kojto 90:cb3d968589d8 122 */
Kojto 90:cb3d968589d8 123
Kojto 90:cb3d968589d8 124 /** @addtogroup SRAM_Exported_Functions_Group1
Kojto 90:cb3d968589d8 125 * @{
Kojto 90:cb3d968589d8 126 */
Kojto 90:cb3d968589d8 127
Kojto 90:cb3d968589d8 128 /* Initialization/de-initialization functions **********************************/
Kojto 90:cb3d968589d8 129 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
Kojto 90:cb3d968589d8 130 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 131 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 132 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 133
Kojto 90:cb3d968589d8 134 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
Kojto 90:cb3d968589d8 135 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
Kojto 90:cb3d968589d8 136
Kojto 90:cb3d968589d8 137 /**
Kojto 90:cb3d968589d8 138 * @}
Kojto 90:cb3d968589d8 139 */
Kojto 90:cb3d968589d8 140
Kojto 90:cb3d968589d8 141 /** @addtogroup SRAM_Exported_Functions_Group2
Kojto 90:cb3d968589d8 142 * @{
Kojto 90:cb3d968589d8 143 */
Kojto 90:cb3d968589d8 144
Kojto 90:cb3d968589d8 145 /* I/O operation functions *****************************************************/
Kojto 90:cb3d968589d8 146 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 147 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 148 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 149 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 150 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 151 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 152 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 153 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
Kojto 90:cb3d968589d8 154
Kojto 90:cb3d968589d8 155 /**
Kojto 90:cb3d968589d8 156 * @}
Kojto 90:cb3d968589d8 157 */
Kojto 90:cb3d968589d8 158
Kojto 90:cb3d968589d8 159 /** @addtogroup SRAM_Exported_Functions_Group3
Kojto 90:cb3d968589d8 160 * @{
Kojto 90:cb3d968589d8 161 */
Kojto 90:cb3d968589d8 162
Kojto 90:cb3d968589d8 163 /* SRAM Control functions ******************************************************/
Kojto 90:cb3d968589d8 164 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 165 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 166
Kojto 90:cb3d968589d8 167 /**
Kojto 90:cb3d968589d8 168 * @}
Kojto 90:cb3d968589d8 169 */
Kojto 90:cb3d968589d8 170
Kojto 90:cb3d968589d8 171 /** @addtogroup SRAM_Exported_Functions_Group4
Kojto 90:cb3d968589d8 172 * @{
Kojto 90:cb3d968589d8 173 */
Kojto 90:cb3d968589d8 174
Kojto 90:cb3d968589d8 175 /* SRAM State functions *********************************************************/
Kojto 90:cb3d968589d8 176 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
Kojto 90:cb3d968589d8 177
Kojto 90:cb3d968589d8 178 /**
Kojto 90:cb3d968589d8 179 * @}
Kojto 90:cb3d968589d8 180 */
Kojto 90:cb3d968589d8 181
Kojto 90:cb3d968589d8 182 /**
Kojto 90:cb3d968589d8 183 * @}
Kojto 90:cb3d968589d8 184 */
Kojto 90:cb3d968589d8 185
Kojto 90:cb3d968589d8 186 #endif /* STM32L151xD || STM32L152xD || STM32L162xD */
Kojto 90:cb3d968589d8 187
Kojto 90:cb3d968589d8 188 /**
Kojto 90:cb3d968589d8 189 * @}
Kojto 90:cb3d968589d8 190 */
Kojto 90:cb3d968589d8 191
Kojto 90:cb3d968589d8 192 /**
Kojto 90:cb3d968589d8 193 * @}
Kojto 90:cb3d968589d8 194 */
Kojto 90:cb3d968589d8 195
Kojto 90:cb3d968589d8 196 #ifdef __cplusplus
Kojto 90:cb3d968589d8 197 }
Kojto 90:cb3d968589d8 198 #endif
Kojto 90:cb3d968589d8 199
Kojto 90:cb3d968589d8 200 #endif /* __STM32L1xx_HAL_SRAM_H */
Kojto 90:cb3d968589d8 201
Kojto 90:cb3d968589d8 202 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/