Egor Rumjantsev
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TARGET_NUCLEO_F334R8/stm32f3xx_hal_smbus.h@86:04dd9b1680ae, 2014-07-02 (annotated)
- Committer:
- bogdanm
- Date:
- Wed Jul 02 13:22:23 2014 +0100
- Revision:
- 86:04dd9b1680ae
- Child:
- 92:4fc01daae5a5
Release 86 of the mbed library
Main changes:
- bug fixes in various backends
- mbed "error" replaced by assert logic (mbed_assert)
- new ST Nucleo targets
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 86:04dd9b1680ae | 1 | /** |
| bogdanm | 86:04dd9b1680ae | 2 | ****************************************************************************** |
| bogdanm | 86:04dd9b1680ae | 3 | * @file stm32f3xx_hal_smbus.h |
| bogdanm | 86:04dd9b1680ae | 4 | * @author MCD Application Team |
| bogdanm | 86:04dd9b1680ae | 5 | * @version V1.0.1 |
| bogdanm | 86:04dd9b1680ae | 6 | * @date 18-June-2014 |
| bogdanm | 86:04dd9b1680ae | 7 | * @brief Header file of SMBUS HAL module. |
| bogdanm | 86:04dd9b1680ae | 8 | ****************************************************************************** |
| bogdanm | 86:04dd9b1680ae | 9 | * @attention |
| bogdanm | 86:04dd9b1680ae | 10 | * |
| bogdanm | 86:04dd9b1680ae | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 86:04dd9b1680ae | 12 | * |
| bogdanm | 86:04dd9b1680ae | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 86:04dd9b1680ae | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 86:04dd9b1680ae | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 86:04dd9b1680ae | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 86:04dd9b1680ae | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 86:04dd9b1680ae | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 86:04dd9b1680ae | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 86:04dd9b1680ae | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 86:04dd9b1680ae | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 86:04dd9b1680ae | 22 | * without specific prior written permission. |
| bogdanm | 86:04dd9b1680ae | 23 | * |
| bogdanm | 86:04dd9b1680ae | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 86:04dd9b1680ae | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 86:04dd9b1680ae | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 86:04dd9b1680ae | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 86:04dd9b1680ae | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 86:04dd9b1680ae | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 86:04dd9b1680ae | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 86:04dd9b1680ae | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 86:04dd9b1680ae | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 86:04dd9b1680ae | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 86:04dd9b1680ae | 34 | * |
| bogdanm | 86:04dd9b1680ae | 35 | ****************************************************************************** |
| bogdanm | 86:04dd9b1680ae | 36 | */ |
| bogdanm | 86:04dd9b1680ae | 37 | |
| bogdanm | 86:04dd9b1680ae | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 39 | #ifndef __STM32F3xx_HAL_SMBUS_H |
| bogdanm | 86:04dd9b1680ae | 40 | #define __STM32F3xx_HAL_SMBUS_H |
| bogdanm | 86:04dd9b1680ae | 41 | |
| bogdanm | 86:04dd9b1680ae | 42 | #ifdef __cplusplus |
| bogdanm | 86:04dd9b1680ae | 43 | extern "C" { |
| bogdanm | 86:04dd9b1680ae | 44 | #endif |
| bogdanm | 86:04dd9b1680ae | 45 | |
| bogdanm | 86:04dd9b1680ae | 46 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 47 | #include "stm32f3xx_hal_def.h" |
| bogdanm | 86:04dd9b1680ae | 48 | |
| bogdanm | 86:04dd9b1680ae | 49 | /** @addtogroup STM32F3xx_HAL_Driver |
| bogdanm | 86:04dd9b1680ae | 50 | * @{ |
| bogdanm | 86:04dd9b1680ae | 51 | */ |
| bogdanm | 86:04dd9b1680ae | 52 | |
| bogdanm | 86:04dd9b1680ae | 53 | /** @addtogroup SMBUS |
| bogdanm | 86:04dd9b1680ae | 54 | * @{ |
| bogdanm | 86:04dd9b1680ae | 55 | */ |
| bogdanm | 86:04dd9b1680ae | 56 | |
| bogdanm | 86:04dd9b1680ae | 57 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 58 | |
| bogdanm | 86:04dd9b1680ae | 59 | /** |
| bogdanm | 86:04dd9b1680ae | 60 | * @brief SMBUS Configuration Structure definition |
| bogdanm | 86:04dd9b1680ae | 61 | */ |
| bogdanm | 86:04dd9b1680ae | 62 | typedef struct |
| bogdanm | 86:04dd9b1680ae | 63 | { |
| bogdanm | 86:04dd9b1680ae | 64 | uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value. |
| bogdanm | 86:04dd9b1680ae | 65 | This parameter calculated by referring to SMBUS initialization |
| bogdanm | 86:04dd9b1680ae | 66 | section in Reference manual */ |
| bogdanm | 86:04dd9b1680ae | 67 | uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not. |
| bogdanm | 86:04dd9b1680ae | 68 | This parameter can be a a value of @ref SMBUS_Analog_Filter */ |
| bogdanm | 86:04dd9b1680ae | 69 | |
| bogdanm | 86:04dd9b1680ae | 70 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
| bogdanm | 86:04dd9b1680ae | 71 | This parameter can be a 7-bit or 10-bit address. */ |
| bogdanm | 86:04dd9b1680ae | 72 | |
| bogdanm | 86:04dd9b1680ae | 73 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected. |
| bogdanm | 86:04dd9b1680ae | 74 | This parameter can be a value of @ref SMBUS_addressing_mode */ |
| bogdanm | 86:04dd9b1680ae | 75 | |
| bogdanm | 86:04dd9b1680ae | 76 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
| bogdanm | 86:04dd9b1680ae | 77 | This parameter can be a value of @ref SMBUS_dual_addressing_mode */ |
| bogdanm | 86:04dd9b1680ae | 78 | |
| bogdanm | 86:04dd9b1680ae | 79 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
| bogdanm | 86:04dd9b1680ae | 80 | This parameter can be a 7-bit address. */ |
| bogdanm | 86:04dd9b1680ae | 81 | |
| bogdanm | 86:04dd9b1680ae | 82 | uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected |
| bogdanm | 86:04dd9b1680ae | 83 | This parameter can be a value of @ref SMBUS_own_address2_masks. */ |
| bogdanm | 86:04dd9b1680ae | 84 | |
| bogdanm | 86:04dd9b1680ae | 85 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
| bogdanm | 86:04dd9b1680ae | 86 | This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */ |
| bogdanm | 86:04dd9b1680ae | 87 | |
| bogdanm | 86:04dd9b1680ae | 88 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
| bogdanm | 86:04dd9b1680ae | 89 | This parameter can be a value of @ref SMBUS_nostretch_mode */ |
| bogdanm | 86:04dd9b1680ae | 90 | |
| bogdanm | 86:04dd9b1680ae | 91 | uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected. |
| bogdanm | 86:04dd9b1680ae | 92 | This parameter can be a value of @ref SMBUS_packet_error_check_mode */ |
| bogdanm | 86:04dd9b1680ae | 93 | |
| bogdanm | 86:04dd9b1680ae | 94 | uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected. |
| bogdanm | 86:04dd9b1680ae | 95 | This parameter can be a value of @ref SMBUS_peripheral_mode */ |
| bogdanm | 86:04dd9b1680ae | 96 | |
| bogdanm | 86:04dd9b1680ae | 97 | uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value. |
| bogdanm | 86:04dd9b1680ae | 98 | (Enable bits and different timeout values) |
| bogdanm | 86:04dd9b1680ae | 99 | This parameter calculated by referring to SMBUS initialization |
| bogdanm | 86:04dd9b1680ae | 100 | section in Reference manual */ |
| bogdanm | 86:04dd9b1680ae | 101 | } SMBUS_InitTypeDef; |
| bogdanm | 86:04dd9b1680ae | 102 | |
| bogdanm | 86:04dd9b1680ae | 103 | /** |
| bogdanm | 86:04dd9b1680ae | 104 | * @brief HAL State structures definition |
| bogdanm | 86:04dd9b1680ae | 105 | */ |
| bogdanm | 86:04dd9b1680ae | 106 | typedef enum |
| bogdanm | 86:04dd9b1680ae | 107 | { |
| bogdanm | 86:04dd9b1680ae | 108 | HAL_SMBUS_STATE_RESET = 0x00, /*!< SMBUS not yet initialized or disabled */ |
| bogdanm | 86:04dd9b1680ae | 109 | HAL_SMBUS_STATE_READY = 0x01, /*!< SMBUS initialized and ready for use */ |
| bogdanm | 86:04dd9b1680ae | 110 | HAL_SMBUS_STATE_BUSY = 0x02, /*!< SMBUS internal process is ongoing */ |
| bogdanm | 86:04dd9b1680ae | 111 | HAL_SMBUS_STATE_MASTER_BUSY_TX = 0x12, /*!< Master Data Transmission process is ongoing */ |
| bogdanm | 86:04dd9b1680ae | 112 | HAL_SMBUS_STATE_MASTER_BUSY_RX = 0x22, /*!< Master Data Reception process is ongoing */ |
| bogdanm | 86:04dd9b1680ae | 113 | HAL_SMBUS_STATE_SLAVE_BUSY_TX = 0x32, /*!< Slave Data Transmission process is ongoing */ |
| bogdanm | 86:04dd9b1680ae | 114 | HAL_SMBUS_STATE_SLAVE_BUSY_RX = 0x42, /*!< Slave Data Reception process is ongoing */ |
| bogdanm | 86:04dd9b1680ae | 115 | HAL_SMBUS_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| bogdanm | 86:04dd9b1680ae | 116 | HAL_SMBUS_STATE_ERROR = 0x04, /*!< Reception process is ongoing */ |
| bogdanm | 86:04dd9b1680ae | 117 | HAL_SMBUS_STATE_SLAVE_LISTEN = 0x08, /*!< Address Listen Mode is ongoing */ |
| bogdanm | 86:04dd9b1680ae | 118 | /* Aliases for inter STM32 series compatibility */ |
| bogdanm | 86:04dd9b1680ae | 119 | HAL_SMBUS_STATE_LISTEN = HAL_SMBUS_STATE_SLAVE_LISTEN |
| bogdanm | 86:04dd9b1680ae | 120 | }HAL_SMBUS_StateTypeDef; |
| bogdanm | 86:04dd9b1680ae | 121 | |
| bogdanm | 86:04dd9b1680ae | 122 | /** |
| bogdanm | 86:04dd9b1680ae | 123 | * @brief HAL SMBUS Error Code structure definition |
| bogdanm | 86:04dd9b1680ae | 124 | */ |
| bogdanm | 86:04dd9b1680ae | 125 | typedef enum |
| bogdanm | 86:04dd9b1680ae | 126 | { |
| bogdanm | 86:04dd9b1680ae | 127 | HAL_SMBUS_ERROR_NONE = 0x00, /*!< No error */ |
| bogdanm | 86:04dd9b1680ae | 128 | HAL_SMBUS_ERROR_BERR = 0x01, /*!< BERR error */ |
| bogdanm | 86:04dd9b1680ae | 129 | HAL_SMBUS_ERROR_ARLO = 0x02, /*!< ARLO error */ |
| bogdanm | 86:04dd9b1680ae | 130 | HAL_SMBUS_ERROR_ACKF = 0x04, /*!< ACKF error */ |
| bogdanm | 86:04dd9b1680ae | 131 | HAL_SMBUS_ERROR_OVR = 0x08, /*!< OVR error */ |
| bogdanm | 86:04dd9b1680ae | 132 | HAL_SMBUS_ERROR_HALTIMEOUT = 0x10, /*!< Timeout error */ |
| bogdanm | 86:04dd9b1680ae | 133 | HAL_SMBUS_ERROR_BUSTIMEOUT = 0x20, /*!< Bus Timeout error */ |
| bogdanm | 86:04dd9b1680ae | 134 | HAL_SMBUS_ERROR_ALERT = 0x40, /*!< Alert error */ |
| bogdanm | 86:04dd9b1680ae | 135 | HAL_SMBUS_ERROR_PECERR = 0x80 /*!< PEC error */ |
| bogdanm | 86:04dd9b1680ae | 136 | |
| bogdanm | 86:04dd9b1680ae | 137 | }HAL_SMBUS_ErrorTypeDef; |
| bogdanm | 86:04dd9b1680ae | 138 | |
| bogdanm | 86:04dd9b1680ae | 139 | /** |
| bogdanm | 86:04dd9b1680ae | 140 | * @brief SMBUS handle Structure definition |
| bogdanm | 86:04dd9b1680ae | 141 | */ |
| bogdanm | 86:04dd9b1680ae | 142 | typedef struct |
| bogdanm | 86:04dd9b1680ae | 143 | { |
| bogdanm | 86:04dd9b1680ae | 144 | I2C_TypeDef *Instance; /*!< SMBUS registers base address */ |
| bogdanm | 86:04dd9b1680ae | 145 | |
| bogdanm | 86:04dd9b1680ae | 146 | SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */ |
| bogdanm | 86:04dd9b1680ae | 147 | |
| bogdanm | 86:04dd9b1680ae | 148 | uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */ |
| bogdanm | 86:04dd9b1680ae | 149 | |
| bogdanm | 86:04dd9b1680ae | 150 | uint16_t XferSize; /*!< SMBUS transfer size */ |
| bogdanm | 86:04dd9b1680ae | 151 | |
| bogdanm | 86:04dd9b1680ae | 152 | __IO uint16_t XferCount; /*!< SMBUS transfer counter */ |
| bogdanm | 86:04dd9b1680ae | 153 | |
| bogdanm | 86:04dd9b1680ae | 154 | __IO uint32_t XferOptions; /*!< SMBUS transfer options */ |
| bogdanm | 86:04dd9b1680ae | 155 | |
| bogdanm | 86:04dd9b1680ae | 156 | __IO HAL_SMBUS_StateTypeDef PreviousState; /*!< SMBUS communication Previous tate */ |
| bogdanm | 86:04dd9b1680ae | 157 | |
| bogdanm | 86:04dd9b1680ae | 158 | HAL_LockTypeDef Lock; /*!< SMBUS locking object */ |
| bogdanm | 86:04dd9b1680ae | 159 | |
| bogdanm | 86:04dd9b1680ae | 160 | __IO HAL_SMBUS_StateTypeDef State; /*!< SMBUS communication state */ |
| bogdanm | 86:04dd9b1680ae | 161 | |
| bogdanm | 86:04dd9b1680ae | 162 | __IO HAL_SMBUS_ErrorTypeDef ErrorCode; /*!< SMBUS Error code */ |
| bogdanm | 86:04dd9b1680ae | 163 | |
| bogdanm | 86:04dd9b1680ae | 164 | }SMBUS_HandleTypeDef; |
| bogdanm | 86:04dd9b1680ae | 165 | |
| bogdanm | 86:04dd9b1680ae | 166 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 167 | |
| bogdanm | 86:04dd9b1680ae | 168 | /** @defgroup SMBUS_Exported_Constants |
| bogdanm | 86:04dd9b1680ae | 169 | * @{ |
| bogdanm | 86:04dd9b1680ae | 170 | */ |
| bogdanm | 86:04dd9b1680ae | 171 | |
| bogdanm | 86:04dd9b1680ae | 172 | /** @defgroup SMBUS_Analog_Filter |
| bogdanm | 86:04dd9b1680ae | 173 | * @{ |
| bogdanm | 86:04dd9b1680ae | 174 | */ |
| bogdanm | 86:04dd9b1680ae | 175 | #define SMBUS_ANALOGFILTER_ENABLED ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 176 | #define SMBUS_ANALOGFILTER_DISABLED I2C_CR1_ANFOFF |
| bogdanm | 86:04dd9b1680ae | 177 | |
| bogdanm | 86:04dd9b1680ae | 178 | #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLED) || \ |
| bogdanm | 86:04dd9b1680ae | 179 | ((FILTER) == SMBUS_ANALOGFILTER_DISABLED)) |
| bogdanm | 86:04dd9b1680ae | 180 | /** |
| bogdanm | 86:04dd9b1680ae | 181 | * @} |
| bogdanm | 86:04dd9b1680ae | 182 | */ |
| bogdanm | 86:04dd9b1680ae | 183 | |
| bogdanm | 86:04dd9b1680ae | 184 | /** @defgroup SMBUS_addressing_mode |
| bogdanm | 86:04dd9b1680ae | 185 | * @{ |
| bogdanm | 86:04dd9b1680ae | 186 | */ |
| bogdanm | 86:04dd9b1680ae | 187 | #define SMBUS_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001) |
| bogdanm | 86:04dd9b1680ae | 188 | #define SMBUS_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002) |
| bogdanm | 86:04dd9b1680ae | 189 | |
| bogdanm | 86:04dd9b1680ae | 190 | #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \ |
| bogdanm | 86:04dd9b1680ae | 191 | ((MODE) == SMBUS_ADDRESSINGMODE_10BIT)) |
| bogdanm | 86:04dd9b1680ae | 192 | /** |
| bogdanm | 86:04dd9b1680ae | 193 | * @} |
| bogdanm | 86:04dd9b1680ae | 194 | */ |
| bogdanm | 86:04dd9b1680ae | 195 | |
| bogdanm | 86:04dd9b1680ae | 196 | /** @defgroup SMBUS_dual_addressing_mode |
| bogdanm | 86:04dd9b1680ae | 197 | * @{ |
| bogdanm | 86:04dd9b1680ae | 198 | */ |
| bogdanm | 86:04dd9b1680ae | 199 | |
| bogdanm | 86:04dd9b1680ae | 200 | #define SMBUS_DUALADDRESS_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 201 | #define SMBUS_DUALADDRESS_ENABLED I2C_OAR2_OA2EN |
| bogdanm | 86:04dd9b1680ae | 202 | |
| bogdanm | 86:04dd9b1680ae | 203 | #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLED) || \ |
| bogdanm | 86:04dd9b1680ae | 204 | ((ADDRESS) == SMBUS_DUALADDRESS_ENABLED)) |
| bogdanm | 86:04dd9b1680ae | 205 | /** |
| bogdanm | 86:04dd9b1680ae | 206 | * @} |
| bogdanm | 86:04dd9b1680ae | 207 | */ |
| bogdanm | 86:04dd9b1680ae | 208 | |
| bogdanm | 86:04dd9b1680ae | 209 | /** @defgroup SMBUS_own_address2_masks |
| bogdanm | 86:04dd9b1680ae | 210 | * @{ |
| bogdanm | 86:04dd9b1680ae | 211 | */ |
| bogdanm | 86:04dd9b1680ae | 212 | |
| bogdanm | 86:04dd9b1680ae | 213 | #define SMBUS_OA2_NOMASK ((uint8_t)0x00) |
| bogdanm | 86:04dd9b1680ae | 214 | #define SMBUS_OA2_MASK01 ((uint8_t)0x01) |
| bogdanm | 86:04dd9b1680ae | 215 | #define SMBUS_OA2_MASK02 ((uint8_t)0x02) |
| bogdanm | 86:04dd9b1680ae | 216 | #define SMBUS_OA2_MASK03 ((uint8_t)0x03) |
| bogdanm | 86:04dd9b1680ae | 217 | #define SMBUS_OA2_MASK04 ((uint8_t)0x04) |
| bogdanm | 86:04dd9b1680ae | 218 | #define SMBUS_OA2_MASK05 ((uint8_t)0x05) |
| bogdanm | 86:04dd9b1680ae | 219 | #define SMBUS_OA2_MASK06 ((uint8_t)0x06) |
| bogdanm | 86:04dd9b1680ae | 220 | #define SMBUS_OA2_MASK07 ((uint8_t)0x07) |
| bogdanm | 86:04dd9b1680ae | 221 | |
| bogdanm | 86:04dd9b1680ae | 222 | #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \ |
| bogdanm | 86:04dd9b1680ae | 223 | ((MASK) == SMBUS_OA2_MASK01) || \ |
| bogdanm | 86:04dd9b1680ae | 224 | ((MASK) == SMBUS_OA2_MASK02) || \ |
| bogdanm | 86:04dd9b1680ae | 225 | ((MASK) == SMBUS_OA2_MASK03) || \ |
| bogdanm | 86:04dd9b1680ae | 226 | ((MASK) == SMBUS_OA2_MASK04) || \ |
| bogdanm | 86:04dd9b1680ae | 227 | ((MASK) == SMBUS_OA2_MASK05) || \ |
| bogdanm | 86:04dd9b1680ae | 228 | ((MASK) == SMBUS_OA2_MASK06) || \ |
| bogdanm | 86:04dd9b1680ae | 229 | ((MASK) == SMBUS_OA2_MASK07)) |
| bogdanm | 86:04dd9b1680ae | 230 | /** |
| bogdanm | 86:04dd9b1680ae | 231 | * @} |
| bogdanm | 86:04dd9b1680ae | 232 | */ |
| bogdanm | 86:04dd9b1680ae | 233 | |
| bogdanm | 86:04dd9b1680ae | 234 | |
| bogdanm | 86:04dd9b1680ae | 235 | /** @defgroup SMBUS_general_call_addressing_mode |
| bogdanm | 86:04dd9b1680ae | 236 | * @{ |
| bogdanm | 86:04dd9b1680ae | 237 | */ |
| bogdanm | 86:04dd9b1680ae | 238 | #define SMBUS_GENERALCALL_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 239 | #define SMBUS_GENERALCALL_ENABLED I2C_CR1_GCEN |
| bogdanm | 86:04dd9b1680ae | 240 | |
| bogdanm | 86:04dd9b1680ae | 241 | #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLED) || \ |
| bogdanm | 86:04dd9b1680ae | 242 | ((CALL) == SMBUS_GENERALCALL_ENABLED)) |
| bogdanm | 86:04dd9b1680ae | 243 | /** |
| bogdanm | 86:04dd9b1680ae | 244 | * @} |
| bogdanm | 86:04dd9b1680ae | 245 | */ |
| bogdanm | 86:04dd9b1680ae | 246 | |
| bogdanm | 86:04dd9b1680ae | 247 | /** @defgroup SMBUS_nostretch_mode |
| bogdanm | 86:04dd9b1680ae | 248 | * @{ |
| bogdanm | 86:04dd9b1680ae | 249 | */ |
| bogdanm | 86:04dd9b1680ae | 250 | #define SMBUS_NOSTRETCH_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 251 | #define SMBUS_NOSTRETCH_ENABLED I2C_CR1_NOSTRETCH |
| bogdanm | 86:04dd9b1680ae | 252 | |
| bogdanm | 86:04dd9b1680ae | 253 | #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLED) || \ |
| bogdanm | 86:04dd9b1680ae | 254 | ((STRETCH) == SMBUS_NOSTRETCH_ENABLED)) |
| bogdanm | 86:04dd9b1680ae | 255 | /** |
| bogdanm | 86:04dd9b1680ae | 256 | * @} |
| bogdanm | 86:04dd9b1680ae | 257 | */ |
| bogdanm | 86:04dd9b1680ae | 258 | |
| bogdanm | 86:04dd9b1680ae | 259 | /** @defgroup SMBUS_packet_error_check_mode |
| bogdanm | 86:04dd9b1680ae | 260 | * @{ |
| bogdanm | 86:04dd9b1680ae | 261 | */ |
| bogdanm | 86:04dd9b1680ae | 262 | #define SMBUS_PEC_DISABLED ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 263 | #define SMBUS_PEC_ENABLED I2C_CR1_PECEN |
| bogdanm | 86:04dd9b1680ae | 264 | |
| bogdanm | 86:04dd9b1680ae | 265 | #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLED) || \ |
| bogdanm | 86:04dd9b1680ae | 266 | ((PEC) == SMBUS_PEC_ENABLED)) |
| bogdanm | 86:04dd9b1680ae | 267 | /** |
| bogdanm | 86:04dd9b1680ae | 268 | * @} |
| bogdanm | 86:04dd9b1680ae | 269 | */ |
| bogdanm | 86:04dd9b1680ae | 270 | |
| bogdanm | 86:04dd9b1680ae | 271 | /** @defgroup SMBUS_peripheral_mode |
| bogdanm | 86:04dd9b1680ae | 272 | * @{ |
| bogdanm | 86:04dd9b1680ae | 273 | */ |
| bogdanm | 86:04dd9b1680ae | 274 | #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBHEN) |
| bogdanm | 86:04dd9b1680ae | 275 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (uint32_t)(0x00000000) |
| bogdanm | 86:04dd9b1680ae | 276 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBDEN) |
| bogdanm | 86:04dd9b1680ae | 277 | |
| bogdanm | 86:04dd9b1680ae | 278 | #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \ |
| bogdanm | 86:04dd9b1680ae | 279 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ |
| bogdanm | 86:04dd9b1680ae | 280 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)) |
| bogdanm | 86:04dd9b1680ae | 281 | /** |
| bogdanm | 86:04dd9b1680ae | 282 | * @} |
| bogdanm | 86:04dd9b1680ae | 283 | */ |
| bogdanm | 86:04dd9b1680ae | 284 | |
| bogdanm | 86:04dd9b1680ae | 285 | /** @defgroup SMBUS_ReloadEndMode_definition |
| bogdanm | 86:04dd9b1680ae | 286 | * @{ |
| bogdanm | 86:04dd9b1680ae | 287 | */ |
| bogdanm | 86:04dd9b1680ae | 288 | |
| bogdanm | 86:04dd9b1680ae | 289 | #define SMBUS_SOFTEND_MODE ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 290 | #define SMBUS_RELOAD_MODE I2C_CR2_RELOAD |
| bogdanm | 86:04dd9b1680ae | 291 | #define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND |
| bogdanm | 86:04dd9b1680ae | 292 | #define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE |
| bogdanm | 86:04dd9b1680ae | 293 | |
| bogdanm | 86:04dd9b1680ae | 294 | #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \ |
| bogdanm | 86:04dd9b1680ae | 295 | ((MODE) == SMBUS_AUTOEND_MODE) || \ |
| bogdanm | 86:04dd9b1680ae | 296 | ((MODE) == SMBUS_SOFTEND_MODE) || \ |
| bogdanm | 86:04dd9b1680ae | 297 | ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \ |
| bogdanm | 86:04dd9b1680ae | 298 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \ |
| bogdanm | 86:04dd9b1680ae | 299 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \ |
| bogdanm | 86:04dd9b1680ae | 300 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE ))) |
| bogdanm | 86:04dd9b1680ae | 301 | |
| bogdanm | 86:04dd9b1680ae | 302 | /** |
| bogdanm | 86:04dd9b1680ae | 303 | * @} |
| bogdanm | 86:04dd9b1680ae | 304 | */ |
| bogdanm | 86:04dd9b1680ae | 305 | |
| bogdanm | 86:04dd9b1680ae | 306 | /** @defgroup SMBUS_StartStopMode_definition |
| bogdanm | 86:04dd9b1680ae | 307 | * @{ |
| bogdanm | 86:04dd9b1680ae | 308 | */ |
| bogdanm | 86:04dd9b1680ae | 309 | |
| bogdanm | 86:04dd9b1680ae | 310 | #define SMBUS_NO_STARTSTOP ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 311 | #define SMBUS_GENERATE_STOP I2C_CR2_STOP |
| bogdanm | 86:04dd9b1680ae | 312 | #define SMBUS_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) |
| bogdanm | 86:04dd9b1680ae | 313 | #define SMBUS_GENERATE_START_WRITE I2C_CR2_START |
| bogdanm | 86:04dd9b1680ae | 314 | |
| bogdanm | 86:04dd9b1680ae | 315 | #define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \ |
| bogdanm | 86:04dd9b1680ae | 316 | ((REQUEST) == SMBUS_GENERATE_START_READ) || \ |
| bogdanm | 86:04dd9b1680ae | 317 | ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \ |
| bogdanm | 86:04dd9b1680ae | 318 | ((REQUEST) == SMBUS_NO_STARTSTOP)) |
| bogdanm | 86:04dd9b1680ae | 319 | |
| bogdanm | 86:04dd9b1680ae | 320 | /** |
| bogdanm | 86:04dd9b1680ae | 321 | * @} |
| bogdanm | 86:04dd9b1680ae | 322 | */ |
| bogdanm | 86:04dd9b1680ae | 323 | |
| bogdanm | 86:04dd9b1680ae | 324 | /** @defgroup SMBUS_XferOptions_definition |
| bogdanm | 86:04dd9b1680ae | 325 | * @{ |
| bogdanm | 86:04dd9b1680ae | 326 | */ |
| bogdanm | 86:04dd9b1680ae | 327 | |
| bogdanm | 86:04dd9b1680ae | 328 | #define SMBUS_FIRST_FRAME ((uint32_t)(SMBUS_SOFTEND_MODE)) |
| bogdanm | 86:04dd9b1680ae | 329 | #define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE)) |
| bogdanm | 86:04dd9b1680ae | 330 | #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| bogdanm | 86:04dd9b1680ae | 331 | #define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| bogdanm | 86:04dd9b1680ae | 332 | #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| bogdanm | 86:04dd9b1680ae | 333 | #define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| bogdanm | 86:04dd9b1680ae | 334 | |
| bogdanm | 86:04dd9b1680ae | 335 | #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \ |
| bogdanm | 86:04dd9b1680ae | 336 | ((REQUEST) == SMBUS_NEXT_FRAME) || \ |
| bogdanm | 86:04dd9b1680ae | 337 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \ |
| bogdanm | 86:04dd9b1680ae | 338 | ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \ |
| bogdanm | 86:04dd9b1680ae | 339 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \ |
| bogdanm | 86:04dd9b1680ae | 340 | ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)) |
| bogdanm | 86:04dd9b1680ae | 341 | |
| bogdanm | 86:04dd9b1680ae | 342 | /** |
| bogdanm | 86:04dd9b1680ae | 343 | * @} |
| bogdanm | 86:04dd9b1680ae | 344 | */ |
| bogdanm | 86:04dd9b1680ae | 345 | |
| bogdanm | 86:04dd9b1680ae | 346 | /** @defgroup SMBUS_Interrupt_configuration_definition |
| bogdanm | 86:04dd9b1680ae | 347 | * @brief SMBUS Interrupt definition |
| bogdanm | 86:04dd9b1680ae | 348 | * Elements values convention: 0xXXXXXXXX |
| bogdanm | 86:04dd9b1680ae | 349 | * - XXXXXXXX : Interrupt control mask |
| bogdanm | 86:04dd9b1680ae | 350 | * @{ |
| bogdanm | 86:04dd9b1680ae | 351 | */ |
| bogdanm | 86:04dd9b1680ae | 352 | #define SMBUS_IT_ERRI I2C_CR1_ERRIE |
| bogdanm | 86:04dd9b1680ae | 353 | #define SMBUS_IT_TCI I2C_CR1_TCIE |
| bogdanm | 86:04dd9b1680ae | 354 | #define SMBUS_IT_STOPI I2C_CR1_STOPIE |
| bogdanm | 86:04dd9b1680ae | 355 | #define SMBUS_IT_NACKI I2C_CR1_NACKIE |
| bogdanm | 86:04dd9b1680ae | 356 | #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE |
| bogdanm | 86:04dd9b1680ae | 357 | #define SMBUS_IT_RXI I2C_CR1_RXIE |
| bogdanm | 86:04dd9b1680ae | 358 | #define SMBUS_IT_TXI I2C_CR1_TXIE |
| bogdanm | 86:04dd9b1680ae | 359 | #define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI) |
| bogdanm | 86:04dd9b1680ae | 360 | #define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI) |
| bogdanm | 86:04dd9b1680ae | 361 | #define SMBUS_IT_ALERT (SMBUS_IT_ERRI) |
| bogdanm | 86:04dd9b1680ae | 362 | #define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI) |
| bogdanm | 86:04dd9b1680ae | 363 | /** |
| bogdanm | 86:04dd9b1680ae | 364 | * @} |
| bogdanm | 86:04dd9b1680ae | 365 | */ |
| bogdanm | 86:04dd9b1680ae | 366 | |
| bogdanm | 86:04dd9b1680ae | 367 | /** @defgroup SMBUS_Flag_definition |
| bogdanm | 86:04dd9b1680ae | 368 | * @brief Flag definition |
| bogdanm | 86:04dd9b1680ae | 369 | * Elements values convention: 0xXXXXYYYY |
| bogdanm | 86:04dd9b1680ae | 370 | * - XXXXXXXX : Flag mask |
| bogdanm | 86:04dd9b1680ae | 371 | * @{ |
| bogdanm | 86:04dd9b1680ae | 372 | */ |
| bogdanm | 86:04dd9b1680ae | 373 | |
| bogdanm | 86:04dd9b1680ae | 374 | #define SMBUS_FLAG_TXE I2C_ISR_TXE |
| bogdanm | 86:04dd9b1680ae | 375 | #define SMBUS_FLAG_TXIS I2C_ISR_TXIS |
| bogdanm | 86:04dd9b1680ae | 376 | #define SMBUS_FLAG_RXNE I2C_ISR_RXNE |
| bogdanm | 86:04dd9b1680ae | 377 | #define SMBUS_FLAG_ADDR I2C_ISR_ADDR |
| bogdanm | 86:04dd9b1680ae | 378 | #define SMBUS_FLAG_AF I2C_ISR_NACKF |
| bogdanm | 86:04dd9b1680ae | 379 | #define SMBUS_FLAG_STOPF I2C_ISR_STOPF |
| bogdanm | 86:04dd9b1680ae | 380 | #define SMBUS_FLAG_TC I2C_ISR_TC |
| bogdanm | 86:04dd9b1680ae | 381 | #define SMBUS_FLAG_TCR I2C_ISR_TCR |
| bogdanm | 86:04dd9b1680ae | 382 | #define SMBUS_FLAG_BERR I2C_ISR_BERR |
| bogdanm | 86:04dd9b1680ae | 383 | #define SMBUS_FLAG_ARLO I2C_ISR_ARLO |
| bogdanm | 86:04dd9b1680ae | 384 | #define SMBUS_FLAG_OVR I2C_ISR_OVR |
| bogdanm | 86:04dd9b1680ae | 385 | #define SMBUS_FLAG_PECERR I2C_ISR_PECERR |
| bogdanm | 86:04dd9b1680ae | 386 | #define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
| bogdanm | 86:04dd9b1680ae | 387 | #define SMBUS_FLAG_ALERT I2C_ISR_ALERT |
| bogdanm | 86:04dd9b1680ae | 388 | #define SMBUS_FLAG_BUSY I2C_ISR_BUSY |
| bogdanm | 86:04dd9b1680ae | 389 | #define SMBUS_FLAG_DIR I2C_ISR_DIR |
| bogdanm | 86:04dd9b1680ae | 390 | /** |
| bogdanm | 86:04dd9b1680ae | 391 | * @} |
| bogdanm | 86:04dd9b1680ae | 392 | */ |
| bogdanm | 86:04dd9b1680ae | 393 | |
| bogdanm | 86:04dd9b1680ae | 394 | /** |
| bogdanm | 86:04dd9b1680ae | 395 | * @} |
| bogdanm | 86:04dd9b1680ae | 396 | */ |
| bogdanm | 86:04dd9b1680ae | 397 | |
| bogdanm | 86:04dd9b1680ae | 398 | /* Exported macros ------------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 399 | /** @defgroup SMBUS_Exported_Macros |
| bogdanm | 86:04dd9b1680ae | 400 | * @{ |
| bogdanm | 86:04dd9b1680ae | 401 | */ |
| bogdanm | 86:04dd9b1680ae | 402 | |
| bogdanm | 86:04dd9b1680ae | 403 | /** @brief Reset SMBUS handle state |
| bogdanm | 86:04dd9b1680ae | 404 | * @param __HANDLE__: SMBUS handle. |
| bogdanm | 86:04dd9b1680ae | 405 | * @retval None |
| bogdanm | 86:04dd9b1680ae | 406 | */ |
| bogdanm | 86:04dd9b1680ae | 407 | #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET) |
| bogdanm | 86:04dd9b1680ae | 408 | |
| bogdanm | 86:04dd9b1680ae | 409 | /** @brief Enable or disable the specified SMBUS interrupts. |
| bogdanm | 86:04dd9b1680ae | 410 | * @param __HANDLE__: specifies the SMBUS Handle. |
| bogdanm | 86:04dd9b1680ae | 411 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| bogdanm | 86:04dd9b1680ae | 412 | * @param __INTERRUPT__: specifies the interrupt source to enable or disable. |
| bogdanm | 86:04dd9b1680ae | 413 | * This parameter can be one of the following values: |
| bogdanm | 86:04dd9b1680ae | 414 | * @arg SMBUS_IT_ERRI: Errors interrupt enable |
| bogdanm | 86:04dd9b1680ae | 415 | * @arg SMBUS_IT_TCI: Transfer complete interrupt enable |
| bogdanm | 86:04dd9b1680ae | 416 | * @arg SMBUS_IT_STOPI: STOP detection interrupt enable |
| bogdanm | 86:04dd9b1680ae | 417 | * @arg SMBUS_IT_NACKI: NACK received interrupt enable |
| bogdanm | 86:04dd9b1680ae | 418 | * @arg SMBUS_IT_ADDRI: Address match interrupt enable |
| bogdanm | 86:04dd9b1680ae | 419 | * @arg SMBUS_IT_RXI: RX interrupt enable |
| bogdanm | 86:04dd9b1680ae | 420 | * @arg SMBUS_IT_TXI: TX interrupt enable |
| bogdanm | 86:04dd9b1680ae | 421 | * |
| bogdanm | 86:04dd9b1680ae | 422 | * @retval None |
| bogdanm | 86:04dd9b1680ae | 423 | */ |
| bogdanm | 86:04dd9b1680ae | 424 | |
| bogdanm | 86:04dd9b1680ae | 425 | #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
| bogdanm | 86:04dd9b1680ae | 426 | #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
| bogdanm | 86:04dd9b1680ae | 427 | |
| bogdanm | 86:04dd9b1680ae | 428 | /** @brief Checks if the specified SMBUS interrupt source is enabled or disabled. |
| bogdanm | 86:04dd9b1680ae | 429 | * @param __HANDLE__: specifies the SMBUS Handle. |
| bogdanm | 86:04dd9b1680ae | 430 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| bogdanm | 86:04dd9b1680ae | 431 | * @param __INTERRUPT__: specifies the SMBUS interrupt source to check. |
| bogdanm | 86:04dd9b1680ae | 432 | * This parameter can be one of the following values: |
| bogdanm | 86:04dd9b1680ae | 433 | * @arg SMBUS_IT_ERRI: Errors interrupt enable |
| bogdanm | 86:04dd9b1680ae | 434 | * @arg SMBUS_IT_TCI: Transfer complete interrupt enable |
| bogdanm | 86:04dd9b1680ae | 435 | * @arg SMBUS_IT_STOPI: STOP detection interrupt enable |
| bogdanm | 86:04dd9b1680ae | 436 | * @arg SMBUS_IT_NACKI: NACK received interrupt enable |
| bogdanm | 86:04dd9b1680ae | 437 | * @arg SMBUS_IT_ADDRI: Address match interrupt enable |
| bogdanm | 86:04dd9b1680ae | 438 | * @arg SMBUS_IT_RXI: RX interrupt enable |
| bogdanm | 86:04dd9b1680ae | 439 | * @arg SMBUS_IT_TXI: TX interrupt enable |
| bogdanm | 86:04dd9b1680ae | 440 | * |
| bogdanm | 86:04dd9b1680ae | 441 | * @retval The new state of __IT__ (TRUE or FALSE). |
| bogdanm | 86:04dd9b1680ae | 442 | */ |
| bogdanm | 86:04dd9b1680ae | 443 | #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| bogdanm | 86:04dd9b1680ae | 444 | |
| bogdanm | 86:04dd9b1680ae | 445 | /** @brief Checks whether the specified SMBUS flag is set or not. |
| bogdanm | 86:04dd9b1680ae | 446 | * @param __HANDLE__: specifies the SMBUS Handle. |
| bogdanm | 86:04dd9b1680ae | 447 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| bogdanm | 86:04dd9b1680ae | 448 | * @param __FLAG__: specifies the flag to check. |
| bogdanm | 86:04dd9b1680ae | 449 | * This parameter can be one of the following values: |
| bogdanm | 86:04dd9b1680ae | 450 | * @arg SMBUS_FLAG_TXE: Transmit data register empty |
| bogdanm | 86:04dd9b1680ae | 451 | * @arg SMBUS_FLAG_TXIS: Transmit interrupt status |
| bogdanm | 86:04dd9b1680ae | 452 | * @arg SMBUS_FLAG_RXNE: Receive data register not empty |
| bogdanm | 86:04dd9b1680ae | 453 | * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) |
| bogdanm | 86:04dd9b1680ae | 454 | * @arg SMBUS_FLAG_AF: NACK received flag |
| bogdanm | 86:04dd9b1680ae | 455 | * @arg SMBUS_FLAG_STOPF: STOP detection flag |
| bogdanm | 86:04dd9b1680ae | 456 | * @arg SMBUS_FLAG_TC: Transfer complete (master mode) |
| bogdanm | 86:04dd9b1680ae | 457 | * @arg SMBUS_FLAG_TCR: Transfer complete reload |
| bogdanm | 86:04dd9b1680ae | 458 | * @arg SMBUS_FLAG_BERR: Bus error |
| bogdanm | 86:04dd9b1680ae | 459 | * @arg SMBUS_FLAG_ARLO: Arbitration lost |
| bogdanm | 86:04dd9b1680ae | 460 | * @arg SMBUS_FLAG_OVR: Overrun/Underrun |
| bogdanm | 86:04dd9b1680ae | 461 | * @arg SMBUS_FLAG_PECERR: PEC error in reception |
| bogdanm | 86:04dd9b1680ae | 462 | * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| bogdanm | 86:04dd9b1680ae | 463 | * @arg SMBUS_FLAG_ALERT: SMBus alert |
| bogdanm | 86:04dd9b1680ae | 464 | * @arg SMBUS_FLAG_BUSY: Bus busy |
| bogdanm | 86:04dd9b1680ae | 465 | * @arg SMBUS_FLAG_DIR: Transfer direction (slave mode) |
| bogdanm | 86:04dd9b1680ae | 466 | * |
| bogdanm | 86:04dd9b1680ae | 467 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| bogdanm | 86:04dd9b1680ae | 468 | */ |
| bogdanm | 86:04dd9b1680ae | 469 | #define SMBUS_FLAG_MASK ((uint32_t)0x0001FFFF) |
| bogdanm | 86:04dd9b1680ae | 470 | #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) |
| bogdanm | 86:04dd9b1680ae | 471 | |
| bogdanm | 86:04dd9b1680ae | 472 | /** @brief Clears the SMBUS pending flags which are cleared by writing 1 in a specific bit. |
| bogdanm | 86:04dd9b1680ae | 473 | * @param __HANDLE__: specifies the SMBUS Handle. |
| bogdanm | 86:04dd9b1680ae | 474 | * This parameter can be SMBUS where x: 1 or 2 to select the SMBUS peripheral. |
| bogdanm | 86:04dd9b1680ae | 475 | * @param __FLAG__: specifies the flag to clear. |
| bogdanm | 86:04dd9b1680ae | 476 | * This parameter can be any combination of the following values: |
| bogdanm | 86:04dd9b1680ae | 477 | * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) |
| bogdanm | 86:04dd9b1680ae | 478 | * @arg SMBUS_FLAG_AF: NACK received flag |
| bogdanm | 86:04dd9b1680ae | 479 | * @arg SMBUS_FLAG_STOPF: STOP detection flag |
| bogdanm | 86:04dd9b1680ae | 480 | * @arg SMBUS_FLAG_BERR: Bus error |
| bogdanm | 86:04dd9b1680ae | 481 | * @arg SMBUS_FLAG_ARLO: Arbitration lost |
| bogdanm | 86:04dd9b1680ae | 482 | * @arg SMBUS_FLAG_OVR: Overrun/Underrun |
| bogdanm | 86:04dd9b1680ae | 483 | * @arg SMBUS_FLAG_PECERR: PEC error in reception |
| bogdanm | 86:04dd9b1680ae | 484 | * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag |
| bogdanm | 86:04dd9b1680ae | 485 | * @arg SMBUS_FLAG_ALERT: SMBus alert |
| bogdanm | 86:04dd9b1680ae | 486 | * |
| bogdanm | 86:04dd9b1680ae | 487 | * @retval None |
| bogdanm | 86:04dd9b1680ae | 488 | */ |
| bogdanm | 86:04dd9b1680ae | 489 | #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| bogdanm | 86:04dd9b1680ae | 490 | |
| bogdanm | 86:04dd9b1680ae | 491 | |
| bogdanm | 86:04dd9b1680ae | 492 | #define __HAL_SMBUS_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE) |
| bogdanm | 86:04dd9b1680ae | 493 | #define __HAL_SMBUS_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE) |
| bogdanm | 86:04dd9b1680ae | 494 | |
| bogdanm | 86:04dd9b1680ae | 495 | #define __HAL_SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN))) |
| bogdanm | 86:04dd9b1680ae | 496 | #define __HAL_SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
| bogdanm | 86:04dd9b1680ae | 497 | |
| bogdanm | 86:04dd9b1680ae | 498 | #define __HAL_SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
| bogdanm | 86:04dd9b1680ae | 499 | (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
| bogdanm | 86:04dd9b1680ae | 500 | |
| bogdanm | 86:04dd9b1680ae | 501 | #define __HAL_SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17) |
| bogdanm | 86:04dd9b1680ae | 502 | #define __HAL_SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16) |
| bogdanm | 86:04dd9b1680ae | 503 | #define __HAL_SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) |
| bogdanm | 86:04dd9b1680ae | 504 | #define __HAL_SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE) |
| bogdanm | 86:04dd9b1680ae | 505 | #define __HAL_SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN) |
| bogdanm | 86:04dd9b1680ae | 506 | #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) ((__HANDLE__)->Instance->CR2 |= I2C_CR2_NACK) |
| bogdanm | 86:04dd9b1680ae | 507 | |
| bogdanm | 86:04dd9b1680ae | 508 | #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF) |
| bogdanm | 86:04dd9b1680ae | 509 | #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF) |
| bogdanm | 86:04dd9b1680ae | 510 | /** |
| bogdanm | 86:04dd9b1680ae | 511 | * @} |
| bogdanm | 86:04dd9b1680ae | 512 | */ |
| bogdanm | 86:04dd9b1680ae | 513 | |
| bogdanm | 86:04dd9b1680ae | 514 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 515 | /* Initialization and de-initialization functions **********************************/ |
| bogdanm | 86:04dd9b1680ae | 516 | HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 517 | HAL_StatusTypeDef HAL_SMBUS_DeInit (SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 518 | void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 519 | void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 520 | |
| bogdanm | 86:04dd9b1680ae | 521 | /* IO operation functions *****************************************************/ |
| bogdanm | 86:04dd9b1680ae | 522 | HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 523 | HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 524 | HAL_StatusTypeDef HAL_SMBUS_Slave_Listen_IT(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 525 | HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 526 | /* Aliases for new API and to insure inter STM32 series compatibility */ |
| bogdanm | 86:04dd9b1680ae | 527 | #define HAL_SMBUS_EnableListen_IT HAL_SMBUS_Slave_Listen_IT |
| bogdanm | 86:04dd9b1680ae | 528 | |
| bogdanm | 86:04dd9b1680ae | 529 | /******* Blocking mode: Polling */ |
| bogdanm | 86:04dd9b1680ae | 530 | HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
| bogdanm | 86:04dd9b1680ae | 531 | |
| bogdanm | 86:04dd9b1680ae | 532 | /******* Non-Blocking mode: Interrupt */ |
| bogdanm | 86:04dd9b1680ae | 533 | HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| bogdanm | 86:04dd9b1680ae | 534 | HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| bogdanm | 86:04dd9b1680ae | 535 | HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress); |
| bogdanm | 86:04dd9b1680ae | 536 | HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| bogdanm | 86:04dd9b1680ae | 537 | HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| bogdanm | 86:04dd9b1680ae | 538 | |
| bogdanm | 86:04dd9b1680ae | 539 | /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */ |
| bogdanm | 86:04dd9b1680ae | 540 | void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 541 | void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 542 | void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 543 | void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 544 | void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 545 | void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 546 | void HAL_SMBUS_SlaveAddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); |
| bogdanm | 86:04dd9b1680ae | 547 | void HAL_SMBUS_SlaveListenCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 548 | /* Aliases for new API and to insure inter STM32 series compatibility */ |
| bogdanm | 86:04dd9b1680ae | 549 | #define HAL_SMBUS_AddrCallback HAL_SMBUS_SlaveAddrCallback |
| bogdanm | 86:04dd9b1680ae | 550 | #define HAL_SMBUS_ListenCpltCallback HAL_SMBUS_SlaveListenCpltCallback |
| bogdanm | 86:04dd9b1680ae | 551 | |
| bogdanm | 86:04dd9b1680ae | 552 | void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 553 | |
| bogdanm | 86:04dd9b1680ae | 554 | /* Peripheral State and Errors functions **************************************************/ |
| bogdanm | 86:04dd9b1680ae | 555 | HAL_SMBUS_StateTypeDef HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 556 | uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus); |
| bogdanm | 86:04dd9b1680ae | 557 | |
| bogdanm | 86:04dd9b1680ae | 558 | /** |
| bogdanm | 86:04dd9b1680ae | 559 | * @} |
| bogdanm | 86:04dd9b1680ae | 560 | */ |
| bogdanm | 86:04dd9b1680ae | 561 | |
| bogdanm | 86:04dd9b1680ae | 562 | /** |
| bogdanm | 86:04dd9b1680ae | 563 | * @} |
| bogdanm | 86:04dd9b1680ae | 564 | */ |
| bogdanm | 86:04dd9b1680ae | 565 | |
| bogdanm | 86:04dd9b1680ae | 566 | #ifdef __cplusplus |
| bogdanm | 86:04dd9b1680ae | 567 | } |
| bogdanm | 86:04dd9b1680ae | 568 | #endif |
| bogdanm | 86:04dd9b1680ae | 569 | |
| bogdanm | 86:04dd9b1680ae | 570 | |
| bogdanm | 86:04dd9b1680ae | 571 | #endif /* __STM32F3xx_HAL_SMBUS_H */ |
| bogdanm | 86:04dd9b1680ae | 572 | |
| bogdanm | 86:04dd9b1680ae | 573 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |