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Diff: TARGET_LPC4088_DM/TOOLCHAIN_IAR/LPC4088.icf
- Revision:
- 93:e188a91d3eaa
- Child:
- 95:7e07b6fb45cf
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/TARGET_LPC4088_DM/TOOLCHAIN_IAR/LPC4088.icf Tue Feb 03 15:31:20 2015 +0000 @@ -0,0 +1,41 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x00000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0007FFFF; +define symbol __ICFEDIT_region_NVIC_start__ = 0x10000000; +define symbol __ICFEDIT_region_NVIC_end__ = 0x100000E7; +define symbol __ICFEDIT_region_RAM_start__ = 0x100000E8; +define symbol __ICFEDIT_region_RAM_end__ = 0x1000FFDF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x800; +define symbol __ICFEDIT_size_heap__ = 0x1000; +/**** End of ICF editor section. ###ICF###*/ + +define symbol __CRP_start__ = 0x000002FC; +define symbol __CRP_end__ = 0x000002FF; + +define symbol __RAM1_start__ = 0x20000000; +define symbol __RAM1_end__ = 0x20007FFF; + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__] - mem:[from __CRP_start__ to __CRP_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; +define region CRP_region = mem:[from __CRP_start__ to __CRP_end__]; +define region RAM1_region = mem:[from __RAM1_start__ to __RAM1_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block HEAP, block CSTACK }; +place in CRP_region { section .crp }; +place in RAM1_region { section .sram };