Diff: TARGET_ARCH_PRO/TOOLCHAIN_IAR/LPC17xx.icf

Revision:

93:e188a91d3eaa

Parent:

90:cb3d968589d8

Child:

95:7e07b6fb45cf

--- a/TARGET_ARCH_PRO/TOOLCHAIN_IAR/LPC17xx.icf	Thu Nov 27 13:33:22 2014 +0000
+++ b/TARGET_ARCH_PRO/TOOLCHAIN_IAR/LPC17xx.icf	Tue Feb 03 15:31:20 2015 +0000
@@ -1,40 +1,44 @@
-/* [ROM] */
-define symbol __intvec_start__     = 0x00000000;
-define symbol __region_ROM_start__ = 0x00000000;
-define symbol __CRP_start__        = 0x000002FC;
-define symbol __CRP_end__          = 0x000002FF;
-define symbol __region_ROM_end__   = 0x0007FFFF;
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x00000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__   = 0x00000000;
+define symbol __ICFEDIT_region_ROM_end__     = 0x0007FFFF;
+define symbol __ICFEDIT_region_NVIC_start__   = 0x10000000;
+define symbol __ICFEDIT_region_NVIC_end__   = 0x100000C7;
+define symbol __ICFEDIT_region_RAM_start__   = 0x100000C8;
+define symbol __ICFEDIT_region_RAM_end__     = 0x10007FDF;
 
-/* [RAM] Vector table dynamic copy: 8_byte_aligned(49 vect * 4 bytes) =  8_byte_aligned(0xC4) = 0xC8*/
-define symbol __NVIC_start__       = 0x10000000;
-define symbol __NVIC_end__         = 0x100000C7;
-define symbol __region_RAM_start__ = 0x100000C8;
-define symbol __region_RAM_end__   = 0x10007FDF;
-define symbol _AHB_RAM_start__     = 0x2007C000;
-define symbol _AHB_RAM_end__       = 0x20083FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__   = 0x800;
+define symbol __ICFEDIT_size_heap__     = 0x1000;
+/**** End of ICF editor section. ###ICF###*/
 
-/* Memory regions */
-define memory mem with size = 4G;
+define symbol __CRP_start__   = 0x000002FC;
+define symbol __CRP_end__     = 0x000002FF;
 
-define region ROM_region     = mem:[from __region_ROM_start__   to __region_ROM_end__] - mem:[from  __CRP_start__ to __CRP_end__];
-define region CRP_region     = mem:[from  __CRP_start__ to __CRP_end__];
-
-define region RAM_region     = mem:[from __region_RAM_start__   to __region_RAM_end__];
-define region AHB_RAM_region = mem:[from _AHB_RAM_start__ to _AHB_RAM_end__];
+define symbol __RAM1_start__  = 0x2007C000;
+define symbol __RAM1_end__    = 0x20083FFF;
 
-/* Stack and Heap */
-define symbol __size_cstack__   = 0x800;
-define symbol __size_heap__     = 0x800;
-define block CSTACK    with alignment = 8, size = __size_cstack__   { };
-define block HEAP      with alignment = 8, size = __size_heap__     { };
-define block STACKHEAP with fixed order { block HEAP, block CSTACK };
+define memory mem with size = 4G;
+define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__] -  mem:[from  __CRP_start__ to __CRP_end__];
+define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region CRP_region   = mem:[from __CRP_start__ to __CRP_end__];
+define region RAM1_region  = mem:[from __RAM1_start__ to __RAM1_end__];
 
-initialize by copy with packing = zeros { readwrite };
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+
+initialize by copy { readwrite };
 do not initialize  { section .noinit };
 
-place at address mem:__intvec_start__ { section .intvec };
-place at address mem:0x2FC { section CRPKEY };
-place in ROM_region     { readonly };
-place in RAM_region     { readwrite, block STACKHEAP };
-place in AHB_RAM_region { section USB_RAM };
-place in CRP_region     { section .crp };
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block HEAP, block CSTACK };
+                                          
+place in CRP_region  	{ section .crp };
+place in RAM1_region	{ section USB_RAM };