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TARGET_NUCLEO_L152RE/stm32l1xx_hal_adc.h@90:cb3d968589d8, 2014-10-28 (annotated)

Committer:: Kojto
Date:: Tue Oct 28 16:40:41 2014 +0000
Revision:: 90:cb3d968589d8

Release 90 of the mbed library



Changes:



- Freescale KSDK update (v1.0)

- K22 - new target addition

- KL43Z - new target addition

- Nucleo F091RC - new target addition

- Nucleo L152RE - STM32Cube driver

- Nordic - Softdevice v7.1.0

- Nvic files - BSD License

- LPC824 - various HAL fixes

- Nucleo F411RE - CMSIS - IAR files

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	90:cb3d968589d8	1	/**
Kojto	90:cb3d968589d8	2	******************************************************************************
Kojto	90:cb3d968589d8	3	* @file stm32l1xx_hal_adc.h
Kojto	90:cb3d968589d8	4	* @author MCD Application Team
Kojto	90:cb3d968589d8	5	* @version V1.0.0
Kojto	90:cb3d968589d8	6	* @date 5-September-2014
Kojto	90:cb3d968589d8	7	* @brief Header file containing functions prototypes of ADC HAL library.
Kojto	90:cb3d968589d8	8	******************************************************************************
Kojto	90:cb3d968589d8	9	* @attention
Kojto	90:cb3d968589d8	10	*
Kojto	90:cb3d968589d8	11	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
Kojto	90:cb3d968589d8	12	*
Kojto	90:cb3d968589d8	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	90:cb3d968589d8	14	* are permitted provided that the following conditions are met:
Kojto	90:cb3d968589d8	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	90:cb3d968589d8	16	* this list of conditions and the following disclaimer.
Kojto	90:cb3d968589d8	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	90:cb3d968589d8	18	* this list of conditions and the following disclaimer in the documentation
Kojto	90:cb3d968589d8	19	* and/or other materials provided with the distribution.
Kojto	90:cb3d968589d8	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	90:cb3d968589d8	21	* may be used to endorse or promote products derived from this software
Kojto	90:cb3d968589d8	22	* without specific prior written permission.
Kojto	90:cb3d968589d8	23	*
Kojto	90:cb3d968589d8	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	90:cb3d968589d8	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	90:cb3d968589d8	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	90:cb3d968589d8	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	90:cb3d968589d8	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	90:cb3d968589d8	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	90:cb3d968589d8	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	90:cb3d968589d8	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	90:cb3d968589d8	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	90:cb3d968589d8	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	90:cb3d968589d8	34	*
Kojto	90:cb3d968589d8	35	******************************************************************************
Kojto	90:cb3d968589d8	36	*/
Kojto	90:cb3d968589d8	37
Kojto	90:cb3d968589d8	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	90:cb3d968589d8	39	#ifndef __STM32L1xx_HAL_ADC_H
Kojto	90:cb3d968589d8	40	#define __STM32L1xx_HAL_ADC_H
Kojto	90:cb3d968589d8	41
Kojto	90:cb3d968589d8	42	#ifdef __cplusplus
Kojto	90:cb3d968589d8	43	extern "C" {
Kojto	90:cb3d968589d8	44	#endif
Kojto	90:cb3d968589d8	45
Kojto	90:cb3d968589d8	46	/* Includes ------------------------------------------------------------------*/
Kojto	90:cb3d968589d8	47	#include "stm32l1xx_hal_def.h"
Kojto	90:cb3d968589d8	48	/** @addtogroup STM32L1xx_HAL_Driver
Kojto	90:cb3d968589d8	49	* @{
Kojto	90:cb3d968589d8	50	*/
Kojto	90:cb3d968589d8	51
Kojto	90:cb3d968589d8	52	/** @addtogroup ADC
Kojto	90:cb3d968589d8	53	* @{
Kojto	90:cb3d968589d8	54	*/
Kojto	90:cb3d968589d8	55
Kojto	90:cb3d968589d8	56	/* Exported types ------------------------------------------------------------*/
Kojto	90:cb3d968589d8	57	/** @defgroup ADC_Exported_Types ADC Exported Types
Kojto	90:cb3d968589d8	58	* @{
Kojto	90:cb3d968589d8	59	*/
Kojto	90:cb3d968589d8	60
Kojto	90:cb3d968589d8	61	/**
Kojto	90:cb3d968589d8	62	* @brief Structure definition of ADC and regular group initialization
Kojto	90:cb3d968589d8	63	* @note Parameters of this structure are shared within 2 scopes:
Kojto	90:cb3d968589d8	64	* - Scope entire ADC (affects regular and injected groups): ClockPrescaler, Resolution, ScanConvMode, DataAlign, ScanConvMode, EOCSelection, LowPowerAutoWait, LowPowerAutoPowerOff, ChannelsBank.
Kojto	90:cb3d968589d8	65	* - Scope regular group: ContinuousConvMode, NbrOfConversion, DiscontinuousConvMode, NbrOfDiscConversion, ExternalTrigConvEdge, ExternalTrigConv.
Kojto	90:cb3d968589d8	66	* @note The setting of these parameters with function HAL_ADC_Init() is conditioned to ADC state.
Kojto	90:cb3d968589d8	67	* ADC state can be either:
Kojto	90:cb3d968589d8	68	* - For all parameters: ADC disabled
Kojto	90:cb3d968589d8	69	* - For all parameters except 'Resolution', 'ScanConvMode', 'LowPowerAutoWait', 'LowPowerAutoPowerOff', 'DiscontinuousConvMode', 'NbrOfDiscConversion' : ADC enabled without conversion on going on regular group.
Kojto	90:cb3d968589d8	70	* - For parameters 'ExternalTrigConv' and 'ExternalTrigConvEdge': ADC enabled, even with conversion on going.
Kojto	90:cb3d968589d8	71	* If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed
Kojto	90:cb3d968589d8	72	* without error reporting without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fullfills the ADC state condition) on the fly).
Kojto	90:cb3d968589d8	73	*/
Kojto	90:cb3d968589d8	74	typedef struct
Kojto	90:cb3d968589d8	75	{
Kojto	90:cb3d968589d8	76	uint32_t ClockPrescaler; /*!< Select ADC clock source (asynchronous clock derived from HSI RC oscillator) and clock prescaler.
Kojto	90:cb3d968589d8	77	This parameter can be a value of @ref ADC_ClockPrescaler
Kojto	90:cb3d968589d8	78	Note: In case of usage of channels on injected group, ADC frequency should be low than AHB clock frequency /4 for resolution 12 or 10 bits,
Kojto	90:cb3d968589d8	79	AHB clock frequency /3 for resolution 8 bits, AHB clock frequency /2 for resolution 6 bits.
Kojto	90:cb3d968589d8	80	Note: HSI RC oscillator must be preliminarily enabled at RCC top level. */
Kojto	90:cb3d968589d8	81	uint32_t Resolution; /*!< Configures the ADC resolution.
Kojto	90:cb3d968589d8	82	This parameter can be a value of @ref ADC_Resolution */
Kojto	90:cb3d968589d8	83	uint32_t DataAlign; /*!< Specifies ADC data alignment to right (MSB on register bit 11 and LSB on register bit 0) (default setting)
Kojto	90:cb3d968589d8	84	or to left (if regular group: MSB on register bit 15 and LSB on register bit 4, if injected group (MSB kept as signed value due to potential negative value after offset application): MSB on register bit 14 and LSB on register bit 3).
Kojto	90:cb3d968589d8	85	This parameter can be a value of @ref ADC_Data_align */
Kojto	90:cb3d968589d8	86	uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups.
Kojto	90:cb3d968589d8	87	This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts.
Kojto	90:cb3d968589d8	88	If disabled: Conversion is performed in single mode (one channel converted, the one defined in rank 1).
Kojto	90:cb3d968589d8	89	Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1).
Kojto	90:cb3d968589d8	90	If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion'/'InjectedNbrOfConversion' and each channel rank).
Kojto	90:cb3d968589d8	91	Scan direction is upward: from rank1 to rank 'n'.
Kojto	90:cb3d968589d8	92	This parameter can be a value of @ref ADC_Scan_mode */
Kojto	90:cb3d968589d8	93	uint32_t EOCSelection; /*!< Specifies what EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence.
Kojto	90:cb3d968589d8	94	This parameter can be a value of @ref ADC_EOCSelection.
Kojto	90:cb3d968589d8	95	Note: For injected group, end of conversion (flag&IT) is raised only at the end of the sequence.
Kojto	90:cb3d968589d8	96	Therefore, if end of conversion is set to end of each conversion, injected group should not be used with interruption (HAL_ADCEx_InjectedStart_IT)
Kojto	90:cb3d968589d8	97	or polling (HAL_ADCEx_InjectedStart and HAL_ADCEx_InjectedPollForConversion). By the way, polling is still possible since driver will use an estimated timing for end of injected conversion.
Kojto	90:cb3d968589d8	98	Note: If overrun feature is intending to be used in ADC mode 'interruption' (function HAL_ADC_Start_IT() ), parameter EOCSelection must be set to each conversion (this is not needed for ADC mode 'transfer by DMA', with function HAL_ADC_Start_DMA()) */
Kojto	90:cb3d968589d8	99	uint32_t LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: new conversion start only when the previous
Kojto	90:cb3d968589d8	100	conversion (for regular group) or previous sequence (for injected group) has been treated by user software.
Kojto	90:cb3d968589d8	101	This feature automatically adapts the speed of ADC to the speed of the system that reads the data. Moreover, this avoids risk of overrun for low frequency applications.
Kojto	90:cb3d968589d8	102	This parameter can be a value of @ref ADC_LowPowerAutoWait.
Kojto	90:cb3d968589d8	103	Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA()) since they have to clear immediately the EOC flag to free the IRQ vector sequencer.
Kojto	90:cb3d968589d8	104	Do use with polling: 1. Start conversion with HAL_ADC_Start(), 2. Later on, when conversion data is needed: use HAL_ADC_PollForConversion() to ensure that conversion is completed
Kojto	90:cb3d968589d8	105	and use HAL_ADC_GetValue() to retrieve conversion result and trig another conversion.
Kojto	90:cb3d968589d8	106	Note: ADC clock latency and some timing constraints depending on clock prescaler have to be taken into account: refer to reference manual (register ADC_CR2 bit DELS description). */
Kojto	90:cb3d968589d8	107	uint32_t LowPowerAutoPowerOff; /*!< Selects the auto-off mode: the ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered (with startup time between trigger and start of sampling).
Kojto	90:cb3d968589d8	108	This feature can be combined with automatic wait mode (parameter 'LowPowerAutoWait').
Kojto	90:cb3d968589d8	109	This parameter can be a value of @ref ADC_LowPowerAutoPowerOff. */
Kojto	90:cb3d968589d8	110	uint32_t ChannelsBank; /*!< Selects the ADC channels bank.
Kojto	90:cb3d968589d8	111	This parameter can be a value of @ref ADC_ChannelsBank.
Kojto	90:cb3d968589d8	112	Note: Banks availability depends on devices categories.
Kojto	90:cb3d968589d8	113	Note: To change bank selection on the fly, without going through execution of 'HAL_ADC_Init()', macro '__HAL_ADC_CHANNELS_BANK()' can be used directly. */
Kojto	90:cb3d968589d8	114	uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group,
Kojto	90:cb3d968589d8	115	after the selected trigger occurred (software start or external trigger).
Kojto	90:cb3d968589d8	116	This parameter can be set to ENABLE or DISABLE. */
Kojto	90:cb3d968589d8	117	#if defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	118	uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
Kojto	90:cb3d968589d8	119	To use regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
Kojto	90:cb3d968589d8	120	This parameter must be a number between Min_Data = 1 and Max_Data = 28. */
Kojto	90:cb3d968589d8	121	#else
Kojto	90:cb3d968589d8	122	uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer.
Kojto	90:cb3d968589d8	123	To use regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled.
Kojto	90:cb3d968589d8	124	This parameter must be a number between Min_Data = 1 and Max_Data = 27. */
Kojto	90:cb3d968589d8	125	#endif /* STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L152xE \|\| STM32L162xE */
Kojto	90:cb3d968589d8	126	uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts).
Kojto	90:cb3d968589d8	127	Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded.
Kojto	90:cb3d968589d8	128	Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded.
Kojto	90:cb3d968589d8	129	This parameter can be set to ENABLE or DISABLE. */
Kojto	90:cb3d968589d8	130	uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided.
Kojto	90:cb3d968589d8	131	If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded.
Kojto	90:cb3d968589d8	132	This parameter must be a number between Min_Data = 1 and Max_Data = 8. */
Kojto	90:cb3d968589d8	133	uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group.
Kojto	90:cb3d968589d8	134	If set to ADC_SOFTWARE_START, external triggers are disabled.
Kojto	90:cb3d968589d8	135	If set to external trigger source, triggering is on event rising edge.
Kojto	90:cb3d968589d8	136	This parameter can be a value of @ref ADC_External_trigger_source_Regular */
Kojto	90:cb3d968589d8	137	uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group.
Kojto	90:cb3d968589d8	138	If trigger is set to ADC_SOFTWARE_START, this parameter is discarded.
Kojto	90:cb3d968589d8	139	This parameter can be a value of @ref ADC_External_trigger_edge_Regular */
Kojto	90:cb3d968589d8	140	uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stop when number of conversions is reached)
Kojto	90:cb3d968589d8	141	or in Continuous mode (DMA transfer unlimited, whatever number of conversions).
Kojto	90:cb3d968589d8	142	Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached.
Kojto	90:cb3d968589d8	143	This parameter can be set to ENABLE or DISABLE.
Kojto	90:cb3d968589d8	144	Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled without continuous mode or external trigger that could lauch a conversion). */
Kojto	90:cb3d968589d8	145	}ADC_InitTypeDef;
Kojto	90:cb3d968589d8	146
Kojto	90:cb3d968589d8	147	/**
Kojto	90:cb3d968589d8	148	* @brief Structure definition of ADC channel for regular group
Kojto	90:cb3d968589d8	149	* @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned to ADC state.
Kojto	90:cb3d968589d8	150	* ADC can be either disabled or enabled without conversion on going on regular group.
Kojto	90:cb3d968589d8	151	*/
Kojto	90:cb3d968589d8	152	typedef struct
Kojto	90:cb3d968589d8	153	{
Kojto	90:cb3d968589d8	154	uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group.
Kojto	90:cb3d968589d8	155	This parameter can be a value of @ref ADC_channels
Kojto	90:cb3d968589d8	156	Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability.
Kojto	90:cb3d968589d8	157	Maximum number of channels by device category (without taking in account each device package constraints):
Kojto	90:cb3d968589d8	158	STM32L1 category 1, 2: 24 channels on external pins + 3 channels on internal measurement paths (VrefInt, Temp sensor, Vcomp): Channel 0 to channel 26.
Kojto	90:cb3d968589d8	159	STM32L1 category 3: 25 channels on external pins + 3 channels on internal measurement paths (VrefInt, Temp sensor, Vcomp): Channel 0 to channel 26, 1 additional channel in bank B. Note: OPAMP1 and OPAMP2 are connected internally but not increasing internal channels number: they are sharing ADC input with external channels ADC_IN3 and ADC_IN8.
Kojto	90:cb3d968589d8	160	STM32L1 category 4, 5: 40 channels on external pins + 3 channels on internal measurement paths (VrefInt, Temp sensor, Vcomp): Channel 0 to channel 31, 11 additional channels in bank B. Note: OPAMP1 and OPAMP2 are connected internally but not increasing internal channels number: they are sharing ADC input with external channels ADC_IN3 and ADC_IN8.
Kojto	90:cb3d968589d8	161	Note: In case of peripherals OPAMPx not used: 3 channels (3, 8, 13) can be configured as direct channels (fast channels). Refer to macro ' __HAL_ADC_CHANNEL_SPEED_FAST() '.
Kojto	90:cb3d968589d8	162	Note: In case of peripheral OPAMP3 and ADC channel OPAMP3 used (OPAMP3 available on STM32L1 devices Cat.4 only): the analog switch COMP1_SW1 must be closed. Refer to macro: ' __HAL_OPAMP_OPAMP3OUT_CONNECT_ADC_COMP1() '. */
Kojto	90:cb3d968589d8	163	uint32_t Rank; /*!< Specifies the rank in the regular group sequencer
Kojto	90:cb3d968589d8	164	This parameter can be a value of @ref ADC_regular_rank
Kojto	90:cb3d968589d8	165	Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */
Kojto	90:cb3d968589d8	166	uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel.
Kojto	90:cb3d968589d8	167	Unit: ADC clock cycles
Kojto	90:cb3d968589d8	168	Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits).
Kojto	90:cb3d968589d8	169	This parameter can be a value of @ref ADC_sampling_times
Kojto	90:cb3d968589d8	170	Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups.
Kojto	90:cb3d968589d8	171	If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting.
Kojto	90:cb3d968589d8	172	Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor),
Kojto	90:cb3d968589d8	173	sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting)
Kojto	90:cb3d968589d8	174	Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */
Kojto	90:cb3d968589d8	175	}ADC_ChannelConfTypeDef;
Kojto	90:cb3d968589d8	176
Kojto	90:cb3d968589d8	177	/**
Kojto	90:cb3d968589d8	178	* @brief ADC Configuration analog watchdog definition
Kojto	90:cb3d968589d8	179	* @note The setting of these parameters with function is conditioned to ADC state.
Kojto	90:cb3d968589d8	180	* ADC state can be either disabled or enabled without conversion on going on regular and injected groups.
Kojto	90:cb3d968589d8	181	*/
Kojto	90:cb3d968589d8	182	typedef struct
Kojto	90:cb3d968589d8	183	{
Kojto	90:cb3d968589d8	184	uint32_t WatchdogMode; /*!< Configures the ADC analog watchdog mode: single/all channels, regular/injected group.
Kojto	90:cb3d968589d8	185	This parameter can be a value of @ref ADC_analog_watchdog_mode. */
Kojto	90:cb3d968589d8	186	uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog.
Kojto	90:cb3d968589d8	187	This parameter has an effect only if watchdog mode is configured on single channel (parameter WatchdogMode)
Kojto	90:cb3d968589d8	188	This parameter can be a value of @ref ADC_channels. */
Kojto	90:cb3d968589d8	189	uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode.
Kojto	90:cb3d968589d8	190	This parameter can be set to ENABLE or DISABLE */
Kojto	90:cb3d968589d8	191	uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value.
Kojto	90:cb3d968589d8	192	This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
Kojto	90:cb3d968589d8	193	uint32_t LowThreshold; /*!< Configures the ADC analog watchdog High threshold value.
Kojto	90:cb3d968589d8	194	This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
Kojto	90:cb3d968589d8	195	uint32_t WatchdogNumber; /!< Reserved for future use, can be set to 0 /
Kojto	90:cb3d968589d8	196	}ADC_AnalogWDGConfTypeDef;
Kojto	90:cb3d968589d8	197
Kojto	90:cb3d968589d8	198	/**
Kojto	90:cb3d968589d8	199	* @brief HAL ADC state machine: ADC States structure definition
Kojto	90:cb3d968589d8	200	*/
Kojto	90:cb3d968589d8	201	typedef enum
Kojto	90:cb3d968589d8	202	{
Kojto	90:cb3d968589d8	203	HAL_ADC_STATE_RESET = 0x00, /!< ADC not yet initialized or disabled /
Kojto	90:cb3d968589d8	204	HAL_ADC_STATE_READY = 0x01, /!< ADC peripheral ready for use /
Kojto	90:cb3d968589d8	205	HAL_ADC_STATE_BUSY = 0x02, /!< An internal process is ongoing /
Kojto	90:cb3d968589d8	206	HAL_ADC_STATE_BUSY_REG = 0x12, /!< Regular conversion is ongoing /
Kojto	90:cb3d968589d8	207	HAL_ADC_STATE_BUSY_INJ = 0x22, /!< Injected conversion is ongoing /
Kojto	90:cb3d968589d8	208	HAL_ADC_STATE_BUSY_INJ_REG = 0x32, /!< Injected and regular conversion are ongoing /
Kojto	90:cb3d968589d8	209	HAL_ADC_STATE_TIMEOUT = 0x03, /!< Timeout state /
Kojto	90:cb3d968589d8	210	HAL_ADC_STATE_ERROR = 0x04, /!< ADC state error /
Kojto	90:cb3d968589d8	211	HAL_ADC_STATE_EOC = 0x05, /!< Conversion is completed /
Kojto	90:cb3d968589d8	212	HAL_ADC_STATE_EOC_REG = 0x15, /!< Regular conversion is completed /
Kojto	90:cb3d968589d8	213	HAL_ADC_STATE_EOC_INJ = 0x25, /!< Injected conversion is completed /
Kojto	90:cb3d968589d8	214	HAL_ADC_STATE_EOC_INJ_REG = 0x35, /!< Injected and regular conversion are completed /
Kojto	90:cb3d968589d8	215	HAL_ADC_STATE_AWD = 0x06, /!< ADC state analog watchdog /
Kojto	90:cb3d968589d8	216	HAL_ADC_STATE_AWD2 = 0x07, /!< Not used on STM32L1xx devices (kept for compatibility with other devices featuring several AWD) /
Kojto	90:cb3d968589d8	217	HAL_ADC_STATE_AWD3 = 0x08, /!< Not used on STM32l1xx devices (kept for compatibility with other devices featuring several AWD) /
Kojto	90:cb3d968589d8	218	}HAL_ADC_StateTypeDef;
Kojto	90:cb3d968589d8	219
Kojto	90:cb3d968589d8	220	/**
Kojto	90:cb3d968589d8	221	* @brief ADC handle Structure definition
Kojto	90:cb3d968589d8	222	*/
Kojto	90:cb3d968589d8	223	typedef struct
Kojto	90:cb3d968589d8	224	{
Kojto	90:cb3d968589d8	225	ADC_TypeDef Instance; /!< Register base address */
Kojto	90:cb3d968589d8	226
Kojto	90:cb3d968589d8	227	ADC_InitTypeDef Init; /!< ADC required parameters /
Kojto	90:cb3d968589d8	228
Kojto	90:cb3d968589d8	229	__IO uint32_t NbrOfConversionRank ; /!< ADC conversion rank counter /
Kojto	90:cb3d968589d8	230
Kojto	90:cb3d968589d8	231	DMA_HandleTypeDef DMA_Handle; /!< Pointer DMA Handler */
Kojto	90:cb3d968589d8	232
Kojto	90:cb3d968589d8	233	HAL_LockTypeDef Lock; /!< ADC locking object /
Kojto	90:cb3d968589d8	234
Kojto	90:cb3d968589d8	235	__IO HAL_ADC_StateTypeDef State; /!< ADC communication state /
Kojto	90:cb3d968589d8	236
Kojto	90:cb3d968589d8	237	__IO uint32_t ErrorCode; /!< ADC Error code /
Kojto	90:cb3d968589d8	238	}ADC_HandleTypeDef;
Kojto	90:cb3d968589d8	239	/**
Kojto	90:cb3d968589d8	240	* @}
Kojto	90:cb3d968589d8	241	*/
Kojto	90:cb3d968589d8	242
Kojto	90:cb3d968589d8	243
Kojto	90:cb3d968589d8	244
Kojto	90:cb3d968589d8	245	/* Exported constants --------------------------------------------------------*/
Kojto	90:cb3d968589d8	246
Kojto	90:cb3d968589d8	247	/** @defgroup ADC_Exported_Constants ADC Exported Constants
Kojto	90:cb3d968589d8	248	* @{
Kojto	90:cb3d968589d8	249	*/
Kojto	90:cb3d968589d8	250
Kojto	90:cb3d968589d8	251	/** @defgroup ADC_Error_Code ADC Error Code
Kojto	90:cb3d968589d8	252	* @{
Kojto	90:cb3d968589d8	253	*/
Kojto	90:cb3d968589d8	254	#define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /!< No error /
Kojto	90:cb3d968589d8	255	#define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: if problem of clocking,
Kojto	90:cb3d968589d8	256	enable/disable, erroneous state */
Kojto	90:cb3d968589d8	257	#define HAL_ADC_ERROR_OVR ((uint32_t)0x02) /!< Overrun error /
Kojto	90:cb3d968589d8	258	#define HAL_ADC_ERROR_DMA ((uint32_t)0x04) /!< DMA transfer error /
Kojto	90:cb3d968589d8	259
Kojto	90:cb3d968589d8	260	/**
Kojto	90:cb3d968589d8	261	* @}
Kojto	90:cb3d968589d8	262	*/
Kojto	90:cb3d968589d8	263
Kojto	90:cb3d968589d8	264	/** @defgroup ADC_ClockPrescaler ADC ClockPrescaler
Kojto	90:cb3d968589d8	265	* @{
Kojto	90:cb3d968589d8	266	*/
Kojto	90:cb3d968589d8	267	#define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /!< ADC asynchronous clock derived from ADC dedicated HSI without prescaler /
Kojto	90:cb3d968589d8	268	#define ADC_CLOCK_ASYNC_DIV2 ((uint32_t)ADC_CCR_ADCPRE_0) /!< ADC asynchronous clock derived from ADC dedicated HSI divided by a prescaler of 2 /
Kojto	90:cb3d968589d8	269	#define ADC_CLOCK_ASYNC_DIV4 ((uint32_t)ADC_CCR_ADCPRE_1) /!< ADC asynchronous clock derived from ADC dedicated HSI divided by a prescaler of 4 /
Kojto	90:cb3d968589d8	270
Kojto	90:cb3d968589d8	271	#define IS_ADC_CLOCKPRESCALER(ADC_CLOCK) (((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV1) \|\| \
Kojto	90:cb3d968589d8	272	((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV2) \|\| \
Kojto	90:cb3d968589d8	273	((ADC_CLOCK) == ADC_CLOCK_ASYNC_DIV4) )
Kojto	90:cb3d968589d8	274	/**
Kojto	90:cb3d968589d8	275	* @}
Kojto	90:cb3d968589d8	276	*/
Kojto	90:cb3d968589d8	277
Kojto	90:cb3d968589d8	278	/** @defgroup ADC_Resolution ADC Resolution
Kojto	90:cb3d968589d8	279	* @{
Kojto	90:cb3d968589d8	280	*/
Kojto	90:cb3d968589d8	281	#define ADC_RESOLUTION12b ((uint32_t)0x00000000) /!< ADC 12-bit resolution /
Kojto	90:cb3d968589d8	282	#define ADC_RESOLUTION10b ((uint32_t)ADC_CR1_RES_0) /!< ADC 10-bit resolution /
Kojto	90:cb3d968589d8	283	#define ADC_RESOLUTION8b ((uint32_t)ADC_CR1_RES_1) /!< ADC 8-bit resolution /
Kojto	90:cb3d968589d8	284	#define ADC_RESOLUTION6b ((uint32_t)ADC_CR1_RES) /!< ADC 6-bit resolution /
Kojto	90:cb3d968589d8	285
Kojto	90:cb3d968589d8	286	#define IS_ADC_RESOLUTION(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION12b) \|\| \
Kojto	90:cb3d968589d8	287	((RESOLUTION) == ADC_RESOLUTION10b) \|\| \
Kojto	90:cb3d968589d8	288	((RESOLUTION) == ADC_RESOLUTION8b) \|\| \
Kojto	90:cb3d968589d8	289	((RESOLUTION) == ADC_RESOLUTION6b) )
Kojto	90:cb3d968589d8	290
Kojto	90:cb3d968589d8	291	#define IS_ADC_RESOLUTION_8_6_BITS(RESOLUTION) (((RESOLUTION) == ADC_RESOLUTION8b) \|\| \
Kojto	90:cb3d968589d8	292	((RESOLUTION) == ADC_RESOLUTION6b) )
Kojto	90:cb3d968589d8	293	/**
Kojto	90:cb3d968589d8	294	* @}
Kojto	90:cb3d968589d8	295	*/
Kojto	90:cb3d968589d8	296
Kojto	90:cb3d968589d8	297	/** @defgroup ADC_Data_align ADC Data_align
Kojto	90:cb3d968589d8	298	* @{
Kojto	90:cb3d968589d8	299	*/
Kojto	90:cb3d968589d8	300	#define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000)
Kojto	90:cb3d968589d8	301	#define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CR2_ALIGN)
Kojto	90:cb3d968589d8	302
Kojto	90:cb3d968589d8	303	#define IS_ADC_DATA_ALIGN(ALIGN) (((ALIGN) == ADC_DATAALIGN_RIGHT) \|\| \
Kojto	90:cb3d968589d8	304	((ALIGN) == ADC_DATAALIGN_LEFT) )
Kojto	90:cb3d968589d8	305	/**
Kojto	90:cb3d968589d8	306	* @}
Kojto	90:cb3d968589d8	307	*/
Kojto	90:cb3d968589d8	308
Kojto	90:cb3d968589d8	309	/** @defgroup ADC_Scan_mode ADC Scan mode
Kojto	90:cb3d968589d8	310	* @{
Kojto	90:cb3d968589d8	311	*/
Kojto	90:cb3d968589d8	312	#define ADC_SCAN_DISABLE ((uint32_t)0x00000000)
Kojto	90:cb3d968589d8	313	#define ADC_SCAN_ENABLE ((uint32_t)0x00000001)
Kojto	90:cb3d968589d8	314
Kojto	90:cb3d968589d8	315	#define IS_ADC_SCAN_MODE(SCAN_MODE) (((SCAN_MODE) == ADC_SCAN_DISABLE) \|\| \
Kojto	90:cb3d968589d8	316	((SCAN_MODE) == ADC_SCAN_ENABLE) )
Kojto	90:cb3d968589d8	317	/**
Kojto	90:cb3d968589d8	318	* @}
Kojto	90:cb3d968589d8	319	*/
Kojto	90:cb3d968589d8	320
Kojto	90:cb3d968589d8	321	/** @defgroup ADC_External_trigger_edge_Regular ADC External trigger edge Regular
Kojto	90:cb3d968589d8	322	* @{
Kojto	90:cb3d968589d8	323	*/
Kojto	90:cb3d968589d8	324	#define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000)
Kojto	90:cb3d968589d8	325	#define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CR2_EXTEN_0)
Kojto	90:cb3d968589d8	326	#define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CR2_EXTEN_1)
Kojto	90:cb3d968589d8	327	#define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_EXTEN)
Kojto	90:cb3d968589d8	328
Kojto	90:cb3d968589d8	329	#define IS_ADC_EXTTRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGCONVEDGE_NONE) \|\| \
Kojto	90:cb3d968589d8	330	((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISING) \|\| \
Kojto	90:cb3d968589d8	331	((EDGE) == ADC_EXTERNALTRIGCONVEDGE_FALLING) \|\| \
Kojto	90:cb3d968589d8	332	((EDGE) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING) )
Kojto	90:cb3d968589d8	333	/**
Kojto	90:cb3d968589d8	334	* @}
Kojto	90:cb3d968589d8	335	*/
Kojto	90:cb3d968589d8	336
Kojto	90:cb3d968589d8	337	/** @defgroup ADC_External_trigger_source_Regular ADC External trigger source Regular
Kojto	90:cb3d968589d8	338	* @{
Kojto	90:cb3d968589d8	339	*/
Kojto	90:cb3d968589d8	340	/* List of external triggers with generic trigger name, sorted by trigger */
Kojto	90:cb3d968589d8	341	/* name: */
Kojto	90:cb3d968589d8	342
Kojto	90:cb3d968589d8	343	/* External triggers of regular group for ADC1 */
Kojto	90:cb3d968589d8	344	#define ADC_EXTERNALTRIGCONV_T2_CC3 ADC_EXTERNALTRIG_T2_CC3
Kojto	90:cb3d968589d8	345	#define ADC_EXTERNALTRIGCONV_T2_CC2 ADC_EXTERNALTRIG_T2_CC2
Kojto	90:cb3d968589d8	346	#define ADC_EXTERNALTRIGCONV_T2_TRGO ADC_EXTERNALTRIG_T2_TRGO
Kojto	90:cb3d968589d8	347	#define ADC_EXTERNALTRIGCONV_T3_CC1 ADC_EXTERNALTRIG_T3_CC1
Kojto	90:cb3d968589d8	348	#define ADC_EXTERNALTRIGCONV_T3_CC3 ADC_EXTERNALTRIG_T3_CC3
Kojto	90:cb3d968589d8	349	#define ADC_EXTERNALTRIGCONV_T3_TRGO ADC_EXTERNALTRIG_T3_TRGO
Kojto	90:cb3d968589d8	350	#define ADC_EXTERNALTRIGCONV_T4_CC4 ADC_EXTERNALTRIG_T4_CC4
Kojto	90:cb3d968589d8	351	#define ADC_EXTERNALTRIGCONV_T4_TRGO ADC_EXTERNALTRIG_T4_TRGO
Kojto	90:cb3d968589d8	352	#define ADC_EXTERNALTRIGCONV_T6_TRGO ADC_EXTERNALTRIG_T6_TRGO
Kojto	90:cb3d968589d8	353	#define ADC_EXTERNALTRIGCONV_T9_CC2 ADC_EXTERNALTRIG_T9_CC2
Kojto	90:cb3d968589d8	354	#define ADC_EXTERNALTRIGCONV_T9_TRGO ADC_EXTERNALTRIG_T9_TRGO
Kojto	90:cb3d968589d8	355	#define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC_EXTERNALTRIG_EXT_IT11
Kojto	90:cb3d968589d8	356
Kojto	90:cb3d968589d8	357	#define ADC_SOFTWARE_START ((uint32_t)0x00000010)
Kojto	90:cb3d968589d8	358
Kojto	90:cb3d968589d8	359	#define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) \|\| \
Kojto	90:cb3d968589d8	360	((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) \|\| \
Kojto	90:cb3d968589d8	361	((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_TRGO) \|\| \
Kojto	90:cb3d968589d8	362	((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) \|\| \
Kojto	90:cb3d968589d8	363	((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC3) \|\| \
Kojto	90:cb3d968589d8	364	((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) \|\| \
Kojto	90:cb3d968589d8	365	((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) \|\| \
Kojto	90:cb3d968589d8	366	((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_TRGO) \|\| \
Kojto	90:cb3d968589d8	367	((REGTRIG) == ADC_EXTERNALTRIGCONV_T6_TRGO) \|\| \
Kojto	90:cb3d968589d8	368	((REGTRIG) == ADC_EXTERNALTRIGCONV_T9_CC2) \|\| \
Kojto	90:cb3d968589d8	369	((REGTRIG) == ADC_EXTERNALTRIGCONV_T9_TRGO) \|\| \
Kojto	90:cb3d968589d8	370	((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) \|\| \
Kojto	90:cb3d968589d8	371	((REGTRIG) == ADC_SOFTWARE_START) )
Kojto	90:cb3d968589d8	372	/**
Kojto	90:cb3d968589d8	373	* @}
Kojto	90:cb3d968589d8	374	*/
Kojto	90:cb3d968589d8	375
Kojto	90:cb3d968589d8	376	/** @defgroup ADC_Internal_HAL_driver_Ext_trig_src_Regular ADC Internal HAL driver Ext trig src Regular
Kojto	90:cb3d968589d8	377	* @{
Kojto	90:cb3d968589d8	378	*/
Kojto	90:cb3d968589d8	379
Kojto	90:cb3d968589d8	380	/* List of external triggers of regular group for ADC1: */
Kojto	90:cb3d968589d8	381	/* (used internally by HAL driver. To not use into HAL structure parameters) */
Kojto	90:cb3d968589d8	382
Kojto	90:cb3d968589d8	383	/* External triggers of regular group for ADC1 */
Kojto	90:cb3d968589d8	384	#define ADC_EXTERNALTRIG_T9_CC2 ((uint32_t) 0x00000000)
Kojto	90:cb3d968589d8	385	#define ADC_EXTERNALTRIG_T9_TRGO ((uint32_t)( ADC_CR2_EXTSEL_0))
Kojto	90:cb3d968589d8	386	#define ADC_EXTERNALTRIG_T2_CC3 ((uint32_t)( ADC_CR2_EXTSEL_1 ))
Kojto	90:cb3d968589d8	387	#define ADC_EXTERNALTRIG_T2_CC2 ((uint32_t)( ADC_CR2_EXTSEL_1 \| ADC_CR2_EXTSEL_0))
Kojto	90:cb3d968589d8	388	#define ADC_EXTERNALTRIG_T3_TRGO ((uint32_t)( ADC_CR2_EXTSEL_2 ))
Kojto	90:cb3d968589d8	389	#define ADC_EXTERNALTRIG_T4_CC4 ((uint32_t)( ADC_CR2_EXTSEL_2 \| ADC_CR2_EXTSEL_0))
Kojto	90:cb3d968589d8	390	#define ADC_EXTERNALTRIG_T2_TRGO ((uint32_t)( ADC_CR2_EXTSEL_2 \| ADC_CR2_EXTSEL_1 ))
Kojto	90:cb3d968589d8	391	#define ADC_EXTERNALTRIG_T3_CC1 ((uint32_t)( ADC_CR2_EXTSEL_2 \| ADC_CR2_EXTSEL_1 \| ADC_CR2_EXTSEL_0))
Kojto	90:cb3d968589d8	392	#define ADC_EXTERNALTRIG_T3_CC3 ((uint32_t)(ADC_CR2_EXTSEL_3 ))
Kojto	90:cb3d968589d8	393	#define ADC_EXTERNALTRIG_T4_TRGO ((uint32_t)(ADC_CR2_EXTSEL_3 \| ADC_CR2_EXTSEL_0))
Kojto	90:cb3d968589d8	394	#define ADC_EXTERNALTRIG_T6_TRGO ((uint32_t)(ADC_CR2_EXTSEL_3 \| ADC_CR2_EXTSEL_1 ))
Kojto	90:cb3d968589d8	395	#define ADC_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CR2_EXTSEL_3 \| ADC_CR2_EXTSEL_2 \| ADC_CR2_EXTSEL_1 \| ADC_CR2_EXTSEL_0))
Kojto	90:cb3d968589d8	396
Kojto	90:cb3d968589d8	397	/**
Kojto	90:cb3d968589d8	398	* @}
Kojto	90:cb3d968589d8	399	*/
Kojto	90:cb3d968589d8	400
Kojto	90:cb3d968589d8	401	/** @defgroup ADC_EOCSelection ADC EOCSelection
Kojto	90:cb3d968589d8	402	* @{
Kojto	90:cb3d968589d8	403	*/
Kojto	90:cb3d968589d8	404	#define EOC_SEQ_CONV ((uint32_t)0x00000000)
Kojto	90:cb3d968589d8	405	#define EOC_SINGLE_CONV ((uint32_t)ADC_CR2_EOCS)
Kojto	90:cb3d968589d8	406
Kojto	90:cb3d968589d8	407	#define IS_ADC_EOC_SELECTION(EOC_SELECTION) (((EOC_SELECTION) == EOC_SINGLE_CONV) \|\| \
Kojto	90:cb3d968589d8	408	((EOC_SELECTION) == EOC_SEQ_CONV) )
Kojto	90:cb3d968589d8	409	/**
Kojto	90:cb3d968589d8	410	* @}
Kojto	90:cb3d968589d8	411	*/
Kojto	90:cb3d968589d8	412
Kojto	90:cb3d968589d8	413	/** @defgroup ADC_LowPowerAutoWait ADC LowPowerAutoWait
Kojto	90:cb3d968589d8	414	* @{
Kojto	90:cb3d968589d8	415	*/
Kojto	90:cb3d968589d8	416	/!< Note : For compatibility with other STM32 devices with ADC autowait /
Kojto	90:cb3d968589d8	417	/* feature limited to enable or disable settings: */
Kojto	90:cb3d968589d8	418	/* Setting "ADC_AUTOWAIT_UNTIL_DATA_READ" is equivalent to "ENABLE". */
Kojto	90:cb3d968589d8	419
Kojto	90:cb3d968589d8	420	#define ADC_AUTOWAIT_DISABLE ((uint32_t)0x00000000)
Kojto	90:cb3d968589d8	421	#define ADC_AUTOWAIT_UNTIL_DATA_READ ((uint32_t)( ADC_CR2_DELS_0)) /!< Insert a delay between ADC conversions: infinite delay, until the result of previous conversion is read /
Kojto	90:cb3d968589d8	422	#define ADC_AUTOWAIT_7_APBCLOCKCYCLES ((uint32_t)( ADC_CR2_DELS_1 )) /!< Insert a delay between ADC conversions: 7 APB clock cycles /
Kojto	90:cb3d968589d8	423	#define ADC_AUTOWAIT_15_APBCLOCKCYCLES ((uint32_t)( ADC_CR2_DELS_1 \| ADC_CR2_DELS_0)) /!< Insert a delay between ADC conversions: 15 APB clock cycles /
Kojto	90:cb3d968589d8	424	#define ADC_AUTOWAIT_31_APBCLOCKCYCLES ((uint32_t)(ADC_CR2_DELS_2 )) /!< Insert a delay between ADC conversions: 31 APB clock cycles /
Kojto	90:cb3d968589d8	425	#define ADC_AUTOWAIT_63_APBCLOCKCYCLES ((uint32_t)(ADC_CR2_DELS_2 \| ADC_CR2_DELS_0)) /!< Insert a delay between ADC conversions: 63 APB clock cycles /
Kojto	90:cb3d968589d8	426	#define ADC_AUTOWAIT_127_APBCLOCKCYCLES ((uint32_t)(ADC_CR2_DELS_2 \| ADC_CR2_DELS_1 )) /!< Insert a delay between ADC conversions: 127 APB clock cycles /
Kojto	90:cb3d968589d8	427	#define ADC_AUTOWAIT_255_APBCLOCKCYCLES ((uint32_t)(ADC_CR2_DELS_2 \| ADC_CR2_DELS_1 \| ADC_CR2_DELS_0)) /!< Insert a delay between ADC conversions: 255 APB clock cycles /
Kojto	90:cb3d968589d8	428
Kojto	90:cb3d968589d8	429	#define IS_ADC_AUTOWAIT(AUTOWAIT) (((AUTOWAIT) == ADC_AUTOWAIT_DISABLE) \|\| \
Kojto	90:cb3d968589d8	430	((AUTOWAIT) == ADC_AUTOWAIT_UNTIL_DATA_READ) \|\| \
Kojto	90:cb3d968589d8	431	((AUTOWAIT) == ADC_AUTOWAIT_7_APBCLOCKCYCLES) \|\| \
Kojto	90:cb3d968589d8	432	((AUTOWAIT) == ADC_AUTOWAIT_15_APBCLOCKCYCLES) \|\| \
Kojto	90:cb3d968589d8	433	((AUTOWAIT) == ADC_AUTOWAIT_31_APBCLOCKCYCLES) \|\| \
Kojto	90:cb3d968589d8	434	((AUTOWAIT) == ADC_AUTOWAIT_63_APBCLOCKCYCLES) \|\| \
Kojto	90:cb3d968589d8	435	((AUTOWAIT) == ADC_AUTOWAIT_127_APBCLOCKCYCLES) \|\| \
Kojto	90:cb3d968589d8	436	((AUTOWAIT) == ADC_AUTOWAIT_255_APBCLOCKCYCLES) )
Kojto	90:cb3d968589d8	437	/**
Kojto	90:cb3d968589d8	438	* @}
Kojto	90:cb3d968589d8	439	*/
Kojto	90:cb3d968589d8	440
Kojto	90:cb3d968589d8	441	/** @defgroup ADC_LowPowerAutoPowerOff ADC LowPowerAutoPowerOff
Kojto	90:cb3d968589d8	442	* @{
Kojto	90:cb3d968589d8	443	*/
Kojto	90:cb3d968589d8	444	#define ADC_AUTOPOWEROFF_DISABLE ((uint32_t)0x00000000)
Kojto	90:cb3d968589d8	445	#define ADC_AUTOPOWEROFF_IDLE_PHASE ((uint32_t)ADC_CR1_PDI) /!< ADC power off when ADC is not converting (idle phase) /
Kojto	90:cb3d968589d8	446	#define ADC_AUTOPOWEROFF_DELAY_PHASE ((uint32_t)ADC_CR1_PDD) /!< ADC power off when a delay is inserted between conversions (see parameter ADC_LowPowerAutoWait) /
Kojto	90:cb3d968589d8	447	#define ADC_AUTOPOWEROFF_IDLE_DELAY_PHASES ((uint32_t)(ADC_CR1_PDI \| ADC_CR1_PDD)) /!< ADC power off when ADC is not converting (idle phase) and when a delay is inserted between conversions /
Kojto	90:cb3d968589d8	448
Kojto	90:cb3d968589d8	449	#define IS_ADC_AUTOPOWEROFF(AUTOPOWEROFF) (((AUTOPOWEROFF) == ADC_AUTOPOWEROFF_DISABLE) \|\| \
Kojto	90:cb3d968589d8	450	((AUTOPOWEROFF) == ADC_AUTOPOWEROFF_IDLE_PHASE) \|\| \
Kojto	90:cb3d968589d8	451	((AUTOPOWEROFF) == ADC_AUTOPOWEROFF_DELAY_PHASE) \|\| \
Kojto	90:cb3d968589d8	452	((AUTOPOWEROFF) == ADC_AUTOPOWEROFF_IDLE_DELAY_PHASES) )
Kojto	90:cb3d968589d8	453	/**
Kojto	90:cb3d968589d8	454	* @}
Kojto	90:cb3d968589d8	455	*/
Kojto	90:cb3d968589d8	456
Kojto	90:cb3d968589d8	457
Kojto	90:cb3d968589d8	458	/** @defgroup ADC_ChannelsBank ADC ChannelsBank
Kojto	90:cb3d968589d8	459	* @{
Kojto	90:cb3d968589d8	460	*/
Kojto	90:cb3d968589d8	461	#if defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	462	#define ADC_CHANNELS_BANK_A ((uint32_t)0x00000000)
Kojto	90:cb3d968589d8	463	#define ADC_CHANNELS_BANK_B ((uint32_t)ADC_CR2_CFG)
Kojto	90:cb3d968589d8	464
Kojto	90:cb3d968589d8	465	#define IS_ADC_CHANNELSBANK(BANK) (((BANK) == ADC_CHANNELS_BANK_A) \|\| \
Kojto	90:cb3d968589d8	466	((BANK) == ADC_CHANNELS_BANK_B) )
Kojto	90:cb3d968589d8	467	#else
Kojto	90:cb3d968589d8	468	#define ADC_CHANNELS_BANK_A ((uint32_t)0x00000000)
Kojto	90:cb3d968589d8	469
Kojto	90:cb3d968589d8	470	#define IS_ADC_CHANNELSBANK(BANK) (((BANK) == ADC_CHANNELS_BANK_A))
Kojto	90:cb3d968589d8	471	#endif /* STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L152xE \|\| STM32L162xE */
Kojto	90:cb3d968589d8	472	/**
Kojto	90:cb3d968589d8	473	* @}
Kojto	90:cb3d968589d8	474	*/
Kojto	90:cb3d968589d8	475
Kojto	90:cb3d968589d8	476	/** @defgroup ADC_channels ADC channels
Kojto	90:cb3d968589d8	477	* @{
Kojto	90:cb3d968589d8	478	*/
Kojto	90:cb3d968589d8	479	/* Note: Depending on devices, some channels may not be available on package */
Kojto	90:cb3d968589d8	480	/* pins. Refer to device datasheet for channels availability. */
Kojto	90:cb3d968589d8	481	#define ADC_CHANNEL_0 ((uint32_t)0x00000000) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	482	#define ADC_CHANNEL_1 ((uint32_t)( ADC_SQR5_SQ1_0)) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	483	#define ADC_CHANNEL_2 ((uint32_t)( ADC_SQR5_SQ1_1 )) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	484	#define ADC_CHANNEL_3 ((uint32_t)( ADC_SQR5_SQ1_1 \| ADC_SQR5_SQ1_0)) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	485	#define ADC_CHANNEL_4 ((uint32_t)( ADC_SQR5_SQ1_2 )) /* Direct (fast) channel */
Kojto	90:cb3d968589d8	486	#define ADC_CHANNEL_5 ((uint32_t)( ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_0)) /* Direct (fast) channel */
Kojto	90:cb3d968589d8	487	#define ADC_CHANNEL_6 ((uint32_t)( ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_1 )) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	488	#define ADC_CHANNEL_7 ((uint32_t)( ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_1 \| ADC_SQR5_SQ1_0)) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	489	#define ADC_CHANNEL_8 ((uint32_t)( ADC_SQR5_SQ1_3 )) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	490	#define ADC_CHANNEL_9 ((uint32_t)( ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_0)) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	491	#define ADC_CHANNEL_10 ((uint32_t)( ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_1 )) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	492	#define ADC_CHANNEL_11 ((uint32_t)( ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_1 \| ADC_SQR5_SQ1_0)) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	493	#define ADC_CHANNEL_12 ((uint32_t)( ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_2 )) /* Channel different in bank A and bank B */
Kojto	90:cb3d968589d8	494	#define ADC_CHANNEL_13 ((uint32_t)( ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_0)) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	495	#define ADC_CHANNEL_14 ((uint32_t)( ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_1 )) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	496	#define ADC_CHANNEL_15 ((uint32_t)( ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_1 \| ADC_SQR5_SQ1_0)) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	497	#define ADC_CHANNEL_16 ((uint32_t)(ADC_SQR5_SQ1_4 )) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	498	#define ADC_CHANNEL_17 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_0)) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	499	#define ADC_CHANNEL_18 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_1 )) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	500	#define ADC_CHANNEL_19 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_1 \| ADC_SQR5_SQ1_0)) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	501	#define ADC_CHANNEL_20 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_2 )) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	502	#define ADC_CHANNEL_21 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_0)) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	503	#define ADC_CHANNEL_22 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_1 )) /* Direct (fast) channel */
Kojto	90:cb3d968589d8	504	#define ADC_CHANNEL_23 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_1 \| ADC_SQR5_SQ1_0)) /* Direct (fast) channel */
Kojto	90:cb3d968589d8	505	#define ADC_CHANNEL_24 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_3 )) /* Direct (fast) channel */
Kojto	90:cb3d968589d8	506	#define ADC_CHANNEL_25 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_0)) /* Direct (fast) channel */
Kojto	90:cb3d968589d8	507	#define ADC_CHANNEL_26 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_1 )) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	508	#if defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	509	#define ADC_CHANNEL_27 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_1 \| ADC_SQR5_SQ1_0)) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	510	#define ADC_CHANNEL_28 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_2 )) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	511	#define ADC_CHANNEL_29 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_0)) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	512	#define ADC_CHANNEL_30 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_1 )) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	513	#define ADC_CHANNEL_31 ((uint32_t)(ADC_SQR5_SQ1_4 \| ADC_SQR5_SQ1_3 \| ADC_SQR5_SQ1_2 \| ADC_SQR5_SQ1_1 \| ADC_SQR5_SQ1_0)) /* Channel common to both bank A and bank B */
Kojto	90:cb3d968589d8	514	#endif /* STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L152xE \|\| STM32L162xE */
Kojto	90:cb3d968589d8	515
Kojto	90:cb3d968589d8	516	#define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_16 /* ADC internal channel (no connection on device pin). Channel common to both bank A and bank B. */
Kojto	90:cb3d968589d8	517	#define ADC_CHANNEL_VREFINT ADC_CHANNEL_17 /* ADC internal channel (no connection on device pin). Channel common to both bank A and bank B. */
Kojto	90:cb3d968589d8	518	#define ADC_CHANNEL_VCOMP ADC_CHANNEL_26 /* ADC internal channel (no connection on device pin). Channel common to both bank A and bank B. */
Kojto	90:cb3d968589d8	519
Kojto	90:cb3d968589d8	520	#if defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	521	#define ADC_CHANNEL_VOPAMP1 ADC_CHANNEL_3 /* Internal connection from OPAMP1 output to ADC switch matrix */
Kojto	90:cb3d968589d8	522	#define ADC_CHANNEL_VOPAMP2 ADC_CHANNEL_8 /* Internal connection from OPAMP2 output to ADC switch matrix */
Kojto	90:cb3d968589d8	523	#if defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD)
Kojto	90:cb3d968589d8	524	#define ADC_CHANNEL_VOPAMP3 ADC_CHANNEL_13 /* Internal connection from OPAMP3 output to ADC switch matrix */
Kojto	90:cb3d968589d8	525	#endif /* STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD */
Kojto	90:cb3d968589d8	526	#endif /* STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L152xE \|\| STM32L162xE */
Kojto	90:cb3d968589d8	527
Kojto	90:cb3d968589d8	528	#if defined(STM32L100xB) \|\| defined (STM32L151xB) \|\| defined (STM32L152xB) \|\| defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC)
Kojto	90:cb3d968589d8	529	#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) \|\| \
Kojto	90:cb3d968589d8	530	((CHANNEL) == ADC_CHANNEL_1) \|\| \
Kojto	90:cb3d968589d8	531	((CHANNEL) == ADC_CHANNEL_2) \|\| \
Kojto	90:cb3d968589d8	532	((CHANNEL) == ADC_CHANNEL_3) \|\| \
Kojto	90:cb3d968589d8	533	((CHANNEL) == ADC_CHANNEL_4) \|\| \
Kojto	90:cb3d968589d8	534	((CHANNEL) == ADC_CHANNEL_5) \|\| \
Kojto	90:cb3d968589d8	535	((CHANNEL) == ADC_CHANNEL_6) \|\| \
Kojto	90:cb3d968589d8	536	((CHANNEL) == ADC_CHANNEL_7) \|\| \
Kojto	90:cb3d968589d8	537	((CHANNEL) == ADC_CHANNEL_8) \|\| \
Kojto	90:cb3d968589d8	538	((CHANNEL) == ADC_CHANNEL_9) \|\| \
Kojto	90:cb3d968589d8	539	((CHANNEL) == ADC_CHANNEL_10) \|\| \
Kojto	90:cb3d968589d8	540	((CHANNEL) == ADC_CHANNEL_11) \|\| \
Kojto	90:cb3d968589d8	541	((CHANNEL) == ADC_CHANNEL_12) \|\| \
Kojto	90:cb3d968589d8	542	((CHANNEL) == ADC_CHANNEL_13) \|\| \
Kojto	90:cb3d968589d8	543	((CHANNEL) == ADC_CHANNEL_14) \|\| \
Kojto	90:cb3d968589d8	544	((CHANNEL) == ADC_CHANNEL_15) \|\| \
Kojto	90:cb3d968589d8	545	((CHANNEL) == ADC_CHANNEL_16) \|\| \
Kojto	90:cb3d968589d8	546	((CHANNEL) == ADC_CHANNEL_17) \|\| \
Kojto	90:cb3d968589d8	547	((CHANNEL) == ADC_CHANNEL_18) \|\| \
Kojto	90:cb3d968589d8	548	((CHANNEL) == ADC_CHANNEL_19) \|\| \
Kojto	90:cb3d968589d8	549	((CHANNEL) == ADC_CHANNEL_20) \|\| \
Kojto	90:cb3d968589d8	550	((CHANNEL) == ADC_CHANNEL_21) \|\| \
Kojto	90:cb3d968589d8	551	((CHANNEL) == ADC_CHANNEL_22) \|\| \
Kojto	90:cb3d968589d8	552	((CHANNEL) == ADC_CHANNEL_23) \|\| \
Kojto	90:cb3d968589d8	553	((CHANNEL) == ADC_CHANNEL_24) \|\| \
Kojto	90:cb3d968589d8	554	((CHANNEL) == ADC_CHANNEL_25) \|\| \
Kojto	90:cb3d968589d8	555	((CHANNEL) == ADC_CHANNEL_26) )
Kojto	90:cb3d968589d8	556	#endif /* STM32L100xB \|\| STM32L151xB \|\| STM32L152xB \|\| STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC */
Kojto	90:cb3d968589d8	557	#if defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	558	#define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) == ADC_CHANNEL_0) \|\| \
Kojto	90:cb3d968589d8	559	((CHANNEL) == ADC_CHANNEL_1) \|\| \
Kojto	90:cb3d968589d8	560	((CHANNEL) == ADC_CHANNEL_2) \|\| \
Kojto	90:cb3d968589d8	561	((CHANNEL) == ADC_CHANNEL_3) \|\| \
Kojto	90:cb3d968589d8	562	((CHANNEL) == ADC_CHANNEL_4) \|\| \
Kojto	90:cb3d968589d8	563	((CHANNEL) == ADC_CHANNEL_5) \|\| \
Kojto	90:cb3d968589d8	564	((CHANNEL) == ADC_CHANNEL_6) \|\| \
Kojto	90:cb3d968589d8	565	((CHANNEL) == ADC_CHANNEL_7) \|\| \
Kojto	90:cb3d968589d8	566	((CHANNEL) == ADC_CHANNEL_8) \|\| \
Kojto	90:cb3d968589d8	567	((CHANNEL) == ADC_CHANNEL_9) \|\| \
Kojto	90:cb3d968589d8	568	((CHANNEL) == ADC_CHANNEL_10) \|\| \
Kojto	90:cb3d968589d8	569	((CHANNEL) == ADC_CHANNEL_11) \|\| \
Kojto	90:cb3d968589d8	570	((CHANNEL) == ADC_CHANNEL_12) \|\| \
Kojto	90:cb3d968589d8	571	((CHANNEL) == ADC_CHANNEL_13) \|\| \
Kojto	90:cb3d968589d8	572	((CHANNEL) == ADC_CHANNEL_14) \|\| \
Kojto	90:cb3d968589d8	573	((CHANNEL) == ADC_CHANNEL_15) \|\| \
Kojto	90:cb3d968589d8	574	((CHANNEL) == ADC_CHANNEL_16) \|\| \
Kojto	90:cb3d968589d8	575	((CHANNEL) == ADC_CHANNEL_17) \|\| \
Kojto	90:cb3d968589d8	576	((CHANNEL) == ADC_CHANNEL_18) \|\| \
Kojto	90:cb3d968589d8	577	((CHANNEL) == ADC_CHANNEL_19) \|\| \
Kojto	90:cb3d968589d8	578	((CHANNEL) == ADC_CHANNEL_20) \|\| \
Kojto	90:cb3d968589d8	579	((CHANNEL) == ADC_CHANNEL_21) \|\| \
Kojto	90:cb3d968589d8	580	((CHANNEL) == ADC_CHANNEL_22) \|\| \
Kojto	90:cb3d968589d8	581	((CHANNEL) == ADC_CHANNEL_23) \|\| \
Kojto	90:cb3d968589d8	582	((CHANNEL) == ADC_CHANNEL_24) \|\| \
Kojto	90:cb3d968589d8	583	((CHANNEL) == ADC_CHANNEL_25) \|\| \
Kojto	90:cb3d968589d8	584	((CHANNEL) == ADC_CHANNEL_26) \|\| \
Kojto	90:cb3d968589d8	585	((CHANNEL) == ADC_CHANNEL_27) \|\| \
Kojto	90:cb3d968589d8	586	((CHANNEL) == ADC_CHANNEL_28) \|\| \
Kojto	90:cb3d968589d8	587	((CHANNEL) == ADC_CHANNEL_29) \|\| \
Kojto	90:cb3d968589d8	588	((CHANNEL) == ADC_CHANNEL_30) \|\| \
Kojto	90:cb3d968589d8	589	((CHANNEL) == ADC_CHANNEL_31) )
Kojto	90:cb3d968589d8	590	#endif /* STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L152xE \|\| STM32L162xE */
Kojto	90:cb3d968589d8	591	/**
Kojto	90:cb3d968589d8	592	* @}
Kojto	90:cb3d968589d8	593	*/
Kojto	90:cb3d968589d8	594
Kojto	90:cb3d968589d8	595	/** @defgroup ADC_sampling_times ADC sampling times
Kojto	90:cb3d968589d8	596	* @{
Kojto	90:cb3d968589d8	597	*/
Kojto	90:cb3d968589d8	598	#define ADC_SAMPLETIME_4CYCLES ((uint32_t)0x00000000) /!< Sampling time 4 ADC clock cycles /
Kojto	90:cb3d968589d8	599	#define ADC_SAMPLETIME_9CYCLES ((uint32_t) ADC_SMPR3_SMP0_0) /!< Sampling time 9 ADC clock cycles /
Kojto	90:cb3d968589d8	600	#define ADC_SAMPLETIME_16CYCLES ((uint32_t) ADC_SMPR3_SMP0_1) /!< Sampling time 16 ADC clock cycles /
Kojto	90:cb3d968589d8	601	#define ADC_SAMPLETIME_24CYCLES ((uint32_t)(ADC_SMPR3_SMP0_1 \| ADC_SMPR3_SMP0_0)) /!< Sampling time 24 ADC clock cycles /
Kojto	90:cb3d968589d8	602	#define ADC_SAMPLETIME_48CYCLES ((uint32_t) ADC_SMPR3_SMP0_2) /!< Sampling time 48 ADC clock cycles /
Kojto	90:cb3d968589d8	603	#define ADC_SAMPLETIME_96CYCLES ((uint32_t)(ADC_SMPR3_SMP0_2 \| ADC_SMPR3_SMP0_0)) /!< Sampling time 96 ADC clock cycles /
Kojto	90:cb3d968589d8	604	#define ADC_SAMPLETIME_192CYCLES ((uint32_t)(ADC_SMPR3_SMP0_2 \| ADC_SMPR3_SMP0_1)) /!< Sampling time 192 ADC clock cycles /
Kojto	90:cb3d968589d8	605	#define ADC_SAMPLETIME_384CYCLES ((uint32_t) ADC_SMPR3_SMP0) /!< Sampling time 384 ADC clock cycles /
Kojto	90:cb3d968589d8	606
Kojto	90:cb3d968589d8	607	#define IS_ADC_SAMPLE_TIME(TIME) (((TIME) == ADC_SAMPLETIME_4CYCLES) \|\| \
Kojto	90:cb3d968589d8	608	((TIME) == ADC_SAMPLETIME_9CYCLES) \|\| \
Kojto	90:cb3d968589d8	609	((TIME) == ADC_SAMPLETIME_16CYCLES) \|\| \
Kojto	90:cb3d968589d8	610	((TIME) == ADC_SAMPLETIME_24CYCLES) \|\| \
Kojto	90:cb3d968589d8	611	((TIME) == ADC_SAMPLETIME_48CYCLES) \|\| \
Kojto	90:cb3d968589d8	612	((TIME) == ADC_SAMPLETIME_96CYCLES) \|\| \
Kojto	90:cb3d968589d8	613	((TIME) == ADC_SAMPLETIME_192CYCLES) \|\| \
Kojto	90:cb3d968589d8	614	((TIME) == ADC_SAMPLETIME_384CYCLES) )
Kojto	90:cb3d968589d8	615	/**
Kojto	90:cb3d968589d8	616	* @}
Kojto	90:cb3d968589d8	617	*/
Kojto	90:cb3d968589d8	618
Kojto	90:cb3d968589d8	619	/** @defgroup ADC_sampling_times_all_channels ADC sampling times all channels
Kojto	90:cb3d968589d8	620	* @{
Kojto	90:cb3d968589d8	621	*/
Kojto	90:cb3d968589d8	622	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR3BIT2 \
Kojto	90:cb3d968589d8	623	(ADC_SMPR3_SMP9_2 \| ADC_SMPR3_SMP8_2 \| ADC_SMPR3_SMP7_2 \| ADC_SMPR3_SMP6_2 \| \
Kojto	90:cb3d968589d8	624	ADC_SMPR3_SMP5_2 \| ADC_SMPR3_SMP4_2 \| ADC_SMPR3_SMP3_2 \| ADC_SMPR3_SMP2_2 \| \
Kojto	90:cb3d968589d8	625	ADC_SMPR3_SMP1_2 \| ADC_SMPR3_SMP0_2)
Kojto	90:cb3d968589d8	626	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT2 \
Kojto	90:cb3d968589d8	627	(ADC_SMPR2_SMP19_2 \| ADC_SMPR2_SMP18_2 \| ADC_SMPR2_SMP17_2 \| ADC_SMPR2_SMP16_2 \| \
Kojto	90:cb3d968589d8	628	ADC_SMPR2_SMP15_2 \| ADC_SMPR2_SMP14_2 \| ADC_SMPR2_SMP13_2 \| ADC_SMPR2_SMP12_2 \| \
Kojto	90:cb3d968589d8	629	ADC_SMPR2_SMP11_2 \| ADC_SMPR2_SMP10_2)
Kojto	90:cb3d968589d8	630	#if defined(STM32L100xB) \|\| defined (STM32L151xB) \|\| defined (STM32L152xB) \|\| defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC)
Kojto	90:cb3d968589d8	631	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2 \
Kojto	90:cb3d968589d8	632	(ADC_SMPR1_SMP26_2 \| ADC_SMPR1_SMP25_2 \| ADC_SMPR1_SMP24_2 \| ADC_SMPR1_SMP23_2 \| \
Kojto	90:cb3d968589d8	633	ADC_SMPR1_SMP22_2 \| ADC_SMPR1_SMP21_2 \| ADC_SMPR1_SMP20_2)
Kojto	90:cb3d968589d8	634	#endif /* STM32L100xB \|\| STM32L151xB \|\| STM32L152xB \|\| STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC */
Kojto	90:cb3d968589d8	635	#if defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	636	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT2 \
Kojto	90:cb3d968589d8	637	(ADC_SMPR1_SMP29_2 \| ADC_SMPR1_SMP28_2 \| ADC_SMPR1_SMP27_2 \| ADC_SMPR1_SMP26_2 \| \
Kojto	90:cb3d968589d8	638	ADC_SMPR1_SMP25_2 \| ADC_SMPR1_SMP24_2 \| ADC_SMPR1_SMP23_2 \| ADC_SMPR1_SMP22_2 \| \
Kojto	90:cb3d968589d8	639	ADC_SMPR1_SMP21_2 \| ADC_SMPR1_SMP20_2)
Kojto	90:cb3d968589d8	640	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR0BIT2 \
Kojto	90:cb3d968589d8	641	(ADC_SMPR0_SMP31_2 \| ADC_SMPR0_SMP30_2 )
Kojto	90:cb3d968589d8	642	#endif /* STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L152xE \|\| STM32L162xE */
Kojto	90:cb3d968589d8	643
Kojto	90:cb3d968589d8	644	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR3BIT1 \
Kojto	90:cb3d968589d8	645	(ADC_SMPR3_SMP9_1 \| ADC_SMPR3_SMP8_1 \| ADC_SMPR3_SMP7_1 \| ADC_SMPR3_SMP6_1 \| \
Kojto	90:cb3d968589d8	646	ADC_SMPR3_SMP5_1 \| ADC_SMPR3_SMP4_1 \| ADC_SMPR3_SMP3_1 \| ADC_SMPR3_SMP2_1 \| \
Kojto	90:cb3d968589d8	647	ADC_SMPR3_SMP1_1 \| ADC_SMPR3_SMP0_1)
Kojto	90:cb3d968589d8	648	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT1 \
Kojto	90:cb3d968589d8	649	(ADC_SMPR2_SMP19_1 \| ADC_SMPR2_SMP18_1 \| ADC_SMPR2_SMP17_1 \| ADC_SMPR2_SMP16_1 \| \
Kojto	90:cb3d968589d8	650	ADC_SMPR2_SMP15_1 \| ADC_SMPR2_SMP14_1 \| ADC_SMPR2_SMP13_1 \| ADC_SMPR2_SMP12_1 \| \
Kojto	90:cb3d968589d8	651	ADC_SMPR2_SMP11_1 \| ADC_SMPR2_SMP10_1)
Kojto	90:cb3d968589d8	652	#if defined(STM32L100xB) \|\| defined (STM32L151xB) \|\| defined (STM32L152xB) \|\| defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC)
Kojto	90:cb3d968589d8	653	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT1 \
Kojto	90:cb3d968589d8	654	(ADC_SMPR1_SMP26_1 \| ADC_SMPR1_SMP25_1 \| ADC_SMPR1_SMP24_1 \| ADC_SMPR1_SMP23_1 \| \
Kojto	90:cb3d968589d8	655	ADC_SMPR1_SMP22_1 \| ADC_SMPR1_SMP21_1 \| ADC_SMPR1_SMP20_1)
Kojto	90:cb3d968589d8	656	#endif /* STM32L100xB \|\| STM32L151xB \|\| STM32L152xB \|\| STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC */
Kojto	90:cb3d968589d8	657	#if defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	658	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT1 \
Kojto	90:cb3d968589d8	659	(ADC_SMPR1_SMP29_1 \| ADC_SMPR1_SMP28_1 \| ADC_SMPR1_SMP27_1 \| ADC_SMPR1_SMP26_1 \| \
Kojto	90:cb3d968589d8	660	ADC_SMPR1_SMP25_1 \| ADC_SMPR1_SMP24_1 \| ADC_SMPR1_SMP23_1 \| ADC_SMPR1_SMP22_1 \| \
Kojto	90:cb3d968589d8	661	ADC_SMPR1_SMP21_1 \| ADC_SMPR1_SMP20_1)
Kojto	90:cb3d968589d8	662	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR0BIT1 \
Kojto	90:cb3d968589d8	663	(ADC_SMPR0_SMP31_1 \| ADC_SMPR0_SMP30_1 )
Kojto	90:cb3d968589d8	664	#endif /* STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L152xE \|\| STM32L162xE */
Kojto	90:cb3d968589d8	665
Kojto	90:cb3d968589d8	666	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR3BIT0 \
Kojto	90:cb3d968589d8	667	(ADC_SMPR3_SMP9_0 \| ADC_SMPR3_SMP8_0 \| ADC_SMPR3_SMP7_0 \| ADC_SMPR3_SMP6_0 \| \
Kojto	90:cb3d968589d8	668	ADC_SMPR3_SMP5_0 \| ADC_SMPR3_SMP4_0 \| ADC_SMPR3_SMP3_0 \| ADC_SMPR3_SMP2_0 \| \
Kojto	90:cb3d968589d8	669	ADC_SMPR3_SMP1_0 \| ADC_SMPR3_SMP0_0)
Kojto	90:cb3d968589d8	670	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR2BIT0 \
Kojto	90:cb3d968589d8	671	(ADC_SMPR2_SMP19_0 \| ADC_SMPR2_SMP18_0 \| ADC_SMPR2_SMP17_0 \| ADC_SMPR2_SMP16_0 \| \
Kojto	90:cb3d968589d8	672	ADC_SMPR2_SMP15_0 \| ADC_SMPR2_SMP14_0 \| ADC_SMPR2_SMP13_0 \| ADC_SMPR2_SMP12_0 \| \
Kojto	90:cb3d968589d8	673	ADC_SMPR2_SMP11_0 \| ADC_SMPR2_SMP10_0)
Kojto	90:cb3d968589d8	674	#if defined(STM32L100xB) \|\| defined (STM32L151xB) \|\| defined (STM32L152xB) \|\| defined(STM32L100xBA) \|\| defined (STM32L151xBA) \|\| defined (STM32L152xBA) \|\| defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC)
Kojto	90:cb3d968589d8	675	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT0 \
Kojto	90:cb3d968589d8	676	(ADC_SMPR1_SMP26_0 \| ADC_SMPR1_SMP25_0 \| ADC_SMPR1_SMP24_0 \| ADC_SMPR1_SMP23_0 \| \
Kojto	90:cb3d968589d8	677	ADC_SMPR1_SMP22_0 \| ADC_SMPR1_SMP21_0 \| ADC_SMPR1_SMP20_0)
Kojto	90:cb3d968589d8	678	#endif /* STM32L100xB \|\| STM32L151xB \|\| STM32L152xB \|\| STM32L100xBA \|\| STM32L151xBA \|\| STM32L152xBA \|\| STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC */
Kojto	90:cb3d968589d8	679	#if defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	680	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR1BIT0 \
Kojto	90:cb3d968589d8	681	(ADC_SMPR1_SMP29_0 \| ADC_SMPR1_SMP28_0 \| ADC_SMPR1_SMP27_0 \| ADC_SMPR1_SMP26_0 \| \
Kojto	90:cb3d968589d8	682	ADC_SMPR1_SMP25_0 \| ADC_SMPR1_SMP24_0 \| ADC_SMPR1_SMP23_0 \| ADC_SMPR1_SMP22_0 \| \
Kojto	90:cb3d968589d8	683	ADC_SMPR1_SMP21_0 \| ADC_SMPR1_SMP20_0)
Kojto	90:cb3d968589d8	684	#define ADC_SAMPLETIME_ALLCHANNELS_SMPR0BIT0 \
Kojto	90:cb3d968589d8	685	(ADC_SMPR0_SMP31_0 \| ADC_SMPR0_SMP30_0 )
Kojto	90:cb3d968589d8	686	#endif /* STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L152xE \|\| STM32L162xE */
Kojto	90:cb3d968589d8	687	/**
Kojto	90:cb3d968589d8	688	* @}
Kojto	90:cb3d968589d8	689	*/
Kojto	90:cb3d968589d8	690
Kojto	90:cb3d968589d8	691	/** @defgroup ADC_regular_rank ADC regular rank
Kojto	90:cb3d968589d8	692	* @{
Kojto	90:cb3d968589d8	693	*/
Kojto	90:cb3d968589d8	694	#define ADC_REGULAR_RANK_1 ((uint32_t)0x00000001)
Kojto	90:cb3d968589d8	695	#define ADC_REGULAR_RANK_2 ((uint32_t)0x00000002)
Kojto	90:cb3d968589d8	696	#define ADC_REGULAR_RANK_3 ((uint32_t)0x00000003)
Kojto	90:cb3d968589d8	697	#define ADC_REGULAR_RANK_4 ((uint32_t)0x00000004)
Kojto	90:cb3d968589d8	698	#define ADC_REGULAR_RANK_5 ((uint32_t)0x00000005)
Kojto	90:cb3d968589d8	699	#define ADC_REGULAR_RANK_6 ((uint32_t)0x00000006)
Kojto	90:cb3d968589d8	700	#define ADC_REGULAR_RANK_7 ((uint32_t)0x00000007)
Kojto	90:cb3d968589d8	701	#define ADC_REGULAR_RANK_8 ((uint32_t)0x00000008)
Kojto	90:cb3d968589d8	702	#define ADC_REGULAR_RANK_9 ((uint32_t)0x00000009)
Kojto	90:cb3d968589d8	703	#define ADC_REGULAR_RANK_10 ((uint32_t)0x0000000A)
Kojto	90:cb3d968589d8	704	#define ADC_REGULAR_RANK_11 ((uint32_t)0x0000000B)
Kojto	90:cb3d968589d8	705	#define ADC_REGULAR_RANK_12 ((uint32_t)0x0000000C)
Kojto	90:cb3d968589d8	706	#define ADC_REGULAR_RANK_13 ((uint32_t)0x0000000D)
Kojto	90:cb3d968589d8	707	#define ADC_REGULAR_RANK_14 ((uint32_t)0x0000000E)
Kojto	90:cb3d968589d8	708	#define ADC_REGULAR_RANK_15 ((uint32_t)0x0000000F)
Kojto	90:cb3d968589d8	709	#define ADC_REGULAR_RANK_16 ((uint32_t)0x00000010)
Kojto	90:cb3d968589d8	710	#define ADC_REGULAR_RANK_17 ((uint32_t)0x00000011)
Kojto	90:cb3d968589d8	711	#define ADC_REGULAR_RANK_18 ((uint32_t)0x00000012)
Kojto	90:cb3d968589d8	712	#define ADC_REGULAR_RANK_19 ((uint32_t)0x00000013)
Kojto	90:cb3d968589d8	713	#define ADC_REGULAR_RANK_20 ((uint32_t)0x00000014)
Kojto	90:cb3d968589d8	714	#define ADC_REGULAR_RANK_21 ((uint32_t)0x00000015)
Kojto	90:cb3d968589d8	715	#define ADC_REGULAR_RANK_22 ((uint32_t)0x00000016)
Kojto	90:cb3d968589d8	716	#define ADC_REGULAR_RANK_23 ((uint32_t)0x00000017)
Kojto	90:cb3d968589d8	717	#define ADC_REGULAR_RANK_24 ((uint32_t)0x00000018)
Kojto	90:cb3d968589d8	718	#define ADC_REGULAR_RANK_25 ((uint32_t)0x00000019)
Kojto	90:cb3d968589d8	719	#define ADC_REGULAR_RANK_26 ((uint32_t)0x0000001A)
Kojto	90:cb3d968589d8	720	#define ADC_REGULAR_RANK_27 ((uint32_t)0x0000001B)
Kojto	90:cb3d968589d8	721	#if defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	722	#define ADC_REGULAR_RANK_28 ((uint32_t)0x0000001C)
Kojto	90:cb3d968589d8	723
Kojto	90:cb3d968589d8	724	#define IS_ADC_REGULAR_RANK(CHANNEL) (((CHANNEL) == ADC_REGULAR_RANK_1 ) \|\| \
Kojto	90:cb3d968589d8	725	((CHANNEL) == ADC_REGULAR_RANK_2 ) \|\| \
Kojto	90:cb3d968589d8	726	((CHANNEL) == ADC_REGULAR_RANK_3 ) \|\| \
Kojto	90:cb3d968589d8	727	((CHANNEL) == ADC_REGULAR_RANK_4 ) \|\| \
Kojto	90:cb3d968589d8	728	((CHANNEL) == ADC_REGULAR_RANK_5 ) \|\| \
Kojto	90:cb3d968589d8	729	((CHANNEL) == ADC_REGULAR_RANK_6 ) \|\| \
Kojto	90:cb3d968589d8	730	((CHANNEL) == ADC_REGULAR_RANK_7 ) \|\| \
Kojto	90:cb3d968589d8	731	((CHANNEL) == ADC_REGULAR_RANK_8 ) \|\| \
Kojto	90:cb3d968589d8	732	((CHANNEL) == ADC_REGULAR_RANK_9 ) \|\| \
Kojto	90:cb3d968589d8	733	((CHANNEL) == ADC_REGULAR_RANK_10) \|\| \
Kojto	90:cb3d968589d8	734	((CHANNEL) == ADC_REGULAR_RANK_11) \|\| \
Kojto	90:cb3d968589d8	735	((CHANNEL) == ADC_REGULAR_RANK_12) \|\| \
Kojto	90:cb3d968589d8	736	((CHANNEL) == ADC_REGULAR_RANK_13) \|\| \
Kojto	90:cb3d968589d8	737	((CHANNEL) == ADC_REGULAR_RANK_14) \|\| \
Kojto	90:cb3d968589d8	738	((CHANNEL) == ADC_REGULAR_RANK_15) \|\| \
Kojto	90:cb3d968589d8	739	((CHANNEL) == ADC_REGULAR_RANK_16) \|\| \
Kojto	90:cb3d968589d8	740	((CHANNEL) == ADC_REGULAR_RANK_17) \|\| \
Kojto	90:cb3d968589d8	741	((CHANNEL) == ADC_REGULAR_RANK_18) \|\| \
Kojto	90:cb3d968589d8	742	((CHANNEL) == ADC_REGULAR_RANK_19) \|\| \
Kojto	90:cb3d968589d8	743	((CHANNEL) == ADC_REGULAR_RANK_20) \|\| \
Kojto	90:cb3d968589d8	744	((CHANNEL) == ADC_REGULAR_RANK_21) \|\| \
Kojto	90:cb3d968589d8	745	((CHANNEL) == ADC_REGULAR_RANK_22) \|\| \
Kojto	90:cb3d968589d8	746	((CHANNEL) == ADC_REGULAR_RANK_23) \|\| \
Kojto	90:cb3d968589d8	747	((CHANNEL) == ADC_REGULAR_RANK_24) \|\| \
Kojto	90:cb3d968589d8	748	((CHANNEL) == ADC_REGULAR_RANK_25) \|\| \
Kojto	90:cb3d968589d8	749	((CHANNEL) == ADC_REGULAR_RANK_26) \|\| \
Kojto	90:cb3d968589d8	750	((CHANNEL) == ADC_REGULAR_RANK_27) \|\| \
Kojto	90:cb3d968589d8	751	((CHANNEL) == ADC_REGULAR_RANK_28) )
Kojto	90:cb3d968589d8	752	#else
Kojto	90:cb3d968589d8	753
Kojto	90:cb3d968589d8	754	#define IS_ADC_REGULAR_RANK(CHANNEL) (((CHANNEL) == ADC_REGULAR_RANK_1 ) \|\| \
Kojto	90:cb3d968589d8	755	((CHANNEL) == ADC_REGULAR_RANK_2 ) \|\| \
Kojto	90:cb3d968589d8	756	((CHANNEL) == ADC_REGULAR_RANK_3 ) \|\| \
Kojto	90:cb3d968589d8	757	((CHANNEL) == ADC_REGULAR_RANK_4 ) \|\| \
Kojto	90:cb3d968589d8	758	((CHANNEL) == ADC_REGULAR_RANK_5 ) \|\| \
Kojto	90:cb3d968589d8	759	((CHANNEL) == ADC_REGULAR_RANK_6 ) \|\| \
Kojto	90:cb3d968589d8	760	((CHANNEL) == ADC_REGULAR_RANK_7 ) \|\| \
Kojto	90:cb3d968589d8	761	((CHANNEL) == ADC_REGULAR_RANK_8 ) \|\| \
Kojto	90:cb3d968589d8	762	((CHANNEL) == ADC_REGULAR_RANK_9 ) \|\| \
Kojto	90:cb3d968589d8	763	((CHANNEL) == ADC_REGULAR_RANK_10) \|\| \
Kojto	90:cb3d968589d8	764	((CHANNEL) == ADC_REGULAR_RANK_11) \|\| \
Kojto	90:cb3d968589d8	765	((CHANNEL) == ADC_REGULAR_RANK_12) \|\| \
Kojto	90:cb3d968589d8	766	((CHANNEL) == ADC_REGULAR_RANK_13) \|\| \
Kojto	90:cb3d968589d8	767	((CHANNEL) == ADC_REGULAR_RANK_14) \|\| \
Kojto	90:cb3d968589d8	768	((CHANNEL) == ADC_REGULAR_RANK_15) \|\| \
Kojto	90:cb3d968589d8	769	((CHANNEL) == ADC_REGULAR_RANK_16) \|\| \
Kojto	90:cb3d968589d8	770	((CHANNEL) == ADC_REGULAR_RANK_17) \|\| \
Kojto	90:cb3d968589d8	771	((CHANNEL) == ADC_REGULAR_RANK_18) \|\| \
Kojto	90:cb3d968589d8	772	((CHANNEL) == ADC_REGULAR_RANK_19) \|\| \
Kojto	90:cb3d968589d8	773	((CHANNEL) == ADC_REGULAR_RANK_20) \|\| \
Kojto	90:cb3d968589d8	774	((CHANNEL) == ADC_REGULAR_RANK_21) \|\| \
Kojto	90:cb3d968589d8	775	((CHANNEL) == ADC_REGULAR_RANK_22) \|\| \
Kojto	90:cb3d968589d8	776	((CHANNEL) == ADC_REGULAR_RANK_23) \|\| \
Kojto	90:cb3d968589d8	777	((CHANNEL) == ADC_REGULAR_RANK_24) \|\| \
Kojto	90:cb3d968589d8	778	((CHANNEL) == ADC_REGULAR_RANK_25) \|\| \
Kojto	90:cb3d968589d8	779	((CHANNEL) == ADC_REGULAR_RANK_26) \|\| \
Kojto	90:cb3d968589d8	780	((CHANNEL) == ADC_REGULAR_RANK_27) )
Kojto	90:cb3d968589d8	781	#endif /* STM32L100xC \|\| STM32L151xC \|\| STM32L152xC \|\| STM32L162xC \|\| STM32L151xCA \|\| STM32L151xD \|\| STM32L152xCA \|\| STM32L152xD \|\| STM32L162xCA \|\| STM32L162xD \|\| STM32L151xE \|\| STM32L152xE \|\| STM32L162xE */
Kojto	90:cb3d968589d8	782	/**
Kojto	90:cb3d968589d8	783	* @}
Kojto	90:cb3d968589d8	784	*/
Kojto	90:cb3d968589d8	785
Kojto	90:cb3d968589d8	786	/** @defgroup ADC_analog_watchdog_mode ADC analog watchdog mode
Kojto	90:cb3d968589d8	787	* @{
Kojto	90:cb3d968589d8	788	*/
Kojto	90:cb3d968589d8	789	#define ADC_ANALOGWATCHDOG_NONE ((uint32_t)0x00000000)
Kojto	90:cb3d968589d8	790	#define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CR1_AWDSGL \| ADC_CR1_AWDEN))
Kojto	90:cb3d968589d8	791	#define ADC_ANALOGWATCHDOG_SINGLE_INJEC ((uint32_t)(ADC_CR1_AWDSGL \| ADC_CR1_JAWDEN))
Kojto	90:cb3d968589d8	792	#define ADC_ANALOGWATCHDOG_SINGLE_REGINJEC ((uint32_t)(ADC_CR1_AWDSGL \| ADC_CR1_AWDEN \| ADC_CR1_JAWDEN))
Kojto	90:cb3d968589d8	793	#define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CR1_AWDEN)
Kojto	90:cb3d968589d8	794	#define ADC_ANALOGWATCHDOG_ALL_INJEC ((uint32_t) ADC_CR1_JAWDEN)
Kojto	90:cb3d968589d8	795	#define ADC_ANALOGWATCHDOG_ALL_REGINJEC ((uint32_t)(ADC_CR1_AWDEN \| ADC_CR1_JAWDEN))
Kojto	90:cb3d968589d8	796
Kojto	90:cb3d968589d8	797	#define IS_ADC_ANALOG_WATCHDOG_MODE(WATCHDOG) (((WATCHDOG) == ADC_ANALOGWATCHDOG_NONE) \|\| \
Kojto	90:cb3d968589d8	798	((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REG) \|\| \
Kojto	90:cb3d968589d8	799	((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_INJEC) \|\| \
Kojto	90:cb3d968589d8	800	((WATCHDOG) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) \|\| \
Kojto	90:cb3d968589d8	801	((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REG) \|\| \
Kojto	90:cb3d968589d8	802	((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_INJEC) \|\| \
Kojto	90:cb3d968589d8	803	((WATCHDOG) == ADC_ANALOGWATCHDOG_ALL_REGINJEC) )
Kojto	90:cb3d968589d8	804	/**
Kojto	90:cb3d968589d8	805	* @}
Kojto	90:cb3d968589d8	806	*/
Kojto	90:cb3d968589d8	807
Kojto	90:cb3d968589d8	808	/** @defgroup ADC_conversion_group ADC conversion group
Kojto	90:cb3d968589d8	809	* @{
Kojto	90:cb3d968589d8	810	*/
Kojto	90:cb3d968589d8	811	#define REGULAR_GROUP ((uint32_t)(ADC_FLAG_EOC))
Kojto	90:cb3d968589d8	812	#define INJECTED_GROUP ((uint32_t)(ADC_FLAG_JEOC))
Kojto	90:cb3d968589d8	813	#define REGULAR_INJECTED_GROUP ((uint32_t)(ADC_FLAG_EOC \| ADC_FLAG_JEOC))
Kojto	90:cb3d968589d8	814
Kojto	90:cb3d968589d8	815	#define IS_ADC_CONVERSION_GROUP(CONVERSION) (((CONVERSION) == REGULAR_GROUP) \|\| \
Kojto	90:cb3d968589d8	816	((CONVERSION) == INJECTED_GROUP) \|\| \
Kojto	90:cb3d968589d8	817	((CONVERSION) == REGULAR_INJECTED_GROUP) )
Kojto	90:cb3d968589d8	818	/**
Kojto	90:cb3d968589d8	819	* @}
Kojto	90:cb3d968589d8	820	*/
Kojto	90:cb3d968589d8	821
Kojto	90:cb3d968589d8	822	/** @defgroup ADC_Event_type ADC Event type
Kojto	90:cb3d968589d8	823	* @{
Kojto	90:cb3d968589d8	824	*/
Kojto	90:cb3d968589d8	825	#define AWD_EVENT ((uint32_t)ADC_FLAG_AWD) /!< ADC Analog watchdog event /
Kojto	90:cb3d968589d8	826	#define OVR_EVENT ((uint32_t)ADC_FLAG_OVR) /!< ADC overrun event /
Kojto	90:cb3d968589d8	827
Kojto	90:cb3d968589d8	828	#define IS_ADC_EVENT_TYPE(EVENT) (((EVENT) == AWD_EVENT) \|\| \
Kojto	90:cb3d968589d8	829	((EVENT) == ADC_FLAG_OVR) )
Kojto	90:cb3d968589d8	830	/**
Kojto	90:cb3d968589d8	831	* @}
Kojto	90:cb3d968589d8	832	*/
Kojto	90:cb3d968589d8	833
Kojto	90:cb3d968589d8	834	/** @defgroup ADC_interrupts_definition ADC interrupts definition
Kojto	90:cb3d968589d8	835	* @{
Kojto	90:cb3d968589d8	836	*/
Kojto	90:cb3d968589d8	837	#define ADC_IT_EOC ADC_CR1_EOCIE /!< ADC End of Regular Conversion interrupt source /
Kojto	90:cb3d968589d8	838	#define ADC_IT_JEOC ADC_CR1_JEOCIE /!< ADC End of Injected Conversion interrupt source /
Kojto	90:cb3d968589d8	839	#define ADC_IT_AWD ADC_CR1_AWDIE /!< ADC Analog watchdog interrupt source /
Kojto	90:cb3d968589d8	840	#define ADC_IT_OVR ADC_CR1_OVRIE /!< ADC overrun interrupt source /
Kojto	90:cb3d968589d8	841	/**
Kojto	90:cb3d968589d8	842	* @}
Kojto	90:cb3d968589d8	843	*/
Kojto	90:cb3d968589d8	844
Kojto	90:cb3d968589d8	845	/** @defgroup ADC_flags_definition ADC flags definition
Kojto	90:cb3d968589d8	846	* @{
Kojto	90:cb3d968589d8	847	*/
Kojto	90:cb3d968589d8	848	#define ADC_FLAG_AWD ADC_SR_AWD /!< ADC Analog watchdog flag /
Kojto	90:cb3d968589d8	849	#define ADC_FLAG_EOC ADC_SR_EOC /!< ADC End of Regular conversion flag /
Kojto	90:cb3d968589d8	850	#define ADC_FLAG_JEOC ADC_SR_JEOC /!< ADC End of Injected conversion flag /
Kojto	90:cb3d968589d8	851	#define ADC_FLAG_JSTRT ADC_SR_JSTRT /!< ADC Injected group start flag /
Kojto	90:cb3d968589d8	852	#define ADC_FLAG_STRT ADC_SR_STRT /!< ADC Regular group start flag /
Kojto	90:cb3d968589d8	853	#define ADC_FLAG_OVR ADC_SR_OVR /!< ADC overrun flag /
Kojto	90:cb3d968589d8	854	#define ADC_FLAG_ADONS ADC_SR_ADONS /!< ADC ready status flag /
Kojto	90:cb3d968589d8	855	#define ADC_FLAG_RCNR ADC_SR_RCNR /!< ADC Regular group ready status flag /
Kojto	90:cb3d968589d8	856	#define ADC_FLAG_JCNR ADC_SR_JCNR /!< ADC Regular group ready status flag /
Kojto	90:cb3d968589d8	857
Kojto	90:cb3d968589d8	858	/* Combination of all post-conversion flags bits: EOC/EOS, JEOC/JEOS, OVR, AWDx */
Kojto	90:cb3d968589d8	859	#define ADC_FLAG_POSTCONV_ALL (ADC_FLAG_EOC \| ADC_FLAG_JEOC \| ADC_FLAG_AWD \| \
Kojto	90:cb3d968589d8	860	ADC_FLAG_OVR)
Kojto	90:cb3d968589d8	861	/**
Kojto	90:cb3d968589d8	862	* @}
Kojto	90:cb3d968589d8	863	*/
Kojto	90:cb3d968589d8	864
Kojto	90:cb3d968589d8	865	/** @defgroup ADC_range_verification ADC range verification
Kojto	90:cb3d968589d8	866	* For a unique ADC resolution: 12 bits
Kojto	90:cb3d968589d8	867	* @{
Kojto	90:cb3d968589d8	868	*/
Kojto	90:cb3d968589d8	869	#define IS_ADC_RANGE(ADC_VALUE) ((ADC_VALUE) <= ((uint32_t)0x0FFF))
Kojto	90:cb3d968589d8	870	/**
Kojto	90:cb3d968589d8	871	* @}
Kojto	90:cb3d968589d8	872	*/
Kojto	90:cb3d968589d8	873
Kojto	90:cb3d968589d8	874	/** @defgroup ADC_regular_nb_conv_verification ADC regular nb conv verification
Kojto	90:cb3d968589d8	875	* @{
Kojto	90:cb3d968589d8	876	*/
Kojto	90:cb3d968589d8	877	#if defined(STM32L100xC) \|\| defined (STM32L151xC) \|\| defined (STM32L152xC) \|\| defined (STM32L162xC) \|\| defined(STM32L151xCA) \|\| defined (STM32L151xD) \|\| defined (STM32L152xCA) \|\| defined (STM32L152xD) \|\| defined (STM32L162xCA) \|\| defined (STM32L162xD) \|\| defined(STM32L151xE) \|\| defined (STM32L152xE) \|\| defined (STM32L162xE)
Kojto	90:cb3d968589d8	878	#define IS_ADC_REGULAR_NB_CONV(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)28)))
Kojto	90:cb3d968589d8	879	#else
Kojto	90:cb3d968589d8	880	#define IS_ADC_REGULAR_NB_CONV(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)27)))
Kojto	90:cb3d968589d8	881	#endif
Kojto	90:cb3d968589d8	882	/**
Kojto	90:cb3d968589d8	883	* @}
Kojto	90:cb3d968589d8	884	*/
Kojto	90:cb3d968589d8	885
Kojto	90:cb3d968589d8	886	/** @defgroup ADC_regular_discontinuous_mode_number_verification ADC regular discontinuous mode number verification
Kojto	90:cb3d968589d8	887	* @{
Kojto	90:cb3d968589d8	888	*/
Kojto	90:cb3d968589d8	889	#define IS_ADC_REGULAR_DISCONT_NUMBER(NUMBER) (((NUMBER) >= ((uint32_t)1)) && ((NUMBER) <= ((uint32_t)8)))
Kojto	90:cb3d968589d8	890	/**
Kojto	90:cb3d968589d8	891	* @}
Kojto	90:cb3d968589d8	892	*/
Kojto	90:cb3d968589d8	893
Kojto	90:cb3d968589d8	894	/**
Kojto	90:cb3d968589d8	895	* @}
Kojto	90:cb3d968589d8	896	*/
Kojto	90:cb3d968589d8	897
Kojto	90:cb3d968589d8	898	/* Exported macro ------------------------------------------------------------*/
Kojto	90:cb3d968589d8	899
Kojto	90:cb3d968589d8	900	/** @defgroup ADC_Exported_Macros ADC Exported Macros
Kojto	90:cb3d968589d8	901	* @{
Kojto	90:cb3d968589d8	902	*/
Kojto	90:cb3d968589d8	903	/* Macro for internal HAL driver usage, and possibly can be used into code of */
Kojto	90:cb3d968589d8	904	/* final user. */
Kojto	90:cb3d968589d8	905
Kojto	90:cb3d968589d8	906	/**
Kojto	90:cb3d968589d8	907	* @brief Verification of ADC state: enabled or disabled
Kojto	90:cb3d968589d8	908	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	909	* @retval SET (ADC enabled) or RESET (ADC disabled)
Kojto	90:cb3d968589d8	910	*/
Kojto	90:cb3d968589d8	911	#define __HAL_ADC_IS_ENABLED(__HANDLE__) \
Kojto	90:cb3d968589d8	912	((( ((__HANDLE__)->Instance->SR & ADC_SR_ADONS) == ADC_SR_ADONS ) \
Kojto	90:cb3d968589d8	913	) ? SET : RESET)
Kojto	90:cb3d968589d8	914
Kojto	90:cb3d968589d8	915	/**
Kojto	90:cb3d968589d8	916	* @brief Test if conversion trigger of regular group is software start
Kojto	90:cb3d968589d8	917	* or external trigger.
Kojto	90:cb3d968589d8	918	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	919	* @retval SET (software start) or RESET (external trigger)
Kojto	90:cb3d968589d8	920	*/
Kojto	90:cb3d968589d8	921	#define __HAL_ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \
Kojto	90:cb3d968589d8	922	(((__HANDLE__)->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
Kojto	90:cb3d968589d8	923
Kojto	90:cb3d968589d8	924	/**
Kojto	90:cb3d968589d8	925	* @brief Test if conversion trigger of injected group is software start
Kojto	90:cb3d968589d8	926	* or external trigger.
Kojto	90:cb3d968589d8	927	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	928	* @retval SET (software start) or RESET (external trigger)
Kojto	90:cb3d968589d8	929	*/
Kojto	90:cb3d968589d8	930	#define __HAL_ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__) \
Kojto	90:cb3d968589d8	931	(((__HANDLE__)->Instance->CR2 & ADC_CR2_JEXTEN) == RESET)
Kojto	90:cb3d968589d8	932
Kojto	90:cb3d968589d8	933	/** @brief Checks if the specified ADC interrupt source is enabled or disabled.
Kojto	90:cb3d968589d8	934	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	935	* @param __INTERRUPT__: ADC interrupt source to check
Kojto	90:cb3d968589d8	936	* @retval State of interruption (SET or RESET)
Kojto	90:cb3d968589d8	937	*/
Kojto	90:cb3d968589d8	938	#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \
Kojto	90:cb3d968589d8	939	(( ((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__) \
Kojto	90:cb3d968589d8	940	)? SET : RESET \
Kojto	90:cb3d968589d8	941	)
Kojto	90:cb3d968589d8	942
Kojto	90:cb3d968589d8	943	/**
Kojto	90:cb3d968589d8	944	* @brief Enable the ADC end of conversion interrupt.
Kojto	90:cb3d968589d8	945	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	946	* @param __INTERRUPT__: ADC Interrupt
Kojto	90:cb3d968589d8	947	* @retval None
Kojto	90:cb3d968589d8	948	*/
Kojto	90:cb3d968589d8	949	#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
Kojto	90:cb3d968589d8	950	(SET_BIT((__HANDLE__)->Instance->CR1, (__INTERRUPT__)))
Kojto	90:cb3d968589d8	951
Kojto	90:cb3d968589d8	952	/**
Kojto	90:cb3d968589d8	953	* @brief Disable the ADC end of conversion interrupt.
Kojto	90:cb3d968589d8	954	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	955	* @param __INTERRUPT__: ADC Interrupt
Kojto	90:cb3d968589d8	956	* @retval None
Kojto	90:cb3d968589d8	957	*/
Kojto	90:cb3d968589d8	958	#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
Kojto	90:cb3d968589d8	959	(CLEAR_BIT((__HANDLE__)->Instance->CR1, (__INTERRUPT__)))
Kojto	90:cb3d968589d8	960
Kojto	90:cb3d968589d8	961	/**
Kojto	90:cb3d968589d8	962	* @brief Get the selected ADC's flag status.
Kojto	90:cb3d968589d8	963	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	964	* @param __FLAG__: ADC flag
Kojto	90:cb3d968589d8	965	* @retval None
Kojto	90:cb3d968589d8	966	*/
Kojto	90:cb3d968589d8	967	#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) \
Kojto	90:cb3d968589d8	968	((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
Kojto	90:cb3d968589d8	969
Kojto	90:cb3d968589d8	970	/**
Kojto	90:cb3d968589d8	971	* @brief Clear the ADC's pending flags
Kojto	90:cb3d968589d8	972	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	973	* @param __FLAG__: ADC flag
Kojto	90:cb3d968589d8	974	* @retval None
Kojto	90:cb3d968589d8	975	*/
Kojto	90:cb3d968589d8	976	#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = ~(__FLAG__))
Kojto	90:cb3d968589d8	977
Kojto	90:cb3d968589d8	978	/**
Kojto	90:cb3d968589d8	979	* @brief Clear ADC error code (set it to error code: "no error")
Kojto	90:cb3d968589d8	980	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	981	* @retval None
Kojto	90:cb3d968589d8	982	*/
Kojto	90:cb3d968589d8	983	#define __HAL_ADC_CLEAR_ERRORCODE(__HANDLE__) \
Kojto	90:cb3d968589d8	984	((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE)
Kojto	90:cb3d968589d8	985
Kojto	90:cb3d968589d8	986	/** @brief Reset ADC handle state
Kojto	90:cb3d968589d8	987	* @param __HANDLE__: ADC handle
Kojto	90:cb3d968589d8	988	* @retval None
Kojto	90:cb3d968589d8	989	*/
Kojto	90:cb3d968589d8	990	#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET)
Kojto	90:cb3d968589d8	991
Kojto	90:cb3d968589d8	992	/**
Kojto	90:cb3d968589d8	993	* @}
Kojto	90:cb3d968589d8	994	*/
Kojto	90:cb3d968589d8	995
Kojto	90:cb3d968589d8	996	/* Include ADC HAL Extension module */
Kojto	90:cb3d968589d8	997	#include "stm32l1xx_hal_adc_ex.h"
Kojto	90:cb3d968589d8	998
Kojto	90:cb3d968589d8	999	/* Exported functions --------------------------------------------------------*/
Kojto	90:cb3d968589d8	1000	/** @addtogroup ADC_Exported_Functions
Kojto	90:cb3d968589d8	1001	* @{
Kojto	90:cb3d968589d8	1002	*/
Kojto	90:cb3d968589d8	1003
Kojto	90:cb3d968589d8	1004	/** @addtogroup ADC_Exported_Functions_Group1
Kojto	90:cb3d968589d8	1005	* @{
Kojto	90:cb3d968589d8	1006	*/
Kojto	90:cb3d968589d8	1007
Kojto	90:cb3d968589d8	1008
Kojto	90:cb3d968589d8	1009	/* Initialization and de-initialization functions **********************************/
Kojto	90:cb3d968589d8	1010	HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1011	HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc);
Kojto	90:cb3d968589d8	1012	void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1013	void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1014	/**
Kojto	90:cb3d968589d8	1015	* @}
Kojto	90:cb3d968589d8	1016	*/
Kojto	90:cb3d968589d8	1017
Kojto	90:cb3d968589d8	1018	/* IO operation functions *****************************************************/
Kojto	90:cb3d968589d8	1019
Kojto	90:cb3d968589d8	1020	/** @addtogroup ADC_Exported_Functions_Group2
Kojto	90:cb3d968589d8	1021	* @{
Kojto	90:cb3d968589d8	1022	*/
Kojto	90:cb3d968589d8	1023
Kojto	90:cb3d968589d8	1024
Kojto	90:cb3d968589d8	1025	/* Blocking mode: Polling */
Kojto	90:cb3d968589d8	1026	HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1027	HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1028	HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
Kojto	90:cb3d968589d8	1029	HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout);
Kojto	90:cb3d968589d8	1030
Kojto	90:cb3d968589d8	1031	/* Non-blocking mode: Interruption */
Kojto	90:cb3d968589d8	1032	HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1033	HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1034
Kojto	90:cb3d968589d8	1035	/* Non-blocking mode: DMA */
Kojto	90:cb3d968589d8	1036	HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
Kojto	90:cb3d968589d8	1037	HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1038
Kojto	90:cb3d968589d8	1039	/* ADC retrieve conversion value intended to be used with polling or interruption */
Kojto	90:cb3d968589d8	1040	uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1041
Kojto	90:cb3d968589d8	1042	/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */
Kojto	90:cb3d968589d8	1043	void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1044	void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1045	void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1046	void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1047	void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
Kojto	90:cb3d968589d8	1048	/**
Kojto	90:cb3d968589d8	1049	* @}
Kojto	90:cb3d968589d8	1050	*/
Kojto	90:cb3d968589d8	1051
Kojto	90:cb3d968589d8	1052
Kojto	90:cb3d968589d8	1053	/* Peripheral Control functions ***********************************************/
Kojto	90:cb3d968589d8	1054	/** @addtogroup ADC_Exported_Functions_Group3
Kojto	90:cb3d968589d8	1055	* @{
Kojto	90:cb3d968589d8	1056	*/
Kojto	90:cb3d968589d8	1057	HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig);
Kojto	90:cb3d968589d8	1058	HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig);
Kojto	90:cb3d968589d8	1059	/**
Kojto	90:cb3d968589d8	1060	* @}
Kojto	90:cb3d968589d8	1061	*/
Kojto	90:cb3d968589d8	1062
Kojto	90:cb3d968589d8	1063
Kojto	90:cb3d968589d8	1064	/* Peripheral State functions *************************************************/
Kojto	90:cb3d968589d8	1065	/** @addtogroup ADC_Exported_Functions_Group4
Kojto	90:cb3d968589d8	1066	* @{
Kojto	90:cb3d968589d8	1067	*/
Kojto	90:cb3d968589d8	1068	HAL_ADC_StateTypeDef HAL_ADC_GetState(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1069	uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
Kojto	90:cb3d968589d8	1070	/**
Kojto	90:cb3d968589d8	1071	* @}
Kojto	90:cb3d968589d8	1072	*/
Kojto	90:cb3d968589d8	1073
Kojto	90:cb3d968589d8	1074
Kojto	90:cb3d968589d8	1075	/**
Kojto	90:cb3d968589d8	1076	* @}
Kojto	90:cb3d968589d8	1077	*/
Kojto	90:cb3d968589d8	1078
Kojto	90:cb3d968589d8	1079
Kojto	90:cb3d968589d8	1080	/* Internal HAL driver functions **********************************************/
Kojto	90:cb3d968589d8	1081	/** @addtogroup ADC_Private_Functions
Kojto	90:cb3d968589d8	1082	* @{
Kojto	90:cb3d968589d8	1083	*/
Kojto	90:cb3d968589d8	1084
Kojto	90:cb3d968589d8	1085	HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1086	HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc);
Kojto	90:cb3d968589d8	1087	/**
Kojto	90:cb3d968589d8	1088	* @}
Kojto	90:cb3d968589d8	1089	*/
Kojto	90:cb3d968589d8	1090
Kojto	90:cb3d968589d8	1091
Kojto	90:cb3d968589d8	1092	/**
Kojto	90:cb3d968589d8	1093	* @}
Kojto	90:cb3d968589d8	1094	*/
Kojto	90:cb3d968589d8	1095
Kojto	90:cb3d968589d8	1096	/**
Kojto	90:cb3d968589d8	1097	* @}
Kojto	90:cb3d968589d8	1098	*/
Kojto	90:cb3d968589d8	1099
Kojto	90:cb3d968589d8	1100	#ifdef __cplusplus
Kojto	90:cb3d968589d8	1101	}
Kojto	90:cb3d968589d8	1102	#endif
Kojto	90:cb3d968589d8	1103
Kojto	90:cb3d968589d8	1104
Kojto	90:cb3d968589d8	1105	#endif /* __STM32L1xx_HAL_ADC_H */
Kojto	90:cb3d968589d8	1106
Kojto	90:cb3d968589d8	1107	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	03 May 2015
Imports:	4
Forks:	0
Commits:	100
Dependents:	0
Dependencies:	0
Followers:	2

TARGET_NUCLEO_L152RE/stm32l1xx_hal_adc.h@90:cb3d968589d8, 2014-10-28 (annotated)

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