The official mbed C/C SDK provides the software platform and libraries to build your applications.

Fork of mbed by mbed official

Committer:
Kojto
Date:
Tue Oct 28 16:40:41 2014 +0000
Revision:
90:cb3d968589d8
Parent:
85:024bf7f99721
Release 90 of the mbed library

Changes:

- Freescale KSDK update (v1.0)
- K22 - new target addition
- KL43Z - new target addition
- Nucleo F091RC - new target addition
- Nucleo L152RE - STM32Cube driver
- Nordic - Softdevice v7.1.0
- Nvic files - BSD License
- LPC824 - various HAL fixes
- Nucleo F411RE - CMSIS - IAR files

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32f4xx_ll_usb.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
Kojto 90:cb3d968589d8 5 * @version V1.1.0
Kojto 90:cb3d968589d8 6 * @date 19-June-2014
emilmont 77:869cf507173a 7 * @brief Header file of USB Core HAL module.
emilmont 77:869cf507173a 8 ******************************************************************************
emilmont 77:869cf507173a 9 * @attention
emilmont 77:869cf507173a 10 *
emilmont 77:869cf507173a 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 12 *
emilmont 77:869cf507173a 13 * Redistribution and use in source and binary forms, with or without modification,
emilmont 77:869cf507173a 14 * are permitted provided that the following conditions are met:
emilmont 77:869cf507173a 15 * 1. Redistributions of source code must retain the above copyright notice,
emilmont 77:869cf507173a 16 * this list of conditions and the following disclaimer.
emilmont 77:869cf507173a 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
emilmont 77:869cf507173a 18 * this list of conditions and the following disclaimer in the documentation
emilmont 77:869cf507173a 19 * and/or other materials provided with the distribution.
emilmont 77:869cf507173a 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
emilmont 77:869cf507173a 21 * may be used to endorse or promote products derived from this software
emilmont 77:869cf507173a 22 * without specific prior written permission.
emilmont 77:869cf507173a 23 *
emilmont 77:869cf507173a 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
emilmont 77:869cf507173a 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
emilmont 77:869cf507173a 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
emilmont 77:869cf507173a 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
emilmont 77:869cf507173a 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
emilmont 77:869cf507173a 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
emilmont 77:869cf507173a 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
emilmont 77:869cf507173a 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
emilmont 77:869cf507173a 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
emilmont 77:869cf507173a 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
emilmont 77:869cf507173a 34 *
emilmont 77:869cf507173a 35 ******************************************************************************
emilmont 77:869cf507173a 36 */
emilmont 77:869cf507173a 37
emilmont 77:869cf507173a 38 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 39 #ifndef __STM32F4xx_LL_USB_H
emilmont 77:869cf507173a 40 #define __STM32F4xx_LL_USB_H
emilmont 77:869cf507173a 41
emilmont 77:869cf507173a 42 #ifdef __cplusplus
emilmont 77:869cf507173a 43 extern "C" {
emilmont 77:869cf507173a 44 #endif
emilmont 77:869cf507173a 45
emilmont 77:869cf507173a 46 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 47 #include "stm32f4xx_hal_def.h"
emilmont 77:869cf507173a 48
emilmont 77:869cf507173a 49 /** @addtogroup STM32F4xx_HAL
emilmont 77:869cf507173a 50 * @{
emilmont 77:869cf507173a 51 */
emilmont 77:869cf507173a 52
emilmont 77:869cf507173a 53 /** @addtogroup USB_Core
emilmont 77:869cf507173a 54 * @{
emilmont 77:869cf507173a 55 */
emilmont 77:869cf507173a 56
emilmont 77:869cf507173a 57 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 58
emilmont 77:869cf507173a 59 /**
emilmont 77:869cf507173a 60 * @brief USB Mode definition
emilmont 77:869cf507173a 61 */
emilmont 77:869cf507173a 62 typedef enum
emilmont 77:869cf507173a 63 {
emilmont 77:869cf507173a 64 USB_OTG_DEVICE_MODE = 0,
emilmont 77:869cf507173a 65 USB_OTG_HOST_MODE = 1,
emilmont 77:869cf507173a 66 USB_OTG_DRD_MODE = 2
emilmont 77:869cf507173a 67
emilmont 77:869cf507173a 68 }USB_OTG_ModeTypeDef;
emilmont 77:869cf507173a 69
emilmont 77:869cf507173a 70 /**
emilmont 77:869cf507173a 71 * @brief URB States definition
emilmont 77:869cf507173a 72 */
emilmont 77:869cf507173a 73 typedef enum {
emilmont 77:869cf507173a 74 URB_IDLE = 0,
emilmont 77:869cf507173a 75 URB_DONE,
emilmont 77:869cf507173a 76 URB_NOTREADY,
emilmont 77:869cf507173a 77 URB_NYET,
emilmont 77:869cf507173a 78 URB_ERROR,
emilmont 77:869cf507173a 79 URB_STALL
emilmont 77:869cf507173a 80
emilmont 77:869cf507173a 81 }USB_OTG_URBStateTypeDef;
emilmont 77:869cf507173a 82
emilmont 77:869cf507173a 83 /**
emilmont 77:869cf507173a 84 * @brief Host channel States definition
emilmont 77:869cf507173a 85 */
emilmont 77:869cf507173a 86 typedef enum {
emilmont 77:869cf507173a 87 HC_IDLE = 0,
emilmont 77:869cf507173a 88 HC_XFRC,
emilmont 77:869cf507173a 89 HC_HALTED,
emilmont 77:869cf507173a 90 HC_NAK,
emilmont 77:869cf507173a 91 HC_NYET,
emilmont 77:869cf507173a 92 HC_STALL,
emilmont 77:869cf507173a 93 HC_XACTERR,
emilmont 77:869cf507173a 94 HC_BBLERR,
emilmont 77:869cf507173a 95 HC_DATATGLERR
emilmont 77:869cf507173a 96
emilmont 77:869cf507173a 97 }USB_OTG_HCStateTypeDef;
emilmont 77:869cf507173a 98
emilmont 77:869cf507173a 99 /**
emilmont 77:869cf507173a 100 * @brief PCD Initialization Structure definition
emilmont 77:869cf507173a 101 */
emilmont 77:869cf507173a 102 typedef struct
emilmont 77:869cf507173a 103 {
emilmont 77:869cf507173a 104 uint32_t dev_endpoints; /*!< Device Endpoints number.
emilmont 77:869cf507173a 105 This parameter depends on the used USB core.
emilmont 77:869cf507173a 106 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
emilmont 77:869cf507173a 107
emilmont 77:869cf507173a 108 uint32_t Host_channels; /*!< Host Channels number.
emilmont 77:869cf507173a 109 This parameter Depends on the used USB core.
emilmont 77:869cf507173a 110 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
emilmont 77:869cf507173a 111
emilmont 77:869cf507173a 112 uint32_t speed; /*!< USB Core speed.
emilmont 77:869cf507173a 113 This parameter can be any value of @ref USB_Core_Speed_ */
emilmont 77:869cf507173a 114
emilmont 77:869cf507173a 115 uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */
emilmont 77:869cf507173a 116
emilmont 77:869cf507173a 117 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
emilmont 77:869cf507173a 118 This parameter can be any value of @ref USB_EP0_MPS_ */
emilmont 77:869cf507173a 119
emilmont 77:869cf507173a 120 uint32_t phy_itface; /*!< Select the used PHY interface.
emilmont 77:869cf507173a 121 This parameter can be any value of @ref USB_Core_PHY_ */
emilmont 77:869cf507173a 122
emilmont 77:869cf507173a 123 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
emilmont 77:869cf507173a 124
emilmont 77:869cf507173a 125 uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
emilmont 77:869cf507173a 126
emilmont 77:869cf507173a 127 uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
emilmont 77:869cf507173a 128
emilmont 77:869cf507173a 129 uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
emilmont 77:869cf507173a 130
emilmont 77:869cf507173a 131 uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
emilmont 77:869cf507173a 132
emilmont 77:869cf507173a 133 }USB_OTG_CfgTypeDef;
emilmont 77:869cf507173a 134
emilmont 77:869cf507173a 135 typedef struct
emilmont 77:869cf507173a 136 {
emilmont 77:869cf507173a 137 uint8_t num; /*!< Endpoint number
emilmont 77:869cf507173a 138 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
emilmont 77:869cf507173a 139
emilmont 77:869cf507173a 140 uint8_t is_in; /*!< Endpoint direction
emilmont 77:869cf507173a 141 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
emilmont 77:869cf507173a 142
emilmont 77:869cf507173a 143 uint8_t is_stall; /*!< Endpoint stall condition
emilmont 77:869cf507173a 144 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
emilmont 77:869cf507173a 145
emilmont 77:869cf507173a 146 uint8_t type; /*!< Endpoint type
emilmont 77:869cf507173a 147 This parameter can be any value of @ref USB_EP_Type_ */
emilmont 77:869cf507173a 148
emilmont 77:869cf507173a 149 uint8_t data_pid_start; /*!< Initial data PID
emilmont 77:869cf507173a 150 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
emilmont 77:869cf507173a 151
emilmont 77:869cf507173a 152 uint8_t even_odd_frame; /*!< IFrame parity
emilmont 77:869cf507173a 153 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 uint16_t tx_fifo_num; /*!< Transmission FIFO number
emilmont 77:869cf507173a 156 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
emilmont 77:869cf507173a 157
emilmont 77:869cf507173a 158 uint32_t maxpacket; /*!< Endpoint Max packet size
emilmont 77:869cf507173a 159 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
emilmont 77:869cf507173a 160
emilmont 77:869cf507173a 161 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
emilmont 77:869cf507173a 162
emilmont 77:869cf507173a 163 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */
emilmont 77:869cf507173a 164
emilmont 77:869cf507173a 165 uint32_t xfer_len; /*!< Current transfer length */
emilmont 77:869cf507173a 166
emilmont 77:869cf507173a 167 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
emilmont 77:869cf507173a 168
emilmont 77:869cf507173a 169 }USB_OTG_EPTypeDef;
emilmont 77:869cf507173a 170
emilmont 77:869cf507173a 171 typedef struct
emilmont 77:869cf507173a 172 {
emilmont 77:869cf507173a 173 uint8_t dev_addr ; /*!< USB device address.
emilmont 77:869cf507173a 174 This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
emilmont 77:869cf507173a 175
emilmont 77:869cf507173a 176 uint8_t ch_num; /*!< Host channel number.
emilmont 77:869cf507173a 177 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
emilmont 77:869cf507173a 178
emilmont 77:869cf507173a 179 uint8_t ep_num; /*!< Endpoint number.
emilmont 77:869cf507173a 180 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
emilmont 77:869cf507173a 181
emilmont 77:869cf507173a 182 uint8_t ep_is_in; /*!< Endpoint direction
emilmont 77:869cf507173a 183 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
emilmont 77:869cf507173a 184
emilmont 77:869cf507173a 185 uint8_t speed; /*!< USB Host speed.
emilmont 77:869cf507173a 186 This parameter can be any value of @ref USB_Core_Speed_ */
emilmont 77:869cf507173a 187
emilmont 77:869cf507173a 188 uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */
emilmont 77:869cf507173a 189
emilmont 77:869cf507173a 190 uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */
emilmont 77:869cf507173a 191
emilmont 77:869cf507173a 192 uint8_t ep_type; /*!< Endpoint Type.
emilmont 77:869cf507173a 193 This parameter can be any value of @ref USB_EP_Type_ */
emilmont 77:869cf507173a 194
emilmont 77:869cf507173a 195 uint16_t max_packet; /*!< Endpoint Max packet size.
emilmont 77:869cf507173a 196 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
emilmont 77:869cf507173a 197
emilmont 77:869cf507173a 198 uint8_t data_pid; /*!< Initial data PID.
emilmont 77:869cf507173a 199 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
emilmont 77:869cf507173a 200
emilmont 77:869cf507173a 201 uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */
emilmont 77:869cf507173a 202
emilmont 77:869cf507173a 203 uint32_t xfer_len; /*!< Current transfer length. */
emilmont 77:869cf507173a 204
emilmont 77:869cf507173a 205 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */
emilmont 77:869cf507173a 206
emilmont 77:869cf507173a 207 uint8_t toggle_in; /*!< IN transfer current toggle flag.
emilmont 77:869cf507173a 208 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
emilmont 77:869cf507173a 209
emilmont 77:869cf507173a 210 uint8_t toggle_out; /*!< OUT transfer current toggle flag
emilmont 77:869cf507173a 211 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
emilmont 77:869cf507173a 212
emilmont 77:869cf507173a 213 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
emilmont 77:869cf507173a 214
emilmont 77:869cf507173a 215 uint32_t ErrCnt; /*!< Host channel error count.*/
emilmont 77:869cf507173a 216
emilmont 77:869cf507173a 217 USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
emilmont 77:869cf507173a 218 This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
emilmont 77:869cf507173a 219
emilmont 77:869cf507173a 220 USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
emilmont 77:869cf507173a 221 This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
emilmont 77:869cf507173a 222
emilmont 77:869cf507173a 223 }USB_OTG_HCTypeDef;
emilmont 77:869cf507173a 224
emilmont 77:869cf507173a 225 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 226
emilmont 77:869cf507173a 227 /** @defgroup PCD_Exported_Constants
emilmont 77:869cf507173a 228 * @{
emilmont 77:869cf507173a 229 */
emilmont 77:869cf507173a 230
emilmont 77:869cf507173a 231 /** @defgroup USB_Core_Mode_
emilmont 77:869cf507173a 232 * @{
emilmont 77:869cf507173a 233 */
emilmont 77:869cf507173a 234 #define USB_OTG_MODE_DEVICE 0
emilmont 77:869cf507173a 235 #define USB_OTG_MODE_HOST 1
emilmont 77:869cf507173a 236 #define USB_OTG_MODE_DRD 2
emilmont 77:869cf507173a 237 /**
emilmont 77:869cf507173a 238 * @}
emilmont 77:869cf507173a 239 */
emilmont 77:869cf507173a 240
emilmont 77:869cf507173a 241 /** @defgroup USB_Core_Speed_
emilmont 77:869cf507173a 242 * @{
emilmont 77:869cf507173a 243 */
emilmont 77:869cf507173a 244 #define USB_OTG_SPEED_HIGH 0
emilmont 77:869cf507173a 245 #define USB_OTG_SPEED_HIGH_IN_FULL 1
emilmont 77:869cf507173a 246 #define USB_OTG_SPEED_LOW 2
emilmont 77:869cf507173a 247 #define USB_OTG_SPEED_FULL 3
emilmont 77:869cf507173a 248 /**
emilmont 77:869cf507173a 249 * @}
emilmont 77:869cf507173a 250 */
emilmont 77:869cf507173a 251
emilmont 77:869cf507173a 252 /** @defgroup USB_Core_PHY_
emilmont 77:869cf507173a 253 * @{
emilmont 77:869cf507173a 254 */
emilmont 77:869cf507173a 255 #define USB_OTG_ULPI_PHY 1
emilmont 77:869cf507173a 256 #define USB_OTG_EMBEDDED_PHY 2
emilmont 77:869cf507173a 257 /**
emilmont 77:869cf507173a 258 * @}
emilmont 77:869cf507173a 259 */
emilmont 77:869cf507173a 260
emilmont 77:869cf507173a 261 /** @defgroup USB_Core_MPS_
emilmont 77:869cf507173a 262 * @{
emilmont 77:869cf507173a 263 */
emilmont 77:869cf507173a 264 #define USB_OTG_HS_MAX_PACKET_SIZE 512
emilmont 77:869cf507173a 265 #define USB_OTG_FS_MAX_PACKET_SIZE 64
emilmont 77:869cf507173a 266 #define USB_OTG_MAX_EP0_SIZE 64
emilmont 77:869cf507173a 267 /**
emilmont 77:869cf507173a 268 * @}
emilmont 77:869cf507173a 269 */
emilmont 77:869cf507173a 270
emilmont 77:869cf507173a 271 /** @defgroup USB_Core_Phy_Frequency_
emilmont 77:869cf507173a 272 * @{
emilmont 77:869cf507173a 273 */
emilmont 77:869cf507173a 274 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0 << 1)
emilmont 77:869cf507173a 275 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1 << 1)
emilmont 77:869cf507173a 276 #define DSTS_ENUMSPD_LS_PHY_6MHZ (2 << 1)
emilmont 77:869cf507173a 277 #define DSTS_ENUMSPD_FS_PHY_48MHZ (3 << 1)
emilmont 77:869cf507173a 278 /**
emilmont 77:869cf507173a 279 * @}
emilmont 77:869cf507173a 280 */
emilmont 77:869cf507173a 281
emilmont 77:869cf507173a 282 /** @defgroup USB_CORE_Frame_Interval_
emilmont 77:869cf507173a 283 * @{
emilmont 77:869cf507173a 284 */
emilmont 77:869cf507173a 285 #define DCFG_FRAME_INTERVAL_80 0
emilmont 77:869cf507173a 286 #define DCFG_FRAME_INTERVAL_85 1
emilmont 77:869cf507173a 287 #define DCFG_FRAME_INTERVAL_90 2
emilmont 77:869cf507173a 288 #define DCFG_FRAME_INTERVAL_95 3
emilmont 77:869cf507173a 289 /**
emilmont 77:869cf507173a 290 * @}
emilmont 77:869cf507173a 291 */
emilmont 77:869cf507173a 292
emilmont 77:869cf507173a 293 /** @defgroup USB_EP0_MPS_
emilmont 77:869cf507173a 294 * @{
emilmont 77:869cf507173a 295 */
emilmont 77:869cf507173a 296 #define DEP0CTL_MPS_64 0
emilmont 77:869cf507173a 297 #define DEP0CTL_MPS_32 1
emilmont 77:869cf507173a 298 #define DEP0CTL_MPS_16 2
emilmont 77:869cf507173a 299 #define DEP0CTL_MPS_8 3
emilmont 77:869cf507173a 300 /**
emilmont 77:869cf507173a 301 * @}
emilmont 77:869cf507173a 302 */
emilmont 77:869cf507173a 303
emilmont 77:869cf507173a 304 /** @defgroup USB_EP_Speed_
emilmont 77:869cf507173a 305 * @{
emilmont 77:869cf507173a 306 */
emilmont 77:869cf507173a 307 #define EP_SPEED_LOW 0
emilmont 77:869cf507173a 308 #define EP_SPEED_FULL 1
emilmont 77:869cf507173a 309 #define EP_SPEED_HIGH 2
emilmont 77:869cf507173a 310 /**
emilmont 77:869cf507173a 311 * @}
emilmont 77:869cf507173a 312 */
emilmont 77:869cf507173a 313
emilmont 77:869cf507173a 314 /** @defgroup USB_EP_Type_
emilmont 77:869cf507173a 315 * @{
emilmont 77:869cf507173a 316 */
emilmont 77:869cf507173a 317 #define EP_TYPE_CTRL 0
emilmont 77:869cf507173a 318 #define EP_TYPE_ISOC 1
emilmont 77:869cf507173a 319 #define EP_TYPE_BULK 2
emilmont 77:869cf507173a 320 #define EP_TYPE_INTR 3
emilmont 77:869cf507173a 321 #define EP_TYPE_MSK 3
emilmont 77:869cf507173a 322 /**
emilmont 77:869cf507173a 323 * @}
emilmont 77:869cf507173a 324 */
emilmont 77:869cf507173a 325
emilmont 77:869cf507173a 326 /** @defgroup USB_STS_Defines_
emilmont 77:869cf507173a 327 * @{
emilmont 77:869cf507173a 328 */
emilmont 77:869cf507173a 329 #define STS_GOUT_NAK 1
emilmont 77:869cf507173a 330 #define STS_DATA_UPDT 2
emilmont 77:869cf507173a 331 #define STS_XFER_COMP 3
emilmont 77:869cf507173a 332 #define STS_SETUP_COMP 4
emilmont 77:869cf507173a 333 #define STS_SETUP_UPDT 6
emilmont 77:869cf507173a 334 /**
emilmont 77:869cf507173a 335 * @}
emilmont 77:869cf507173a 336 */
emilmont 77:869cf507173a 337
emilmont 77:869cf507173a 338 /** @defgroup HCFG_SPEED_Defines_
emilmont 77:869cf507173a 339 * @{
emilmont 77:869cf507173a 340 */
emilmont 77:869cf507173a 341 #define HCFG_30_60_MHZ 0
emilmont 77:869cf507173a 342 #define HCFG_48_MHZ 1
emilmont 77:869cf507173a 343 #define HCFG_6_MHZ 2
emilmont 77:869cf507173a 344 /**
emilmont 77:869cf507173a 345 * @}
emilmont 77:869cf507173a 346 */
emilmont 77:869cf507173a 347
emilmont 77:869cf507173a 348 /** @defgroup HPRT0_PRTSPD_SPEED_Defines_
emilmont 77:869cf507173a 349 * @{
emilmont 77:869cf507173a 350 */
emilmont 77:869cf507173a 351 #define HPRT0_PRTSPD_HIGH_SPEED 0
emilmont 77:869cf507173a 352 #define HPRT0_PRTSPD_FULL_SPEED 1
emilmont 77:869cf507173a 353 #define HPRT0_PRTSPD_LOW_SPEED 2
emilmont 77:869cf507173a 354 /**
emilmont 77:869cf507173a 355 * @}
emilmont 77:869cf507173a 356 */
emilmont 77:869cf507173a 357
emilmont 77:869cf507173a 358 #define HCCHAR_CTRL 0
emilmont 77:869cf507173a 359 #define HCCHAR_ISOC 1
emilmont 77:869cf507173a 360 #define HCCHAR_BULK 2
emilmont 77:869cf507173a 361 #define HCCHAR_INTR 3
emilmont 77:869cf507173a 362
emilmont 77:869cf507173a 363 #define HC_PID_DATA0 0
emilmont 77:869cf507173a 364 #define HC_PID_DATA2 1
emilmont 77:869cf507173a 365 #define HC_PID_DATA1 2
emilmont 77:869cf507173a 366 #define HC_PID_SETUP 3
emilmont 77:869cf507173a 367
emilmont 77:869cf507173a 368 #define GRXSTS_PKTSTS_IN 2
emilmont 77:869cf507173a 369 #define GRXSTS_PKTSTS_IN_XFER_COMP 3
emilmont 77:869cf507173a 370 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
emilmont 77:869cf507173a 371 #define GRXSTS_PKTSTS_CH_HALTED 7
emilmont 77:869cf507173a 372
emilmont 77:869cf507173a 373 #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
emilmont 77:869cf507173a 374 #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE)
emilmont 77:869cf507173a 375
emilmont 77:869cf507173a 376 #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE))
emilmont 77:869cf507173a 377 #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
emilmont 77:869cf507173a 378 #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
emilmont 77:869cf507173a 379 #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
emilmont 77:869cf507173a 380
emilmont 77:869cf507173a 381 #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE))
emilmont 77:869cf507173a 382 #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE))
emilmont 77:869cf507173a 383
emilmont 77:869cf507173a 384 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 385 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
emilmont 77:869cf507173a 386 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
emilmont 77:869cf507173a 387
emilmont 77:869cf507173a 388 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
emilmont 77:869cf507173a 389 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
emilmont 77:869cf507173a 390
emilmont 77:869cf507173a 391 /* Exported functions --------------------------------------------------------*/
emilmont 77:869cf507173a 392 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
emilmont 77:869cf507173a 393 HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
emilmont 77:869cf507173a 394 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 395 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 396 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode);
emilmont 77:869cf507173a 397 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed);
emilmont 77:869cf507173a 398 HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 399 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num );
emilmont 77:869cf507173a 400 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
emilmont 77:869cf507173a 401 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
emilmont 77:869cf507173a 402 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
emilmont 77:869cf507173a 403 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
emilmont 77:869cf507173a 404 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
emilmont 77:869cf507173a 405 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
emilmont 77:869cf507173a 406 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma);
emilmont 77:869cf507173a 407 void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
emilmont 77:869cf507173a 408 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
emilmont 77:869cf507173a 409 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
emilmont 77:869cf507173a 410 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address);
emilmont 77:869cf507173a 411 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 412 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 413 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 414 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 415 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup);
emilmont 77:869cf507173a 416 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 417 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 418 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 419 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 420 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
emilmont 77:869cf507173a 421 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 422 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
emilmont 77:869cf507173a 423 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
emilmont 77:869cf507173a 424
emilmont 77:869cf507173a 425 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
emilmont 77:869cf507173a 426 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq);
emilmont 77:869cf507173a 427 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 428 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state);
emilmont 77:869cf507173a 429 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 430 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 431 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
emilmont 77:869cf507173a 432 uint8_t ch_num,
emilmont 77:869cf507173a 433 uint8_t epnum,
emilmont 77:869cf507173a 434 uint8_t dev_address,
emilmont 77:869cf507173a 435 uint8_t speed,
emilmont 77:869cf507173a 436 uint8_t ep_type,
emilmont 77:869cf507173a 437 uint16_t mps);
emilmont 77:869cf507173a 438 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma);
emilmont 77:869cf507173a 439 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 440 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num);
emilmont 77:869cf507173a 441 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num);
emilmont 77:869cf507173a 442 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
emilmont 77:869cf507173a 443
emilmont 77:869cf507173a 444 /**
emilmont 77:869cf507173a 445 * @}
emilmont 77:869cf507173a 446 */
emilmont 77:869cf507173a 447
emilmont 77:869cf507173a 448 /**
emilmont 77:869cf507173a 449 * @}
emilmont 77:869cf507173a 450 */
emilmont 77:869cf507173a 451
emilmont 77:869cf507173a 452 #ifdef __cplusplus
emilmont 77:869cf507173a 453 }
emilmont 77:869cf507173a 454 #endif
emilmont 77:869cf507173a 455
emilmont 77:869cf507173a 456
emilmont 77:869cf507173a 457 #endif /* __STM32F4xx_LL_USB_H */
emilmont 77:869cf507173a 458
emilmont 77:869cf507173a 459 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/