Egor Rumjantsev / mbed

The official mbed C/C SDK provides the software platform and libraries to build your applications.

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TARGET_EFM32WG_STK3800/efm32wg_dac.h@98:8ab26030e058, 2015-04-29 (annotated)

Committer:
Kojto
Date:
Wed Apr 29 10:16:23 2015 +0100
Revision:
98:8ab26030e058
Release 98 of the mbed library



Changes:

 - Silabs new targets (Giant, Zero, Happy, Leopard, Wonder Geckos)

 - Asynchronous SPI, I2C, Serial

 - LowPower classes

 - Nordic - nordic SDK v8.0 update

 - Teensy - gcc arm fix for startup

 - Nucleo F411 - usb freq fix

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 98:8ab26030e058 1 /**************************************************************************//**
Kojto 98:8ab26030e058 2 * @file efm32wg_dac.h
Kojto 98:8ab26030e058 3 * @brief EFM32WG_DAC register and bit field definitions
Kojto 98:8ab26030e058 4 * @version 3.20.6
Kojto 98:8ab26030e058 5 ******************************************************************************
Kojto 98:8ab26030e058 6 * @section License
Kojto 98:8ab26030e058 7 * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
Kojto 98:8ab26030e058 8 ******************************************************************************
Kojto 98:8ab26030e058 9 *
Kojto 98:8ab26030e058 10 * Permission is granted to anyone to use this software for any purpose,
Kojto 98:8ab26030e058 11 * including commercial applications, and to alter it and redistribute it
Kojto 98:8ab26030e058 12 * freely, subject to the following restrictions:
Kojto 98:8ab26030e058 13 *
Kojto 98:8ab26030e058 14 * 1. The origin of this software must not be misrepresented; you must not
Kojto 98:8ab26030e058 15 * claim that you wrote the original software.@n
Kojto 98:8ab26030e058 16 * 2. Altered source versions must be plainly marked as such, and must not be
Kojto 98:8ab26030e058 17 * misrepresented as being the original software.@n
Kojto 98:8ab26030e058 18 * 3. This notice may not be removed or altered from any source distribution.
Kojto 98:8ab26030e058 19 *
Kojto 98:8ab26030e058 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
Kojto 98:8ab26030e058 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
Kojto 98:8ab26030e058 22 * providing the Software "AS IS", with no express or implied warranties of any
Kojto 98:8ab26030e058 23 * kind, including, but not limited to, any implied warranties of
Kojto 98:8ab26030e058 24 * merchantability or fitness for any particular purpose or warranties against
Kojto 98:8ab26030e058 25 * infringement of any proprietary rights of a third party.
Kojto 98:8ab26030e058 26 *
Kojto 98:8ab26030e058 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
Kojto 98:8ab26030e058 28 * incidental, or special damages, or any other relief, or for any claim by
Kojto 98:8ab26030e058 29 * any third party, arising from your use of this Software.
Kojto 98:8ab26030e058 30 *
Kojto 98:8ab26030e058 31 *****************************************************************************/
Kojto 98:8ab26030e058 32 /**************************************************************************//**
Kojto 98:8ab26030e058 33 * @defgroup EFM32WG_DAC
Kojto 98:8ab26030e058 34 * @{
Kojto 98:8ab26030e058 35 * @brief EFM32WG_DAC Register Declaration
Kojto 98:8ab26030e058 36 *****************************************************************************/
Kojto 98:8ab26030e058 37 typedef struct
Kojto 98:8ab26030e058 38 {
Kojto 98:8ab26030e058 39 __IO uint32_t CTRL; /**< Control Register */
Kojto 98:8ab26030e058 40 __I uint32_t STATUS; /**< Status Register */
Kojto 98:8ab26030e058 41 __IO uint32_t CH0CTRL; /**< Channel 0 Control Register */
Kojto 98:8ab26030e058 42 __IO uint32_t CH1CTRL; /**< Channel 1 Control Register */
Kojto 98:8ab26030e058 43 __IO uint32_t IEN; /**< Interrupt Enable Register */
Kojto 98:8ab26030e058 44 __I uint32_t IF; /**< Interrupt Flag Register */
Kojto 98:8ab26030e058 45 __IO uint32_t IFS; /**< Interrupt Flag Set Register */
Kojto 98:8ab26030e058 46 __IO uint32_t IFC; /**< Interrupt Flag Clear Register */
Kojto 98:8ab26030e058 47 __IO uint32_t CH0DATA; /**< Channel 0 Data Register */
Kojto 98:8ab26030e058 48 __IO uint32_t CH1DATA; /**< Channel 1 Data Register */
Kojto 98:8ab26030e058 49 __IO uint32_t COMBDATA; /**< Combined Data Register */
Kojto 98:8ab26030e058 50 __IO uint32_t CAL; /**< Calibration Register */
Kojto 98:8ab26030e058 51 __IO uint32_t BIASPROG; /**< Bias Programming Register */
Kojto 98:8ab26030e058 52 uint32_t RESERVED0[8]; /**< Reserved for future use **/
Kojto 98:8ab26030e058 53 __IO uint32_t OPACTRL; /**< Operational Amplifier Control Register */
Kojto 98:8ab26030e058 54 __IO uint32_t OPAOFFSET; /**< Operational Amplifier Offset Register */
Kojto 98:8ab26030e058 55 __IO uint32_t OPA0MUX; /**< Operational Amplifier Mux Configuration Register */
Kojto 98:8ab26030e058 56 __IO uint32_t OPA1MUX; /**< Operational Amplifier Mux Configuration Register */
Kojto 98:8ab26030e058 57 __IO uint32_t OPA2MUX; /**< Operational Amplifier Mux Configuration Register */
Kojto 98:8ab26030e058 58 } DAC_TypeDef; /** @} */
Kojto 98:8ab26030e058 59
Kojto 98:8ab26030e058 60 /**************************************************************************//**
Kojto 98:8ab26030e058 61 * @defgroup EFM32WG_DAC_BitFields
Kojto 98:8ab26030e058 62 * @{
Kojto 98:8ab26030e058 63 *****************************************************************************/
Kojto 98:8ab26030e058 64
Kojto 98:8ab26030e058 65 /* Bit fields for DAC CTRL */
Kojto 98:8ab26030e058 66 #define _DAC_CTRL_RESETVALUE 0x00000010UL /**< Default value for DAC_CTRL */
Kojto 98:8ab26030e058 67 #define _DAC_CTRL_MASK 0x003703FFUL /**< Mask for DAC_CTRL */
Kojto 98:8ab26030e058 68 #define DAC_CTRL_DIFF (0x1UL << 0) /**< Differential Mode */
Kojto 98:8ab26030e058 69 #define _DAC_CTRL_DIFF_SHIFT 0 /**< Shift value for DAC_DIFF */
Kojto 98:8ab26030e058 70 #define _DAC_CTRL_DIFF_MASK 0x1UL /**< Bit mask for DAC_DIFF */
Kojto 98:8ab26030e058 71 #define _DAC_CTRL_DIFF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 72 #define DAC_CTRL_DIFF_DEFAULT (_DAC_CTRL_DIFF_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 73 #define DAC_CTRL_SINEMODE (0x1UL << 1) /**< Sine Mode */
Kojto 98:8ab26030e058 74 #define _DAC_CTRL_SINEMODE_SHIFT 1 /**< Shift value for DAC_SINEMODE */
Kojto 98:8ab26030e058 75 #define _DAC_CTRL_SINEMODE_MASK 0x2UL /**< Bit mask for DAC_SINEMODE */
Kojto 98:8ab26030e058 76 #define _DAC_CTRL_SINEMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 77 #define DAC_CTRL_SINEMODE_DEFAULT (_DAC_CTRL_SINEMODE_DEFAULT << 1) /**< Shifted mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 78 #define _DAC_CTRL_CONVMODE_SHIFT 2 /**< Shift value for DAC_CONVMODE */
Kojto 98:8ab26030e058 79 #define _DAC_CTRL_CONVMODE_MASK 0xCUL /**< Bit mask for DAC_CONVMODE */
Kojto 98:8ab26030e058 80 #define _DAC_CTRL_CONVMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 81 #define _DAC_CTRL_CONVMODE_CONTINUOUS 0x00000000UL /**< Mode CONTINUOUS for DAC_CTRL */
Kojto 98:8ab26030e058 82 #define _DAC_CTRL_CONVMODE_SAMPLEHOLD 0x00000001UL /**< Mode SAMPLEHOLD for DAC_CTRL */
Kojto 98:8ab26030e058 83 #define _DAC_CTRL_CONVMODE_SAMPLEOFF 0x00000002UL /**< Mode SAMPLEOFF for DAC_CTRL */
Kojto 98:8ab26030e058 84 #define DAC_CTRL_CONVMODE_DEFAULT (_DAC_CTRL_CONVMODE_DEFAULT << 2) /**< Shifted mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 85 #define DAC_CTRL_CONVMODE_CONTINUOUS (_DAC_CTRL_CONVMODE_CONTINUOUS << 2) /**< Shifted mode CONTINUOUS for DAC_CTRL */
Kojto 98:8ab26030e058 86 #define DAC_CTRL_CONVMODE_SAMPLEHOLD (_DAC_CTRL_CONVMODE_SAMPLEHOLD << 2) /**< Shifted mode SAMPLEHOLD for DAC_CTRL */
Kojto 98:8ab26030e058 87 #define DAC_CTRL_CONVMODE_SAMPLEOFF (_DAC_CTRL_CONVMODE_SAMPLEOFF << 2) /**< Shifted mode SAMPLEOFF for DAC_CTRL */
Kojto 98:8ab26030e058 88 #define _DAC_CTRL_OUTMODE_SHIFT 4 /**< Shift value for DAC_OUTMODE */
Kojto 98:8ab26030e058 89 #define _DAC_CTRL_OUTMODE_MASK 0x30UL /**< Bit mask for DAC_OUTMODE */
Kojto 98:8ab26030e058 90 #define _DAC_CTRL_OUTMODE_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_CTRL */
Kojto 98:8ab26030e058 91 #define _DAC_CTRL_OUTMODE_DEFAULT 0x00000001UL /**< Mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 92 #define _DAC_CTRL_OUTMODE_PIN 0x00000001UL /**< Mode PIN for DAC_CTRL */
Kojto 98:8ab26030e058 93 #define _DAC_CTRL_OUTMODE_ADC 0x00000002UL /**< Mode ADC for DAC_CTRL */
Kojto 98:8ab26030e058 94 #define _DAC_CTRL_OUTMODE_PINADC 0x00000003UL /**< Mode PINADC for DAC_CTRL */
Kojto 98:8ab26030e058 95 #define DAC_CTRL_OUTMODE_DISABLE (_DAC_CTRL_OUTMODE_DISABLE << 4) /**< Shifted mode DISABLE for DAC_CTRL */
Kojto 98:8ab26030e058 96 #define DAC_CTRL_OUTMODE_DEFAULT (_DAC_CTRL_OUTMODE_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 97 #define DAC_CTRL_OUTMODE_PIN (_DAC_CTRL_OUTMODE_PIN << 4) /**< Shifted mode PIN for DAC_CTRL */
Kojto 98:8ab26030e058 98 #define DAC_CTRL_OUTMODE_ADC (_DAC_CTRL_OUTMODE_ADC << 4) /**< Shifted mode ADC for DAC_CTRL */
Kojto 98:8ab26030e058 99 #define DAC_CTRL_OUTMODE_PINADC (_DAC_CTRL_OUTMODE_PINADC << 4) /**< Shifted mode PINADC for DAC_CTRL */
Kojto 98:8ab26030e058 100 #define DAC_CTRL_OUTENPRS (0x1UL << 6) /**< PRS Controlled Output Enable */
Kojto 98:8ab26030e058 101 #define _DAC_CTRL_OUTENPRS_SHIFT 6 /**< Shift value for DAC_OUTENPRS */
Kojto 98:8ab26030e058 102 #define _DAC_CTRL_OUTENPRS_MASK 0x40UL /**< Bit mask for DAC_OUTENPRS */
Kojto 98:8ab26030e058 103 #define _DAC_CTRL_OUTENPRS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 104 #define DAC_CTRL_OUTENPRS_DEFAULT (_DAC_CTRL_OUTENPRS_DEFAULT << 6) /**< Shifted mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 105 #define DAC_CTRL_CH0PRESCRST (0x1UL << 7) /**< Channel 0 Start Reset Prescaler */
Kojto 98:8ab26030e058 106 #define _DAC_CTRL_CH0PRESCRST_SHIFT 7 /**< Shift value for DAC_CH0PRESCRST */
Kojto 98:8ab26030e058 107 #define _DAC_CTRL_CH0PRESCRST_MASK 0x80UL /**< Bit mask for DAC_CH0PRESCRST */
Kojto 98:8ab26030e058 108 #define _DAC_CTRL_CH0PRESCRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 109 #define DAC_CTRL_CH0PRESCRST_DEFAULT (_DAC_CTRL_CH0PRESCRST_DEFAULT << 7) /**< Shifted mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 110 #define _DAC_CTRL_REFSEL_SHIFT 8 /**< Shift value for DAC_REFSEL */
Kojto 98:8ab26030e058 111 #define _DAC_CTRL_REFSEL_MASK 0x300UL /**< Bit mask for DAC_REFSEL */
Kojto 98:8ab26030e058 112 #define _DAC_CTRL_REFSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 113 #define _DAC_CTRL_REFSEL_1V25 0x00000000UL /**< Mode 1V25 for DAC_CTRL */
Kojto 98:8ab26030e058 114 #define _DAC_CTRL_REFSEL_2V5 0x00000001UL /**< Mode 2V5 for DAC_CTRL */
Kojto 98:8ab26030e058 115 #define _DAC_CTRL_REFSEL_VDD 0x00000002UL /**< Mode VDD for DAC_CTRL */
Kojto 98:8ab26030e058 116 #define DAC_CTRL_REFSEL_DEFAULT (_DAC_CTRL_REFSEL_DEFAULT << 8) /**< Shifted mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 117 #define DAC_CTRL_REFSEL_1V25 (_DAC_CTRL_REFSEL_1V25 << 8) /**< Shifted mode 1V25 for DAC_CTRL */
Kojto 98:8ab26030e058 118 #define DAC_CTRL_REFSEL_2V5 (_DAC_CTRL_REFSEL_2V5 << 8) /**< Shifted mode 2V5 for DAC_CTRL */
Kojto 98:8ab26030e058 119 #define DAC_CTRL_REFSEL_VDD (_DAC_CTRL_REFSEL_VDD << 8) /**< Shifted mode VDD for DAC_CTRL */
Kojto 98:8ab26030e058 120 #define _DAC_CTRL_PRESC_SHIFT 16 /**< Shift value for DAC_PRESC */
Kojto 98:8ab26030e058 121 #define _DAC_CTRL_PRESC_MASK 0x70000UL /**< Bit mask for DAC_PRESC */
Kojto 98:8ab26030e058 122 #define _DAC_CTRL_PRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 123 #define _DAC_CTRL_PRESC_NODIVISION 0x00000000UL /**< Mode NODIVISION for DAC_CTRL */
Kojto 98:8ab26030e058 124 #define DAC_CTRL_PRESC_DEFAULT (_DAC_CTRL_PRESC_DEFAULT << 16) /**< Shifted mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 125 #define DAC_CTRL_PRESC_NODIVISION (_DAC_CTRL_PRESC_NODIVISION << 16) /**< Shifted mode NODIVISION for DAC_CTRL */
Kojto 98:8ab26030e058 126 #define _DAC_CTRL_REFRSEL_SHIFT 20 /**< Shift value for DAC_REFRSEL */
Kojto 98:8ab26030e058 127 #define _DAC_CTRL_REFRSEL_MASK 0x300000UL /**< Bit mask for DAC_REFRSEL */
Kojto 98:8ab26030e058 128 #define _DAC_CTRL_REFRSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 129 #define _DAC_CTRL_REFRSEL_8CYCLES 0x00000000UL /**< Mode 8CYCLES for DAC_CTRL */
Kojto 98:8ab26030e058 130 #define _DAC_CTRL_REFRSEL_16CYCLES 0x00000001UL /**< Mode 16CYCLES for DAC_CTRL */
Kojto 98:8ab26030e058 131 #define _DAC_CTRL_REFRSEL_32CYCLES 0x00000002UL /**< Mode 32CYCLES for DAC_CTRL */
Kojto 98:8ab26030e058 132 #define _DAC_CTRL_REFRSEL_64CYCLES 0x00000003UL /**< Mode 64CYCLES for DAC_CTRL */
Kojto 98:8ab26030e058 133 #define DAC_CTRL_REFRSEL_DEFAULT (_DAC_CTRL_REFRSEL_DEFAULT << 20) /**< Shifted mode DEFAULT for DAC_CTRL */
Kojto 98:8ab26030e058 134 #define DAC_CTRL_REFRSEL_8CYCLES (_DAC_CTRL_REFRSEL_8CYCLES << 20) /**< Shifted mode 8CYCLES for DAC_CTRL */
Kojto 98:8ab26030e058 135 #define DAC_CTRL_REFRSEL_16CYCLES (_DAC_CTRL_REFRSEL_16CYCLES << 20) /**< Shifted mode 16CYCLES for DAC_CTRL */
Kojto 98:8ab26030e058 136 #define DAC_CTRL_REFRSEL_32CYCLES (_DAC_CTRL_REFRSEL_32CYCLES << 20) /**< Shifted mode 32CYCLES for DAC_CTRL */
Kojto 98:8ab26030e058 137 #define DAC_CTRL_REFRSEL_64CYCLES (_DAC_CTRL_REFRSEL_64CYCLES << 20) /**< Shifted mode 64CYCLES for DAC_CTRL */
Kojto 98:8ab26030e058 138
Kojto 98:8ab26030e058 139 /* Bit fields for DAC STATUS */
Kojto 98:8ab26030e058 140 #define _DAC_STATUS_RESETVALUE 0x00000000UL /**< Default value for DAC_STATUS */
Kojto 98:8ab26030e058 141 #define _DAC_STATUS_MASK 0x00000003UL /**< Mask for DAC_STATUS */
Kojto 98:8ab26030e058 142 #define DAC_STATUS_CH0DV (0x1UL << 0) /**< Channel 0 Data Valid */
Kojto 98:8ab26030e058 143 #define _DAC_STATUS_CH0DV_SHIFT 0 /**< Shift value for DAC_CH0DV */
Kojto 98:8ab26030e058 144 #define _DAC_STATUS_CH0DV_MASK 0x1UL /**< Bit mask for DAC_CH0DV */
Kojto 98:8ab26030e058 145 #define _DAC_STATUS_CH0DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_STATUS */
Kojto 98:8ab26030e058 146 #define DAC_STATUS_CH0DV_DEFAULT (_DAC_STATUS_CH0DV_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_STATUS */
Kojto 98:8ab26030e058 147 #define DAC_STATUS_CH1DV (0x1UL << 1) /**< Channel 1 Data Valid */
Kojto 98:8ab26030e058 148 #define _DAC_STATUS_CH1DV_SHIFT 1 /**< Shift value for DAC_CH1DV */
Kojto 98:8ab26030e058 149 #define _DAC_STATUS_CH1DV_MASK 0x2UL /**< Bit mask for DAC_CH1DV */
Kojto 98:8ab26030e058 150 #define _DAC_STATUS_CH1DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_STATUS */
Kojto 98:8ab26030e058 151 #define DAC_STATUS_CH1DV_DEFAULT (_DAC_STATUS_CH1DV_DEFAULT << 1) /**< Shifted mode DEFAULT for DAC_STATUS */
Kojto 98:8ab26030e058 152
Kojto 98:8ab26030e058 153 /* Bit fields for DAC CH0CTRL */
Kojto 98:8ab26030e058 154 #define _DAC_CH0CTRL_RESETVALUE 0x00000000UL /**< Default value for DAC_CH0CTRL */
Kojto 98:8ab26030e058 155 #define _DAC_CH0CTRL_MASK 0x000000F7UL /**< Mask for DAC_CH0CTRL */
Kojto 98:8ab26030e058 156 #define DAC_CH0CTRL_EN (0x1UL << 0) /**< Channel 0 Enable */
Kojto 98:8ab26030e058 157 #define _DAC_CH0CTRL_EN_SHIFT 0 /**< Shift value for DAC_EN */
Kojto 98:8ab26030e058 158 #define _DAC_CH0CTRL_EN_MASK 0x1UL /**< Bit mask for DAC_EN */
Kojto 98:8ab26030e058 159 #define _DAC_CH0CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0CTRL */
Kojto 98:8ab26030e058 160 #define DAC_CH0CTRL_EN_DEFAULT (_DAC_CH0CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_CH0CTRL */
Kojto 98:8ab26030e058 161 #define DAC_CH0CTRL_REFREN (0x1UL << 1) /**< Channel 0 Automatic Refresh Enable */
Kojto 98:8ab26030e058 162 #define _DAC_CH0CTRL_REFREN_SHIFT 1 /**< Shift value for DAC_REFREN */
Kojto 98:8ab26030e058 163 #define _DAC_CH0CTRL_REFREN_MASK 0x2UL /**< Bit mask for DAC_REFREN */
Kojto 98:8ab26030e058 164 #define _DAC_CH0CTRL_REFREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0CTRL */
Kojto 98:8ab26030e058 165 #define DAC_CH0CTRL_REFREN_DEFAULT (_DAC_CH0CTRL_REFREN_DEFAULT << 1) /**< Shifted mode DEFAULT for DAC_CH0CTRL */
Kojto 98:8ab26030e058 166 #define DAC_CH0CTRL_PRSEN (0x1UL << 2) /**< Channel 0 PRS Trigger Enable */
Kojto 98:8ab26030e058 167 #define _DAC_CH0CTRL_PRSEN_SHIFT 2 /**< Shift value for DAC_PRSEN */
Kojto 98:8ab26030e058 168 #define _DAC_CH0CTRL_PRSEN_MASK 0x4UL /**< Bit mask for DAC_PRSEN */
Kojto 98:8ab26030e058 169 #define _DAC_CH0CTRL_PRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0CTRL */
Kojto 98:8ab26030e058 170 #define DAC_CH0CTRL_PRSEN_DEFAULT (_DAC_CH0CTRL_PRSEN_DEFAULT << 2) /**< Shifted mode DEFAULT for DAC_CH0CTRL */
Kojto 98:8ab26030e058 171 #define _DAC_CH0CTRL_PRSSEL_SHIFT 4 /**< Shift value for DAC_PRSSEL */
Kojto 98:8ab26030e058 172 #define _DAC_CH0CTRL_PRSSEL_MASK 0xF0UL /**< Bit mask for DAC_PRSSEL */
Kojto 98:8ab26030e058 173 #define _DAC_CH0CTRL_PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0CTRL */
Kojto 98:8ab26030e058 174 #define _DAC_CH0CTRL_PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 175 #define _DAC_CH0CTRL_PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 176 #define _DAC_CH0CTRL_PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 177 #define _DAC_CH0CTRL_PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 178 #define _DAC_CH0CTRL_PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 179 #define _DAC_CH0CTRL_PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 180 #define _DAC_CH0CTRL_PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 181 #define _DAC_CH0CTRL_PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 182 #define _DAC_CH0CTRL_PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 183 #define _DAC_CH0CTRL_PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 184 #define _DAC_CH0CTRL_PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 185 #define _DAC_CH0CTRL_PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 186 #define DAC_CH0CTRL_PRSSEL_DEFAULT (_DAC_CH0CTRL_PRSSEL_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_CH0CTRL */
Kojto 98:8ab26030e058 187 #define DAC_CH0CTRL_PRSSEL_PRSCH0 (_DAC_CH0CTRL_PRSSEL_PRSCH0 << 4) /**< Shifted mode PRSCH0 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 188 #define DAC_CH0CTRL_PRSSEL_PRSCH1 (_DAC_CH0CTRL_PRSSEL_PRSCH1 << 4) /**< Shifted mode PRSCH1 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 189 #define DAC_CH0CTRL_PRSSEL_PRSCH2 (_DAC_CH0CTRL_PRSSEL_PRSCH2 << 4) /**< Shifted mode PRSCH2 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 190 #define DAC_CH0CTRL_PRSSEL_PRSCH3 (_DAC_CH0CTRL_PRSSEL_PRSCH3 << 4) /**< Shifted mode PRSCH3 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 191 #define DAC_CH0CTRL_PRSSEL_PRSCH4 (_DAC_CH0CTRL_PRSSEL_PRSCH4 << 4) /**< Shifted mode PRSCH4 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 192 #define DAC_CH0CTRL_PRSSEL_PRSCH5 (_DAC_CH0CTRL_PRSSEL_PRSCH5 << 4) /**< Shifted mode PRSCH5 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 193 #define DAC_CH0CTRL_PRSSEL_PRSCH6 (_DAC_CH0CTRL_PRSSEL_PRSCH6 << 4) /**< Shifted mode PRSCH6 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 194 #define DAC_CH0CTRL_PRSSEL_PRSCH7 (_DAC_CH0CTRL_PRSSEL_PRSCH7 << 4) /**< Shifted mode PRSCH7 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 195 #define DAC_CH0CTRL_PRSSEL_PRSCH8 (_DAC_CH0CTRL_PRSSEL_PRSCH8 << 4) /**< Shifted mode PRSCH8 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 196 #define DAC_CH0CTRL_PRSSEL_PRSCH9 (_DAC_CH0CTRL_PRSSEL_PRSCH9 << 4) /**< Shifted mode PRSCH9 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 197 #define DAC_CH0CTRL_PRSSEL_PRSCH10 (_DAC_CH0CTRL_PRSSEL_PRSCH10 << 4) /**< Shifted mode PRSCH10 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 198 #define DAC_CH0CTRL_PRSSEL_PRSCH11 (_DAC_CH0CTRL_PRSSEL_PRSCH11 << 4) /**< Shifted mode PRSCH11 for DAC_CH0CTRL */
Kojto 98:8ab26030e058 199
Kojto 98:8ab26030e058 200 /* Bit fields for DAC CH1CTRL */
Kojto 98:8ab26030e058 201 #define _DAC_CH1CTRL_RESETVALUE 0x00000000UL /**< Default value for DAC_CH1CTRL */
Kojto 98:8ab26030e058 202 #define _DAC_CH1CTRL_MASK 0x000000F7UL /**< Mask for DAC_CH1CTRL */
Kojto 98:8ab26030e058 203 #define DAC_CH1CTRL_EN (0x1UL << 0) /**< Channel 1 Enable */
Kojto 98:8ab26030e058 204 #define _DAC_CH1CTRL_EN_SHIFT 0 /**< Shift value for DAC_EN */
Kojto 98:8ab26030e058 205 #define _DAC_CH1CTRL_EN_MASK 0x1UL /**< Bit mask for DAC_EN */
Kojto 98:8ab26030e058 206 #define _DAC_CH1CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1CTRL */
Kojto 98:8ab26030e058 207 #define DAC_CH1CTRL_EN_DEFAULT (_DAC_CH1CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_CH1CTRL */
Kojto 98:8ab26030e058 208 #define DAC_CH1CTRL_REFREN (0x1UL << 1) /**< Channel 1 Automatic Refresh Enable */
Kojto 98:8ab26030e058 209 #define _DAC_CH1CTRL_REFREN_SHIFT 1 /**< Shift value for DAC_REFREN */
Kojto 98:8ab26030e058 210 #define _DAC_CH1CTRL_REFREN_MASK 0x2UL /**< Bit mask for DAC_REFREN */
Kojto 98:8ab26030e058 211 #define _DAC_CH1CTRL_REFREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1CTRL */
Kojto 98:8ab26030e058 212 #define DAC_CH1CTRL_REFREN_DEFAULT (_DAC_CH1CTRL_REFREN_DEFAULT << 1) /**< Shifted mode DEFAULT for DAC_CH1CTRL */
Kojto 98:8ab26030e058 213 #define DAC_CH1CTRL_PRSEN (0x1UL << 2) /**< Channel 1 PRS Trigger Enable */
Kojto 98:8ab26030e058 214 #define _DAC_CH1CTRL_PRSEN_SHIFT 2 /**< Shift value for DAC_PRSEN */
Kojto 98:8ab26030e058 215 #define _DAC_CH1CTRL_PRSEN_MASK 0x4UL /**< Bit mask for DAC_PRSEN */
Kojto 98:8ab26030e058 216 #define _DAC_CH1CTRL_PRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1CTRL */
Kojto 98:8ab26030e058 217 #define DAC_CH1CTRL_PRSEN_DEFAULT (_DAC_CH1CTRL_PRSEN_DEFAULT << 2) /**< Shifted mode DEFAULT for DAC_CH1CTRL */
Kojto 98:8ab26030e058 218 #define _DAC_CH1CTRL_PRSSEL_SHIFT 4 /**< Shift value for DAC_PRSSEL */
Kojto 98:8ab26030e058 219 #define _DAC_CH1CTRL_PRSSEL_MASK 0xF0UL /**< Bit mask for DAC_PRSSEL */
Kojto 98:8ab26030e058 220 #define _DAC_CH1CTRL_PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1CTRL */
Kojto 98:8ab26030e058 221 #define _DAC_CH1CTRL_PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 222 #define _DAC_CH1CTRL_PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 223 #define _DAC_CH1CTRL_PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 224 #define _DAC_CH1CTRL_PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 225 #define _DAC_CH1CTRL_PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 226 #define _DAC_CH1CTRL_PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 227 #define _DAC_CH1CTRL_PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 228 #define _DAC_CH1CTRL_PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 229 #define _DAC_CH1CTRL_PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 230 #define _DAC_CH1CTRL_PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 231 #define _DAC_CH1CTRL_PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 232 #define _DAC_CH1CTRL_PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 233 #define DAC_CH1CTRL_PRSSEL_DEFAULT (_DAC_CH1CTRL_PRSSEL_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_CH1CTRL */
Kojto 98:8ab26030e058 234 #define DAC_CH1CTRL_PRSSEL_PRSCH0 (_DAC_CH1CTRL_PRSSEL_PRSCH0 << 4) /**< Shifted mode PRSCH0 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 235 #define DAC_CH1CTRL_PRSSEL_PRSCH1 (_DAC_CH1CTRL_PRSSEL_PRSCH1 << 4) /**< Shifted mode PRSCH1 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 236 #define DAC_CH1CTRL_PRSSEL_PRSCH2 (_DAC_CH1CTRL_PRSSEL_PRSCH2 << 4) /**< Shifted mode PRSCH2 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 237 #define DAC_CH1CTRL_PRSSEL_PRSCH3 (_DAC_CH1CTRL_PRSSEL_PRSCH3 << 4) /**< Shifted mode PRSCH3 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 238 #define DAC_CH1CTRL_PRSSEL_PRSCH4 (_DAC_CH1CTRL_PRSSEL_PRSCH4 << 4) /**< Shifted mode PRSCH4 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 239 #define DAC_CH1CTRL_PRSSEL_PRSCH5 (_DAC_CH1CTRL_PRSSEL_PRSCH5 << 4) /**< Shifted mode PRSCH5 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 240 #define DAC_CH1CTRL_PRSSEL_PRSCH6 (_DAC_CH1CTRL_PRSSEL_PRSCH6 << 4) /**< Shifted mode PRSCH6 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 241 #define DAC_CH1CTRL_PRSSEL_PRSCH7 (_DAC_CH1CTRL_PRSSEL_PRSCH7 << 4) /**< Shifted mode PRSCH7 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 242 #define DAC_CH1CTRL_PRSSEL_PRSCH8 (_DAC_CH1CTRL_PRSSEL_PRSCH8 << 4) /**< Shifted mode PRSCH8 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 243 #define DAC_CH1CTRL_PRSSEL_PRSCH9 (_DAC_CH1CTRL_PRSSEL_PRSCH9 << 4) /**< Shifted mode PRSCH9 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 244 #define DAC_CH1CTRL_PRSSEL_PRSCH10 (_DAC_CH1CTRL_PRSSEL_PRSCH10 << 4) /**< Shifted mode PRSCH10 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 245 #define DAC_CH1CTRL_PRSSEL_PRSCH11 (_DAC_CH1CTRL_PRSSEL_PRSCH11 << 4) /**< Shifted mode PRSCH11 for DAC_CH1CTRL */
Kojto 98:8ab26030e058 246
Kojto 98:8ab26030e058 247 /* Bit fields for DAC IEN */
Kojto 98:8ab26030e058 248 #define _DAC_IEN_RESETVALUE 0x00000000UL /**< Default value for DAC_IEN */
Kojto 98:8ab26030e058 249 #define _DAC_IEN_MASK 0x00000033UL /**< Mask for DAC_IEN */
Kojto 98:8ab26030e058 250 #define DAC_IEN_CH0 (0x1UL << 0) /**< Channel 0 Conversion Complete Interrupt Enable */
Kojto 98:8ab26030e058 251 #define _DAC_IEN_CH0_SHIFT 0 /**< Shift value for DAC_CH0 */
Kojto 98:8ab26030e058 252 #define _DAC_IEN_CH0_MASK 0x1UL /**< Bit mask for DAC_CH0 */
Kojto 98:8ab26030e058 253 #define _DAC_IEN_CH0_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IEN */
Kojto 98:8ab26030e058 254 #define DAC_IEN_CH0_DEFAULT (_DAC_IEN_CH0_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_IEN */
Kojto 98:8ab26030e058 255 #define DAC_IEN_CH1 (0x1UL << 1) /**< Channel 1 Conversion Complete Interrupt Enable */
Kojto 98:8ab26030e058 256 #define _DAC_IEN_CH1_SHIFT 1 /**< Shift value for DAC_CH1 */
Kojto 98:8ab26030e058 257 #define _DAC_IEN_CH1_MASK 0x2UL /**< Bit mask for DAC_CH1 */
Kojto 98:8ab26030e058 258 #define _DAC_IEN_CH1_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IEN */
Kojto 98:8ab26030e058 259 #define DAC_IEN_CH1_DEFAULT (_DAC_IEN_CH1_DEFAULT << 1) /**< Shifted mode DEFAULT for DAC_IEN */
Kojto 98:8ab26030e058 260 #define DAC_IEN_CH0UF (0x1UL << 4) /**< Channel 0 Conversion Data Underflow Interrupt Enable */
Kojto 98:8ab26030e058 261 #define _DAC_IEN_CH0UF_SHIFT 4 /**< Shift value for DAC_CH0UF */
Kojto 98:8ab26030e058 262 #define _DAC_IEN_CH0UF_MASK 0x10UL /**< Bit mask for DAC_CH0UF */
Kojto 98:8ab26030e058 263 #define _DAC_IEN_CH0UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IEN */
Kojto 98:8ab26030e058 264 #define DAC_IEN_CH0UF_DEFAULT (_DAC_IEN_CH0UF_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_IEN */
Kojto 98:8ab26030e058 265 #define DAC_IEN_CH1UF (0x1UL << 5) /**< Channel 1 Conversion Data Underflow Interrupt Enable */
Kojto 98:8ab26030e058 266 #define _DAC_IEN_CH1UF_SHIFT 5 /**< Shift value for DAC_CH1UF */
Kojto 98:8ab26030e058 267 #define _DAC_IEN_CH1UF_MASK 0x20UL /**< Bit mask for DAC_CH1UF */
Kojto 98:8ab26030e058 268 #define _DAC_IEN_CH1UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IEN */
Kojto 98:8ab26030e058 269 #define DAC_IEN_CH1UF_DEFAULT (_DAC_IEN_CH1UF_DEFAULT << 5) /**< Shifted mode DEFAULT for DAC_IEN */
Kojto 98:8ab26030e058 270
Kojto 98:8ab26030e058 271 /* Bit fields for DAC IF */
Kojto 98:8ab26030e058 272 #define _DAC_IF_RESETVALUE 0x00000000UL /**< Default value for DAC_IF */
Kojto 98:8ab26030e058 273 #define _DAC_IF_MASK 0x00000033UL /**< Mask for DAC_IF */
Kojto 98:8ab26030e058 274 #define DAC_IF_CH0 (0x1UL << 0) /**< Channel 0 Conversion Complete Interrupt Flag */
Kojto 98:8ab26030e058 275 #define _DAC_IF_CH0_SHIFT 0 /**< Shift value for DAC_CH0 */
Kojto 98:8ab26030e058 276 #define _DAC_IF_CH0_MASK 0x1UL /**< Bit mask for DAC_CH0 */
Kojto 98:8ab26030e058 277 #define _DAC_IF_CH0_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IF */
Kojto 98:8ab26030e058 278 #define DAC_IF_CH0_DEFAULT (_DAC_IF_CH0_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_IF */
Kojto 98:8ab26030e058 279 #define DAC_IF_CH1 (0x1UL << 1) /**< Channel 1 Conversion Complete Interrupt Flag */
Kojto 98:8ab26030e058 280 #define _DAC_IF_CH1_SHIFT 1 /**< Shift value for DAC_CH1 */
Kojto 98:8ab26030e058 281 #define _DAC_IF_CH1_MASK 0x2UL /**< Bit mask for DAC_CH1 */
Kojto 98:8ab26030e058 282 #define _DAC_IF_CH1_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IF */
Kojto 98:8ab26030e058 283 #define DAC_IF_CH1_DEFAULT (_DAC_IF_CH1_DEFAULT << 1) /**< Shifted mode DEFAULT for DAC_IF */
Kojto 98:8ab26030e058 284 #define DAC_IF_CH0UF (0x1UL << 4) /**< Channel 0 Data Underflow Interrupt Flag */
Kojto 98:8ab26030e058 285 #define _DAC_IF_CH0UF_SHIFT 4 /**< Shift value for DAC_CH0UF */
Kojto 98:8ab26030e058 286 #define _DAC_IF_CH0UF_MASK 0x10UL /**< Bit mask for DAC_CH0UF */
Kojto 98:8ab26030e058 287 #define _DAC_IF_CH0UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IF */
Kojto 98:8ab26030e058 288 #define DAC_IF_CH0UF_DEFAULT (_DAC_IF_CH0UF_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_IF */
Kojto 98:8ab26030e058 289 #define DAC_IF_CH1UF (0x1UL << 5) /**< Channel 1 Data Underflow Interrupt Flag */
Kojto 98:8ab26030e058 290 #define _DAC_IF_CH1UF_SHIFT 5 /**< Shift value for DAC_CH1UF */
Kojto 98:8ab26030e058 291 #define _DAC_IF_CH1UF_MASK 0x20UL /**< Bit mask for DAC_CH1UF */
Kojto 98:8ab26030e058 292 #define _DAC_IF_CH1UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IF */
Kojto 98:8ab26030e058 293 #define DAC_IF_CH1UF_DEFAULT (_DAC_IF_CH1UF_DEFAULT << 5) /**< Shifted mode DEFAULT for DAC_IF */
Kojto 98:8ab26030e058 294
Kojto 98:8ab26030e058 295 /* Bit fields for DAC IFS */
Kojto 98:8ab26030e058 296 #define _DAC_IFS_RESETVALUE 0x00000000UL /**< Default value for DAC_IFS */
Kojto 98:8ab26030e058 297 #define _DAC_IFS_MASK 0x00000033UL /**< Mask for DAC_IFS */
Kojto 98:8ab26030e058 298 #define DAC_IFS_CH0 (0x1UL << 0) /**< Channel 0 Conversion Complete Interrupt Flag Set */
Kojto 98:8ab26030e058 299 #define _DAC_IFS_CH0_SHIFT 0 /**< Shift value for DAC_CH0 */
Kojto 98:8ab26030e058 300 #define _DAC_IFS_CH0_MASK 0x1UL /**< Bit mask for DAC_CH0 */
Kojto 98:8ab26030e058 301 #define _DAC_IFS_CH0_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFS */
Kojto 98:8ab26030e058 302 #define DAC_IFS_CH0_DEFAULT (_DAC_IFS_CH0_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_IFS */
Kojto 98:8ab26030e058 303 #define DAC_IFS_CH1 (0x1UL << 1) /**< Channel 1 Conversion Complete Interrupt Flag Set */
Kojto 98:8ab26030e058 304 #define _DAC_IFS_CH1_SHIFT 1 /**< Shift value for DAC_CH1 */
Kojto 98:8ab26030e058 305 #define _DAC_IFS_CH1_MASK 0x2UL /**< Bit mask for DAC_CH1 */
Kojto 98:8ab26030e058 306 #define _DAC_IFS_CH1_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFS */
Kojto 98:8ab26030e058 307 #define DAC_IFS_CH1_DEFAULT (_DAC_IFS_CH1_DEFAULT << 1) /**< Shifted mode DEFAULT for DAC_IFS */
Kojto 98:8ab26030e058 308 #define DAC_IFS_CH0UF (0x1UL << 4) /**< Channel 0 Data Underflow Interrupt Flag Set */
Kojto 98:8ab26030e058 309 #define _DAC_IFS_CH0UF_SHIFT 4 /**< Shift value for DAC_CH0UF */
Kojto 98:8ab26030e058 310 #define _DAC_IFS_CH0UF_MASK 0x10UL /**< Bit mask for DAC_CH0UF */
Kojto 98:8ab26030e058 311 #define _DAC_IFS_CH0UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFS */
Kojto 98:8ab26030e058 312 #define DAC_IFS_CH0UF_DEFAULT (_DAC_IFS_CH0UF_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_IFS */
Kojto 98:8ab26030e058 313 #define DAC_IFS_CH1UF (0x1UL << 5) /**< Channel 1 Data Underflow Interrupt Flag Set */
Kojto 98:8ab26030e058 314 #define _DAC_IFS_CH1UF_SHIFT 5 /**< Shift value for DAC_CH1UF */
Kojto 98:8ab26030e058 315 #define _DAC_IFS_CH1UF_MASK 0x20UL /**< Bit mask for DAC_CH1UF */
Kojto 98:8ab26030e058 316 #define _DAC_IFS_CH1UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFS */
Kojto 98:8ab26030e058 317 #define DAC_IFS_CH1UF_DEFAULT (_DAC_IFS_CH1UF_DEFAULT << 5) /**< Shifted mode DEFAULT for DAC_IFS */
Kojto 98:8ab26030e058 318
Kojto 98:8ab26030e058 319 /* Bit fields for DAC IFC */
Kojto 98:8ab26030e058 320 #define _DAC_IFC_RESETVALUE 0x00000000UL /**< Default value for DAC_IFC */
Kojto 98:8ab26030e058 321 #define _DAC_IFC_MASK 0x00000033UL /**< Mask for DAC_IFC */
Kojto 98:8ab26030e058 322 #define DAC_IFC_CH0 (0x1UL << 0) /**< Channel 0 Conversion Complete Interrupt Flag Clear */
Kojto 98:8ab26030e058 323 #define _DAC_IFC_CH0_SHIFT 0 /**< Shift value for DAC_CH0 */
Kojto 98:8ab26030e058 324 #define _DAC_IFC_CH0_MASK 0x1UL /**< Bit mask for DAC_CH0 */
Kojto 98:8ab26030e058 325 #define _DAC_IFC_CH0_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFC */
Kojto 98:8ab26030e058 326 #define DAC_IFC_CH0_DEFAULT (_DAC_IFC_CH0_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_IFC */
Kojto 98:8ab26030e058 327 #define DAC_IFC_CH1 (0x1UL << 1) /**< Channel 1 Conversion Complete Interrupt Flag Clear */
Kojto 98:8ab26030e058 328 #define _DAC_IFC_CH1_SHIFT 1 /**< Shift value for DAC_CH1 */
Kojto 98:8ab26030e058 329 #define _DAC_IFC_CH1_MASK 0x2UL /**< Bit mask for DAC_CH1 */
Kojto 98:8ab26030e058 330 #define _DAC_IFC_CH1_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFC */
Kojto 98:8ab26030e058 331 #define DAC_IFC_CH1_DEFAULT (_DAC_IFC_CH1_DEFAULT << 1) /**< Shifted mode DEFAULT for DAC_IFC */
Kojto 98:8ab26030e058 332 #define DAC_IFC_CH0UF (0x1UL << 4) /**< Channel 0 Data Underflow Interrupt Flag Clear */
Kojto 98:8ab26030e058 333 #define _DAC_IFC_CH0UF_SHIFT 4 /**< Shift value for DAC_CH0UF */
Kojto 98:8ab26030e058 334 #define _DAC_IFC_CH0UF_MASK 0x10UL /**< Bit mask for DAC_CH0UF */
Kojto 98:8ab26030e058 335 #define _DAC_IFC_CH0UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFC */
Kojto 98:8ab26030e058 336 #define DAC_IFC_CH0UF_DEFAULT (_DAC_IFC_CH0UF_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_IFC */
Kojto 98:8ab26030e058 337 #define DAC_IFC_CH1UF (0x1UL << 5) /**< Channel 1 Data Underflow Interrupt Flag Clear */
Kojto 98:8ab26030e058 338 #define _DAC_IFC_CH1UF_SHIFT 5 /**< Shift value for DAC_CH1UF */
Kojto 98:8ab26030e058 339 #define _DAC_IFC_CH1UF_MASK 0x20UL /**< Bit mask for DAC_CH1UF */
Kojto 98:8ab26030e058 340 #define _DAC_IFC_CH1UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_IFC */
Kojto 98:8ab26030e058 341 #define DAC_IFC_CH1UF_DEFAULT (_DAC_IFC_CH1UF_DEFAULT << 5) /**< Shifted mode DEFAULT for DAC_IFC */
Kojto 98:8ab26030e058 342
Kojto 98:8ab26030e058 343 /* Bit fields for DAC CH0DATA */
Kojto 98:8ab26030e058 344 #define _DAC_CH0DATA_RESETVALUE 0x00000000UL /**< Default value for DAC_CH0DATA */
Kojto 98:8ab26030e058 345 #define _DAC_CH0DATA_MASK 0x00000FFFUL /**< Mask for DAC_CH0DATA */
Kojto 98:8ab26030e058 346 #define _DAC_CH0DATA_DATA_SHIFT 0 /**< Shift value for DAC_DATA */
Kojto 98:8ab26030e058 347 #define _DAC_CH0DATA_DATA_MASK 0xFFFUL /**< Bit mask for DAC_DATA */
Kojto 98:8ab26030e058 348 #define _DAC_CH0DATA_DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH0DATA */
Kojto 98:8ab26030e058 349 #define DAC_CH0DATA_DATA_DEFAULT (_DAC_CH0DATA_DATA_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_CH0DATA */
Kojto 98:8ab26030e058 350
Kojto 98:8ab26030e058 351 /* Bit fields for DAC CH1DATA */
Kojto 98:8ab26030e058 352 #define _DAC_CH1DATA_RESETVALUE 0x00000000UL /**< Default value for DAC_CH1DATA */
Kojto 98:8ab26030e058 353 #define _DAC_CH1DATA_MASK 0x00000FFFUL /**< Mask for DAC_CH1DATA */
Kojto 98:8ab26030e058 354 #define _DAC_CH1DATA_DATA_SHIFT 0 /**< Shift value for DAC_DATA */
Kojto 98:8ab26030e058 355 #define _DAC_CH1DATA_DATA_MASK 0xFFFUL /**< Bit mask for DAC_DATA */
Kojto 98:8ab26030e058 356 #define _DAC_CH1DATA_DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CH1DATA */
Kojto 98:8ab26030e058 357 #define DAC_CH1DATA_DATA_DEFAULT (_DAC_CH1DATA_DATA_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_CH1DATA */
Kojto 98:8ab26030e058 358
Kojto 98:8ab26030e058 359 /* Bit fields for DAC COMBDATA */
Kojto 98:8ab26030e058 360 #define _DAC_COMBDATA_RESETVALUE 0x00000000UL /**< Default value for DAC_COMBDATA */
Kojto 98:8ab26030e058 361 #define _DAC_COMBDATA_MASK 0x0FFF0FFFUL /**< Mask for DAC_COMBDATA */
Kojto 98:8ab26030e058 362 #define _DAC_COMBDATA_CH0DATA_SHIFT 0 /**< Shift value for DAC_CH0DATA */
Kojto 98:8ab26030e058 363 #define _DAC_COMBDATA_CH0DATA_MASK 0xFFFUL /**< Bit mask for DAC_CH0DATA */
Kojto 98:8ab26030e058 364 #define _DAC_COMBDATA_CH0DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_COMBDATA */
Kojto 98:8ab26030e058 365 #define DAC_COMBDATA_CH0DATA_DEFAULT (_DAC_COMBDATA_CH0DATA_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_COMBDATA */
Kojto 98:8ab26030e058 366 #define _DAC_COMBDATA_CH1DATA_SHIFT 16 /**< Shift value for DAC_CH1DATA */
Kojto 98:8ab26030e058 367 #define _DAC_COMBDATA_CH1DATA_MASK 0xFFF0000UL /**< Bit mask for DAC_CH1DATA */
Kojto 98:8ab26030e058 368 #define _DAC_COMBDATA_CH1DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_COMBDATA */
Kojto 98:8ab26030e058 369 #define DAC_COMBDATA_CH1DATA_DEFAULT (_DAC_COMBDATA_CH1DATA_DEFAULT << 16) /**< Shifted mode DEFAULT for DAC_COMBDATA */
Kojto 98:8ab26030e058 370
Kojto 98:8ab26030e058 371 /* Bit fields for DAC CAL */
Kojto 98:8ab26030e058 372 #define _DAC_CAL_RESETVALUE 0x00400000UL /**< Default value for DAC_CAL */
Kojto 98:8ab26030e058 373 #define _DAC_CAL_MASK 0x007F3F3FUL /**< Mask for DAC_CAL */
Kojto 98:8ab26030e058 374 #define _DAC_CAL_CH0OFFSET_SHIFT 0 /**< Shift value for DAC_CH0OFFSET */
Kojto 98:8ab26030e058 375 #define _DAC_CAL_CH0OFFSET_MASK 0x3FUL /**< Bit mask for DAC_CH0OFFSET */
Kojto 98:8ab26030e058 376 #define _DAC_CAL_CH0OFFSET_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CAL */
Kojto 98:8ab26030e058 377 #define DAC_CAL_CH0OFFSET_DEFAULT (_DAC_CAL_CH0OFFSET_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_CAL */
Kojto 98:8ab26030e058 378 #define _DAC_CAL_CH1OFFSET_SHIFT 8 /**< Shift value for DAC_CH1OFFSET */
Kojto 98:8ab26030e058 379 #define _DAC_CAL_CH1OFFSET_MASK 0x3F00UL /**< Bit mask for DAC_CH1OFFSET */
Kojto 98:8ab26030e058 380 #define _DAC_CAL_CH1OFFSET_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_CAL */
Kojto 98:8ab26030e058 381 #define DAC_CAL_CH1OFFSET_DEFAULT (_DAC_CAL_CH1OFFSET_DEFAULT << 8) /**< Shifted mode DEFAULT for DAC_CAL */
Kojto 98:8ab26030e058 382 #define _DAC_CAL_GAIN_SHIFT 16 /**< Shift value for DAC_GAIN */
Kojto 98:8ab26030e058 383 #define _DAC_CAL_GAIN_MASK 0x7F0000UL /**< Bit mask for DAC_GAIN */
Kojto 98:8ab26030e058 384 #define _DAC_CAL_GAIN_DEFAULT 0x00000040UL /**< Mode DEFAULT for DAC_CAL */
Kojto 98:8ab26030e058 385 #define DAC_CAL_GAIN_DEFAULT (_DAC_CAL_GAIN_DEFAULT << 16) /**< Shifted mode DEFAULT for DAC_CAL */
Kojto 98:8ab26030e058 386
Kojto 98:8ab26030e058 387 /* Bit fields for DAC BIASPROG */
Kojto 98:8ab26030e058 388 #define _DAC_BIASPROG_RESETVALUE 0x00004747UL /**< Default value for DAC_BIASPROG */
Kojto 98:8ab26030e058 389 #define _DAC_BIASPROG_MASK 0x00004F4FUL /**< Mask for DAC_BIASPROG */
Kojto 98:8ab26030e058 390 #define _DAC_BIASPROG_BIASPROG_SHIFT 0 /**< Shift value for DAC_BIASPROG */
Kojto 98:8ab26030e058 391 #define _DAC_BIASPROG_BIASPROG_MASK 0xFUL /**< Bit mask for DAC_BIASPROG */
Kojto 98:8ab26030e058 392 #define _DAC_BIASPROG_BIASPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for DAC_BIASPROG */
Kojto 98:8ab26030e058 393 #define DAC_BIASPROG_BIASPROG_DEFAULT (_DAC_BIASPROG_BIASPROG_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_BIASPROG */
Kojto 98:8ab26030e058 394 #define DAC_BIASPROG_HALFBIAS (0x1UL << 6) /**< Half Bias Current */
Kojto 98:8ab26030e058 395 #define _DAC_BIASPROG_HALFBIAS_SHIFT 6 /**< Shift value for DAC_HALFBIAS */
Kojto 98:8ab26030e058 396 #define _DAC_BIASPROG_HALFBIAS_MASK 0x40UL /**< Bit mask for DAC_HALFBIAS */
Kojto 98:8ab26030e058 397 #define _DAC_BIASPROG_HALFBIAS_DEFAULT 0x00000001UL /**< Mode DEFAULT for DAC_BIASPROG */
Kojto 98:8ab26030e058 398 #define DAC_BIASPROG_HALFBIAS_DEFAULT (_DAC_BIASPROG_HALFBIAS_DEFAULT << 6) /**< Shifted mode DEFAULT for DAC_BIASPROG */
Kojto 98:8ab26030e058 399 #define _DAC_BIASPROG_OPA2BIASPROG_SHIFT 8 /**< Shift value for DAC_OPA2BIASPROG */
Kojto 98:8ab26030e058 400 #define _DAC_BIASPROG_OPA2BIASPROG_MASK 0xF00UL /**< Bit mask for DAC_OPA2BIASPROG */
Kojto 98:8ab26030e058 401 #define _DAC_BIASPROG_OPA2BIASPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for DAC_BIASPROG */
Kojto 98:8ab26030e058 402 #define DAC_BIASPROG_OPA2BIASPROG_DEFAULT (_DAC_BIASPROG_OPA2BIASPROG_DEFAULT << 8) /**< Shifted mode DEFAULT for DAC_BIASPROG */
Kojto 98:8ab26030e058 403 #define DAC_BIASPROG_OPA2HALFBIAS (0x1UL << 14) /**< Half Bias Current */
Kojto 98:8ab26030e058 404 #define _DAC_BIASPROG_OPA2HALFBIAS_SHIFT 14 /**< Shift value for DAC_OPA2HALFBIAS */
Kojto 98:8ab26030e058 405 #define _DAC_BIASPROG_OPA2HALFBIAS_MASK 0x4000UL /**< Bit mask for DAC_OPA2HALFBIAS */
Kojto 98:8ab26030e058 406 #define _DAC_BIASPROG_OPA2HALFBIAS_DEFAULT 0x00000001UL /**< Mode DEFAULT for DAC_BIASPROG */
Kojto 98:8ab26030e058 407 #define DAC_BIASPROG_OPA2HALFBIAS_DEFAULT (_DAC_BIASPROG_OPA2HALFBIAS_DEFAULT << 14) /**< Shifted mode DEFAULT for DAC_BIASPROG */
Kojto 98:8ab26030e058 408
Kojto 98:8ab26030e058 409 /* Bit fields for DAC OPACTRL */
Kojto 98:8ab26030e058 410 #define _DAC_OPACTRL_RESETVALUE 0x00000000UL /**< Default value for DAC_OPACTRL */
Kojto 98:8ab26030e058 411 #define _DAC_OPACTRL_MASK 0x01C3F1C7UL /**< Mask for DAC_OPACTRL */
Kojto 98:8ab26030e058 412 #define DAC_OPACTRL_OPA0EN (0x1UL << 0) /**< OPA0 Enable */
Kojto 98:8ab26030e058 413 #define _DAC_OPACTRL_OPA0EN_SHIFT 0 /**< Shift value for DAC_OPA0EN */
Kojto 98:8ab26030e058 414 #define _DAC_OPACTRL_OPA0EN_MASK 0x1UL /**< Bit mask for DAC_OPA0EN */
Kojto 98:8ab26030e058 415 #define _DAC_OPACTRL_OPA0EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 416 #define DAC_OPACTRL_OPA0EN_DEFAULT (_DAC_OPACTRL_OPA0EN_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 417 #define DAC_OPACTRL_OPA1EN (0x1UL << 1) /**< OPA1 Enable */
Kojto 98:8ab26030e058 418 #define _DAC_OPACTRL_OPA1EN_SHIFT 1 /**< Shift value for DAC_OPA1EN */
Kojto 98:8ab26030e058 419 #define _DAC_OPACTRL_OPA1EN_MASK 0x2UL /**< Bit mask for DAC_OPA1EN */
Kojto 98:8ab26030e058 420 #define _DAC_OPACTRL_OPA1EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 421 #define DAC_OPACTRL_OPA1EN_DEFAULT (_DAC_OPACTRL_OPA1EN_DEFAULT << 1) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 422 #define DAC_OPACTRL_OPA2EN (0x1UL << 2) /**< OPA2 Enable */
Kojto 98:8ab26030e058 423 #define _DAC_OPACTRL_OPA2EN_SHIFT 2 /**< Shift value for DAC_OPA2EN */
Kojto 98:8ab26030e058 424 #define _DAC_OPACTRL_OPA2EN_MASK 0x4UL /**< Bit mask for DAC_OPA2EN */
Kojto 98:8ab26030e058 425 #define _DAC_OPACTRL_OPA2EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 426 #define DAC_OPACTRL_OPA2EN_DEFAULT (_DAC_OPACTRL_OPA2EN_DEFAULT << 2) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 427 #define DAC_OPACTRL_OPA0HCMDIS (0x1UL << 6) /**< High Common Mode Disable. */
Kojto 98:8ab26030e058 428 #define _DAC_OPACTRL_OPA0HCMDIS_SHIFT 6 /**< Shift value for DAC_OPA0HCMDIS */
Kojto 98:8ab26030e058 429 #define _DAC_OPACTRL_OPA0HCMDIS_MASK 0x40UL /**< Bit mask for DAC_OPA0HCMDIS */
Kojto 98:8ab26030e058 430 #define _DAC_OPACTRL_OPA0HCMDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 431 #define DAC_OPACTRL_OPA0HCMDIS_DEFAULT (_DAC_OPACTRL_OPA0HCMDIS_DEFAULT << 6) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 432 #define DAC_OPACTRL_OPA1HCMDIS (0x1UL << 7) /**< High Common Mode Disable. */
Kojto 98:8ab26030e058 433 #define _DAC_OPACTRL_OPA1HCMDIS_SHIFT 7 /**< Shift value for DAC_OPA1HCMDIS */
Kojto 98:8ab26030e058 434 #define _DAC_OPACTRL_OPA1HCMDIS_MASK 0x80UL /**< Bit mask for DAC_OPA1HCMDIS */
Kojto 98:8ab26030e058 435 #define _DAC_OPACTRL_OPA1HCMDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 436 #define DAC_OPACTRL_OPA1HCMDIS_DEFAULT (_DAC_OPACTRL_OPA1HCMDIS_DEFAULT << 7) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 437 #define DAC_OPACTRL_OPA2HCMDIS (0x1UL << 8) /**< High Common Mode Disable. */
Kojto 98:8ab26030e058 438 #define _DAC_OPACTRL_OPA2HCMDIS_SHIFT 8 /**< Shift value for DAC_OPA2HCMDIS */
Kojto 98:8ab26030e058 439 #define _DAC_OPACTRL_OPA2HCMDIS_MASK 0x100UL /**< Bit mask for DAC_OPA2HCMDIS */
Kojto 98:8ab26030e058 440 #define _DAC_OPACTRL_OPA2HCMDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 441 #define DAC_OPACTRL_OPA2HCMDIS_DEFAULT (_DAC_OPACTRL_OPA2HCMDIS_DEFAULT << 8) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 442 #define _DAC_OPACTRL_OPA0LPFDIS_SHIFT 12 /**< Shift value for DAC_OPA0LPFDIS */
Kojto 98:8ab26030e058 443 #define _DAC_OPACTRL_OPA0LPFDIS_MASK 0x3000UL /**< Bit mask for DAC_OPA0LPFDIS */
Kojto 98:8ab26030e058 444 #define _DAC_OPACTRL_OPA0LPFDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 445 #define _DAC_OPACTRL_OPA0LPFDIS_PLPFDIS 0x00000001UL /**< Mode PLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 446 #define _DAC_OPACTRL_OPA0LPFDIS_NLPFDIS 0x00000002UL /**< Mode NLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 447 #define DAC_OPACTRL_OPA0LPFDIS_DEFAULT (_DAC_OPACTRL_OPA0LPFDIS_DEFAULT << 12) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 448 #define DAC_OPACTRL_OPA0LPFDIS_PLPFDIS (_DAC_OPACTRL_OPA0LPFDIS_PLPFDIS << 12) /**< Shifted mode PLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 449 #define DAC_OPACTRL_OPA0LPFDIS_NLPFDIS (_DAC_OPACTRL_OPA0LPFDIS_NLPFDIS << 12) /**< Shifted mode NLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 450 #define _DAC_OPACTRL_OPA1LPFDIS_SHIFT 14 /**< Shift value for DAC_OPA1LPFDIS */
Kojto 98:8ab26030e058 451 #define _DAC_OPACTRL_OPA1LPFDIS_MASK 0xC000UL /**< Bit mask for DAC_OPA1LPFDIS */
Kojto 98:8ab26030e058 452 #define _DAC_OPACTRL_OPA1LPFDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 453 #define _DAC_OPACTRL_OPA1LPFDIS_PLPFDIS 0x00000001UL /**< Mode PLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 454 #define _DAC_OPACTRL_OPA1LPFDIS_NLPFDIS 0x00000002UL /**< Mode NLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 455 #define DAC_OPACTRL_OPA1LPFDIS_DEFAULT (_DAC_OPACTRL_OPA1LPFDIS_DEFAULT << 14) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 456 #define DAC_OPACTRL_OPA1LPFDIS_PLPFDIS (_DAC_OPACTRL_OPA1LPFDIS_PLPFDIS << 14) /**< Shifted mode PLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 457 #define DAC_OPACTRL_OPA1LPFDIS_NLPFDIS (_DAC_OPACTRL_OPA1LPFDIS_NLPFDIS << 14) /**< Shifted mode NLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 458 #define _DAC_OPACTRL_OPA2LPFDIS_SHIFT 16 /**< Shift value for DAC_OPA2LPFDIS */
Kojto 98:8ab26030e058 459 #define _DAC_OPACTRL_OPA2LPFDIS_MASK 0x30000UL /**< Bit mask for DAC_OPA2LPFDIS */
Kojto 98:8ab26030e058 460 #define _DAC_OPACTRL_OPA2LPFDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 461 #define _DAC_OPACTRL_OPA2LPFDIS_PLPFDIS 0x00000001UL /**< Mode PLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 462 #define _DAC_OPACTRL_OPA2LPFDIS_NLPFDIS 0x00000002UL /**< Mode NLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 463 #define DAC_OPACTRL_OPA2LPFDIS_DEFAULT (_DAC_OPACTRL_OPA2LPFDIS_DEFAULT << 16) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 464 #define DAC_OPACTRL_OPA2LPFDIS_PLPFDIS (_DAC_OPACTRL_OPA2LPFDIS_PLPFDIS << 16) /**< Shifted mode PLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 465 #define DAC_OPACTRL_OPA2LPFDIS_NLPFDIS (_DAC_OPACTRL_OPA2LPFDIS_NLPFDIS << 16) /**< Shifted mode NLPFDIS for DAC_OPACTRL */
Kojto 98:8ab26030e058 466 #define DAC_OPACTRL_OPA0SHORT (0x1UL << 22) /**< Short the non-inverting and inverting input. */
Kojto 98:8ab26030e058 467 #define _DAC_OPACTRL_OPA0SHORT_SHIFT 22 /**< Shift value for DAC_OPA0SHORT */
Kojto 98:8ab26030e058 468 #define _DAC_OPACTRL_OPA0SHORT_MASK 0x400000UL /**< Bit mask for DAC_OPA0SHORT */
Kojto 98:8ab26030e058 469 #define _DAC_OPACTRL_OPA0SHORT_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 470 #define DAC_OPACTRL_OPA0SHORT_DEFAULT (_DAC_OPACTRL_OPA0SHORT_DEFAULT << 22) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 471 #define DAC_OPACTRL_OPA1SHORT (0x1UL << 23) /**< Short the non-inverting and inverting input. */
Kojto 98:8ab26030e058 472 #define _DAC_OPACTRL_OPA1SHORT_SHIFT 23 /**< Shift value for DAC_OPA1SHORT */
Kojto 98:8ab26030e058 473 #define _DAC_OPACTRL_OPA1SHORT_MASK 0x800000UL /**< Bit mask for DAC_OPA1SHORT */
Kojto 98:8ab26030e058 474 #define _DAC_OPACTRL_OPA1SHORT_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 475 #define DAC_OPACTRL_OPA1SHORT_DEFAULT (_DAC_OPACTRL_OPA1SHORT_DEFAULT << 23) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 476 #define DAC_OPACTRL_OPA2SHORT (0x1UL << 24) /**< Short the non-inverting and inverting input. */
Kojto 98:8ab26030e058 477 #define _DAC_OPACTRL_OPA2SHORT_SHIFT 24 /**< Shift value for DAC_OPA2SHORT */
Kojto 98:8ab26030e058 478 #define _DAC_OPACTRL_OPA2SHORT_MASK 0x1000000UL /**< Bit mask for DAC_OPA2SHORT */
Kojto 98:8ab26030e058 479 #define _DAC_OPACTRL_OPA2SHORT_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 480 #define DAC_OPACTRL_OPA2SHORT_DEFAULT (_DAC_OPACTRL_OPA2SHORT_DEFAULT << 24) /**< Shifted mode DEFAULT for DAC_OPACTRL */
Kojto 98:8ab26030e058 481
Kojto 98:8ab26030e058 482 /* Bit fields for DAC OPAOFFSET */
Kojto 98:8ab26030e058 483 #define _DAC_OPAOFFSET_RESETVALUE 0x00000020UL /**< Default value for DAC_OPAOFFSET */
Kojto 98:8ab26030e058 484 #define _DAC_OPAOFFSET_MASK 0x0000003FUL /**< Mask for DAC_OPAOFFSET */
Kojto 98:8ab26030e058 485 #define _DAC_OPAOFFSET_OPA2OFFSET_SHIFT 0 /**< Shift value for DAC_OPA2OFFSET */
Kojto 98:8ab26030e058 486 #define _DAC_OPAOFFSET_OPA2OFFSET_MASK 0x3FUL /**< Bit mask for DAC_OPA2OFFSET */
Kojto 98:8ab26030e058 487 #define _DAC_OPAOFFSET_OPA2OFFSET_DEFAULT 0x00000020UL /**< Mode DEFAULT for DAC_OPAOFFSET */
Kojto 98:8ab26030e058 488 #define DAC_OPAOFFSET_OPA2OFFSET_DEFAULT (_DAC_OPAOFFSET_OPA2OFFSET_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_OPAOFFSET */
Kojto 98:8ab26030e058 489
Kojto 98:8ab26030e058 490 /* Bit fields for DAC OPA0MUX */
Kojto 98:8ab26030e058 491 #define _DAC_OPA0MUX_RESETVALUE 0x00400000UL /**< Default value for DAC_OPA0MUX */
Kojto 98:8ab26030e058 492 #define _DAC_OPA0MUX_MASK 0x74C7F737UL /**< Mask for DAC_OPA0MUX */
Kojto 98:8ab26030e058 493 #define _DAC_OPA0MUX_POSSEL_SHIFT 0 /**< Shift value for DAC_POSSEL */
Kojto 98:8ab26030e058 494 #define _DAC_OPA0MUX_POSSEL_MASK 0x7UL /**< Bit mask for DAC_POSSEL */
Kojto 98:8ab26030e058 495 #define _DAC_OPA0MUX_POSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 496 #define _DAC_OPA0MUX_POSSEL_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA0MUX */
Kojto 98:8ab26030e058 497 #define _DAC_OPA0MUX_POSSEL_DAC 0x00000001UL /**< Mode DAC for DAC_OPA0MUX */
Kojto 98:8ab26030e058 498 #define _DAC_OPA0MUX_POSSEL_POSPAD 0x00000002UL /**< Mode POSPAD for DAC_OPA0MUX */
Kojto 98:8ab26030e058 499 #define _DAC_OPA0MUX_POSSEL_OPA0INP 0x00000003UL /**< Mode OPA0INP for DAC_OPA0MUX */
Kojto 98:8ab26030e058 500 #define _DAC_OPA0MUX_POSSEL_OPATAP 0x00000004UL /**< Mode OPATAP for DAC_OPA0MUX */
Kojto 98:8ab26030e058 501 #define DAC_OPA0MUX_POSSEL_DEFAULT (_DAC_OPA0MUX_POSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 502 #define DAC_OPA0MUX_POSSEL_DISABLE (_DAC_OPA0MUX_POSSEL_DISABLE << 0) /**< Shifted mode DISABLE for DAC_OPA0MUX */
Kojto 98:8ab26030e058 503 #define DAC_OPA0MUX_POSSEL_DAC (_DAC_OPA0MUX_POSSEL_DAC << 0) /**< Shifted mode DAC for DAC_OPA0MUX */
Kojto 98:8ab26030e058 504 #define DAC_OPA0MUX_POSSEL_POSPAD (_DAC_OPA0MUX_POSSEL_POSPAD << 0) /**< Shifted mode POSPAD for DAC_OPA0MUX */
Kojto 98:8ab26030e058 505 #define DAC_OPA0MUX_POSSEL_OPA0INP (_DAC_OPA0MUX_POSSEL_OPA0INP << 0) /**< Shifted mode OPA0INP for DAC_OPA0MUX */
Kojto 98:8ab26030e058 506 #define DAC_OPA0MUX_POSSEL_OPATAP (_DAC_OPA0MUX_POSSEL_OPATAP << 0) /**< Shifted mode OPATAP for DAC_OPA0MUX */
Kojto 98:8ab26030e058 507 #define _DAC_OPA0MUX_NEGSEL_SHIFT 4 /**< Shift value for DAC_NEGSEL */
Kojto 98:8ab26030e058 508 #define _DAC_OPA0MUX_NEGSEL_MASK 0x30UL /**< Bit mask for DAC_NEGSEL */
Kojto 98:8ab26030e058 509 #define _DAC_OPA0MUX_NEGSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 510 #define _DAC_OPA0MUX_NEGSEL_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA0MUX */
Kojto 98:8ab26030e058 511 #define _DAC_OPA0MUX_NEGSEL_UG 0x00000001UL /**< Mode UG for DAC_OPA0MUX */
Kojto 98:8ab26030e058 512 #define _DAC_OPA0MUX_NEGSEL_OPATAP 0x00000002UL /**< Mode OPATAP for DAC_OPA0MUX */
Kojto 98:8ab26030e058 513 #define _DAC_OPA0MUX_NEGSEL_NEGPAD 0x00000003UL /**< Mode NEGPAD for DAC_OPA0MUX */
Kojto 98:8ab26030e058 514 #define DAC_OPA0MUX_NEGSEL_DEFAULT (_DAC_OPA0MUX_NEGSEL_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 515 #define DAC_OPA0MUX_NEGSEL_DISABLE (_DAC_OPA0MUX_NEGSEL_DISABLE << 4) /**< Shifted mode DISABLE for DAC_OPA0MUX */
Kojto 98:8ab26030e058 516 #define DAC_OPA0MUX_NEGSEL_UG (_DAC_OPA0MUX_NEGSEL_UG << 4) /**< Shifted mode UG for DAC_OPA0MUX */
Kojto 98:8ab26030e058 517 #define DAC_OPA0MUX_NEGSEL_OPATAP (_DAC_OPA0MUX_NEGSEL_OPATAP << 4) /**< Shifted mode OPATAP for DAC_OPA0MUX */
Kojto 98:8ab26030e058 518 #define DAC_OPA0MUX_NEGSEL_NEGPAD (_DAC_OPA0MUX_NEGSEL_NEGPAD << 4) /**< Shifted mode NEGPAD for DAC_OPA0MUX */
Kojto 98:8ab26030e058 519 #define _DAC_OPA0MUX_RESINMUX_SHIFT 8 /**< Shift value for DAC_RESINMUX */
Kojto 98:8ab26030e058 520 #define _DAC_OPA0MUX_RESINMUX_MASK 0x700UL /**< Bit mask for DAC_RESINMUX */
Kojto 98:8ab26030e058 521 #define _DAC_OPA0MUX_RESINMUX_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 522 #define _DAC_OPA0MUX_RESINMUX_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA0MUX */
Kojto 98:8ab26030e058 523 #define _DAC_OPA0MUX_RESINMUX_OPA0INP 0x00000001UL /**< Mode OPA0INP for DAC_OPA0MUX */
Kojto 98:8ab26030e058 524 #define _DAC_OPA0MUX_RESINMUX_NEGPAD 0x00000002UL /**< Mode NEGPAD for DAC_OPA0MUX */
Kojto 98:8ab26030e058 525 #define _DAC_OPA0MUX_RESINMUX_POSPAD 0x00000003UL /**< Mode POSPAD for DAC_OPA0MUX */
Kojto 98:8ab26030e058 526 #define _DAC_OPA0MUX_RESINMUX_VSS 0x00000004UL /**< Mode VSS for DAC_OPA0MUX */
Kojto 98:8ab26030e058 527 #define DAC_OPA0MUX_RESINMUX_DEFAULT (_DAC_OPA0MUX_RESINMUX_DEFAULT << 8) /**< Shifted mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 528 #define DAC_OPA0MUX_RESINMUX_DISABLE (_DAC_OPA0MUX_RESINMUX_DISABLE << 8) /**< Shifted mode DISABLE for DAC_OPA0MUX */
Kojto 98:8ab26030e058 529 #define DAC_OPA0MUX_RESINMUX_OPA0INP (_DAC_OPA0MUX_RESINMUX_OPA0INP << 8) /**< Shifted mode OPA0INP for DAC_OPA0MUX */
Kojto 98:8ab26030e058 530 #define DAC_OPA0MUX_RESINMUX_NEGPAD (_DAC_OPA0MUX_RESINMUX_NEGPAD << 8) /**< Shifted mode NEGPAD for DAC_OPA0MUX */
Kojto 98:8ab26030e058 531 #define DAC_OPA0MUX_RESINMUX_POSPAD (_DAC_OPA0MUX_RESINMUX_POSPAD << 8) /**< Shifted mode POSPAD for DAC_OPA0MUX */
Kojto 98:8ab26030e058 532 #define DAC_OPA0MUX_RESINMUX_VSS (_DAC_OPA0MUX_RESINMUX_VSS << 8) /**< Shifted mode VSS for DAC_OPA0MUX */
Kojto 98:8ab26030e058 533 #define DAC_OPA0MUX_PPEN (0x1UL << 12) /**< OPA0 Positive Pad Input Enable */
Kojto 98:8ab26030e058 534 #define _DAC_OPA0MUX_PPEN_SHIFT 12 /**< Shift value for DAC_PPEN */
Kojto 98:8ab26030e058 535 #define _DAC_OPA0MUX_PPEN_MASK 0x1000UL /**< Bit mask for DAC_PPEN */
Kojto 98:8ab26030e058 536 #define _DAC_OPA0MUX_PPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 537 #define DAC_OPA0MUX_PPEN_DEFAULT (_DAC_OPA0MUX_PPEN_DEFAULT << 12) /**< Shifted mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 538 #define DAC_OPA0MUX_NPEN (0x1UL << 13) /**< OPA0 Negative Pad Input Enable */
Kojto 98:8ab26030e058 539 #define _DAC_OPA0MUX_NPEN_SHIFT 13 /**< Shift value for DAC_NPEN */
Kojto 98:8ab26030e058 540 #define _DAC_OPA0MUX_NPEN_MASK 0x2000UL /**< Bit mask for DAC_NPEN */
Kojto 98:8ab26030e058 541 #define _DAC_OPA0MUX_NPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 542 #define DAC_OPA0MUX_NPEN_DEFAULT (_DAC_OPA0MUX_NPEN_DEFAULT << 13) /**< Shifted mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 543 #define _DAC_OPA0MUX_OUTPEN_SHIFT 14 /**< Shift value for DAC_OUTPEN */
Kojto 98:8ab26030e058 544 #define _DAC_OPA0MUX_OUTPEN_MASK 0x7C000UL /**< Bit mask for DAC_OUTPEN */
Kojto 98:8ab26030e058 545 #define _DAC_OPA0MUX_OUTPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 546 #define _DAC_OPA0MUX_OUTPEN_OUT0 0x00000001UL /**< Mode OUT0 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 547 #define _DAC_OPA0MUX_OUTPEN_OUT1 0x00000002UL /**< Mode OUT1 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 548 #define _DAC_OPA0MUX_OUTPEN_OUT2 0x00000004UL /**< Mode OUT2 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 549 #define _DAC_OPA0MUX_OUTPEN_OUT3 0x00000008UL /**< Mode OUT3 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 550 #define _DAC_OPA0MUX_OUTPEN_OUT4 0x00000010UL /**< Mode OUT4 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 551 #define DAC_OPA0MUX_OUTPEN_DEFAULT (_DAC_OPA0MUX_OUTPEN_DEFAULT << 14) /**< Shifted mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 552 #define DAC_OPA0MUX_OUTPEN_OUT0 (_DAC_OPA0MUX_OUTPEN_OUT0 << 14) /**< Shifted mode OUT0 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 553 #define DAC_OPA0MUX_OUTPEN_OUT1 (_DAC_OPA0MUX_OUTPEN_OUT1 << 14) /**< Shifted mode OUT1 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 554 #define DAC_OPA0MUX_OUTPEN_OUT2 (_DAC_OPA0MUX_OUTPEN_OUT2 << 14) /**< Shifted mode OUT2 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 555 #define DAC_OPA0MUX_OUTPEN_OUT3 (_DAC_OPA0MUX_OUTPEN_OUT3 << 14) /**< Shifted mode OUT3 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 556 #define DAC_OPA0MUX_OUTPEN_OUT4 (_DAC_OPA0MUX_OUTPEN_OUT4 << 14) /**< Shifted mode OUT4 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 557 #define _DAC_OPA0MUX_OUTMODE_SHIFT 22 /**< Shift value for DAC_OUTMODE */
Kojto 98:8ab26030e058 558 #define _DAC_OPA0MUX_OUTMODE_MASK 0xC00000UL /**< Bit mask for DAC_OUTMODE */
Kojto 98:8ab26030e058 559 #define _DAC_OPA0MUX_OUTMODE_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA0MUX */
Kojto 98:8ab26030e058 560 #define _DAC_OPA0MUX_OUTMODE_DEFAULT 0x00000001UL /**< Mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 561 #define _DAC_OPA0MUX_OUTMODE_MAIN 0x00000001UL /**< Mode MAIN for DAC_OPA0MUX */
Kojto 98:8ab26030e058 562 #define _DAC_OPA0MUX_OUTMODE_ALT 0x00000002UL /**< Mode ALT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 563 #define _DAC_OPA0MUX_OUTMODE_ALL 0x00000003UL /**< Mode ALL for DAC_OPA0MUX */
Kojto 98:8ab26030e058 564 #define DAC_OPA0MUX_OUTMODE_DISABLE (_DAC_OPA0MUX_OUTMODE_DISABLE << 22) /**< Shifted mode DISABLE for DAC_OPA0MUX */
Kojto 98:8ab26030e058 565 #define DAC_OPA0MUX_OUTMODE_DEFAULT (_DAC_OPA0MUX_OUTMODE_DEFAULT << 22) /**< Shifted mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 566 #define DAC_OPA0MUX_OUTMODE_MAIN (_DAC_OPA0MUX_OUTMODE_MAIN << 22) /**< Shifted mode MAIN for DAC_OPA0MUX */
Kojto 98:8ab26030e058 567 #define DAC_OPA0MUX_OUTMODE_ALT (_DAC_OPA0MUX_OUTMODE_ALT << 22) /**< Shifted mode ALT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 568 #define DAC_OPA0MUX_OUTMODE_ALL (_DAC_OPA0MUX_OUTMODE_ALL << 22) /**< Shifted mode ALL for DAC_OPA0MUX */
Kojto 98:8ab26030e058 569 #define DAC_OPA0MUX_NEXTOUT (0x1UL << 26) /**< OPA0 Next Enable */
Kojto 98:8ab26030e058 570 #define _DAC_OPA0MUX_NEXTOUT_SHIFT 26 /**< Shift value for DAC_NEXTOUT */
Kojto 98:8ab26030e058 571 #define _DAC_OPA0MUX_NEXTOUT_MASK 0x4000000UL /**< Bit mask for DAC_NEXTOUT */
Kojto 98:8ab26030e058 572 #define _DAC_OPA0MUX_NEXTOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 573 #define DAC_OPA0MUX_NEXTOUT_DEFAULT (_DAC_OPA0MUX_NEXTOUT_DEFAULT << 26) /**< Shifted mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 574 #define _DAC_OPA0MUX_RESSEL_SHIFT 28 /**< Shift value for DAC_RESSEL */
Kojto 98:8ab26030e058 575 #define _DAC_OPA0MUX_RESSEL_MASK 0x70000000UL /**< Bit mask for DAC_RESSEL */
Kojto 98:8ab26030e058 576 #define _DAC_OPA0MUX_RESSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 577 #define _DAC_OPA0MUX_RESSEL_RES0 0x00000000UL /**< Mode RES0 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 578 #define _DAC_OPA0MUX_RESSEL_RES1 0x00000001UL /**< Mode RES1 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 579 #define _DAC_OPA0MUX_RESSEL_RES2 0x00000002UL /**< Mode RES2 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 580 #define _DAC_OPA0MUX_RESSEL_RES3 0x00000003UL /**< Mode RES3 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 581 #define _DAC_OPA0MUX_RESSEL_RES4 0x00000004UL /**< Mode RES4 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 582 #define _DAC_OPA0MUX_RESSEL_RES5 0x00000005UL /**< Mode RES5 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 583 #define _DAC_OPA0MUX_RESSEL_RES6 0x00000006UL /**< Mode RES6 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 584 #define _DAC_OPA0MUX_RESSEL_RES7 0x00000007UL /**< Mode RES7 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 585 #define DAC_OPA0MUX_RESSEL_DEFAULT (_DAC_OPA0MUX_RESSEL_DEFAULT << 28) /**< Shifted mode DEFAULT for DAC_OPA0MUX */
Kojto 98:8ab26030e058 586 #define DAC_OPA0MUX_RESSEL_RES0 (_DAC_OPA0MUX_RESSEL_RES0 << 28) /**< Shifted mode RES0 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 587 #define DAC_OPA0MUX_RESSEL_RES1 (_DAC_OPA0MUX_RESSEL_RES1 << 28) /**< Shifted mode RES1 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 588 #define DAC_OPA0MUX_RESSEL_RES2 (_DAC_OPA0MUX_RESSEL_RES2 << 28) /**< Shifted mode RES2 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 589 #define DAC_OPA0MUX_RESSEL_RES3 (_DAC_OPA0MUX_RESSEL_RES3 << 28) /**< Shifted mode RES3 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 590 #define DAC_OPA0MUX_RESSEL_RES4 (_DAC_OPA0MUX_RESSEL_RES4 << 28) /**< Shifted mode RES4 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 591 #define DAC_OPA0MUX_RESSEL_RES5 (_DAC_OPA0MUX_RESSEL_RES5 << 28) /**< Shifted mode RES5 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 592 #define DAC_OPA0MUX_RESSEL_RES6 (_DAC_OPA0MUX_RESSEL_RES6 << 28) /**< Shifted mode RES6 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 593 #define DAC_OPA0MUX_RESSEL_RES7 (_DAC_OPA0MUX_RESSEL_RES7 << 28) /**< Shifted mode RES7 for DAC_OPA0MUX */
Kojto 98:8ab26030e058 594
Kojto 98:8ab26030e058 595 /* Bit fields for DAC OPA1MUX */
Kojto 98:8ab26030e058 596 #define _DAC_OPA1MUX_RESETVALUE 0x00000000UL /**< Default value for DAC_OPA1MUX */
Kojto 98:8ab26030e058 597 #define _DAC_OPA1MUX_MASK 0x74C7F737UL /**< Mask for DAC_OPA1MUX */
Kojto 98:8ab26030e058 598 #define _DAC_OPA1MUX_POSSEL_SHIFT 0 /**< Shift value for DAC_POSSEL */
Kojto 98:8ab26030e058 599 #define _DAC_OPA1MUX_POSSEL_MASK 0x7UL /**< Bit mask for DAC_POSSEL */
Kojto 98:8ab26030e058 600 #define _DAC_OPA1MUX_POSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 601 #define _DAC_OPA1MUX_POSSEL_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA1MUX */
Kojto 98:8ab26030e058 602 #define _DAC_OPA1MUX_POSSEL_DAC 0x00000001UL /**< Mode DAC for DAC_OPA1MUX */
Kojto 98:8ab26030e058 603 #define _DAC_OPA1MUX_POSSEL_POSPAD 0x00000002UL /**< Mode POSPAD for DAC_OPA1MUX */
Kojto 98:8ab26030e058 604 #define _DAC_OPA1MUX_POSSEL_OPA0INP 0x00000003UL /**< Mode OPA0INP for DAC_OPA1MUX */
Kojto 98:8ab26030e058 605 #define _DAC_OPA1MUX_POSSEL_OPATAP 0x00000004UL /**< Mode OPATAP for DAC_OPA1MUX */
Kojto 98:8ab26030e058 606 #define DAC_OPA1MUX_POSSEL_DEFAULT (_DAC_OPA1MUX_POSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 607 #define DAC_OPA1MUX_POSSEL_DISABLE (_DAC_OPA1MUX_POSSEL_DISABLE << 0) /**< Shifted mode DISABLE for DAC_OPA1MUX */
Kojto 98:8ab26030e058 608 #define DAC_OPA1MUX_POSSEL_DAC (_DAC_OPA1MUX_POSSEL_DAC << 0) /**< Shifted mode DAC for DAC_OPA1MUX */
Kojto 98:8ab26030e058 609 #define DAC_OPA1MUX_POSSEL_POSPAD (_DAC_OPA1MUX_POSSEL_POSPAD << 0) /**< Shifted mode POSPAD for DAC_OPA1MUX */
Kojto 98:8ab26030e058 610 #define DAC_OPA1MUX_POSSEL_OPA0INP (_DAC_OPA1MUX_POSSEL_OPA0INP << 0) /**< Shifted mode OPA0INP for DAC_OPA1MUX */
Kojto 98:8ab26030e058 611 #define DAC_OPA1MUX_POSSEL_OPATAP (_DAC_OPA1MUX_POSSEL_OPATAP << 0) /**< Shifted mode OPATAP for DAC_OPA1MUX */
Kojto 98:8ab26030e058 612 #define _DAC_OPA1MUX_NEGSEL_SHIFT 4 /**< Shift value for DAC_NEGSEL */
Kojto 98:8ab26030e058 613 #define _DAC_OPA1MUX_NEGSEL_MASK 0x30UL /**< Bit mask for DAC_NEGSEL */
Kojto 98:8ab26030e058 614 #define _DAC_OPA1MUX_NEGSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 615 #define _DAC_OPA1MUX_NEGSEL_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA1MUX */
Kojto 98:8ab26030e058 616 #define _DAC_OPA1MUX_NEGSEL_UG 0x00000001UL /**< Mode UG for DAC_OPA1MUX */
Kojto 98:8ab26030e058 617 #define _DAC_OPA1MUX_NEGSEL_OPATAP 0x00000002UL /**< Mode OPATAP for DAC_OPA1MUX */
Kojto 98:8ab26030e058 618 #define _DAC_OPA1MUX_NEGSEL_NEGPAD 0x00000003UL /**< Mode NEGPAD for DAC_OPA1MUX */
Kojto 98:8ab26030e058 619 #define DAC_OPA1MUX_NEGSEL_DEFAULT (_DAC_OPA1MUX_NEGSEL_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 620 #define DAC_OPA1MUX_NEGSEL_DISABLE (_DAC_OPA1MUX_NEGSEL_DISABLE << 4) /**< Shifted mode DISABLE for DAC_OPA1MUX */
Kojto 98:8ab26030e058 621 #define DAC_OPA1MUX_NEGSEL_UG (_DAC_OPA1MUX_NEGSEL_UG << 4) /**< Shifted mode UG for DAC_OPA1MUX */
Kojto 98:8ab26030e058 622 #define DAC_OPA1MUX_NEGSEL_OPATAP (_DAC_OPA1MUX_NEGSEL_OPATAP << 4) /**< Shifted mode OPATAP for DAC_OPA1MUX */
Kojto 98:8ab26030e058 623 #define DAC_OPA1MUX_NEGSEL_NEGPAD (_DAC_OPA1MUX_NEGSEL_NEGPAD << 4) /**< Shifted mode NEGPAD for DAC_OPA1MUX */
Kojto 98:8ab26030e058 624 #define _DAC_OPA1MUX_RESINMUX_SHIFT 8 /**< Shift value for DAC_RESINMUX */
Kojto 98:8ab26030e058 625 #define _DAC_OPA1MUX_RESINMUX_MASK 0x700UL /**< Bit mask for DAC_RESINMUX */
Kojto 98:8ab26030e058 626 #define _DAC_OPA1MUX_RESINMUX_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 627 #define _DAC_OPA1MUX_RESINMUX_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA1MUX */
Kojto 98:8ab26030e058 628 #define _DAC_OPA1MUX_RESINMUX_OPA0INP 0x00000001UL /**< Mode OPA0INP for DAC_OPA1MUX */
Kojto 98:8ab26030e058 629 #define _DAC_OPA1MUX_RESINMUX_NEGPAD 0x00000002UL /**< Mode NEGPAD for DAC_OPA1MUX */
Kojto 98:8ab26030e058 630 #define _DAC_OPA1MUX_RESINMUX_POSPAD 0x00000003UL /**< Mode POSPAD for DAC_OPA1MUX */
Kojto 98:8ab26030e058 631 #define _DAC_OPA1MUX_RESINMUX_VSS 0x00000004UL /**< Mode VSS for DAC_OPA1MUX */
Kojto 98:8ab26030e058 632 #define DAC_OPA1MUX_RESINMUX_DEFAULT (_DAC_OPA1MUX_RESINMUX_DEFAULT << 8) /**< Shifted mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 633 #define DAC_OPA1MUX_RESINMUX_DISABLE (_DAC_OPA1MUX_RESINMUX_DISABLE << 8) /**< Shifted mode DISABLE for DAC_OPA1MUX */
Kojto 98:8ab26030e058 634 #define DAC_OPA1MUX_RESINMUX_OPA0INP (_DAC_OPA1MUX_RESINMUX_OPA0INP << 8) /**< Shifted mode OPA0INP for DAC_OPA1MUX */
Kojto 98:8ab26030e058 635 #define DAC_OPA1MUX_RESINMUX_NEGPAD (_DAC_OPA1MUX_RESINMUX_NEGPAD << 8) /**< Shifted mode NEGPAD for DAC_OPA1MUX */
Kojto 98:8ab26030e058 636 #define DAC_OPA1MUX_RESINMUX_POSPAD (_DAC_OPA1MUX_RESINMUX_POSPAD << 8) /**< Shifted mode POSPAD for DAC_OPA1MUX */
Kojto 98:8ab26030e058 637 #define DAC_OPA1MUX_RESINMUX_VSS (_DAC_OPA1MUX_RESINMUX_VSS << 8) /**< Shifted mode VSS for DAC_OPA1MUX */
Kojto 98:8ab26030e058 638 #define DAC_OPA1MUX_PPEN (0x1UL << 12) /**< OPA1 Positive Pad Input Enable */
Kojto 98:8ab26030e058 639 #define _DAC_OPA1MUX_PPEN_SHIFT 12 /**< Shift value for DAC_PPEN */
Kojto 98:8ab26030e058 640 #define _DAC_OPA1MUX_PPEN_MASK 0x1000UL /**< Bit mask for DAC_PPEN */
Kojto 98:8ab26030e058 641 #define _DAC_OPA1MUX_PPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 642 #define DAC_OPA1MUX_PPEN_DEFAULT (_DAC_OPA1MUX_PPEN_DEFAULT << 12) /**< Shifted mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 643 #define DAC_OPA1MUX_NPEN (0x1UL << 13) /**< OPA1 Negative Pad Input Enable */
Kojto 98:8ab26030e058 644 #define _DAC_OPA1MUX_NPEN_SHIFT 13 /**< Shift value for DAC_NPEN */
Kojto 98:8ab26030e058 645 #define _DAC_OPA1MUX_NPEN_MASK 0x2000UL /**< Bit mask for DAC_NPEN */
Kojto 98:8ab26030e058 646 #define _DAC_OPA1MUX_NPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 647 #define DAC_OPA1MUX_NPEN_DEFAULT (_DAC_OPA1MUX_NPEN_DEFAULT << 13) /**< Shifted mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 648 #define _DAC_OPA1MUX_OUTPEN_SHIFT 14 /**< Shift value for DAC_OUTPEN */
Kojto 98:8ab26030e058 649 #define _DAC_OPA1MUX_OUTPEN_MASK 0x7C000UL /**< Bit mask for DAC_OUTPEN */
Kojto 98:8ab26030e058 650 #define _DAC_OPA1MUX_OUTPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 651 #define _DAC_OPA1MUX_OUTPEN_OUT0 0x00000001UL /**< Mode OUT0 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 652 #define _DAC_OPA1MUX_OUTPEN_OUT1 0x00000002UL /**< Mode OUT1 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 653 #define _DAC_OPA1MUX_OUTPEN_OUT2 0x00000004UL /**< Mode OUT2 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 654 #define _DAC_OPA1MUX_OUTPEN_OUT3 0x00000008UL /**< Mode OUT3 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 655 #define _DAC_OPA1MUX_OUTPEN_OUT4 0x00000010UL /**< Mode OUT4 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 656 #define DAC_OPA1MUX_OUTPEN_DEFAULT (_DAC_OPA1MUX_OUTPEN_DEFAULT << 14) /**< Shifted mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 657 #define DAC_OPA1MUX_OUTPEN_OUT0 (_DAC_OPA1MUX_OUTPEN_OUT0 << 14) /**< Shifted mode OUT0 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 658 #define DAC_OPA1MUX_OUTPEN_OUT1 (_DAC_OPA1MUX_OUTPEN_OUT1 << 14) /**< Shifted mode OUT1 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 659 #define DAC_OPA1MUX_OUTPEN_OUT2 (_DAC_OPA1MUX_OUTPEN_OUT2 << 14) /**< Shifted mode OUT2 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 660 #define DAC_OPA1MUX_OUTPEN_OUT3 (_DAC_OPA1MUX_OUTPEN_OUT3 << 14) /**< Shifted mode OUT3 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 661 #define DAC_OPA1MUX_OUTPEN_OUT4 (_DAC_OPA1MUX_OUTPEN_OUT4 << 14) /**< Shifted mode OUT4 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 662 #define _DAC_OPA1MUX_OUTMODE_SHIFT 22 /**< Shift value for DAC_OUTMODE */
Kojto 98:8ab26030e058 663 #define _DAC_OPA1MUX_OUTMODE_MASK 0xC00000UL /**< Bit mask for DAC_OUTMODE */
Kojto 98:8ab26030e058 664 #define _DAC_OPA1MUX_OUTMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 665 #define _DAC_OPA1MUX_OUTMODE_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA1MUX */
Kojto 98:8ab26030e058 666 #define _DAC_OPA1MUX_OUTMODE_MAIN 0x00000001UL /**< Mode MAIN for DAC_OPA1MUX */
Kojto 98:8ab26030e058 667 #define _DAC_OPA1MUX_OUTMODE_ALT 0x00000002UL /**< Mode ALT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 668 #define _DAC_OPA1MUX_OUTMODE_ALL 0x00000003UL /**< Mode ALL for DAC_OPA1MUX */
Kojto 98:8ab26030e058 669 #define DAC_OPA1MUX_OUTMODE_DEFAULT (_DAC_OPA1MUX_OUTMODE_DEFAULT << 22) /**< Shifted mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 670 #define DAC_OPA1MUX_OUTMODE_DISABLE (_DAC_OPA1MUX_OUTMODE_DISABLE << 22) /**< Shifted mode DISABLE for DAC_OPA1MUX */
Kojto 98:8ab26030e058 671 #define DAC_OPA1MUX_OUTMODE_MAIN (_DAC_OPA1MUX_OUTMODE_MAIN << 22) /**< Shifted mode MAIN for DAC_OPA1MUX */
Kojto 98:8ab26030e058 672 #define DAC_OPA1MUX_OUTMODE_ALT (_DAC_OPA1MUX_OUTMODE_ALT << 22) /**< Shifted mode ALT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 673 #define DAC_OPA1MUX_OUTMODE_ALL (_DAC_OPA1MUX_OUTMODE_ALL << 22) /**< Shifted mode ALL for DAC_OPA1MUX */
Kojto 98:8ab26030e058 674 #define DAC_OPA1MUX_NEXTOUT (0x1UL << 26) /**< OPA1 Next Enable */
Kojto 98:8ab26030e058 675 #define _DAC_OPA1MUX_NEXTOUT_SHIFT 26 /**< Shift value for DAC_NEXTOUT */
Kojto 98:8ab26030e058 676 #define _DAC_OPA1MUX_NEXTOUT_MASK 0x4000000UL /**< Bit mask for DAC_NEXTOUT */
Kojto 98:8ab26030e058 677 #define _DAC_OPA1MUX_NEXTOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 678 #define DAC_OPA1MUX_NEXTOUT_DEFAULT (_DAC_OPA1MUX_NEXTOUT_DEFAULT << 26) /**< Shifted mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 679 #define _DAC_OPA1MUX_RESSEL_SHIFT 28 /**< Shift value for DAC_RESSEL */
Kojto 98:8ab26030e058 680 #define _DAC_OPA1MUX_RESSEL_MASK 0x70000000UL /**< Bit mask for DAC_RESSEL */
Kojto 98:8ab26030e058 681 #define _DAC_OPA1MUX_RESSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 682 #define _DAC_OPA1MUX_RESSEL_RES0 0x00000000UL /**< Mode RES0 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 683 #define _DAC_OPA1MUX_RESSEL_RES1 0x00000001UL /**< Mode RES1 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 684 #define _DAC_OPA1MUX_RESSEL_RES2 0x00000002UL /**< Mode RES2 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 685 #define _DAC_OPA1MUX_RESSEL_RES3 0x00000003UL /**< Mode RES3 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 686 #define _DAC_OPA1MUX_RESSEL_RES4 0x00000004UL /**< Mode RES4 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 687 #define _DAC_OPA1MUX_RESSEL_RES5 0x00000005UL /**< Mode RES5 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 688 #define _DAC_OPA1MUX_RESSEL_RES6 0x00000006UL /**< Mode RES6 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 689 #define _DAC_OPA1MUX_RESSEL_RES7 0x00000007UL /**< Mode RES7 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 690 #define DAC_OPA1MUX_RESSEL_DEFAULT (_DAC_OPA1MUX_RESSEL_DEFAULT << 28) /**< Shifted mode DEFAULT for DAC_OPA1MUX */
Kojto 98:8ab26030e058 691 #define DAC_OPA1MUX_RESSEL_RES0 (_DAC_OPA1MUX_RESSEL_RES0 << 28) /**< Shifted mode RES0 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 692 #define DAC_OPA1MUX_RESSEL_RES1 (_DAC_OPA1MUX_RESSEL_RES1 << 28) /**< Shifted mode RES1 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 693 #define DAC_OPA1MUX_RESSEL_RES2 (_DAC_OPA1MUX_RESSEL_RES2 << 28) /**< Shifted mode RES2 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 694 #define DAC_OPA1MUX_RESSEL_RES3 (_DAC_OPA1MUX_RESSEL_RES3 << 28) /**< Shifted mode RES3 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 695 #define DAC_OPA1MUX_RESSEL_RES4 (_DAC_OPA1MUX_RESSEL_RES4 << 28) /**< Shifted mode RES4 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 696 #define DAC_OPA1MUX_RESSEL_RES5 (_DAC_OPA1MUX_RESSEL_RES5 << 28) /**< Shifted mode RES5 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 697 #define DAC_OPA1MUX_RESSEL_RES6 (_DAC_OPA1MUX_RESSEL_RES6 << 28) /**< Shifted mode RES6 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 698 #define DAC_OPA1MUX_RESSEL_RES7 (_DAC_OPA1MUX_RESSEL_RES7 << 28) /**< Shifted mode RES7 for DAC_OPA1MUX */
Kojto 98:8ab26030e058 699
Kojto 98:8ab26030e058 700 /* Bit fields for DAC OPA2MUX */
Kojto 98:8ab26030e058 701 #define _DAC_OPA2MUX_RESETVALUE 0x00000000UL /**< Default value for DAC_OPA2MUX */
Kojto 98:8ab26030e058 702 #define _DAC_OPA2MUX_MASK 0x7440F737UL /**< Mask for DAC_OPA2MUX */
Kojto 98:8ab26030e058 703 #define _DAC_OPA2MUX_POSSEL_SHIFT 0 /**< Shift value for DAC_POSSEL */
Kojto 98:8ab26030e058 704 #define _DAC_OPA2MUX_POSSEL_MASK 0x7UL /**< Bit mask for DAC_POSSEL */
Kojto 98:8ab26030e058 705 #define _DAC_OPA2MUX_POSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 706 #define _DAC_OPA2MUX_POSSEL_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA2MUX */
Kojto 98:8ab26030e058 707 #define _DAC_OPA2MUX_POSSEL_POSPAD 0x00000002UL /**< Mode POSPAD for DAC_OPA2MUX */
Kojto 98:8ab26030e058 708 #define _DAC_OPA2MUX_POSSEL_OPA1INP 0x00000003UL /**< Mode OPA1INP for DAC_OPA2MUX */
Kojto 98:8ab26030e058 709 #define _DAC_OPA2MUX_POSSEL_OPATAP 0x00000004UL /**< Mode OPATAP for DAC_OPA2MUX */
Kojto 98:8ab26030e058 710 #define DAC_OPA2MUX_POSSEL_DEFAULT (_DAC_OPA2MUX_POSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 711 #define DAC_OPA2MUX_POSSEL_DISABLE (_DAC_OPA2MUX_POSSEL_DISABLE << 0) /**< Shifted mode DISABLE for DAC_OPA2MUX */
Kojto 98:8ab26030e058 712 #define DAC_OPA2MUX_POSSEL_POSPAD (_DAC_OPA2MUX_POSSEL_POSPAD << 0) /**< Shifted mode POSPAD for DAC_OPA2MUX */
Kojto 98:8ab26030e058 713 #define DAC_OPA2MUX_POSSEL_OPA1INP (_DAC_OPA2MUX_POSSEL_OPA1INP << 0) /**< Shifted mode OPA1INP for DAC_OPA2MUX */
Kojto 98:8ab26030e058 714 #define DAC_OPA2MUX_POSSEL_OPATAP (_DAC_OPA2MUX_POSSEL_OPATAP << 0) /**< Shifted mode OPATAP for DAC_OPA2MUX */
Kojto 98:8ab26030e058 715 #define _DAC_OPA2MUX_NEGSEL_SHIFT 4 /**< Shift value for DAC_NEGSEL */
Kojto 98:8ab26030e058 716 #define _DAC_OPA2MUX_NEGSEL_MASK 0x30UL /**< Bit mask for DAC_NEGSEL */
Kojto 98:8ab26030e058 717 #define _DAC_OPA2MUX_NEGSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 718 #define _DAC_OPA2MUX_NEGSEL_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA2MUX */
Kojto 98:8ab26030e058 719 #define _DAC_OPA2MUX_NEGSEL_UG 0x00000001UL /**< Mode UG for DAC_OPA2MUX */
Kojto 98:8ab26030e058 720 #define _DAC_OPA2MUX_NEGSEL_OPATAP 0x00000002UL /**< Mode OPATAP for DAC_OPA2MUX */
Kojto 98:8ab26030e058 721 #define _DAC_OPA2MUX_NEGSEL_NEGPAD 0x00000003UL /**< Mode NEGPAD for DAC_OPA2MUX */
Kojto 98:8ab26030e058 722 #define DAC_OPA2MUX_NEGSEL_DEFAULT (_DAC_OPA2MUX_NEGSEL_DEFAULT << 4) /**< Shifted mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 723 #define DAC_OPA2MUX_NEGSEL_DISABLE (_DAC_OPA2MUX_NEGSEL_DISABLE << 4) /**< Shifted mode DISABLE for DAC_OPA2MUX */
Kojto 98:8ab26030e058 724 #define DAC_OPA2MUX_NEGSEL_UG (_DAC_OPA2MUX_NEGSEL_UG << 4) /**< Shifted mode UG for DAC_OPA2MUX */
Kojto 98:8ab26030e058 725 #define DAC_OPA2MUX_NEGSEL_OPATAP (_DAC_OPA2MUX_NEGSEL_OPATAP << 4) /**< Shifted mode OPATAP for DAC_OPA2MUX */
Kojto 98:8ab26030e058 726 #define DAC_OPA2MUX_NEGSEL_NEGPAD (_DAC_OPA2MUX_NEGSEL_NEGPAD << 4) /**< Shifted mode NEGPAD for DAC_OPA2MUX */
Kojto 98:8ab26030e058 727 #define _DAC_OPA2MUX_RESINMUX_SHIFT 8 /**< Shift value for DAC_RESINMUX */
Kojto 98:8ab26030e058 728 #define _DAC_OPA2MUX_RESINMUX_MASK 0x700UL /**< Bit mask for DAC_RESINMUX */
Kojto 98:8ab26030e058 729 #define _DAC_OPA2MUX_RESINMUX_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 730 #define _DAC_OPA2MUX_RESINMUX_DISABLE 0x00000000UL /**< Mode DISABLE for DAC_OPA2MUX */
Kojto 98:8ab26030e058 731 #define _DAC_OPA2MUX_RESINMUX_OPA1INP 0x00000001UL /**< Mode OPA1INP for DAC_OPA2MUX */
Kojto 98:8ab26030e058 732 #define _DAC_OPA2MUX_RESINMUX_NEGPAD 0x00000002UL /**< Mode NEGPAD for DAC_OPA2MUX */
Kojto 98:8ab26030e058 733 #define _DAC_OPA2MUX_RESINMUX_POSPAD 0x00000003UL /**< Mode POSPAD for DAC_OPA2MUX */
Kojto 98:8ab26030e058 734 #define _DAC_OPA2MUX_RESINMUX_VSS 0x00000004UL /**< Mode VSS for DAC_OPA2MUX */
Kojto 98:8ab26030e058 735 #define DAC_OPA2MUX_RESINMUX_DEFAULT (_DAC_OPA2MUX_RESINMUX_DEFAULT << 8) /**< Shifted mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 736 #define DAC_OPA2MUX_RESINMUX_DISABLE (_DAC_OPA2MUX_RESINMUX_DISABLE << 8) /**< Shifted mode DISABLE for DAC_OPA2MUX */
Kojto 98:8ab26030e058 737 #define DAC_OPA2MUX_RESINMUX_OPA1INP (_DAC_OPA2MUX_RESINMUX_OPA1INP << 8) /**< Shifted mode OPA1INP for DAC_OPA2MUX */
Kojto 98:8ab26030e058 738 #define DAC_OPA2MUX_RESINMUX_NEGPAD (_DAC_OPA2MUX_RESINMUX_NEGPAD << 8) /**< Shifted mode NEGPAD for DAC_OPA2MUX */
Kojto 98:8ab26030e058 739 #define DAC_OPA2MUX_RESINMUX_POSPAD (_DAC_OPA2MUX_RESINMUX_POSPAD << 8) /**< Shifted mode POSPAD for DAC_OPA2MUX */
Kojto 98:8ab26030e058 740 #define DAC_OPA2MUX_RESINMUX_VSS (_DAC_OPA2MUX_RESINMUX_VSS << 8) /**< Shifted mode VSS for DAC_OPA2MUX */
Kojto 98:8ab26030e058 741 #define DAC_OPA2MUX_PPEN (0x1UL << 12) /**< OPA2 Positive Pad Input Enable */
Kojto 98:8ab26030e058 742 #define _DAC_OPA2MUX_PPEN_SHIFT 12 /**< Shift value for DAC_PPEN */
Kojto 98:8ab26030e058 743 #define _DAC_OPA2MUX_PPEN_MASK 0x1000UL /**< Bit mask for DAC_PPEN */
Kojto 98:8ab26030e058 744 #define _DAC_OPA2MUX_PPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 745 #define DAC_OPA2MUX_PPEN_DEFAULT (_DAC_OPA2MUX_PPEN_DEFAULT << 12) /**< Shifted mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 746 #define DAC_OPA2MUX_NPEN (0x1UL << 13) /**< OPA2 Negative Pad Input Enable */
Kojto 98:8ab26030e058 747 #define _DAC_OPA2MUX_NPEN_SHIFT 13 /**< Shift value for DAC_NPEN */
Kojto 98:8ab26030e058 748 #define _DAC_OPA2MUX_NPEN_MASK 0x2000UL /**< Bit mask for DAC_NPEN */
Kojto 98:8ab26030e058 749 #define _DAC_OPA2MUX_NPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 750 #define DAC_OPA2MUX_NPEN_DEFAULT (_DAC_OPA2MUX_NPEN_DEFAULT << 13) /**< Shifted mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 751 #define _DAC_OPA2MUX_OUTPEN_SHIFT 14 /**< Shift value for DAC_OUTPEN */
Kojto 98:8ab26030e058 752 #define _DAC_OPA2MUX_OUTPEN_MASK 0xC000UL /**< Bit mask for DAC_OUTPEN */
Kojto 98:8ab26030e058 753 #define _DAC_OPA2MUX_OUTPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 754 #define _DAC_OPA2MUX_OUTPEN_OUT0 0x00000001UL /**< Mode OUT0 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 755 #define _DAC_OPA2MUX_OUTPEN_OUT1 0x00000002UL /**< Mode OUT1 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 756 #define DAC_OPA2MUX_OUTPEN_DEFAULT (_DAC_OPA2MUX_OUTPEN_DEFAULT << 14) /**< Shifted mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 757 #define DAC_OPA2MUX_OUTPEN_OUT0 (_DAC_OPA2MUX_OUTPEN_OUT0 << 14) /**< Shifted mode OUT0 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 758 #define DAC_OPA2MUX_OUTPEN_OUT1 (_DAC_OPA2MUX_OUTPEN_OUT1 << 14) /**< Shifted mode OUT1 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 759 #define DAC_OPA2MUX_OUTMODE (0x1UL << 22) /**< Output Select */
Kojto 98:8ab26030e058 760 #define _DAC_OPA2MUX_OUTMODE_SHIFT 22 /**< Shift value for DAC_OUTMODE */
Kojto 98:8ab26030e058 761 #define _DAC_OPA2MUX_OUTMODE_MASK 0x400000UL /**< Bit mask for DAC_OUTMODE */
Kojto 98:8ab26030e058 762 #define _DAC_OPA2MUX_OUTMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 763 #define DAC_OPA2MUX_OUTMODE_DEFAULT (_DAC_OPA2MUX_OUTMODE_DEFAULT << 22) /**< Shifted mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 764 #define DAC_OPA2MUX_NEXTOUT (0x1UL << 26) /**< OPA2 Next Enable */
Kojto 98:8ab26030e058 765 #define _DAC_OPA2MUX_NEXTOUT_SHIFT 26 /**< Shift value for DAC_NEXTOUT */
Kojto 98:8ab26030e058 766 #define _DAC_OPA2MUX_NEXTOUT_MASK 0x4000000UL /**< Bit mask for DAC_NEXTOUT */
Kojto 98:8ab26030e058 767 #define _DAC_OPA2MUX_NEXTOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 768 #define DAC_OPA2MUX_NEXTOUT_DEFAULT (_DAC_OPA2MUX_NEXTOUT_DEFAULT << 26) /**< Shifted mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 769 #define _DAC_OPA2MUX_RESSEL_SHIFT 28 /**< Shift value for DAC_RESSEL */
Kojto 98:8ab26030e058 770 #define _DAC_OPA2MUX_RESSEL_MASK 0x70000000UL /**< Bit mask for DAC_RESSEL */
Kojto 98:8ab26030e058 771 #define _DAC_OPA2MUX_RESSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 772 #define _DAC_OPA2MUX_RESSEL_RES0 0x00000000UL /**< Mode RES0 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 773 #define _DAC_OPA2MUX_RESSEL_RES1 0x00000001UL /**< Mode RES1 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 774 #define _DAC_OPA2MUX_RESSEL_RES2 0x00000002UL /**< Mode RES2 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 775 #define _DAC_OPA2MUX_RESSEL_RES3 0x00000003UL /**< Mode RES3 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 776 #define _DAC_OPA2MUX_RESSEL_RES4 0x00000004UL /**< Mode RES4 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 777 #define _DAC_OPA2MUX_RESSEL_RES5 0x00000005UL /**< Mode RES5 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 778 #define _DAC_OPA2MUX_RESSEL_RES6 0x00000006UL /**< Mode RES6 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 779 #define _DAC_OPA2MUX_RESSEL_RES7 0x00000007UL /**< Mode RES7 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 780 #define DAC_OPA2MUX_RESSEL_DEFAULT (_DAC_OPA2MUX_RESSEL_DEFAULT << 28) /**< Shifted mode DEFAULT for DAC_OPA2MUX */
Kojto 98:8ab26030e058 781 #define DAC_OPA2MUX_RESSEL_RES0 (_DAC_OPA2MUX_RESSEL_RES0 << 28) /**< Shifted mode RES0 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 782 #define DAC_OPA2MUX_RESSEL_RES1 (_DAC_OPA2MUX_RESSEL_RES1 << 28) /**< Shifted mode RES1 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 783 #define DAC_OPA2MUX_RESSEL_RES2 (_DAC_OPA2MUX_RESSEL_RES2 << 28) /**< Shifted mode RES2 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 784 #define DAC_OPA2MUX_RESSEL_RES3 (_DAC_OPA2MUX_RESSEL_RES3 << 28) /**< Shifted mode RES3 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 785 #define DAC_OPA2MUX_RESSEL_RES4 (_DAC_OPA2MUX_RESSEL_RES4 << 28) /**< Shifted mode RES4 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 786 #define DAC_OPA2MUX_RESSEL_RES5 (_DAC_OPA2MUX_RESSEL_RES5 << 28) /**< Shifted mode RES5 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 787 #define DAC_OPA2MUX_RESSEL_RES6 (_DAC_OPA2MUX_RESSEL_RES6 << 28) /**< Shifted mode RES6 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 788 #define DAC_OPA2MUX_RESSEL_RES7 (_DAC_OPA2MUX_RESSEL_RES7 << 28) /**< Shifted mode RES7 for DAC_OPA2MUX */
Kojto 98:8ab26030e058 789
Kojto 98:8ab26030e058 790 /** @} End of group EFM32WG_DAC */
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