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TARGET_NUCLEO_F401RE/stm32f4xx_hal_usart.h@77:869cf507173a, 2014-02-14 (annotated)
- Committer:
- emilmont
- Date:
- Fri Feb 14 14:36:43 2014 +0000
- Revision:
- 77:869cf507173a
- Child:
- 81:7d30d6019079
Release 77 of the mbed library
Main changes:
* Add target NUCLEO_F030R8
* Add target NUCLEO_F401RE
* Add target NUCLEO_F103RB
* Add target NUCLEO_L152RE
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
emilmont | 77:869cf507173a | 1 | /** |
emilmont | 77:869cf507173a | 2 | ****************************************************************************** |
emilmont | 77:869cf507173a | 3 | * @file stm32f4xx_hal_usart.h |
emilmont | 77:869cf507173a | 4 | * @author MCD Application Team |
emilmont | 77:869cf507173a | 5 | * @version V1.0.0RC2 |
emilmont | 77:869cf507173a | 6 | * @date 04-February-2014 |
emilmont | 77:869cf507173a | 7 | * @brief Header file of USART HAL module. |
emilmont | 77:869cf507173a | 8 | ****************************************************************************** |
emilmont | 77:869cf507173a | 9 | * @attention |
emilmont | 77:869cf507173a | 10 | * |
emilmont | 77:869cf507173a | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
emilmont | 77:869cf507173a | 12 | * |
emilmont | 77:869cf507173a | 13 | * Redistribution and use in source and binary forms, with or without modification, |
emilmont | 77:869cf507173a | 14 | * are permitted provided that the following conditions are met: |
emilmont | 77:869cf507173a | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
emilmont | 77:869cf507173a | 16 | * this list of conditions and the following disclaimer. |
emilmont | 77:869cf507173a | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
emilmont | 77:869cf507173a | 18 | * this list of conditions and the following disclaimer in the documentation |
emilmont | 77:869cf507173a | 19 | * and/or other materials provided with the distribution. |
emilmont | 77:869cf507173a | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
emilmont | 77:869cf507173a | 21 | * may be used to endorse or promote products derived from this software |
emilmont | 77:869cf507173a | 22 | * without specific prior written permission. |
emilmont | 77:869cf507173a | 23 | * |
emilmont | 77:869cf507173a | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
emilmont | 77:869cf507173a | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
emilmont | 77:869cf507173a | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
emilmont | 77:869cf507173a | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
emilmont | 77:869cf507173a | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
emilmont | 77:869cf507173a | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
emilmont | 77:869cf507173a | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
emilmont | 77:869cf507173a | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
emilmont | 77:869cf507173a | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
emilmont | 77:869cf507173a | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
emilmont | 77:869cf507173a | 34 | * |
emilmont | 77:869cf507173a | 35 | ****************************************************************************** |
emilmont | 77:869cf507173a | 36 | */ |
emilmont | 77:869cf507173a | 37 | |
emilmont | 77:869cf507173a | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
emilmont | 77:869cf507173a | 39 | #ifndef __STM32F4xx_HAL_USART_H |
emilmont | 77:869cf507173a | 40 | #define __STM32F4xx_HAL_USART_H |
emilmont | 77:869cf507173a | 41 | |
emilmont | 77:869cf507173a | 42 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 43 | extern "C" { |
emilmont | 77:869cf507173a | 44 | #endif |
emilmont | 77:869cf507173a | 45 | |
emilmont | 77:869cf507173a | 46 | /* Includes ------------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 47 | #include "stm32f4xx_hal_def.h" |
emilmont | 77:869cf507173a | 48 | |
emilmont | 77:869cf507173a | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
emilmont | 77:869cf507173a | 50 | * @{ |
emilmont | 77:869cf507173a | 51 | */ |
emilmont | 77:869cf507173a | 52 | |
emilmont | 77:869cf507173a | 53 | /** @addtogroup USART |
emilmont | 77:869cf507173a | 54 | * @{ |
emilmont | 77:869cf507173a | 55 | */ |
emilmont | 77:869cf507173a | 56 | |
emilmont | 77:869cf507173a | 57 | /* Exported types ------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 58 | /** |
emilmont | 77:869cf507173a | 59 | * @brief USART Init Structure definition |
emilmont | 77:869cf507173a | 60 | */ |
emilmont | 77:869cf507173a | 61 | typedef struct |
emilmont | 77:869cf507173a | 62 | { |
emilmont | 77:869cf507173a | 63 | uint32_t BaudRate; /*!< This member configures the Usart communication baud rate. |
emilmont | 77:869cf507173a | 64 | The baud rate is computed using the following formula: |
emilmont | 77:869cf507173a | 65 | - IntegerDivider = ((PCLKx) / (8 * (hirda->Init.BaudRate))) |
emilmont | 77:869cf507173a | 66 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */ |
emilmont | 77:869cf507173a | 67 | |
emilmont | 77:869cf507173a | 68 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
emilmont | 77:869cf507173a | 69 | This parameter can be a value of @ref USART_Word_Length */ |
emilmont | 77:869cf507173a | 70 | |
emilmont | 77:869cf507173a | 71 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
emilmont | 77:869cf507173a | 72 | This parameter can be a value of @ref USART_Stop_Bits */ |
emilmont | 77:869cf507173a | 73 | |
emilmont | 77:869cf507173a | 74 | uint32_t Parity; /*!< Specifies the parity mode. |
emilmont | 77:869cf507173a | 75 | This parameter can be a value of @ref USART_Parity |
emilmont | 77:869cf507173a | 76 | @note When parity is enabled, the computed parity is inserted |
emilmont | 77:869cf507173a | 77 | at the MSB position of the transmitted data (9th bit when |
emilmont | 77:869cf507173a | 78 | the word length is set to 9 data bits; 8th bit when the |
emilmont | 77:869cf507173a | 79 | word length is set to 8 data bits). */ |
emilmont | 77:869cf507173a | 80 | |
emilmont | 77:869cf507173a | 81 | uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. |
emilmont | 77:869cf507173a | 82 | This parameter can be a value of @ref USART_Mode */ |
emilmont | 77:869cf507173a | 83 | |
emilmont | 77:869cf507173a | 84 | uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock. |
emilmont | 77:869cf507173a | 85 | This parameter can be a value of @ref USART_Clock_Polarity */ |
emilmont | 77:869cf507173a | 86 | |
emilmont | 77:869cf507173a | 87 | uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. |
emilmont | 77:869cf507173a | 88 | This parameter can be a value of @ref USART_Clock_Phase */ |
emilmont | 77:869cf507173a | 89 | |
emilmont | 77:869cf507173a | 90 | uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted |
emilmont | 77:869cf507173a | 91 | data bit (MSB) has to be output on the SCLK pin in synchronous mode. |
emilmont | 77:869cf507173a | 92 | This parameter can be a value of @ref USART_Last_Bit */ |
emilmont | 77:869cf507173a | 93 | }USART_InitTypeDef; |
emilmont | 77:869cf507173a | 94 | |
emilmont | 77:869cf507173a | 95 | /** |
emilmont | 77:869cf507173a | 96 | * @brief HAL State structures definition |
emilmont | 77:869cf507173a | 97 | */ |
emilmont | 77:869cf507173a | 98 | typedef enum |
emilmont | 77:869cf507173a | 99 | { |
emilmont | 77:869cf507173a | 100 | HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */ |
emilmont | 77:869cf507173a | 101 | HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
emilmont | 77:869cf507173a | 102 | HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
emilmont | 77:869cf507173a | 103 | HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
emilmont | 77:869cf507173a | 104 | HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
emilmont | 77:869cf507173a | 105 | HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */ |
emilmont | 77:869cf507173a | 106 | HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
emilmont | 77:869cf507173a | 107 | HAL_USART_STATE_ERROR = 0x04 /*!< Error */ |
emilmont | 77:869cf507173a | 108 | }HAL_USART_StateTypeDef; |
emilmont | 77:869cf507173a | 109 | |
emilmont | 77:869cf507173a | 110 | /** |
emilmont | 77:869cf507173a | 111 | * @brief HAL USART Error Code structure definition |
emilmont | 77:869cf507173a | 112 | */ |
emilmont | 77:869cf507173a | 113 | typedef enum |
emilmont | 77:869cf507173a | 114 | { |
emilmont | 77:869cf507173a | 115 | HAL_USART_ERROR_NONE = 0x00, /*!< No error */ |
emilmont | 77:869cf507173a | 116 | HAL_USART_ERROR_PE = 0x01, /*!< Parity error */ |
emilmont | 77:869cf507173a | 117 | HAL_USART_ERROR_NE = 0x02, /*!< Noise error */ |
emilmont | 77:869cf507173a | 118 | HAL_USART_ERROR_FE = 0x04, /*!< frame error */ |
emilmont | 77:869cf507173a | 119 | HAL_USART_ERROR_ORE = 0x08, /*!< Overrun error */ |
emilmont | 77:869cf507173a | 120 | HAL_USART_ERROR_DMA = 0x10 /*!< DMA transfer error */ |
emilmont | 77:869cf507173a | 121 | }HAL_USART_ErrorTypeDef; |
emilmont | 77:869cf507173a | 122 | |
emilmont | 77:869cf507173a | 123 | /** |
emilmont | 77:869cf507173a | 124 | * @brief USART handle Structure definition |
emilmont | 77:869cf507173a | 125 | */ |
emilmont | 77:869cf507173a | 126 | typedef struct |
emilmont | 77:869cf507173a | 127 | { |
emilmont | 77:869cf507173a | 128 | USART_TypeDef *Instance; /* USART registers base address */ |
emilmont | 77:869cf507173a | 129 | |
emilmont | 77:869cf507173a | 130 | USART_InitTypeDef Init; /* Usart communication parameters */ |
emilmont | 77:869cf507173a | 131 | |
emilmont | 77:869cf507173a | 132 | uint8_t *pTxBuffPtr; /* Pointer to Usart Tx transfer Buffer */ |
emilmont | 77:869cf507173a | 133 | |
emilmont | 77:869cf507173a | 134 | uint16_t TxXferSize; /* Usart Tx Transfer size */ |
emilmont | 77:869cf507173a | 135 | |
emilmont | 77:869cf507173a | 136 | __IO uint16_t TxXferCount; /* Usart Tx Transfer Counter */ |
emilmont | 77:869cf507173a | 137 | |
emilmont | 77:869cf507173a | 138 | uint8_t *pRxBuffPtr; /* Pointer to Usart Rx transfer Buffer */ |
emilmont | 77:869cf507173a | 139 | |
emilmont | 77:869cf507173a | 140 | uint16_t RxXferSize; /* Usart Rx Transfer size */ |
emilmont | 77:869cf507173a | 141 | |
emilmont | 77:869cf507173a | 142 | __IO uint16_t RxXferCount; /* Usart Rx Transfer Counter */ |
emilmont | 77:869cf507173a | 143 | |
emilmont | 77:869cf507173a | 144 | DMA_HandleTypeDef *hdmatx; /* Usart Tx DMA Handle parameters */ |
emilmont | 77:869cf507173a | 145 | |
emilmont | 77:869cf507173a | 146 | DMA_HandleTypeDef *hdmarx; /* Usart Rx DMA Handle parameters */ |
emilmont | 77:869cf507173a | 147 | |
emilmont | 77:869cf507173a | 148 | HAL_LockTypeDef Lock; /* Locking object */ |
emilmont | 77:869cf507173a | 149 | |
emilmont | 77:869cf507173a | 150 | __IO HAL_USART_StateTypeDef State; /* Usart communication state */ |
emilmont | 77:869cf507173a | 151 | |
emilmont | 77:869cf507173a | 152 | __IO HAL_USART_ErrorTypeDef ErrorCode; /* USART Error code */ |
emilmont | 77:869cf507173a | 153 | |
emilmont | 77:869cf507173a | 154 | }USART_HandleTypeDef; |
emilmont | 77:869cf507173a | 155 | |
emilmont | 77:869cf507173a | 156 | |
emilmont | 77:869cf507173a | 157 | /* Exported constants --------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 158 | /** @defgroup USART_Exported_Constants |
emilmont | 77:869cf507173a | 159 | * @{ |
emilmont | 77:869cf507173a | 160 | */ |
emilmont | 77:869cf507173a | 161 | |
emilmont | 77:869cf507173a | 162 | /** @defgroup USART_Word_Length |
emilmont | 77:869cf507173a | 163 | * @{ |
emilmont | 77:869cf507173a | 164 | */ |
emilmont | 77:869cf507173a | 165 | #define USART_WORDLENGTH_8B ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 166 | #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
emilmont | 77:869cf507173a | 167 | #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \ |
emilmont | 77:869cf507173a | 168 | ((LENGTH) == USART_WORDLENGTH_9B)) |
emilmont | 77:869cf507173a | 169 | /** |
emilmont | 77:869cf507173a | 170 | * @} |
emilmont | 77:869cf507173a | 171 | */ |
emilmont | 77:869cf507173a | 172 | |
emilmont | 77:869cf507173a | 173 | /** @defgroup USART_Stop_Bits |
emilmont | 77:869cf507173a | 174 | * @{ |
emilmont | 77:869cf507173a | 175 | */ |
emilmont | 77:869cf507173a | 176 | #define USART_STOPBITS_1 ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 177 | #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0) |
emilmont | 77:869cf507173a | 178 | #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
emilmont | 77:869cf507173a | 179 | #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) |
emilmont | 77:869cf507173a | 180 | #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \ |
emilmont | 77:869cf507173a | 181 | ((STOPBITS) == USART_STOPBITS_0_5) || \ |
emilmont | 77:869cf507173a | 182 | ((STOPBITS) == USART_STOPBITS_1_5) || \ |
emilmont | 77:869cf507173a | 183 | ((STOPBITS) == USART_STOPBITS_2)) |
emilmont | 77:869cf507173a | 184 | /** |
emilmont | 77:869cf507173a | 185 | * @} |
emilmont | 77:869cf507173a | 186 | */ |
emilmont | 77:869cf507173a | 187 | |
emilmont | 77:869cf507173a | 188 | /** @defgroup USART_Parity |
emilmont | 77:869cf507173a | 189 | * @{ |
emilmont | 77:869cf507173a | 190 | */ |
emilmont | 77:869cf507173a | 191 | #define USART_PARITY_NONE ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 192 | #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
emilmont | 77:869cf507173a | 193 | #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
emilmont | 77:869cf507173a | 194 | #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \ |
emilmont | 77:869cf507173a | 195 | ((PARITY) == USART_PARITY_EVEN) || \ |
emilmont | 77:869cf507173a | 196 | ((PARITY) == USART_PARITY_ODD)) |
emilmont | 77:869cf507173a | 197 | /** |
emilmont | 77:869cf507173a | 198 | * @} |
emilmont | 77:869cf507173a | 199 | */ |
emilmont | 77:869cf507173a | 200 | |
emilmont | 77:869cf507173a | 201 | /** @defgroup USART_Mode |
emilmont | 77:869cf507173a | 202 | * @{ |
emilmont | 77:869cf507173a | 203 | */ |
emilmont | 77:869cf507173a | 204 | #define USART_MODE_RX ((uint32_t)USART_CR1_RE) |
emilmont | 77:869cf507173a | 205 | #define USART_MODE_TX ((uint32_t)USART_CR1_TE) |
emilmont | 77:869cf507173a | 206 | #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
emilmont | 77:869cf507173a | 207 | #define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFF3) == 0x00) && ((MODE) != (uint32_t)0x00)) |
emilmont | 77:869cf507173a | 208 | /** |
emilmont | 77:869cf507173a | 209 | * @} |
emilmont | 77:869cf507173a | 210 | */ |
emilmont | 77:869cf507173a | 211 | |
emilmont | 77:869cf507173a | 212 | /** @defgroup USART_Clock |
emilmont | 77:869cf507173a | 213 | * @{ |
emilmont | 77:869cf507173a | 214 | */ |
emilmont | 77:869cf507173a | 215 | #define USART_CLOCK_DISABLED ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 216 | #define USART_CLOCK_ENABLED ((uint32_t)USART_CR2_CLKEN) |
emilmont | 77:869cf507173a | 217 | #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLED) || \ |
emilmont | 77:869cf507173a | 218 | ((CLOCK) == USART_CLOCK_ENABLED)) |
emilmont | 77:869cf507173a | 219 | /** |
emilmont | 77:869cf507173a | 220 | * @} |
emilmont | 77:869cf507173a | 221 | */ |
emilmont | 77:869cf507173a | 222 | |
emilmont | 77:869cf507173a | 223 | /** @defgroup USART_Clock_Polarity |
emilmont | 77:869cf507173a | 224 | * @{ |
emilmont | 77:869cf507173a | 225 | */ |
emilmont | 77:869cf507173a | 226 | #define USART_POLARITY_LOW ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 227 | #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) |
emilmont | 77:869cf507173a | 228 | #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH)) |
emilmont | 77:869cf507173a | 229 | /** |
emilmont | 77:869cf507173a | 230 | * @} |
emilmont | 77:869cf507173a | 231 | */ |
emilmont | 77:869cf507173a | 232 | |
emilmont | 77:869cf507173a | 233 | /** @defgroup USART_Clock_Phase |
emilmont | 77:869cf507173a | 234 | * @{ |
emilmont | 77:869cf507173a | 235 | */ |
emilmont | 77:869cf507173a | 236 | #define USART_PHASE_1EDGE ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 237 | #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) |
emilmont | 77:869cf507173a | 238 | #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE)) |
emilmont | 77:869cf507173a | 239 | /** |
emilmont | 77:869cf507173a | 240 | * @} |
emilmont | 77:869cf507173a | 241 | */ |
emilmont | 77:869cf507173a | 242 | |
emilmont | 77:869cf507173a | 243 | /** @defgroup USART_Last_Bit |
emilmont | 77:869cf507173a | 244 | * @{ |
emilmont | 77:869cf507173a | 245 | */ |
emilmont | 77:869cf507173a | 246 | #define USART_LASTBIT_DISABLE ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 247 | #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) |
emilmont | 77:869cf507173a | 248 | #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \ |
emilmont | 77:869cf507173a | 249 | ((LASTBIT) == USART_LASTBIT_ENABLE)) |
emilmont | 77:869cf507173a | 250 | /** |
emilmont | 77:869cf507173a | 251 | * @} |
emilmont | 77:869cf507173a | 252 | */ |
emilmont | 77:869cf507173a | 253 | |
emilmont | 77:869cf507173a | 254 | /** @defgroup Usart_NACK_State |
emilmont | 77:869cf507173a | 255 | * @{ |
emilmont | 77:869cf507173a | 256 | */ |
emilmont | 77:869cf507173a | 257 | #define USARTNACK_ENABLED ((uint32_t)USART_CR3_NACK) |
emilmont | 77:869cf507173a | 258 | #define USARTNACK_DISABLED ((uint32_t)0x00000000) |
emilmont | 77:869cf507173a | 259 | #define IS_USART_NACK_STATE(NACK) (((NACK) == USARTNACK_ENABLED) || \ |
emilmont | 77:869cf507173a | 260 | ((NACK) == USARTNACK_DISABLED)) |
emilmont | 77:869cf507173a | 261 | /** |
emilmont | 77:869cf507173a | 262 | * @} |
emilmont | 77:869cf507173a | 263 | */ |
emilmont | 77:869cf507173a | 264 | |
emilmont | 77:869cf507173a | 265 | /** @defgroup Usart_Flags |
emilmont | 77:869cf507173a | 266 | * Elements values convention: 0xXXXX |
emilmont | 77:869cf507173a | 267 | * - 0xXXXX : Flag mask in the SR register |
emilmont | 77:869cf507173a | 268 | * @{ |
emilmont | 77:869cf507173a | 269 | */ |
emilmont | 77:869cf507173a | 270 | |
emilmont | 77:869cf507173a | 271 | #define USART_FLAG_TXE ((uint32_t)0x00000080) |
emilmont | 77:869cf507173a | 272 | #define USART_FLAG_TC ((uint32_t)0x00000040) |
emilmont | 77:869cf507173a | 273 | #define USART_FLAG_RXNE ((uint32_t)0x00000020) |
emilmont | 77:869cf507173a | 274 | #define USART_FLAG_IDLE ((uint32_t)0x00000010) |
emilmont | 77:869cf507173a | 275 | #define USART_FLAG_ORE ((uint32_t)0x00000008) |
emilmont | 77:869cf507173a | 276 | #define USART_FLAG_NE ((uint32_t)0x00000004) |
emilmont | 77:869cf507173a | 277 | #define USART_FLAG_FE ((uint32_t)0x00000002) |
emilmont | 77:869cf507173a | 278 | #define USART_FLAG_PE ((uint32_t)0x00000001) |
emilmont | 77:869cf507173a | 279 | /** |
emilmont | 77:869cf507173a | 280 | * @} |
emilmont | 77:869cf507173a | 281 | */ |
emilmont | 77:869cf507173a | 282 | |
emilmont | 77:869cf507173a | 283 | /** @defgroup USART_Interrupt_definition |
emilmont | 77:869cf507173a | 284 | * Elements values convention: 0xY000XXXX |
emilmont | 77:869cf507173a | 285 | * - XXXX : Interrupt mask in the XX register |
emilmont | 77:869cf507173a | 286 | * - Y : Interrupt source register (2bits) |
emilmont | 77:869cf507173a | 287 | * - 01: CR1 register |
emilmont | 77:869cf507173a | 288 | * - 10: CR2 register |
emilmont | 77:869cf507173a | 289 | * - 11: CR3 register |
emilmont | 77:869cf507173a | 290 | * |
emilmont | 77:869cf507173a | 291 | * @{ |
emilmont | 77:869cf507173a | 292 | */ |
emilmont | 77:869cf507173a | 293 | #define USART_IT_PE ((uint32_t)0x10000100) |
emilmont | 77:869cf507173a | 294 | #define USART_IT_TXE ((uint32_t)0x10000080) |
emilmont | 77:869cf507173a | 295 | #define USART_IT_TC ((uint32_t)0x10000040) |
emilmont | 77:869cf507173a | 296 | #define USART_IT_RXNE ((uint32_t)0x10000020) |
emilmont | 77:869cf507173a | 297 | #define USART_IT_IDLE ((uint32_t)0x10000010) |
emilmont | 77:869cf507173a | 298 | |
emilmont | 77:869cf507173a | 299 | #define USART_IT_LBD ((uint32_t)0x20000040) |
emilmont | 77:869cf507173a | 300 | #define USART_IT_CTS ((uint32_t)0x30000400) |
emilmont | 77:869cf507173a | 301 | |
emilmont | 77:869cf507173a | 302 | #define USART_IT_ERR ((uint32_t)0x30000001) |
emilmont | 77:869cf507173a | 303 | |
emilmont | 77:869cf507173a | 304 | |
emilmont | 77:869cf507173a | 305 | /** |
emilmont | 77:869cf507173a | 306 | * @} |
emilmont | 77:869cf507173a | 307 | */ |
emilmont | 77:869cf507173a | 308 | |
emilmont | 77:869cf507173a | 309 | /** |
emilmont | 77:869cf507173a | 310 | * @} |
emilmont | 77:869cf507173a | 311 | */ |
emilmont | 77:869cf507173a | 312 | |
emilmont | 77:869cf507173a | 313 | /* Exported macro ------------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 314 | |
emilmont | 77:869cf507173a | 315 | /** @brief Checks whether the specified Smartcard flag is set or not. |
emilmont | 77:869cf507173a | 316 | * @param __HANDLE__: specifies the USART Handle. |
emilmont | 77:869cf507173a | 317 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
emilmont | 77:869cf507173a | 318 | * UART peripheral. |
emilmont | 77:869cf507173a | 319 | * @param __FLAG__: specifies the flag to check. |
emilmont | 77:869cf507173a | 320 | * This parameter can be one of the following values: |
emilmont | 77:869cf507173a | 321 | * @arg USART_FLAG_TXE: Transmit data register empty flag |
emilmont | 77:869cf507173a | 322 | * @arg USART_FLAG_TC: Transmission Complete flag |
emilmont | 77:869cf507173a | 323 | * @arg USART_FLAG_RXNE: Receive data register not empty flag |
emilmont | 77:869cf507173a | 324 | * @arg USART_FLAG_IDLE: Idle Line detection flag |
emilmont | 77:869cf507173a | 325 | * @arg USART_FLAG_ORE: OverRun Error flag |
emilmont | 77:869cf507173a | 326 | * @arg USART_FLAG_NE: Noise Error flag |
emilmont | 77:869cf507173a | 327 | * @arg USART_FLAG_FE: Framing Error flag |
emilmont | 77:869cf507173a | 328 | * @arg USART_FLAG_PE: Parity Error flag |
emilmont | 77:869cf507173a | 329 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
emilmont | 77:869cf507173a | 330 | */ |
emilmont | 77:869cf507173a | 331 | |
emilmont | 77:869cf507173a | 332 | #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
emilmont | 77:869cf507173a | 333 | |
emilmont | 77:869cf507173a | 334 | /** @brief Clears the specified Smartcard pending flags. |
emilmont | 77:869cf507173a | 335 | * @param __HANDLE__: specifies the USART Handle. |
emilmont | 77:869cf507173a | 336 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
emilmont | 77:869cf507173a | 337 | * UART peripheral. |
emilmont | 77:869cf507173a | 338 | * @param __FLAG__: specifies the flag to check. |
emilmont | 77:869cf507173a | 339 | * This parameter can be any combination of the following values: |
emilmont | 77:869cf507173a | 340 | * @arg USART_FLAG_TC: Transmission Complete flag. |
emilmont | 77:869cf507173a | 341 | * @arg USART_FLAG_RXNE: Receive data register not empty flag. |
emilmont | 77:869cf507173a | 342 | * |
emilmont | 77:869cf507173a | 343 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun |
emilmont | 77:869cf507173a | 344 | * error) and IDLE (Idle line detected) flags are cleared by software |
emilmont | 77:869cf507173a | 345 | * sequence: a read operation to USART_SR register followed by a read |
emilmont | 77:869cf507173a | 346 | * operation to USART_DR register. |
emilmont | 77:869cf507173a | 347 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
emilmont | 77:869cf507173a | 348 | * @note TC flag can be also cleared by software sequence: a read operation to |
emilmont | 77:869cf507173a | 349 | * USART_SR register followed by a write operation to USART_DR register. |
emilmont | 77:869cf507173a | 350 | * @note TXE flag is cleared only by a write to the USART_DR register. |
emilmont | 77:869cf507173a | 351 | * |
emilmont | 77:869cf507173a | 352 | * @retval None |
emilmont | 77:869cf507173a | 353 | */ |
emilmont | 77:869cf507173a | 354 | #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__)) |
emilmont | 77:869cf507173a | 355 | |
emilmont | 77:869cf507173a | 356 | |
emilmont | 77:869cf507173a | 357 | /** @brief Enables or disables the specified Usart interrupts. |
emilmont | 77:869cf507173a | 358 | * @param __HANDLE__: specifies the USART Handle. |
emilmont | 77:869cf507173a | 359 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
emilmont | 77:869cf507173a | 360 | * UART peripheral. |
emilmont | 77:869cf507173a | 361 | * @param __INTERRUPT__: specifies the USART interrupt source to check. |
emilmont | 77:869cf507173a | 362 | * This parameter can be one of the following values: |
emilmont | 77:869cf507173a | 363 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
emilmont | 77:869cf507173a | 364 | * @arg USART_IT_TC: Transmission complete interrupt |
emilmont | 77:869cf507173a | 365 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
emilmont | 77:869cf507173a | 366 | * @arg USART_IT_IDLE: Idle line detection interrupt |
emilmont | 77:869cf507173a | 367 | * @arg USART_IT_PE: Parity Error interrupt |
emilmont | 77:869cf507173a | 368 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
emilmont | 77:869cf507173a | 369 | * @param NewState: new state of the specified Usart interrupt. |
emilmont | 77:869cf507173a | 370 | * This parameter can be: ENABLE or DISABLE. |
emilmont | 77:869cf507173a | 371 | * @retval None |
emilmont | 77:869cf507173a | 372 | */ |
emilmont | 77:869cf507173a | 373 | #define USART_IT_MASK ((uint32_t)0x0000FFFF) |
emilmont | 77:869cf507173a | 374 | #define __USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \ |
emilmont | 77:869cf507173a | 375 | (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \ |
emilmont | 77:869cf507173a | 376 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK))) |
emilmont | 77:869cf507173a | 377 | #define __USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ |
emilmont | 77:869cf507173a | 378 | (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ |
emilmont | 77:869cf507173a | 379 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK))) |
emilmont | 77:869cf507173a | 380 | |
emilmont | 77:869cf507173a | 381 | |
emilmont | 77:869cf507173a | 382 | /** @brief Checks whether the specified Usart interrupt has occurred or not. |
emilmont | 77:869cf507173a | 383 | * @param __HANDLE__: specifies the USART Handle. |
emilmont | 77:869cf507173a | 384 | * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
emilmont | 77:869cf507173a | 385 | * UART peripheral. |
emilmont | 77:869cf507173a | 386 | * @param __IT__: specifies the USART interrupt source to check. |
emilmont | 77:869cf507173a | 387 | * This parameter can be one of the following values: |
emilmont | 77:869cf507173a | 388 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
emilmont | 77:869cf507173a | 389 | * @arg USART_IT_TC: Transmission complete interrupt |
emilmont | 77:869cf507173a | 390 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
emilmont | 77:869cf507173a | 391 | * @arg USART_IT_IDLE: Idle line detection interrupt |
emilmont | 77:869cf507173a | 392 | * @arg USART_IT_ERR: Error interrupt |
emilmont | 77:869cf507173a | 393 | * @arg USART_IT_PE: Parity Error interrupt |
emilmont | 77:869cf507173a | 394 | * @retval The new state of __IT__ (TRUE or FALSE). |
emilmont | 77:869cf507173a | 395 | */ |
emilmont | 77:869cf507173a | 396 | #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == 1)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == 2)? \ |
emilmont | 77:869cf507173a | 397 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK)) |
emilmont | 77:869cf507173a | 398 | |
emilmont | 77:869cf507173a | 399 | #define __USART_ENABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
emilmont | 77:869cf507173a | 400 | #define __USART_DISABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
emilmont | 77:869cf507173a | 401 | |
emilmont | 77:869cf507173a | 402 | #define __DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_))) |
emilmont | 77:869cf507173a | 403 | #define __DIVMANT(_PCLK_, _BAUD_) (__DIV((_PCLK_), (_BAUD_))/100) |
emilmont | 77:869cf507173a | 404 | #define __DIVFRAQ(_PCLK_, _BAUD_) (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100) |
emilmont | 77:869cf507173a | 405 | #define __USART_BRR(_PCLK_, _BAUD_) ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F)) |
emilmont | 77:869cf507173a | 406 | |
emilmont | 77:869cf507173a | 407 | #define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001) |
emilmont | 77:869cf507173a | 408 | |
emilmont | 77:869cf507173a | 409 | /* Exported functions --------------------------------------------------------*/ |
emilmont | 77:869cf507173a | 410 | /* Initialization/de-initialization functions **********************************/ |
emilmont | 77:869cf507173a | 411 | HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 412 | HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 413 | __weak void HAL_USART_MspInit(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 414 | __weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 415 | /* IO operation functions *******************************************************/ |
emilmont | 77:869cf507173a | 416 | HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout); |
emilmont | 77:869cf507173a | 417 | HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
emilmont | 77:869cf507173a | 418 | HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
emilmont | 77:869cf507173a | 419 | HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
emilmont | 77:869cf507173a | 420 | HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
emilmont | 77:869cf507173a | 421 | HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
emilmont | 77:869cf507173a | 422 | HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
emilmont | 77:869cf507173a | 423 | HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
emilmont | 77:869cf507173a | 424 | HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
emilmont | 77:869cf507173a | 425 | HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 426 | HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 427 | HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 428 | void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 429 | __weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 430 | __weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 431 | __weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 432 | __weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 433 | __weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 434 | __weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 435 | |
emilmont | 77:869cf507173a | 436 | /* Peripheral State functions **************************************************/ |
emilmont | 77:869cf507173a | 437 | HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 438 | uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); |
emilmont | 77:869cf507173a | 439 | |
emilmont | 77:869cf507173a | 440 | /** |
emilmont | 77:869cf507173a | 441 | * @} |
emilmont | 77:869cf507173a | 442 | */ |
emilmont | 77:869cf507173a | 443 | |
emilmont | 77:869cf507173a | 444 | /** |
emilmont | 77:869cf507173a | 445 | * @} |
emilmont | 77:869cf507173a | 446 | */ |
emilmont | 77:869cf507173a | 447 | |
emilmont | 77:869cf507173a | 448 | #ifdef __cplusplus |
emilmont | 77:869cf507173a | 449 | } |
emilmont | 77:869cf507173a | 450 | #endif |
emilmont | 77:869cf507173a | 451 | |
emilmont | 77:869cf507173a | 452 | #endif /* __STM32F4xx_HAL_USART_H */ |
emilmont | 77:869cf507173a | 453 | |
emilmont | 77:869cf507173a | 454 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |