Egor Rumjantsev / mbed

The official mbed C/C SDK provides the software platform and libraries to build your applications.

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TARGET_RZ_A1H/sdg_iodefine.h@99:7f6c6de930c0, 2015-05-03 (annotated)

Committer:
Mikchel
Date:
Sun May 03 16:04:42 2015 +0000
Revision:
99:7f6c6de930c0
Parent:
92:4fc01daae5a5 
12

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /*******************************************************************************
bogdanm 92:4fc01daae5a5 2 * DISCLAIMER
bogdanm 92:4fc01daae5a5 3 * This software is supplied by Renesas Electronics Corporation and is only
bogdanm 92:4fc01daae5a5 4 * intended for use with Renesas products. No other uses are authorized. This
bogdanm 92:4fc01daae5a5 5 * software is owned by Renesas Electronics Corporation and is protected under
bogdanm 92:4fc01daae5a5 6 * all applicable laws, including copyright laws.
bogdanm 92:4fc01daae5a5 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
bogdanm 92:4fc01daae5a5 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
bogdanm 92:4fc01daae5a5 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
bogdanm 92:4fc01daae5a5 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
bogdanm 92:4fc01daae5a5 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
bogdanm 92:4fc01daae5a5 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
bogdanm 92:4fc01daae5a5 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
bogdanm 92:4fc01daae5a5 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
bogdanm 92:4fc01daae5a5 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
bogdanm 92:4fc01daae5a5 16 * Renesas reserves the right, without notice, to make changes to this software
bogdanm 92:4fc01daae5a5 17 * and to discontinue the availability of this software. By using this software,
bogdanm 92:4fc01daae5a5 18 * you agree to the additional terms and conditions found by accessing the
bogdanm 92:4fc01daae5a5 19 * following link:
bogdanm 92:4fc01daae5a5 20 * http://www.renesas.com/disclaimer*
bogdanm 92:4fc01daae5a5 21 * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
bogdanm 92:4fc01daae5a5 22 *******************************************************************************/
bogdanm 92:4fc01daae5a5 23 /*******************************************************************************
bogdanm 92:4fc01daae5a5 24 * File Name : sdg_iodefine.h
bogdanm 92:4fc01daae5a5 25 * $Rev: $
bogdanm 92:4fc01daae5a5 26 * $Date:: $
bogdanm 92:4fc01daae5a5 27 * Description : Definition of I/O Register (V1.00a)
bogdanm 92:4fc01daae5a5 28 ******************************************************************************/
bogdanm 92:4fc01daae5a5 29 #ifndef SDG_IODEFINE_H
bogdanm 92:4fc01daae5a5 30 #define SDG_IODEFINE_H
bogdanm 92:4fc01daae5a5 31
bogdanm 92:4fc01daae5a5 32 struct st_sdg
bogdanm 92:4fc01daae5a5 33 { /* SDG */
bogdanm 92:4fc01daae5a5 34 volatile uint8_t SGCR1; /* SGCR1 */
bogdanm 92:4fc01daae5a5 35 volatile uint8_t SGCSR; /* SGCSR */
bogdanm 92:4fc01daae5a5 36 volatile uint8_t SGCR2; /* SGCR2 */
bogdanm 92:4fc01daae5a5 37 volatile uint8_t SGLR; /* SGLR */
bogdanm 92:4fc01daae5a5 38 volatile uint8_t SGTFR; /* SGTFR */
bogdanm 92:4fc01daae5a5 39 volatile uint8_t SGSFR; /* SGSFR */
bogdanm 92:4fc01daae5a5 40 };
bogdanm 92:4fc01daae5a5 41
bogdanm 92:4fc01daae5a5 42
bogdanm 92:4fc01daae5a5 43 #define SDG0 (*(struct st_sdg *)0xFCFF4800uL) /* SDG0 */
bogdanm 92:4fc01daae5a5 44 #define SDG1 (*(struct st_sdg *)0xFCFF4A00uL) /* SDG1 */
bogdanm 92:4fc01daae5a5 45 #define SDG2 (*(struct st_sdg *)0xFCFF4C00uL) /* SDG2 */
bogdanm 92:4fc01daae5a5 46 #define SDG3 (*(struct st_sdg *)0xFCFF4E00uL) /* SDG3 */
bogdanm 92:4fc01daae5a5 47
bogdanm 92:4fc01daae5a5 48
bogdanm 92:4fc01daae5a5 49 /* Start of channnel array defines of SDG */
bogdanm 92:4fc01daae5a5 50
bogdanm 92:4fc01daae5a5 51 /* Channnel array defines of SDG */
bogdanm 92:4fc01daae5a5 52 /*(Sample) value = SDG[ channel ]->SGCR1; */
bogdanm 92:4fc01daae5a5 53 #define SDG_COUNT 4
bogdanm 92:4fc01daae5a5 54 #define SDG_ADDRESS_LIST \
bogdanm 92:4fc01daae5a5 55 { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
bogdanm 92:4fc01daae5a5 56 &SDG0, &SDG1, &SDG2, &SDG3 \
bogdanm 92:4fc01daae5a5 57 } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
bogdanm 92:4fc01daae5a5 58
bogdanm 92:4fc01daae5a5 59 /* End of channnel array defines of SDG */
bogdanm 92:4fc01daae5a5 60
bogdanm 92:4fc01daae5a5 61
bogdanm 92:4fc01daae5a5 62 #define SGCR1_0 SDG0.SGCR1
bogdanm 92:4fc01daae5a5 63 #define SGCSR_0 SDG0.SGCSR
bogdanm 92:4fc01daae5a5 64 #define SGCR2_0 SDG0.SGCR2
bogdanm 92:4fc01daae5a5 65 #define SGLR_0 SDG0.SGLR
bogdanm 92:4fc01daae5a5 66 #define SGTFR_0 SDG0.SGTFR
bogdanm 92:4fc01daae5a5 67 #define SGSFR_0 SDG0.SGSFR
bogdanm 92:4fc01daae5a5 68 #define SGCR1_1 SDG1.SGCR1
bogdanm 92:4fc01daae5a5 69 #define SGCSR_1 SDG1.SGCSR
bogdanm 92:4fc01daae5a5 70 #define SGCR2_1 SDG1.SGCR2
bogdanm 92:4fc01daae5a5 71 #define SGLR_1 SDG1.SGLR
bogdanm 92:4fc01daae5a5 72 #define SGTFR_1 SDG1.SGTFR
bogdanm 92:4fc01daae5a5 73 #define SGSFR_1 SDG1.SGSFR
bogdanm 92:4fc01daae5a5 74 #define SGCR1_2 SDG2.SGCR1
bogdanm 92:4fc01daae5a5 75 #define SGCSR_2 SDG2.SGCSR
bogdanm 92:4fc01daae5a5 76 #define SGCR2_2 SDG2.SGCR2
bogdanm 92:4fc01daae5a5 77 #define SGLR_2 SDG2.SGLR
bogdanm 92:4fc01daae5a5 78 #define SGTFR_2 SDG2.SGTFR
bogdanm 92:4fc01daae5a5 79 #define SGSFR_2 SDG2.SGSFR
bogdanm 92:4fc01daae5a5 80 #define SGCR1_3 SDG3.SGCR1
bogdanm 92:4fc01daae5a5 81 #define SGCSR_3 SDG3.SGCSR
bogdanm 92:4fc01daae5a5 82 #define SGCR2_3 SDG3.SGCR2
bogdanm 92:4fc01daae5a5 83 #define SGLR_3 SDG3.SGLR
bogdanm 92:4fc01daae5a5 84 #define SGTFR_3 SDG3.SGTFR
bogdanm 92:4fc01daae5a5 85 #define SGSFR_3 SDG3.SGSFR
bogdanm 92:4fc01daae5a5 86 #endif