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TARGET_NUCLEO_F411RE/stm32f4xx_hal_spi.h@99:7f6c6de930c0, 2015-05-03 (annotated)

Committer:
Mikchel
Date:
Sun May 03 16:04:42 2015 +0000
Revision:
99:7f6c6de930c0
Parent:
86:04dd9b1680ae 
12

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 86:04dd9b1680ae 1 /**
bogdanm 86:04dd9b1680ae 2 ******************************************************************************
bogdanm 86:04dd9b1680ae 3 * @file stm32f4xx_hal_spi.h
bogdanm 86:04dd9b1680ae 4 * @author MCD Application Team
bogdanm 86:04dd9b1680ae 5 * @version V1.1.0
bogdanm 86:04dd9b1680ae 6 * @date 19-June-2014
bogdanm 86:04dd9b1680ae 7 * @brief Header file of SPI HAL module.
bogdanm 86:04dd9b1680ae 8 ******************************************************************************
bogdanm 86:04dd9b1680ae 9 * @attention
bogdanm 86:04dd9b1680ae 10 *
bogdanm 86:04dd9b1680ae 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 86:04dd9b1680ae 12 *
bogdanm 86:04dd9b1680ae 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 86:04dd9b1680ae 14 * are permitted provided that the following conditions are met:
bogdanm 86:04dd9b1680ae 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 86:04dd9b1680ae 16 * this list of conditions and the following disclaimer.
bogdanm 86:04dd9b1680ae 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 86:04dd9b1680ae 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 86:04dd9b1680ae 19 * and/or other materials provided with the distribution.
bogdanm 86:04dd9b1680ae 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 86:04dd9b1680ae 21 * may be used to endorse or promote products derived from this software
bogdanm 86:04dd9b1680ae 22 * without specific prior written permission.
bogdanm 86:04dd9b1680ae 23 *
bogdanm 86:04dd9b1680ae 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 86:04dd9b1680ae 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 86:04dd9b1680ae 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 86:04dd9b1680ae 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 86:04dd9b1680ae 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 86:04dd9b1680ae 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 86:04dd9b1680ae 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 86:04dd9b1680ae 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 86:04dd9b1680ae 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 86:04dd9b1680ae 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 86:04dd9b1680ae 34 *
bogdanm 86:04dd9b1680ae 35 ******************************************************************************
bogdanm 86:04dd9b1680ae 36 */
bogdanm 86:04dd9b1680ae 37
bogdanm 86:04dd9b1680ae 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 86:04dd9b1680ae 39 #ifndef __STM32F4xx_HAL_SPI_H
bogdanm 86:04dd9b1680ae 40 #define __STM32F4xx_HAL_SPI_H
bogdanm 86:04dd9b1680ae 41
bogdanm 86:04dd9b1680ae 42 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 43 extern "C" {
bogdanm 86:04dd9b1680ae 44 #endif
bogdanm 86:04dd9b1680ae 45
bogdanm 86:04dd9b1680ae 46 /* Includes ------------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 47 #include "stm32f4xx_hal_def.h"
bogdanm 86:04dd9b1680ae 48
bogdanm 86:04dd9b1680ae 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 86:04dd9b1680ae 50 * @{
bogdanm 86:04dd9b1680ae 51 */
bogdanm 86:04dd9b1680ae 52
bogdanm 86:04dd9b1680ae 53 /** @addtogroup SPI
bogdanm 86:04dd9b1680ae 54 * @{
bogdanm 86:04dd9b1680ae 55 */
bogdanm 86:04dd9b1680ae 56
bogdanm 86:04dd9b1680ae 57 /* Exported types ------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 58
bogdanm 86:04dd9b1680ae 59 /**
bogdanm 86:04dd9b1680ae 60 * @brief SPI Configuration Structure definition
bogdanm 86:04dd9b1680ae 61 */
bogdanm 86:04dd9b1680ae 62 typedef struct
bogdanm 86:04dd9b1680ae 63 {
bogdanm 86:04dd9b1680ae 64 uint32_t Mode; /*!< Specifies the SPI operating mode.
bogdanm 86:04dd9b1680ae 65 This parameter can be a value of @ref SPI_mode */
bogdanm 86:04dd9b1680ae 66
bogdanm 86:04dd9b1680ae 67 uint32_t Direction; /*!< Specifies the SPI Directional mode state.
bogdanm 86:04dd9b1680ae 68 This parameter can be a value of @ref SPI_Direction_mode */
bogdanm 86:04dd9b1680ae 69
bogdanm 86:04dd9b1680ae 70 uint32_t DataSize; /*!< Specifies the SPI data size.
bogdanm 86:04dd9b1680ae 71 This parameter can be a value of @ref SPI_data_size */
bogdanm 86:04dd9b1680ae 72
bogdanm 86:04dd9b1680ae 73 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
bogdanm 86:04dd9b1680ae 74 This parameter can be a value of @ref SPI_Clock_Polarity */
bogdanm 86:04dd9b1680ae 75
bogdanm 86:04dd9b1680ae 76 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
bogdanm 86:04dd9b1680ae 77 This parameter can be a value of @ref SPI_Clock_Phase */
bogdanm 86:04dd9b1680ae 78
bogdanm 86:04dd9b1680ae 79 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
bogdanm 86:04dd9b1680ae 80 hardware (NSS pin) or by software using the SSI bit.
bogdanm 86:04dd9b1680ae 81 This parameter can be a value of @ref SPI_Slave_Select_management */
bogdanm 86:04dd9b1680ae 82
bogdanm 86:04dd9b1680ae 83 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
bogdanm 86:04dd9b1680ae 84 used to configure the transmit and receive SCK clock.
bogdanm 86:04dd9b1680ae 85 This parameter can be a value of @ref SPI_BaudRate_Prescaler
bogdanm 86:04dd9b1680ae 86 @note The communication clock is derived from the master
bogdanm 86:04dd9b1680ae 87 clock. The slave clock does not need to be set */
bogdanm 86:04dd9b1680ae 88
bogdanm 86:04dd9b1680ae 89 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
bogdanm 86:04dd9b1680ae 90 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
bogdanm 86:04dd9b1680ae 91
bogdanm 86:04dd9b1680ae 92 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
bogdanm 86:04dd9b1680ae 93 This parameter can be a value of @ref SPI_TI_mode */
bogdanm 86:04dd9b1680ae 94
bogdanm 86:04dd9b1680ae 95 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
bogdanm 86:04dd9b1680ae 96 This parameter can be a value of @ref SPI_CRC_Calculation */
bogdanm 86:04dd9b1680ae 97
bogdanm 86:04dd9b1680ae 98 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
bogdanm 86:04dd9b1680ae 99 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
bogdanm 86:04dd9b1680ae 100
bogdanm 86:04dd9b1680ae 101 }SPI_InitTypeDef;
bogdanm 86:04dd9b1680ae 102
bogdanm 86:04dd9b1680ae 103 /**
bogdanm 86:04dd9b1680ae 104 * @brief HAL SPI State structure definition
bogdanm 86:04dd9b1680ae 105 */
bogdanm 86:04dd9b1680ae 106 typedef enum
bogdanm 86:04dd9b1680ae 107 {
bogdanm 86:04dd9b1680ae 108 HAL_SPI_STATE_RESET = 0x00, /*!< SPI not yet initialized or disabled */
bogdanm 86:04dd9b1680ae 109 HAL_SPI_STATE_READY = 0x01, /*!< SPI initialized and ready for use */
bogdanm 86:04dd9b1680ae 110 HAL_SPI_STATE_BUSY = 0x02, /*!< SPI process is ongoing */
bogdanm 86:04dd9b1680ae 111 HAL_SPI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 86:04dd9b1680ae 112 HAL_SPI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 86:04dd9b1680ae 113 HAL_SPI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 86:04dd9b1680ae 114 HAL_SPI_STATE_ERROR = 0x03 /*!< SPI error state */
bogdanm 86:04dd9b1680ae 115
bogdanm 86:04dd9b1680ae 116 }HAL_SPI_StateTypeDef;
bogdanm 86:04dd9b1680ae 117
bogdanm 86:04dd9b1680ae 118 /**
bogdanm 86:04dd9b1680ae 119 * @brief HAL SPI Error Code structure definition
bogdanm 86:04dd9b1680ae 120 */
bogdanm 86:04dd9b1680ae 121 typedef enum
bogdanm 86:04dd9b1680ae 122 {
bogdanm 86:04dd9b1680ae 123 HAL_SPI_ERROR_NONE = 0x00, /*!< No error */
bogdanm 86:04dd9b1680ae 124 HAL_SPI_ERROR_MODF = 0x01, /*!< MODF error */
bogdanm 86:04dd9b1680ae 125 HAL_SPI_ERROR_CRC = 0x02, /*!< CRC error */
bogdanm 86:04dd9b1680ae 126 HAL_SPI_ERROR_OVR = 0x04, /*!< OVR error */
bogdanm 86:04dd9b1680ae 127 HAL_SPI_ERROR_FRE = 0x08, /*!< FRE error */
bogdanm 86:04dd9b1680ae 128 HAL_SPI_ERROR_DMA = 0x10, /*!< DMA transfer error */
bogdanm 86:04dd9b1680ae 129 HAL_SPI_ERROR_FLAG = 0x20 /*!< Flag: RXNE,TXE, BSY */
bogdanm 86:04dd9b1680ae 130
bogdanm 86:04dd9b1680ae 131 }HAL_SPI_ErrorTypeDef;
bogdanm 86:04dd9b1680ae 132
bogdanm 86:04dd9b1680ae 133 /**
bogdanm 86:04dd9b1680ae 134 * @brief SPI handle Structure definition
bogdanm 86:04dd9b1680ae 135 */
bogdanm 86:04dd9b1680ae 136 typedef struct __SPI_HandleTypeDef
bogdanm 86:04dd9b1680ae 137 {
bogdanm 86:04dd9b1680ae 138 SPI_TypeDef *Instance; /* SPI registers base address */
bogdanm 86:04dd9b1680ae 139
bogdanm 86:04dd9b1680ae 140 SPI_InitTypeDef Init; /* SPI communication parameters */
bogdanm 86:04dd9b1680ae 141
bogdanm 86:04dd9b1680ae 142 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
bogdanm 86:04dd9b1680ae 143
bogdanm 86:04dd9b1680ae 144 uint16_t TxXferSize; /* SPI Tx transfer size */
bogdanm 86:04dd9b1680ae 145
bogdanm 86:04dd9b1680ae 146 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
bogdanm 86:04dd9b1680ae 147
bogdanm 86:04dd9b1680ae 148 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
bogdanm 86:04dd9b1680ae 149
bogdanm 86:04dd9b1680ae 150 uint16_t RxXferSize; /* SPI Rx transfer size */
bogdanm 86:04dd9b1680ae 151
bogdanm 86:04dd9b1680ae 152 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
bogdanm 86:04dd9b1680ae 153
bogdanm 86:04dd9b1680ae 154 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA handle parameters */
bogdanm 86:04dd9b1680ae 155
bogdanm 86:04dd9b1680ae 156 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA handle parameters */
bogdanm 86:04dd9b1680ae 157
bogdanm 86:04dd9b1680ae 158 void (*RxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Rx ISR */
bogdanm 86:04dd9b1680ae 159
bogdanm 86:04dd9b1680ae 160 void (*TxISR)(struct __SPI_HandleTypeDef * hspi); /* function pointer on Tx ISR */
bogdanm 86:04dd9b1680ae 161
bogdanm 86:04dd9b1680ae 162 HAL_LockTypeDef Lock; /* SPI locking object */
bogdanm 86:04dd9b1680ae 163
bogdanm 86:04dd9b1680ae 164 __IO HAL_SPI_StateTypeDef State; /* SPI communication state */
bogdanm 86:04dd9b1680ae 165
bogdanm 86:04dd9b1680ae 166 __IO HAL_SPI_ErrorTypeDef ErrorCode; /* SPI Error code */
bogdanm 86:04dd9b1680ae 167
bogdanm 86:04dd9b1680ae 168 }SPI_HandleTypeDef;
bogdanm 86:04dd9b1680ae 169
bogdanm 86:04dd9b1680ae 170 /* Exported constants --------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 171
bogdanm 86:04dd9b1680ae 172 /** @defgroup SPI_Exported_Constants
bogdanm 86:04dd9b1680ae 173 * @{
bogdanm 86:04dd9b1680ae 174 */
bogdanm 86:04dd9b1680ae 175
bogdanm 86:04dd9b1680ae 176 /** @defgroup SPI_mode
bogdanm 86:04dd9b1680ae 177 * @{
bogdanm 86:04dd9b1680ae 178 */
bogdanm 86:04dd9b1680ae 179 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 180 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
bogdanm 86:04dd9b1680ae 181
bogdanm 86:04dd9b1680ae 182 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
bogdanm 86:04dd9b1680ae 183 ((MODE) == SPI_MODE_MASTER))
bogdanm 86:04dd9b1680ae 184 /**
bogdanm 86:04dd9b1680ae 185 * @}
bogdanm 86:04dd9b1680ae 186 */
bogdanm 86:04dd9b1680ae 187
bogdanm 86:04dd9b1680ae 188 /** @defgroup SPI_Direction_mode
bogdanm 86:04dd9b1680ae 189 * @{
bogdanm 86:04dd9b1680ae 190 */
bogdanm 86:04dd9b1680ae 191 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 192 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
bogdanm 86:04dd9b1680ae 193 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
bogdanm 86:04dd9b1680ae 194
bogdanm 86:04dd9b1680ae 195 #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
bogdanm 86:04dd9b1680ae 196 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) || \
bogdanm 86:04dd9b1680ae 197 ((MODE) == SPI_DIRECTION_1LINE))
bogdanm 86:04dd9b1680ae 198
bogdanm 86:04dd9b1680ae 199 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
bogdanm 86:04dd9b1680ae 200 ((MODE) == SPI_DIRECTION_1LINE))
bogdanm 86:04dd9b1680ae 201
bogdanm 86:04dd9b1680ae 202 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
bogdanm 86:04dd9b1680ae 203
bogdanm 86:04dd9b1680ae 204 /**
bogdanm 86:04dd9b1680ae 205 * @}
bogdanm 86:04dd9b1680ae 206 */
bogdanm 86:04dd9b1680ae 207
bogdanm 86:04dd9b1680ae 208 /** @defgroup SPI_data_size
bogdanm 86:04dd9b1680ae 209 * @{
bogdanm 86:04dd9b1680ae 210 */
bogdanm 86:04dd9b1680ae 211 #define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 212 #define SPI_DATASIZE_16BIT SPI_CR1_DFF
bogdanm 86:04dd9b1680ae 213
bogdanm 86:04dd9b1680ae 214 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
bogdanm 86:04dd9b1680ae 215 ((DATASIZE) == SPI_DATASIZE_8BIT))
bogdanm 86:04dd9b1680ae 216 /**
bogdanm 86:04dd9b1680ae 217 * @}
bogdanm 86:04dd9b1680ae 218 */
bogdanm 86:04dd9b1680ae 219
bogdanm 86:04dd9b1680ae 220 /** @defgroup SPI_Clock_Polarity
bogdanm 86:04dd9b1680ae 221 * @{
bogdanm 86:04dd9b1680ae 222 */
bogdanm 86:04dd9b1680ae 223 #define SPI_POLARITY_LOW ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 224 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
bogdanm 86:04dd9b1680ae 225
bogdanm 86:04dd9b1680ae 226 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
bogdanm 86:04dd9b1680ae 227 ((CPOL) == SPI_POLARITY_HIGH))
bogdanm 86:04dd9b1680ae 228 /**
bogdanm 86:04dd9b1680ae 229 * @}
bogdanm 86:04dd9b1680ae 230 */
bogdanm 86:04dd9b1680ae 231
bogdanm 86:04dd9b1680ae 232 /** @defgroup SPI_Clock_Phase
bogdanm 86:04dd9b1680ae 233 * @{
bogdanm 86:04dd9b1680ae 234 */
bogdanm 86:04dd9b1680ae 235 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 236 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
bogdanm 86:04dd9b1680ae 237
bogdanm 86:04dd9b1680ae 238 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
bogdanm 86:04dd9b1680ae 239 ((CPHA) == SPI_PHASE_2EDGE))
bogdanm 86:04dd9b1680ae 240 /**
bogdanm 86:04dd9b1680ae 241 * @}
bogdanm 86:04dd9b1680ae 242 */
bogdanm 86:04dd9b1680ae 243
bogdanm 86:04dd9b1680ae 244 /** @defgroup SPI_Slave_Select_management
bogdanm 86:04dd9b1680ae 245 * @{
bogdanm 86:04dd9b1680ae 246 */
bogdanm 86:04dd9b1680ae 247 #define SPI_NSS_SOFT SPI_CR1_SSM
bogdanm 86:04dd9b1680ae 248 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 249 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
bogdanm 86:04dd9b1680ae 250
bogdanm 86:04dd9b1680ae 251 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
bogdanm 86:04dd9b1680ae 252 ((NSS) == SPI_NSS_HARD_INPUT) || \
bogdanm 86:04dd9b1680ae 253 ((NSS) == SPI_NSS_HARD_OUTPUT))
bogdanm 86:04dd9b1680ae 254 /**
bogdanm 86:04dd9b1680ae 255 * @}
bogdanm 86:04dd9b1680ae 256 */
bogdanm 86:04dd9b1680ae 257
bogdanm 86:04dd9b1680ae 258 /** @defgroup SPI_BaudRate_Prescaler
bogdanm 86:04dd9b1680ae 259 * @{
bogdanm 86:04dd9b1680ae 260 */
bogdanm 86:04dd9b1680ae 261 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 262 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
bogdanm 86:04dd9b1680ae 263 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
bogdanm 86:04dd9b1680ae 264 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
bogdanm 86:04dd9b1680ae 265 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
bogdanm 86:04dd9b1680ae 266 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
bogdanm 86:04dd9b1680ae 267 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
bogdanm 86:04dd9b1680ae 268 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
bogdanm 86:04dd9b1680ae 269
bogdanm 86:04dd9b1680ae 270 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
bogdanm 86:04dd9b1680ae 271 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
bogdanm 86:04dd9b1680ae 272 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
bogdanm 86:04dd9b1680ae 273 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
bogdanm 86:04dd9b1680ae 274 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
bogdanm 86:04dd9b1680ae 275 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
bogdanm 86:04dd9b1680ae 276 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
bogdanm 86:04dd9b1680ae 277 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
bogdanm 86:04dd9b1680ae 278 /**
bogdanm 86:04dd9b1680ae 279 * @}
bogdanm 86:04dd9b1680ae 280 */
bogdanm 86:04dd9b1680ae 281
bogdanm 86:04dd9b1680ae 282 /** @defgroup SPI_MSB_LSB_transmission
bogdanm 86:04dd9b1680ae 283 * @{
bogdanm 86:04dd9b1680ae 284 */
bogdanm 86:04dd9b1680ae 285 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 286 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
bogdanm 86:04dd9b1680ae 287
bogdanm 86:04dd9b1680ae 288 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
bogdanm 86:04dd9b1680ae 289 ((BIT) == SPI_FIRSTBIT_LSB))
bogdanm 86:04dd9b1680ae 290 /**
bogdanm 86:04dd9b1680ae 291 * @}
bogdanm 86:04dd9b1680ae 292 */
bogdanm 86:04dd9b1680ae 293
bogdanm 86:04dd9b1680ae 294 /** @defgroup SPI_TI_mode
bogdanm 86:04dd9b1680ae 295 * @{
bogdanm 86:04dd9b1680ae 296 */
bogdanm 86:04dd9b1680ae 297 #define SPI_TIMODE_DISABLED ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 298 #define SPI_TIMODE_ENABLED SPI_CR2_FRF
bogdanm 86:04dd9b1680ae 299
bogdanm 86:04dd9b1680ae 300 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLED) || \
bogdanm 86:04dd9b1680ae 301 ((MODE) == SPI_TIMODE_ENABLED))
bogdanm 86:04dd9b1680ae 302 /**
bogdanm 86:04dd9b1680ae 303 * @}
bogdanm 86:04dd9b1680ae 304 */
bogdanm 86:04dd9b1680ae 305
bogdanm 86:04dd9b1680ae 306 /** @defgroup SPI_CRC_Calculation
bogdanm 86:04dd9b1680ae 307 * @{
bogdanm 86:04dd9b1680ae 308 */
bogdanm 86:04dd9b1680ae 309 #define SPI_CRCCALCULATION_DISABLED ((uint32_t)0x00000000)
bogdanm 86:04dd9b1680ae 310 #define SPI_CRCCALCULATION_ENABLED SPI_CR1_CRCEN
bogdanm 86:04dd9b1680ae 311
bogdanm 86:04dd9b1680ae 312 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLED) || \
bogdanm 86:04dd9b1680ae 313 ((CALCULATION) == SPI_CRCCALCULATION_ENABLED))
bogdanm 86:04dd9b1680ae 314 /**
bogdanm 86:04dd9b1680ae 315 * @}
bogdanm 86:04dd9b1680ae 316 */
bogdanm 86:04dd9b1680ae 317
bogdanm 86:04dd9b1680ae 318 /** @defgroup SPI_Interrupt_configuration_definition
bogdanm 86:04dd9b1680ae 319 * @{
bogdanm 86:04dd9b1680ae 320 */
bogdanm 86:04dd9b1680ae 321 #define SPI_IT_TXE SPI_CR2_TXEIE
bogdanm 86:04dd9b1680ae 322 #define SPI_IT_RXNE SPI_CR2_RXNEIE
bogdanm 86:04dd9b1680ae 323 #define SPI_IT_ERR SPI_CR2_ERRIE
bogdanm 86:04dd9b1680ae 324 /**
bogdanm 86:04dd9b1680ae 325 * @}
bogdanm 86:04dd9b1680ae 326 */
bogdanm 86:04dd9b1680ae 327
bogdanm 86:04dd9b1680ae 328 /** @defgroup SPI_Flag_definition
bogdanm 86:04dd9b1680ae 329 * @{
bogdanm 86:04dd9b1680ae 330 */
bogdanm 86:04dd9b1680ae 331 #define SPI_FLAG_RXNE SPI_SR_RXNE
bogdanm 86:04dd9b1680ae 332 #define SPI_FLAG_TXE SPI_SR_TXE
bogdanm 86:04dd9b1680ae 333 #define SPI_FLAG_CRCERR SPI_SR_CRCERR
bogdanm 86:04dd9b1680ae 334 #define SPI_FLAG_MODF SPI_SR_MODF
bogdanm 86:04dd9b1680ae 335 #define SPI_FLAG_OVR SPI_SR_OVR
bogdanm 86:04dd9b1680ae 336 #define SPI_FLAG_BSY SPI_SR_BSY
bogdanm 86:04dd9b1680ae 337 #define SPI_FLAG_FRE SPI_SR_FRE
bogdanm 86:04dd9b1680ae 338
bogdanm 86:04dd9b1680ae 339 /**
bogdanm 86:04dd9b1680ae 340 * @}
bogdanm 86:04dd9b1680ae 341 */
bogdanm 86:04dd9b1680ae 342
bogdanm 86:04dd9b1680ae 343 /**
bogdanm 86:04dd9b1680ae 344 * @}
bogdanm 86:04dd9b1680ae 345 */
bogdanm 86:04dd9b1680ae 346
bogdanm 86:04dd9b1680ae 347 /* Exported macro ------------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 348
bogdanm 86:04dd9b1680ae 349 /** @brief Reset SPI handle state
bogdanm 86:04dd9b1680ae 350 * @param __HANDLE__: specifies the SPI handle.
bogdanm 86:04dd9b1680ae 351 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 352 * @retval None
bogdanm 86:04dd9b1680ae 353 */
bogdanm 86:04dd9b1680ae 354 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
bogdanm 86:04dd9b1680ae 355
bogdanm 86:04dd9b1680ae 356 /** @brief Enable or disable the specified SPI interrupts.
bogdanm 86:04dd9b1680ae 357 * @param __HANDLE__: specifies the SPI handle.
bogdanm 86:04dd9b1680ae 358 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 359 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
bogdanm 86:04dd9b1680ae 360 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 361 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 86:04dd9b1680ae 362 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 86:04dd9b1680ae 363 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 86:04dd9b1680ae 364 * @retval None
bogdanm 86:04dd9b1680ae 365 */
bogdanm 86:04dd9b1680ae 366 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
bogdanm 86:04dd9b1680ae 367 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
bogdanm 86:04dd9b1680ae 368
bogdanm 86:04dd9b1680ae 369 /** @brief Check if the specified SPI interrupt source is enabled or disabled.
bogdanm 86:04dd9b1680ae 370 * @param __HANDLE__: specifies the SPI handle.
bogdanm 86:04dd9b1680ae 371 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 372 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
bogdanm 86:04dd9b1680ae 373 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 374 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
bogdanm 86:04dd9b1680ae 375 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
bogdanm 86:04dd9b1680ae 376 * @arg SPI_IT_ERR: Error interrupt enable
bogdanm 86:04dd9b1680ae 377 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 86:04dd9b1680ae 378 */
bogdanm 86:04dd9b1680ae 379 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
bogdanm 86:04dd9b1680ae 380
bogdanm 86:04dd9b1680ae 381 /** @brief Check whether the specified SPI flag is set or not.
bogdanm 86:04dd9b1680ae 382 * @param __HANDLE__: specifies the SPI handle.
bogdanm 86:04dd9b1680ae 383 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 384 * @param __FLAG__: specifies the flag to check.
bogdanm 86:04dd9b1680ae 385 * This parameter can be one of the following values:
bogdanm 86:04dd9b1680ae 386 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
bogdanm 86:04dd9b1680ae 387 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
bogdanm 86:04dd9b1680ae 388 * @arg SPI_FLAG_CRCERR: CRC error flag
bogdanm 86:04dd9b1680ae 389 * @arg SPI_FLAG_MODF: Mode fault flag
bogdanm 86:04dd9b1680ae 390 * @arg SPI_FLAG_OVR: Overrun flag
bogdanm 86:04dd9b1680ae 391 * @arg SPI_FLAG_BSY: Busy flag
bogdanm 86:04dd9b1680ae 392 * @arg SPI_FLAG_FRE: Frame format error flag
bogdanm 86:04dd9b1680ae 393 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 86:04dd9b1680ae 394 */
bogdanm 86:04dd9b1680ae 395 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
bogdanm 86:04dd9b1680ae 396
bogdanm 86:04dd9b1680ae 397 /** @brief Clear the SPI CRCERR pending flag.
bogdanm 86:04dd9b1680ae 398 * @param __HANDLE__: specifies the SPI handle.
bogdanm 86:04dd9b1680ae 399 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 400 * @retval None
bogdanm 86:04dd9b1680ae 401 */
bogdanm 86:04dd9b1680ae 402 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
bogdanm 86:04dd9b1680ae 403
bogdanm 86:04dd9b1680ae 404 /** @brief Clear the SPI MODF pending flag.
bogdanm 86:04dd9b1680ae 405 * @param __HANDLE__: specifies the SPI handle.
bogdanm 86:04dd9b1680ae 406 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 407 * @retval None
bogdanm 86:04dd9b1680ae 408 */
bogdanm 86:04dd9b1680ae 409 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\
bogdanm 86:04dd9b1680ae 410 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE);}while(0)
bogdanm 86:04dd9b1680ae 411
bogdanm 86:04dd9b1680ae 412 /** @brief Clear the SPI OVR pending flag.
bogdanm 86:04dd9b1680ae 413 * @param __HANDLE__: specifies the SPI handle.
bogdanm 86:04dd9b1680ae 414 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 415 * @retval None
bogdanm 86:04dd9b1680ae 416 */
bogdanm 86:04dd9b1680ae 417 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
bogdanm 86:04dd9b1680ae 418 (__HANDLE__)->Instance->SR;}while(0)
bogdanm 86:04dd9b1680ae 419
bogdanm 86:04dd9b1680ae 420 /** @brief Clear the SPI FRE pending flag.
bogdanm 86:04dd9b1680ae 421 * @param __HANDLE__: specifies the SPI handle.
bogdanm 86:04dd9b1680ae 422 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
bogdanm 86:04dd9b1680ae 423 * @retval None
bogdanm 86:04dd9b1680ae 424 */
bogdanm 86:04dd9b1680ae 425 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR)
bogdanm 86:04dd9b1680ae 426
bogdanm 86:04dd9b1680ae 427 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
bogdanm 86:04dd9b1680ae 428 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE)
bogdanm 86:04dd9b1680ae 429
bogdanm 86:04dd9b1680ae 430 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
bogdanm 86:04dd9b1680ae 431
bogdanm 86:04dd9b1680ae 432 #define __HAL_SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
bogdanm 86:04dd9b1680ae 433
bogdanm 86:04dd9b1680ae 434 #define __HAL_SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE)
bogdanm 86:04dd9b1680ae 435
bogdanm 86:04dd9b1680ae 436 #define __HAL_SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\
bogdanm 86:04dd9b1680ae 437 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
bogdanm 86:04dd9b1680ae 438
bogdanm 86:04dd9b1680ae 439 /* Exported functions --------------------------------------------------------*/
bogdanm 86:04dd9b1680ae 440
bogdanm 86:04dd9b1680ae 441 /* Initialization/de-initialization functions **********************************/
bogdanm 86:04dd9b1680ae 442 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 443 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 444 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 445 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 446
bogdanm 86:04dd9b1680ae 447 /* I/O operation functions *****************************************************/
bogdanm 86:04dd9b1680ae 448 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 86:04dd9b1680ae 449 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 86:04dd9b1680ae 450 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
bogdanm 86:04dd9b1680ae 451 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 86:04dd9b1680ae 452 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 86:04dd9b1680ae 453 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 86:04dd9b1680ae 454 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 86:04dd9b1680ae 455 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
bogdanm 86:04dd9b1680ae 456 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
bogdanm 86:04dd9b1680ae 457 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 458 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 459 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 460
bogdanm 86:04dd9b1680ae 461 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 462 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 463 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 464 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 465 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 466 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 467 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 468 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 469
bogdanm 86:04dd9b1680ae 470 /* Peripheral State and Control functions **************************************/
bogdanm 86:04dd9b1680ae 471 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 472 HAL_SPI_ErrorTypeDef HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
bogdanm 86:04dd9b1680ae 473
bogdanm 86:04dd9b1680ae 474 /**
bogdanm 86:04dd9b1680ae 475 * @}
bogdanm 86:04dd9b1680ae 476 */
bogdanm 86:04dd9b1680ae 477
bogdanm 86:04dd9b1680ae 478 /**
bogdanm 86:04dd9b1680ae 479 * @}
bogdanm 86:04dd9b1680ae 480 */
bogdanm 86:04dd9b1680ae 481
bogdanm 86:04dd9b1680ae 482 #ifdef __cplusplus
bogdanm 86:04dd9b1680ae 483 }
bogdanm 86:04dd9b1680ae 484 #endif
bogdanm 86:04dd9b1680ae 485
bogdanm 86:04dd9b1680ae 486 #endif /* __STM32F4xx_HAL_SPI_H */
bogdanm 86:04dd9b1680ae 487
bogdanm 86:04dd9b1680ae 488 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/