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TARGET_ARCH_MAX/stm32f4xx_hal_pwr_ex.h@99:7f6c6de930c0, 2015-05-03 (annotated)
- Committer:
- Mikchel
- Date:
- Sun May 03 16:04:42 2015 +0000
- Revision:
- 99:7f6c6de930c0
- Parent:
- 92:4fc01daae5a5
12
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 89:552587b429a1 | 1 | /** |
bogdanm | 89:552587b429a1 | 2 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 3 | * @file stm32f4xx_hal_pwr_ex.h |
bogdanm | 89:552587b429a1 | 4 | * @author MCD Application Team |
bogdanm | 92:4fc01daae5a5 | 5 | * @version V1.1.0 |
bogdanm | 92:4fc01daae5a5 | 6 | * @date 19-June-2014 |
bogdanm | 89:552587b429a1 | 7 | * @brief Header file of PWR HAL Extension module. |
bogdanm | 89:552587b429a1 | 8 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 9 | * @attention |
bogdanm | 89:552587b429a1 | 10 | * |
bogdanm | 89:552587b429a1 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 89:552587b429a1 | 12 | * |
bogdanm | 89:552587b429a1 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 89:552587b429a1 | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 89:552587b429a1 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 89:552587b429a1 | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 89:552587b429a1 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 89:552587b429a1 | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 89:552587b429a1 | 19 | * and/or other materials provided with the distribution. |
bogdanm | 89:552587b429a1 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 89:552587b429a1 | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 89:552587b429a1 | 22 | * without specific prior written permission. |
bogdanm | 89:552587b429a1 | 23 | * |
bogdanm | 89:552587b429a1 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 89:552587b429a1 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 89:552587b429a1 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 89:552587b429a1 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 89:552587b429a1 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 89:552587b429a1 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 89:552587b429a1 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 89:552587b429a1 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 89:552587b429a1 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 89:552587b429a1 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 89:552587b429a1 | 34 | * |
bogdanm | 89:552587b429a1 | 35 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 36 | */ |
bogdanm | 89:552587b429a1 | 37 | |
bogdanm | 89:552587b429a1 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 89:552587b429a1 | 39 | #ifndef __STM32F4xx_HAL_PWR_EX_H |
bogdanm | 89:552587b429a1 | 40 | #define __STM32F4xx_HAL_PWR_EX_H |
bogdanm | 89:552587b429a1 | 41 | |
bogdanm | 89:552587b429a1 | 42 | #ifdef __cplusplus |
bogdanm | 89:552587b429a1 | 43 | extern "C" { |
bogdanm | 89:552587b429a1 | 44 | #endif |
bogdanm | 89:552587b429a1 | 45 | |
bogdanm | 89:552587b429a1 | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 47 | #include "stm32f4xx_hal_def.h" |
bogdanm | 89:552587b429a1 | 48 | |
bogdanm | 89:552587b429a1 | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
bogdanm | 89:552587b429a1 | 50 | * @{ |
bogdanm | 89:552587b429a1 | 51 | */ |
bogdanm | 89:552587b429a1 | 52 | |
bogdanm | 89:552587b429a1 | 53 | /** @addtogroup PWREx |
bogdanm | 89:552587b429a1 | 54 | * @{ |
bogdanm | 89:552587b429a1 | 55 | */ |
bogdanm | 89:552587b429a1 | 56 | |
bogdanm | 89:552587b429a1 | 57 | /* Exported types ------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 58 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 59 | /* ------------- PWR registers bit address in the alias region ---------------*/ |
bogdanm | 89:552587b429a1 | 60 | /* --- CR Register ---*/ |
bogdanm | 92:4fc01daae5a5 | 61 | /* Alias word address of FPDS bit */ |
bogdanm | 92:4fc01daae5a5 | 62 | #define FPDS_BitNumber 0x09 |
bogdanm | 92:4fc01daae5a5 | 63 | #define CR_FPDS_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (FPDS_BitNumber * 4)) |
bogdanm | 89:552587b429a1 | 64 | |
bogdanm | 89:552587b429a1 | 65 | /* Alias word address of ODEN bit */ |
bogdanm | 89:552587b429a1 | 66 | #define ODEN_BitNumber 0x10 |
bogdanm | 89:552587b429a1 | 67 | #define CR_ODEN_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ODEN_BitNumber * 4)) |
bogdanm | 89:552587b429a1 | 68 | |
bogdanm | 89:552587b429a1 | 69 | /* Alias word address of ODSWEN bit */ |
bogdanm | 89:552587b429a1 | 70 | #define ODSWEN_BitNumber 0x11 |
bogdanm | 89:552587b429a1 | 71 | #define CR_ODSWEN_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (ODSWEN_BitNumber * 4)) |
bogdanm | 89:552587b429a1 | 72 | |
bogdanm | 92:4fc01daae5a5 | 73 | /* Alias word address of MRLVDS bit */ |
bogdanm | 92:4fc01daae5a5 | 74 | #define MRLVDS_BitNumber 0x0B |
bogdanm | 92:4fc01daae5a5 | 75 | #define CR_MRLVDS_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (MRLVDS_BitNumber * 4)) |
bogdanm | 89:552587b429a1 | 76 | |
bogdanm | 92:4fc01daae5a5 | 77 | /* Alias word address of LPLVDS bit */ |
bogdanm | 92:4fc01daae5a5 | 78 | #define LPLVDS_BitNumber 0x0A |
bogdanm | 92:4fc01daae5a5 | 79 | #define CR_LPLVDS_BB (PERIPH_BB_BASE + (CR_OFFSET * 32) + (LPLVDS_BitNumber * 4)) |
bogdanm | 92:4fc01daae5a5 | 80 | |
bogdanm | 92:4fc01daae5a5 | 81 | /* --- CSR Register ---*/ |
bogdanm | 92:4fc01daae5a5 | 82 | /* Alias word address of BRE bit */ |
bogdanm | 92:4fc01daae5a5 | 83 | #define BRE_BitNumber 0x09 |
bogdanm | 92:4fc01daae5a5 | 84 | #define CSR_BRE_BB (PERIPH_BB_BASE + (CSR_OFFSET * 32) + (BRE_BitNumber * 4)) |
bogdanm | 92:4fc01daae5a5 | 85 | |
bogdanm | 92:4fc01daae5a5 | 86 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
bogdanm | 92:4fc01daae5a5 | 87 | |
bogdanm | 92:4fc01daae5a5 | 88 | /** @defgroup PWREx_Regulator_state_in_UnderDrive_mode |
bogdanm | 92:4fc01daae5a5 | 89 | * @{ |
bogdanm | 92:4fc01daae5a5 | 90 | */ |
bogdanm | 92:4fc01daae5a5 | 91 | #define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS |
bogdanm | 92:4fc01daae5a5 | 92 | #define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS)) |
bogdanm | 92:4fc01daae5a5 | 93 | |
bogdanm | 92:4fc01daae5a5 | 94 | #define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \ |
bogdanm | 92:4fc01daae5a5 | 95 | ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON)) |
bogdanm | 92:4fc01daae5a5 | 96 | /** |
bogdanm | 92:4fc01daae5a5 | 97 | * @} |
bogdanm | 92:4fc01daae5a5 | 98 | */ |
bogdanm | 92:4fc01daae5a5 | 99 | |
bogdanm | 89:552587b429a1 | 100 | /** @defgroup PWREx_Over_Under_Drive_Flag |
bogdanm | 89:552587b429a1 | 101 | * @{ |
bogdanm | 89:552587b429a1 | 102 | */ |
bogdanm | 89:552587b429a1 | 103 | #define PWR_FLAG_ODRDY PWR_CSR_ODRDY |
bogdanm | 89:552587b429a1 | 104 | #define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY |
bogdanm | 89:552587b429a1 | 105 | #define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY |
bogdanm | 89:552587b429a1 | 106 | /** |
bogdanm | 89:552587b429a1 | 107 | * @} |
bogdanm | 89:552587b429a1 | 108 | */ |
bogdanm | 92:4fc01daae5a5 | 109 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
bogdanm | 89:552587b429a1 | 110 | /** |
bogdanm | 89:552587b429a1 | 111 | * @} |
bogdanm | 89:552587b429a1 | 112 | */ |
bogdanm | 89:552587b429a1 | 113 | |
bogdanm | 89:552587b429a1 | 114 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 115 | |
bogdanm | 92:4fc01daae5a5 | 116 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
bogdanm | 89:552587b429a1 | 117 | /** @brief Macros to enable or disable the Over drive mode. |
bogdanm | 89:552587b429a1 | 118 | * @note These macros can be used only for STM32F42xx/STM3243xx devices. |
bogdanm | 89:552587b429a1 | 119 | */ |
bogdanm | 89:552587b429a1 | 120 | #define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE) |
bogdanm | 89:552587b429a1 | 121 | #define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE) |
bogdanm | 89:552587b429a1 | 122 | |
bogdanm | 89:552587b429a1 | 123 | /** @brief Macros to enable or disable the Over drive switching. |
bogdanm | 89:552587b429a1 | 124 | * @note These macros can be used only for STM32F42xx/STM3243xx devices. |
bogdanm | 89:552587b429a1 | 125 | */ |
bogdanm | 89:552587b429a1 | 126 | #define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE) |
bogdanm | 89:552587b429a1 | 127 | #define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE) |
bogdanm | 89:552587b429a1 | 128 | |
bogdanm | 89:552587b429a1 | 129 | /** @brief Macros to enable or disable the Under drive mode. |
bogdanm | 89:552587b429a1 | 130 | * @note This mode is enabled only with STOP low power mode. |
bogdanm | 89:552587b429a1 | 131 | * In this mode, the 1.2V domain is preserved in reduced leakage mode. This |
bogdanm | 89:552587b429a1 | 132 | * mode is only available when the main regulator or the low power regulator |
bogdanm | 89:552587b429a1 | 133 | * is in low voltage mode. |
bogdanm | 89:552587b429a1 | 134 | * @note If the Under-drive mode was enabled, it is automatically disabled after |
bogdanm | 89:552587b429a1 | 135 | * exiting Stop mode. |
bogdanm | 89:552587b429a1 | 136 | * When the voltage regulator operates in Under-drive mode, an additional |
bogdanm | 89:552587b429a1 | 137 | * startup delay is induced when waking up from Stop mode. |
bogdanm | 89:552587b429a1 | 138 | */ |
bogdanm | 89:552587b429a1 | 139 | #define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN) |
bogdanm | 89:552587b429a1 | 140 | #define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN)) |
bogdanm | 89:552587b429a1 | 141 | |
bogdanm | 89:552587b429a1 | 142 | /** @brief Check PWR flag is set or not. |
bogdanm | 89:552587b429a1 | 143 | * @note These macros can be used only for STM32F42xx/STM3243xx devices. |
bogdanm | 89:552587b429a1 | 144 | * @param __FLAG__: specifies the flag to check. |
bogdanm | 89:552587b429a1 | 145 | * This parameter can be one of the following values: |
bogdanm | 89:552587b429a1 | 146 | * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode |
bogdanm | 89:552587b429a1 | 147 | * is ready |
bogdanm | 89:552587b429a1 | 148 | * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode |
bogdanm | 89:552587b429a1 | 149 | * switching is ready |
bogdanm | 89:552587b429a1 | 150 | * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode |
bogdanm | 89:552587b429a1 | 151 | * is enabled in Stop mode |
bogdanm | 89:552587b429a1 | 152 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
bogdanm | 89:552587b429a1 | 153 | */ |
bogdanm | 89:552587b429a1 | 154 | #define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__)) |
bogdanm | 89:552587b429a1 | 155 | |
bogdanm | 89:552587b429a1 | 156 | /** @brief Clear the Under-Drive Ready flag. |
bogdanm | 89:552587b429a1 | 157 | * @note These macros can be used only for STM32F42xx/STM3243xx devices. |
bogdanm | 89:552587b429a1 | 158 | */ |
bogdanm | 89:552587b429a1 | 159 | #define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY) |
bogdanm | 89:552587b429a1 | 160 | |
bogdanm | 89:552587b429a1 | 161 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
bogdanm | 89:552587b429a1 | 162 | |
bogdanm | 89:552587b429a1 | 163 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 164 | void HAL_PWREx_EnableFlashPowerDown(void); |
bogdanm | 89:552587b429a1 | 165 | void HAL_PWREx_DisableFlashPowerDown(void); |
bogdanm | 89:552587b429a1 | 166 | HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void); |
bogdanm | 89:552587b429a1 | 167 | HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void); |
bogdanm | 89:552587b429a1 | 168 | |
bogdanm | 92:4fc01daae5a5 | 169 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) |
bogdanm | 92:4fc01daae5a5 | 170 | void HAL_PWREx_EnableMainRegulatorLowVoltage(void); |
bogdanm | 92:4fc01daae5a5 | 171 | void HAL_PWREx_DisableMainRegulatorLowVoltage(void); |
bogdanm | 92:4fc01daae5a5 | 172 | void HAL_PWREx_EnableLowRegulatorLowVoltage(void); |
bogdanm | 92:4fc01daae5a5 | 173 | void HAL_PWREx_DisableLowRegulatorLowVoltage(void); |
bogdanm | 92:4fc01daae5a5 | 174 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE */ |
bogdanm | 92:4fc01daae5a5 | 175 | |
bogdanm | 89:552587b429a1 | 176 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
bogdanm | 89:552587b429a1 | 177 | HAL_StatusTypeDef HAL_PWREx_ActivateOverDrive(void); |
bogdanm | 89:552587b429a1 | 178 | HAL_StatusTypeDef HAL_PWREx_DeactivateOverDrive(void); |
bogdanm | 92:4fc01daae5a5 | 179 | HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry); |
bogdanm | 89:552587b429a1 | 180 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
bogdanm | 89:552587b429a1 | 181 | |
bogdanm | 89:552587b429a1 | 182 | /** |
bogdanm | 89:552587b429a1 | 183 | * @} |
bogdanm | 89:552587b429a1 | 184 | */ |
bogdanm | 89:552587b429a1 | 185 | |
bogdanm | 89:552587b429a1 | 186 | /** |
bogdanm | 89:552587b429a1 | 187 | * @} |
bogdanm | 89:552587b429a1 | 188 | */ |
bogdanm | 89:552587b429a1 | 189 | |
bogdanm | 89:552587b429a1 | 190 | #ifdef __cplusplus |
bogdanm | 89:552587b429a1 | 191 | } |
bogdanm | 89:552587b429a1 | 192 | #endif |
bogdanm | 89:552587b429a1 | 193 | |
bogdanm | 89:552587b429a1 | 194 | |
bogdanm | 89:552587b429a1 | 195 | #endif /* __STM32F4xx_HAL_PWR_EX_H */ |
bogdanm | 89:552587b429a1 | 196 | |
bogdanm | 89:552587b429a1 | 197 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |