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TARGET_ARCH_MAX/stm32f4xx_hal_irda.h@99:7f6c6de930c0, 2015-05-03 (annotated)

Committer:
Mikchel
Date:
Sun May 03 16:04:42 2015 +0000
Revision:
99:7f6c6de930c0
Parent:
92:4fc01daae5a5 
12

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 89:552587b429a1 1 /**
bogdanm 89:552587b429a1 2 ******************************************************************************
bogdanm 89:552587b429a1 3 * @file stm32f4xx_hal_irda.h
bogdanm 89:552587b429a1 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 89:552587b429a1 7 * @brief Header file of IRDA HAL module.
bogdanm 89:552587b429a1 8 ******************************************************************************
bogdanm 89:552587b429a1 9 * @attention
bogdanm 89:552587b429a1 10 *
bogdanm 89:552587b429a1 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 89:552587b429a1 12 *
bogdanm 89:552587b429a1 13 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 89:552587b429a1 14 * are permitted provided that the following conditions are met:
bogdanm 89:552587b429a1 15 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 89:552587b429a1 16 * this list of conditions and the following disclaimer.
bogdanm 89:552587b429a1 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 89:552587b429a1 18 * this list of conditions and the following disclaimer in the documentation
bogdanm 89:552587b429a1 19 * and/or other materials provided with the distribution.
bogdanm 89:552587b429a1 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 89:552587b429a1 21 * may be used to endorse or promote products derived from this software
bogdanm 89:552587b429a1 22 * without specific prior written permission.
bogdanm 89:552587b429a1 23 *
bogdanm 89:552587b429a1 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 89:552587b429a1 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 89:552587b429a1 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 89:552587b429a1 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 89:552587b429a1 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 89:552587b429a1 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 89:552587b429a1 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 89:552587b429a1 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 89:552587b429a1 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 89:552587b429a1 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 89:552587b429a1 34 *
bogdanm 89:552587b429a1 35 ******************************************************************************
bogdanm 89:552587b429a1 36 */
bogdanm 89:552587b429a1 37
bogdanm 89:552587b429a1 38 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 89:552587b429a1 39 #ifndef __STM32F4xx_HAL_IRDA_H
bogdanm 89:552587b429a1 40 #define __STM32F4xx_HAL_IRDA_H
bogdanm 89:552587b429a1 41
bogdanm 89:552587b429a1 42 #ifdef __cplusplus
bogdanm 89:552587b429a1 43 extern "C" {
bogdanm 89:552587b429a1 44 #endif
bogdanm 89:552587b429a1 45
bogdanm 89:552587b429a1 46 /* Includes ------------------------------------------------------------------*/
bogdanm 89:552587b429a1 47 #include "stm32f4xx_hal_def.h"
bogdanm 89:552587b429a1 48
bogdanm 89:552587b429a1 49 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 89:552587b429a1 50 * @{
bogdanm 89:552587b429a1 51 */
bogdanm 89:552587b429a1 52
bogdanm 89:552587b429a1 53 /** @addtogroup IRDA
bogdanm 89:552587b429a1 54 * @{
bogdanm 89:552587b429a1 55 */
bogdanm 89:552587b429a1 56
bogdanm 89:552587b429a1 57 /* Exported types ------------------------------------------------------------*/
bogdanm 89:552587b429a1 58
bogdanm 89:552587b429a1 59 /**
bogdanm 89:552587b429a1 60 * @brief IRDA Init Structure definition
bogdanm 89:552587b429a1 61 */
bogdanm 89:552587b429a1 62 typedef struct
bogdanm 89:552587b429a1 63 {
bogdanm 89:552587b429a1 64 uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
bogdanm 89:552587b429a1 65 The baud rate is computed using the following formula:
bogdanm 89:552587b429a1 66 - IntegerDivider = ((PCLKx) / (8 * (hirda->Init.BaudRate)))
bogdanm 89:552587b429a1 67 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
bogdanm 89:552587b429a1 68
bogdanm 89:552587b429a1 69 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
bogdanm 89:552587b429a1 70 This parameter can be a value of @ref IRDA_Word_Length */
bogdanm 89:552587b429a1 71
bogdanm 89:552587b429a1 72
bogdanm 89:552587b429a1 73 uint32_t Parity; /*!< Specifies the parity mode.
bogdanm 89:552587b429a1 74 This parameter can be a value of @ref IRDA_Parity
bogdanm 89:552587b429a1 75 @note When parity is enabled, the computed parity is inserted
bogdanm 89:552587b429a1 76 at the MSB position of the transmitted data (9th bit when
bogdanm 89:552587b429a1 77 the word length is set to 9 data bits; 8th bit when the
bogdanm 89:552587b429a1 78 word length is set to 8 data bits). */
bogdanm 89:552587b429a1 79
bogdanm 89:552587b429a1 80 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
bogdanm 89:552587b429a1 81 This parameter can be a value of @ref IRDA_Mode */
bogdanm 89:552587b429a1 82
bogdanm 89:552587b429a1 83 uint8_t Prescaler; /*!< Specifies the Prescaler */
bogdanm 89:552587b429a1 84
bogdanm 89:552587b429a1 85 uint32_t IrDAMode; /*!< Specifies the IrDA mode
bogdanm 89:552587b429a1 86 This parameter can be a value of @ref IrDA_Low_Power */
bogdanm 89:552587b429a1 87 }IRDA_InitTypeDef;
bogdanm 89:552587b429a1 88
bogdanm 89:552587b429a1 89 /**
bogdanm 89:552587b429a1 90 * @brief HAL State structures definition
bogdanm 89:552587b429a1 91 */
bogdanm 89:552587b429a1 92 typedef enum
bogdanm 89:552587b429a1 93 {
bogdanm 89:552587b429a1 94 HAL_IRDA_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
bogdanm 89:552587b429a1 95 HAL_IRDA_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
bogdanm 89:552587b429a1 96 HAL_IRDA_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
bogdanm 89:552587b429a1 97 HAL_IRDA_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
bogdanm 89:552587b429a1 98 HAL_IRDA_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
bogdanm 89:552587b429a1 99 HAL_IRDA_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
bogdanm 89:552587b429a1 100 HAL_IRDA_STATE_TIMEOUT = 0x03, /*!< Timeout state */
bogdanm 89:552587b429a1 101 HAL_IRDA_STATE_ERROR = 0x04 /*!< Error */
bogdanm 89:552587b429a1 102 }HAL_IRDA_StateTypeDef;
bogdanm 89:552587b429a1 103
bogdanm 89:552587b429a1 104 /**
bogdanm 89:552587b429a1 105 * @brief HAL IRDA Error Code structure definition
bogdanm 89:552587b429a1 106 */
bogdanm 89:552587b429a1 107 typedef enum
bogdanm 89:552587b429a1 108 {
bogdanm 89:552587b429a1 109 HAL_IRDA_ERROR_NONE = 0x00, /*!< No error */
bogdanm 89:552587b429a1 110 HAL_IRDA_ERROR_PE = 0x01, /*!< Parity error */
bogdanm 89:552587b429a1 111 HAL_IRDA_ERROR_NE = 0x02, /*!< Noise error */
bogdanm 89:552587b429a1 112 HAL_IRDA_ERROR_FE = 0x04, /*!< frame error */
bogdanm 89:552587b429a1 113 HAL_IRDA_ERROR_ORE = 0x08, /*!< Overrun error */
bogdanm 89:552587b429a1 114 HAL_IRDA_ERROR_DMA = 0x10 /*!< DMA transfer error */
bogdanm 89:552587b429a1 115 }HAL_IRDA_ErrorTypeDef;
bogdanm 89:552587b429a1 116
bogdanm 89:552587b429a1 117 /**
bogdanm 89:552587b429a1 118 * @brief IRDA handle Structure definition
bogdanm 89:552587b429a1 119 */
bogdanm 89:552587b429a1 120 typedef struct
bogdanm 89:552587b429a1 121 {
bogdanm 89:552587b429a1 122 USART_TypeDef *Instance; /* USART registers base address */
bogdanm 89:552587b429a1 123
bogdanm 89:552587b429a1 124 IRDA_InitTypeDef Init; /* IRDA communication parameters */
bogdanm 89:552587b429a1 125
bogdanm 89:552587b429a1 126 uint8_t *pTxBuffPtr; /* Pointer to IRDA Tx transfer Buffer */
bogdanm 89:552587b429a1 127
bogdanm 89:552587b429a1 128 uint16_t TxXferSize; /* IRDA Tx Transfer size */
bogdanm 89:552587b429a1 129
bogdanm 89:552587b429a1 130 uint16_t TxXferCount; /* IRDA Tx Transfer Counter */
bogdanm 89:552587b429a1 131
bogdanm 89:552587b429a1 132 uint8_t *pRxBuffPtr; /* Pointer to IRDA Rx transfer Buffer */
bogdanm 89:552587b429a1 133
bogdanm 89:552587b429a1 134 uint16_t RxXferSize; /* IRDA Rx Transfer size */
bogdanm 89:552587b429a1 135
bogdanm 89:552587b429a1 136 uint16_t RxXferCount; /* IRDA Rx Transfer Counter */
bogdanm 89:552587b429a1 137
bogdanm 89:552587b429a1 138 DMA_HandleTypeDef *hdmatx; /* IRDA Tx DMA Handle parameters */
bogdanm 89:552587b429a1 139
bogdanm 89:552587b429a1 140 DMA_HandleTypeDef *hdmarx; /* IRDA Rx DMA Handle parameters */
bogdanm 89:552587b429a1 141
bogdanm 89:552587b429a1 142 HAL_LockTypeDef Lock; /* Locking object */
bogdanm 89:552587b429a1 143
bogdanm 89:552587b429a1 144 __IO HAL_IRDA_StateTypeDef State; /* IRDA communication state */
bogdanm 89:552587b429a1 145
bogdanm 89:552587b429a1 146 __IO HAL_IRDA_ErrorTypeDef ErrorCode; /* IRDA Error code */
bogdanm 89:552587b429a1 147
bogdanm 89:552587b429a1 148 }IRDA_HandleTypeDef;
bogdanm 89:552587b429a1 149
bogdanm 89:552587b429a1 150 /* Exported constants --------------------------------------------------------*/
bogdanm 89:552587b429a1 151 /** @defgroup IRDA_Exported_Constants
bogdanm 89:552587b429a1 152 * @{
bogdanm 89:552587b429a1 153 */
bogdanm 89:552587b429a1 154
bogdanm 89:552587b429a1 155 /** @defgroup IRDA_Word_Length
bogdanm 89:552587b429a1 156 * @{
bogdanm 89:552587b429a1 157 */
bogdanm 89:552587b429a1 158 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000)
bogdanm 89:552587b429a1 159 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
bogdanm 89:552587b429a1 160 #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_8B) || \
bogdanm 89:552587b429a1 161 ((LENGTH) == IRDA_WORDLENGTH_9B))
bogdanm 89:552587b429a1 162 /**
bogdanm 89:552587b429a1 163 * @}
bogdanm 89:552587b429a1 164 */
bogdanm 89:552587b429a1 165
bogdanm 89:552587b429a1 166
bogdanm 89:552587b429a1 167 /** @defgroup IRDA_Parity
bogdanm 89:552587b429a1 168 * @{
bogdanm 89:552587b429a1 169 */
bogdanm 89:552587b429a1 170 #define IRDA_PARITY_NONE ((uint32_t)0x00000000)
bogdanm 89:552587b429a1 171 #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
bogdanm 89:552587b429a1 172 #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
bogdanm 89:552587b429a1 173 #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \
bogdanm 89:552587b429a1 174 ((PARITY) == IRDA_PARITY_EVEN) || \
bogdanm 89:552587b429a1 175 ((PARITY) == IRDA_PARITY_ODD))
bogdanm 89:552587b429a1 176 /**
bogdanm 89:552587b429a1 177 * @}
bogdanm 89:552587b429a1 178 */
bogdanm 89:552587b429a1 179
bogdanm 89:552587b429a1 180
bogdanm 89:552587b429a1 181 /** @defgroup IRDA_Mode
bogdanm 89:552587b429a1 182 * @{
bogdanm 89:552587b429a1 183 */
bogdanm 89:552587b429a1 184 #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE)
bogdanm 89:552587b429a1 185 #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE)
bogdanm 89:552587b429a1 186 #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
bogdanm 89:552587b429a1 187 #define IS_IRDA_MODE(MODE) ((((MODE) & (uint32_t)0x0000FFF3) == 0x00) && ((MODE) != (uint32_t)0x000000))
bogdanm 89:552587b429a1 188 /**
bogdanm 89:552587b429a1 189 * @}
bogdanm 89:552587b429a1 190 */
bogdanm 89:552587b429a1 191
bogdanm 89:552587b429a1 192 /** @defgroup IrDA_Low_Power
bogdanm 89:552587b429a1 193 * @{
bogdanm 89:552587b429a1 194 */
bogdanm 89:552587b429a1 195 #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP)
bogdanm 89:552587b429a1 196 #define IRDA_POWERMODE_NORMAL ((uint32_t)0x00000000)
bogdanm 89:552587b429a1 197 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
bogdanm 89:552587b429a1 198 ((MODE) == IRDA_POWERMODE_NORMAL))
bogdanm 89:552587b429a1 199 /**
bogdanm 89:552587b429a1 200 * @}
bogdanm 89:552587b429a1 201 */
bogdanm 89:552587b429a1 202
bogdanm 89:552587b429a1 203 /** @defgroup IRDA_Flags
bogdanm 89:552587b429a1 204 * Elements values convention: 0xXXXX
bogdanm 89:552587b429a1 205 * - 0xXXXX : Flag mask in the SR register
bogdanm 89:552587b429a1 206 * @{
bogdanm 89:552587b429a1 207 */
bogdanm 89:552587b429a1 208 #define IRDA_FLAG_TXE ((uint32_t)0x00000080)
bogdanm 89:552587b429a1 209 #define IRDA_FLAG_TC ((uint32_t)0x00000040)
bogdanm 89:552587b429a1 210 #define IRDA_FLAG_RXNE ((uint32_t)0x00000020)
bogdanm 89:552587b429a1 211 #define IRDA_FLAG_IDLE ((uint32_t)0x00000010)
bogdanm 89:552587b429a1 212 #define IRDA_FLAG_ORE ((uint32_t)0x00000008)
bogdanm 89:552587b429a1 213 #define IRDA_FLAG_NE ((uint32_t)0x00000004)
bogdanm 89:552587b429a1 214 #define IRDA_FLAG_FE ((uint32_t)0x00000002)
bogdanm 89:552587b429a1 215 #define IRDA_FLAG_PE ((uint32_t)0x00000001)
bogdanm 89:552587b429a1 216 /**
bogdanm 89:552587b429a1 217 * @}
bogdanm 89:552587b429a1 218 */
bogdanm 89:552587b429a1 219
bogdanm 89:552587b429a1 220 /** @defgroup IRDA_Interrupt_definition
bogdanm 89:552587b429a1 221 * Elements values convention: 0xY000XXXX
bogdanm 89:552587b429a1 222 * - XXXX : Interrupt mask in the XX register
bogdanm 89:552587b429a1 223 * - Y : Interrupt source register (2bits)
bogdanm 89:552587b429a1 224 * - 01: CR1 register
bogdanm 89:552587b429a1 225 * - 10: CR2 register
bogdanm 89:552587b429a1 226 * - 11: CR3 register
bogdanm 89:552587b429a1 227 *
bogdanm 89:552587b429a1 228 * @{
bogdanm 89:552587b429a1 229 */
bogdanm 89:552587b429a1 230
bogdanm 89:552587b429a1 231 #define IRDA_IT_PE ((uint32_t)0x10000100)
bogdanm 89:552587b429a1 232 #define IRDA_IT_TXE ((uint32_t)0x10000080)
bogdanm 89:552587b429a1 233 #define IRDA_IT_TC ((uint32_t)0x10000040)
bogdanm 89:552587b429a1 234 #define IRDA_IT_RXNE ((uint32_t)0x10000020)
bogdanm 89:552587b429a1 235 #define IRDA_IT_IDLE ((uint32_t)0x10000010)
bogdanm 89:552587b429a1 236
bogdanm 89:552587b429a1 237 #define IRDA_IT_LBD ((uint32_t)0x20000040)
bogdanm 89:552587b429a1 238
bogdanm 89:552587b429a1 239 #define IRDA_IT_CTS ((uint32_t)0x30000400)
bogdanm 89:552587b429a1 240 #define IRDA_IT_ERR ((uint32_t)0x30000001)
bogdanm 89:552587b429a1 241
bogdanm 89:552587b429a1 242 /**
bogdanm 89:552587b429a1 243 * @}
bogdanm 89:552587b429a1 244 */
bogdanm 89:552587b429a1 245
bogdanm 89:552587b429a1 246 /**
bogdanm 89:552587b429a1 247 * @}
bogdanm 89:552587b429a1 248 */
bogdanm 89:552587b429a1 249
bogdanm 89:552587b429a1 250 /* Exported macro ------------------------------------------------------------*/
bogdanm 89:552587b429a1 251
bogdanm 89:552587b429a1 252 /** @brief Reset IRDA handle state
bogdanm 92:4fc01daae5a5 253 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 254 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 255 * UART peripheral.
bogdanm 89:552587b429a1 256 * @retval None
bogdanm 89:552587b429a1 257 */
bogdanm 89:552587b429a1 258 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
bogdanm 89:552587b429a1 259
bogdanm 89:552587b429a1 260 /** @brief Flushs the IRDA DR register
bogdanm 92:4fc01daae5a5 261 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 262 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 263 * UART peripheral.
bogdanm 89:552587b429a1 264 */
bogdanm 89:552587b429a1 265 #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
bogdanm 89:552587b429a1 266
bogdanm 89:552587b429a1 267 /** @brief Checks whether the specified IRDA flag is set or not.
bogdanm 89:552587b429a1 268 * @param __HANDLE__: specifies the USART Handle.
bogdanm 89:552587b429a1 269 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 89:552587b429a1 270 * UART peripheral.
bogdanm 89:552587b429a1 271 * @param __FLAG__: specifies the flag to check.
bogdanm 89:552587b429a1 272 * This parameter can be one of the following values:
bogdanm 89:552587b429a1 273 * @arg IRDA_FLAG_TXE: Transmit data register empty flag
bogdanm 89:552587b429a1 274 * @arg IRDA_FLAG_TC: Transmission Complete flag
bogdanm 89:552587b429a1 275 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag
bogdanm 89:552587b429a1 276 * @arg IRDA_FLAG_IDLE: Idle Line detection flag
bogdanm 89:552587b429a1 277 * @arg IRDA_FLAG_ORE: OverRun Error flag
bogdanm 89:552587b429a1 278 * @arg IRDA_FLAG_NE: Noise Error flag
bogdanm 89:552587b429a1 279 * @arg IRDA_FLAG_FE: Framing Error flag
bogdanm 89:552587b429a1 280 * @arg IRDA_FLAG_PE: Parity Error flag
bogdanm 89:552587b429a1 281 * @retval The new state of __FLAG__ (TRUE or FALSE).
bogdanm 89:552587b429a1 282 */
bogdanm 89:552587b429a1 283 #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
bogdanm 89:552587b429a1 284
bogdanm 89:552587b429a1 285 /** @brief Clears the specified IRDA pending flag.
bogdanm 89:552587b429a1 286 * @param __HANDLE__: specifies the USART Handle.
bogdanm 89:552587b429a1 287 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 89:552587b429a1 288 * UART peripheral.
bogdanm 89:552587b429a1 289 * @param __FLAG__: specifies the flag to check.
bogdanm 89:552587b429a1 290 * This parameter can be any combination of the following values:
bogdanm 89:552587b429a1 291 * @arg IRDA_FLAG_TC: Transmission Complete flag.
bogdanm 89:552587b429a1 292 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag.
bogdanm 89:552587b429a1 293 *
bogdanm 89:552587b429a1 294 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
bogdanm 89:552587b429a1 295 * error) and IDLE (Idle line detected) flags are cleared by software
bogdanm 89:552587b429a1 296 * sequence: a read operation to USART_SR register followed by a read
bogdanm 89:552587b429a1 297 * operation to USART_DR register.
bogdanm 89:552587b429a1 298 * @note RXNE flag can be also cleared by a read to the USART_DR register.
bogdanm 89:552587b429a1 299 * @note TC flag can be also cleared by software sequence: a read operation to
bogdanm 89:552587b429a1 300 * USART_SR register followed by a write operation to USART_DR register.
bogdanm 89:552587b429a1 301 * @note TXE flag is cleared only by a write to the USART_DR register.
bogdanm 89:552587b429a1 302 *
bogdanm 89:552587b429a1 303 * @retval None
bogdanm 89:552587b429a1 304 */
bogdanm 92:4fc01daae5a5 305 #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
bogdanm 92:4fc01daae5a5 306
bogdanm 92:4fc01daae5a5 307 /** @brief Clear the IRDA PE pending flag.
bogdanm 92:4fc01daae5a5 308 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 309 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 310 * UART peripheral.
bogdanm 92:4fc01daae5a5 311 * @retval None
bogdanm 92:4fc01daae5a5 312 */
bogdanm 92:4fc01daae5a5 313 #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) do{(__HANDLE__)->Instance->SR;\
bogdanm 92:4fc01daae5a5 314 (__HANDLE__)->Instance->DR;}while(0)
bogdanm 92:4fc01daae5a5 315 /** @brief Clear the IRDA FE pending flag.
bogdanm 92:4fc01daae5a5 316 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 317 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 318 * UART peripheral.
bogdanm 92:4fc01daae5a5 319 * @retval None
bogdanm 92:4fc01daae5a5 320 */
bogdanm 92:4fc01daae5a5 321 #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
bogdanm 89:552587b429a1 322
bogdanm 92:4fc01daae5a5 323 /** @brief Clear the IRDA NE pending flag.
bogdanm 92:4fc01daae5a5 324 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 325 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 326 * UART peripheral.
bogdanm 92:4fc01daae5a5 327 * @retval None
bogdanm 92:4fc01daae5a5 328 */
bogdanm 92:4fc01daae5a5 329 #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 330
bogdanm 92:4fc01daae5a5 331 /** @brief Clear the IRDA ORE pending flag.
bogdanm 92:4fc01daae5a5 332 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 333 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 334 * UART peripheral.
bogdanm 92:4fc01daae5a5 335 * @retval None
bogdanm 92:4fc01daae5a5 336 */
bogdanm 92:4fc01daae5a5 337 #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
bogdanm 92:4fc01daae5a5 338
bogdanm 92:4fc01daae5a5 339 /** @brief Clear the IRDA IDLE pending flag.
bogdanm 92:4fc01daae5a5 340 * @param __HANDLE__: specifies the USART Handle.
bogdanm 92:4fc01daae5a5 341 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 92:4fc01daae5a5 342 * UART peripheral.
bogdanm 92:4fc01daae5a5 343 * @retval None
bogdanm 92:4fc01daae5a5 344 */
bogdanm 92:4fc01daae5a5 345 #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
bogdanm 89:552587b429a1 346
bogdanm 89:552587b429a1 347 /** @brief Enables or disables the specified IRDA interrupt.
bogdanm 89:552587b429a1 348 * @param __HANDLE__: specifies the USART Handle.
bogdanm 89:552587b429a1 349 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 89:552587b429a1 350 * UART peripheral.
bogdanm 89:552587b429a1 351 * @param __INTERRUPT__: specifies the IRDA interrupt source to check.
bogdanm 89:552587b429a1 352 * This parameter can be one of the following values:
bogdanm 89:552587b429a1 353 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
bogdanm 89:552587b429a1 354 * @arg IRDA_IT_TC: Transmission complete interrupt
bogdanm 89:552587b429a1 355 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
bogdanm 89:552587b429a1 356 * @arg IRDA_IT_IDLE: Idle line detection interrupt
bogdanm 89:552587b429a1 357 * @arg IRDA_IT_PE: Parity Error interrupt
bogdanm 89:552587b429a1 358 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
bogdanm 89:552587b429a1 359 * @param NewState: new state of the specified IRDA interrupt.
bogdanm 89:552587b429a1 360 * This parameter can be: ENABLE or DISABLE.
bogdanm 89:552587b429a1 361 * @retval None
bogdanm 89:552587b429a1 362 */
bogdanm 89:552587b429a1 363 #define IRDA_IT_MASK ((uint32_t)0x0000FFFF)
bogdanm 89:552587b429a1 364 #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
bogdanm 89:552587b429a1 365 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
bogdanm 89:552587b429a1 366 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & IRDA_IT_MASK)))
bogdanm 89:552587b429a1 367 #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
bogdanm 89:552587b429a1 368 (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
bogdanm 89:552587b429a1 369 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & IRDA_IT_MASK)))
bogdanm 89:552587b429a1 370
bogdanm 89:552587b429a1 371 /** @brief Checks whether the specified IRDA interrupt has occurred or not.
bogdanm 89:552587b429a1 372 * @param __HANDLE__: specifies the USART Handle.
bogdanm 89:552587b429a1 373 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
bogdanm 89:552587b429a1 374 * UART peripheral.
bogdanm 89:552587b429a1 375 * @param __IT__: specifies the IRDA interrupt source to check.
bogdanm 89:552587b429a1 376 * This parameter can be one of the following values:
bogdanm 89:552587b429a1 377 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
bogdanm 89:552587b429a1 378 * @arg IRDA_IT_TC: Transmission complete interrupt
bogdanm 89:552587b429a1 379 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
bogdanm 89:552587b429a1 380 * @arg IRDA_IT_IDLE: Idle line detection interrupt
bogdanm 89:552587b429a1 381 * @arg USART_IT_ERR: Error interrupt
bogdanm 89:552587b429a1 382 * @arg IRDA_IT_PE: Parity Error interrupt
bogdanm 89:552587b429a1 383 * @retval The new state of __IT__ (TRUE or FALSE).
bogdanm 89:552587b429a1 384 */
bogdanm 89:552587b429a1 385 #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == 1)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == 2)? \
bogdanm 89:552587b429a1 386 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & IRDA_IT_MASK))
bogdanm 89:552587b429a1 387
bogdanm 89:552587b429a1 388
bogdanm 89:552587b429a1 389
bogdanm 89:552587b429a1 390 #define __IRDA_ENABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
bogdanm 89:552587b429a1 391 #define __IRDA_DISABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
bogdanm 89:552587b429a1 392
bogdanm 89:552587b429a1 393 #define __DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
bogdanm 89:552587b429a1 394 #define __DIVMANT(_PCLK_, _BAUD_) (__DIV((_PCLK_), (_BAUD_))/100)
bogdanm 89:552587b429a1 395 #define __DIVFRAQ(_PCLK_, _BAUD_) (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
bogdanm 89:552587b429a1 396 #define __IRDA_BRR(_PCLK_, _BAUD_) ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))
bogdanm 89:552587b429a1 397
bogdanm 89:552587b429a1 398 #define IS_IRDA_BAUDRATE(BAUDRATE) ((BAUDRATE) < 115201)
bogdanm 89:552587b429a1 399
bogdanm 89:552587b429a1 400
bogdanm 89:552587b429a1 401 /* Exported functions --------------------------------------------------------*/
bogdanm 89:552587b429a1 402 /* Initialization/de-initialization functions **********************************/
bogdanm 89:552587b429a1 403 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 404 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 405 void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 406 void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 407
bogdanm 89:552587b429a1 408 /* IO operation functions *******************************************************/
bogdanm 89:552587b429a1 409 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 89:552587b429a1 410 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
bogdanm 89:552587b429a1 411 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 89:552587b429a1 412 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 89:552587b429a1 413 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 89:552587b429a1 414 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
bogdanm 92:4fc01daae5a5 415 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 416 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 417 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 418 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 419 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 420 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 421 void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 92:4fc01daae5a5 422 void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 423 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 424
bogdanm 89:552587b429a1 425 /* Peripheral State functions **************************************************/
bogdanm 89:552587b429a1 426 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 427 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
bogdanm 89:552587b429a1 428
bogdanm 89:552587b429a1 429 /**
bogdanm 89:552587b429a1 430 * @}
bogdanm 89:552587b429a1 431 */
bogdanm 89:552587b429a1 432
bogdanm 89:552587b429a1 433 /**
bogdanm 89:552587b429a1 434 * @}
bogdanm 89:552587b429a1 435 */
bogdanm 89:552587b429a1 436
bogdanm 89:552587b429a1 437 #ifdef __cplusplus
bogdanm 89:552587b429a1 438 }
bogdanm 89:552587b429a1 439 #endif
bogdanm 89:552587b429a1 440
bogdanm 89:552587b429a1 441 #endif /* __STM32F4xx_HAL_IRDA_H */
bogdanm 89:552587b429a1 442
bogdanm 89:552587b429a1 443 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/