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TARGET_ARCH_MAX/stm32f4xx_hal_adc_ex.h@99:7f6c6de930c0, 2015-05-03 (annotated)
- Committer:
- Mikchel
- Date:
- Sun May 03 16:04:42 2015 +0000
- Revision:
- 99:7f6c6de930c0
- Parent:
- 92:4fc01daae5a5
12
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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bogdanm | 89:552587b429a1 | 1 | /** |
bogdanm | 89:552587b429a1 | 2 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 3 | * @file stm32f4xx_hal_adc.h |
bogdanm | 89:552587b429a1 | 4 | * @author MCD Application Team |
bogdanm | 92:4fc01daae5a5 | 5 | * @version V1.1.0 |
bogdanm | 92:4fc01daae5a5 | 6 | * @date 19-June-2014 |
bogdanm | 89:552587b429a1 | 7 | * @brief Header file of ADC HAL module. |
bogdanm | 89:552587b429a1 | 8 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 9 | * @attention |
bogdanm | 89:552587b429a1 | 10 | * |
bogdanm | 89:552587b429a1 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 89:552587b429a1 | 12 | * |
bogdanm | 89:552587b429a1 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 89:552587b429a1 | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 89:552587b429a1 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 89:552587b429a1 | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 89:552587b429a1 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 89:552587b429a1 | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 89:552587b429a1 | 19 | * and/or other materials provided with the distribution. |
bogdanm | 89:552587b429a1 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 89:552587b429a1 | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 89:552587b429a1 | 22 | * without specific prior written permission. |
bogdanm | 89:552587b429a1 | 23 | * |
bogdanm | 89:552587b429a1 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 89:552587b429a1 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 89:552587b429a1 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 89:552587b429a1 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 89:552587b429a1 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 89:552587b429a1 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 89:552587b429a1 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 89:552587b429a1 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 89:552587b429a1 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 89:552587b429a1 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 89:552587b429a1 | 34 | * |
bogdanm | 89:552587b429a1 | 35 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 36 | */ |
bogdanm | 89:552587b429a1 | 37 | |
bogdanm | 89:552587b429a1 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 89:552587b429a1 | 39 | #ifndef __STM32F4xx_ADC_EX_H |
bogdanm | 89:552587b429a1 | 40 | #define __STM32F4xx_ADC_EX_H |
bogdanm | 89:552587b429a1 | 41 | |
bogdanm | 89:552587b429a1 | 42 | #ifdef __cplusplus |
bogdanm | 89:552587b429a1 | 43 | extern "C" { |
bogdanm | 89:552587b429a1 | 44 | #endif |
bogdanm | 89:552587b429a1 | 45 | |
bogdanm | 89:552587b429a1 | 46 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 47 | #include "stm32f4xx_hal_def.h" |
bogdanm | 89:552587b429a1 | 48 | |
bogdanm | 89:552587b429a1 | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
bogdanm | 89:552587b429a1 | 50 | * @{ |
bogdanm | 89:552587b429a1 | 51 | */ |
bogdanm | 89:552587b429a1 | 52 | |
bogdanm | 89:552587b429a1 | 53 | /** @addtogroup ADCEx |
bogdanm | 89:552587b429a1 | 54 | * @{ |
bogdanm | 89:552587b429a1 | 55 | */ |
bogdanm | 89:552587b429a1 | 56 | |
bogdanm | 89:552587b429a1 | 57 | /* Exported types ------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 58 | |
bogdanm | 89:552587b429a1 | 59 | /** |
bogdanm | 89:552587b429a1 | 60 | * @brief ADC Configuration injected Channel structure definition |
bogdanm | 89:552587b429a1 | 61 | */ |
bogdanm | 89:552587b429a1 | 62 | typedef struct |
bogdanm | 89:552587b429a1 | 63 | { |
bogdanm | 89:552587b429a1 | 64 | uint32_t InjectedChannel; /*!< Configure the ADC injected channel. |
bogdanm | 89:552587b429a1 | 65 | This parameter can be a value of @ref ADC_channels */ |
bogdanm | 89:552587b429a1 | 66 | uint32_t InjectedRank; /*!< The rank in the injected group sequencer |
bogdanm | 89:552587b429a1 | 67 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. */ |
bogdanm | 89:552587b429a1 | 68 | uint32_t InjectedSamplingTime; /*!< The sample time value to be set for the selected channel. |
bogdanm | 89:552587b429a1 | 69 | This parameter can be a value of @ref ADC_sampling_times */ |
bogdanm | 89:552587b429a1 | 70 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels. |
bogdanm | 89:552587b429a1 | 71 | This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */ |
bogdanm | 89:552587b429a1 | 72 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ADC conversions that will be done using the sequencer for |
bogdanm | 89:552587b429a1 | 73 | injected channel group. |
bogdanm | 89:552587b429a1 | 74 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. */ |
bogdanm | 89:552587b429a1 | 75 | uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group |
bogdanm | 89:552587b429a1 | 76 | conversion after regular one */ |
bogdanm | 89:552587b429a1 | 77 | uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels. |
bogdanm | 89:552587b429a1 | 78 | This parameter can be set to ENABLE or DISABLE. */ |
bogdanm | 89:552587b429a1 | 79 | uint32_t ExternalTrigInjecConvEdge; /*!< Select the external trigger edge and enable the trigger of an injected channels. |
bogdanm | 89:552587b429a1 | 80 | This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */ |
bogdanm | 89:552587b429a1 | 81 | uint32_t ExternalTrigInjecConv; /*!< Select the external event used to trigger the start of conversion of a injected channels. |
bogdanm | 89:552587b429a1 | 82 | This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */ |
bogdanm | 89:552587b429a1 | 83 | }ADC_InjectionConfTypeDef; |
bogdanm | 89:552587b429a1 | 84 | |
bogdanm | 89:552587b429a1 | 85 | /** |
bogdanm | 89:552587b429a1 | 86 | * @brief ADC Configuration multi-mode structure definition |
bogdanm | 89:552587b429a1 | 87 | */ |
bogdanm | 89:552587b429a1 | 88 | typedef struct |
bogdanm | 89:552587b429a1 | 89 | { |
bogdanm | 89:552587b429a1 | 90 | uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode. |
bogdanm | 89:552587b429a1 | 91 | This parameter can be a value of @ref ADCEx_Common_mode */ |
bogdanm | 89:552587b429a1 | 92 | uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode. |
bogdanm | 89:552587b429a1 | 93 | This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */ |
bogdanm | 89:552587b429a1 | 94 | uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases. |
bogdanm | 92:4fc01daae5a5 | 95 | This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */ |
bogdanm | 89:552587b429a1 | 96 | }ADC_MultiModeTypeDef; |
bogdanm | 89:552587b429a1 | 97 | |
bogdanm | 89:552587b429a1 | 98 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 99 | |
bogdanm | 89:552587b429a1 | 100 | /** @defgroup ADCEx_Exported_Constants |
bogdanm | 89:552587b429a1 | 101 | * @{ |
bogdanm | 89:552587b429a1 | 102 | */ |
bogdanm | 89:552587b429a1 | 103 | |
bogdanm | 89:552587b429a1 | 104 | |
bogdanm | 89:552587b429a1 | 105 | /** @defgroup ADCEx_Common_mode |
bogdanm | 89:552587b429a1 | 106 | * @{ |
bogdanm | 89:552587b429a1 | 107 | */ |
bogdanm | 89:552587b429a1 | 108 | #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000) |
bogdanm | 89:552587b429a1 | 109 | #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0) |
bogdanm | 89:552587b429a1 | 110 | #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1) |
bogdanm | 89:552587b429a1 | 111 | #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0)) |
bogdanm | 89:552587b429a1 | 112 | #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1)) |
bogdanm | 89:552587b429a1 | 113 | #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0)) |
bogdanm | 89:552587b429a1 | 114 | #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0)) |
bogdanm | 89:552587b429a1 | 115 | #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0)) |
bogdanm | 89:552587b429a1 | 116 | #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1)) |
bogdanm | 89:552587b429a1 | 117 | #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0)) |
bogdanm | 89:552587b429a1 | 118 | #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1)) |
bogdanm | 89:552587b429a1 | 119 | #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0)) |
bogdanm | 89:552587b429a1 | 120 | #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0)) |
bogdanm | 89:552587b429a1 | 121 | |
bogdanm | 89:552587b429a1 | 122 | #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ |
bogdanm | 89:552587b429a1 | 123 | ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ |
bogdanm | 89:552587b429a1 | 124 | ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ |
bogdanm | 89:552587b429a1 | 125 | ((MODE) == ADC_DUALMODE_INJECSIMULT) || \ |
bogdanm | 89:552587b429a1 | 126 | ((MODE) == ADC_DUALMODE_REGSIMULT) || \ |
bogdanm | 89:552587b429a1 | 127 | ((MODE) == ADC_DUALMODE_INTERL) || \ |
bogdanm | 89:552587b429a1 | 128 | ((MODE) == ADC_DUALMODE_ALTERTRIG) || \ |
bogdanm | 89:552587b429a1 | 129 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \ |
bogdanm | 89:552587b429a1 | 130 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \ |
bogdanm | 89:552587b429a1 | 131 | ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \ |
bogdanm | 89:552587b429a1 | 132 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \ |
bogdanm | 89:552587b429a1 | 133 | ((MODE) == ADC_TRIPLEMODE_INTERL) || \ |
bogdanm | 89:552587b429a1 | 134 | ((MODE) == ADC_TRIPLEMODE_ALTERTRIG)) |
bogdanm | 89:552587b429a1 | 135 | /** |
bogdanm | 89:552587b429a1 | 136 | * @} |
bogdanm | 89:552587b429a1 | 137 | */ |
bogdanm | 89:552587b429a1 | 138 | |
bogdanm | 89:552587b429a1 | 139 | /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode |
bogdanm | 89:552587b429a1 | 140 | * @{ |
bogdanm | 89:552587b429a1 | 141 | */ |
bogdanm | 89:552587b429a1 | 142 | #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA mode disabled */ |
bogdanm | 89:552587b429a1 | 143 | #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/ |
bogdanm | 89:552587b429a1 | 144 | #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/ |
bogdanm | 89:552587b429a1 | 145 | #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */ |
bogdanm | 89:552587b429a1 | 146 | |
bogdanm | 89:552587b429a1 | 147 | #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \ |
bogdanm | 89:552587b429a1 | 148 | ((MODE) == ADC_DMAACCESSMODE_1) || \ |
bogdanm | 89:552587b429a1 | 149 | ((MODE) == ADC_DMAACCESSMODE_2) || \ |
bogdanm | 89:552587b429a1 | 150 | ((MODE) == ADC_DMAACCESSMODE_3)) |
bogdanm | 89:552587b429a1 | 151 | /** |
bogdanm | 89:552587b429a1 | 152 | * @} |
bogdanm | 89:552587b429a1 | 153 | */ |
bogdanm | 89:552587b429a1 | 154 | |
bogdanm | 89:552587b429a1 | 155 | /** @defgroup ADCEx_External_trigger_edge_Injected |
bogdanm | 89:552587b429a1 | 156 | * @{ |
bogdanm | 89:552587b429a1 | 157 | */ |
bogdanm | 89:552587b429a1 | 158 | #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000) |
bogdanm | 89:552587b429a1 | 159 | #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0) |
bogdanm | 89:552587b429a1 | 160 | #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1) |
bogdanm | 89:552587b429a1 | 161 | #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN) |
bogdanm | 89:552587b429a1 | 162 | |
bogdanm | 89:552587b429a1 | 163 | #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \ |
bogdanm | 89:552587b429a1 | 164 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \ |
bogdanm | 89:552587b429a1 | 165 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \ |
bogdanm | 89:552587b429a1 | 166 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING)) |
bogdanm | 89:552587b429a1 | 167 | /** |
bogdanm | 89:552587b429a1 | 168 | * @} |
bogdanm | 89:552587b429a1 | 169 | */ |
bogdanm | 89:552587b429a1 | 170 | |
bogdanm | 89:552587b429a1 | 171 | /** @defgroup ADCEx_External_trigger_Source_Injected |
bogdanm | 89:552587b429a1 | 172 | * @{ |
bogdanm | 89:552587b429a1 | 173 | */ |
bogdanm | 89:552587b429a1 | 174 | #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000) |
bogdanm | 89:552587b429a1 | 175 | #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0) |
bogdanm | 89:552587b429a1 | 176 | #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1) |
bogdanm | 89:552587b429a1 | 177 | #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
bogdanm | 89:552587b429a1 | 178 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2) |
bogdanm | 89:552587b429a1 | 179 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
bogdanm | 89:552587b429a1 | 180 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1)) |
bogdanm | 89:552587b429a1 | 181 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
bogdanm | 89:552587b429a1 | 182 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3) |
bogdanm | 89:552587b429a1 | 183 | #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0)) |
bogdanm | 89:552587b429a1 | 184 | #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1)) |
bogdanm | 89:552587b429a1 | 185 | #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
bogdanm | 89:552587b429a1 | 186 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2)) |
bogdanm | 89:552587b429a1 | 187 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
bogdanm | 89:552587b429a1 | 188 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1)) |
bogdanm | 89:552587b429a1 | 189 | #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL) |
bogdanm | 89:552587b429a1 | 190 | |
bogdanm | 89:552587b429a1 | 191 | #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
bogdanm | 89:552587b429a1 | 192 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
bogdanm | 89:552587b429a1 | 193 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
bogdanm | 89:552587b429a1 | 194 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
bogdanm | 89:552587b429a1 | 195 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \ |
bogdanm | 89:552587b429a1 | 196 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
bogdanm | 89:552587b429a1 | 197 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \ |
bogdanm | 89:552587b429a1 | 198 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \ |
bogdanm | 89:552587b429a1 | 199 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ |
bogdanm | 89:552587b429a1 | 200 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
bogdanm | 89:552587b429a1 | 201 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ |
bogdanm | 89:552587b429a1 | 202 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \ |
bogdanm | 89:552587b429a1 | 203 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \ |
bogdanm | 89:552587b429a1 | 204 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \ |
bogdanm | 89:552587b429a1 | 205 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ |
bogdanm | 89:552587b429a1 | 206 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)) |
bogdanm | 89:552587b429a1 | 207 | /** |
bogdanm | 89:552587b429a1 | 208 | * @} |
bogdanm | 89:552587b429a1 | 209 | */ |
bogdanm | 89:552587b429a1 | 210 | |
bogdanm | 89:552587b429a1 | 211 | /** @defgroup ADCEx_injected_channel_selection |
bogdanm | 89:552587b429a1 | 212 | * @{ |
bogdanm | 89:552587b429a1 | 213 | */ |
bogdanm | 89:552587b429a1 | 214 | #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001) |
bogdanm | 89:552587b429a1 | 215 | #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002) |
bogdanm | 89:552587b429a1 | 216 | #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003) |
bogdanm | 89:552587b429a1 | 217 | #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004) |
bogdanm | 89:552587b429a1 | 218 | |
bogdanm | 89:552587b429a1 | 219 | /** |
bogdanm | 89:552587b429a1 | 220 | * @} |
bogdanm | 89:552587b429a1 | 221 | */ |
bogdanm | 89:552587b429a1 | 222 | |
bogdanm | 89:552587b429a1 | 223 | /** @defgroup ADCEx_injected_length |
bogdanm | 89:552587b429a1 | 224 | * @{ |
bogdanm | 89:552587b429a1 | 225 | */ |
bogdanm | 89:552587b429a1 | 226 | #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4))) |
bogdanm | 89:552587b429a1 | 227 | /** |
bogdanm | 89:552587b429a1 | 228 | * @} |
bogdanm | 89:552587b429a1 | 229 | */ |
bogdanm | 89:552587b429a1 | 230 | |
bogdanm | 89:552587b429a1 | 231 | /** @defgroup ADCEx_injected_rank |
bogdanm | 89:552587b429a1 | 232 | * @{ |
bogdanm | 89:552587b429a1 | 233 | */ |
bogdanm | 89:552587b429a1 | 234 | #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4))) |
bogdanm | 89:552587b429a1 | 235 | /** |
bogdanm | 89:552587b429a1 | 236 | * @} |
bogdanm | 89:552587b429a1 | 237 | */ |
bogdanm | 89:552587b429a1 | 238 | |
bogdanm | 89:552587b429a1 | 239 | /** |
bogdanm | 89:552587b429a1 | 240 | * @} |
bogdanm | 89:552587b429a1 | 241 | */ |
bogdanm | 89:552587b429a1 | 242 | |
bogdanm | 89:552587b429a1 | 243 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 244 | |
bogdanm | 89:552587b429a1 | 245 | /** |
bogdanm | 89:552587b429a1 | 246 | * @brief Set the selected injected Channel rank. |
bogdanm | 89:552587b429a1 | 247 | * @param _CHANNELNB_: Channel number. |
bogdanm | 89:552587b429a1 | 248 | * @param _RANKNB_: Rank number. |
bogdanm | 89:552587b429a1 | 249 | * @param _JSQR_JL_: Sequence length. |
bogdanm | 89:552587b429a1 | 250 | * @retval None |
bogdanm | 89:552587b429a1 | 251 | */ |
bogdanm | 89:552587b429a1 | 252 | #define __HAL_ADC_JSQR(_CHANNELNB_, _RANKNB_,_JSQR_JL_) \ |
bogdanm | 89:552587b429a1 | 253 | ((_CHANNELNB_) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_)))) |
bogdanm | 89:552587b429a1 | 254 | |
bogdanm | 89:552587b429a1 | 255 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 256 | |
bogdanm | 89:552587b429a1 | 257 | /* I/O operation functions ******************************************************/ |
bogdanm | 89:552587b429a1 | 258 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); |
bogdanm | 89:552587b429a1 | 259 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
bogdanm | 89:552587b429a1 | 260 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); |
bogdanm | 89:552587b429a1 | 261 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); |
bogdanm | 89:552587b429a1 | 262 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); |
bogdanm | 89:552587b429a1 | 263 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); |
bogdanm | 89:552587b429a1 | 264 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length); |
bogdanm | 89:552587b429a1 | 265 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc); |
bogdanm | 89:552587b429a1 | 266 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc); |
bogdanm | 89:552587b429a1 | 267 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); |
bogdanm | 89:552587b429a1 | 268 | |
bogdanm | 89:552587b429a1 | 269 | /* Peripheral Control functions *************************************************/ |
bogdanm | 89:552587b429a1 | 270 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); |
bogdanm | 89:552587b429a1 | 271 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode); |
bogdanm | 89:552587b429a1 | 272 | |
bogdanm | 89:552587b429a1 | 273 | /** |
bogdanm | 89:552587b429a1 | 274 | * @} |
bogdanm | 89:552587b429a1 | 275 | */ |
bogdanm | 89:552587b429a1 | 276 | |
bogdanm | 89:552587b429a1 | 277 | /** |
bogdanm | 89:552587b429a1 | 278 | * @} |
bogdanm | 89:552587b429a1 | 279 | */ |
bogdanm | 89:552587b429a1 | 280 | |
bogdanm | 89:552587b429a1 | 281 | #ifdef __cplusplus |
bogdanm | 89:552587b429a1 | 282 | } |
bogdanm | 89:552587b429a1 | 283 | #endif |
bogdanm | 89:552587b429a1 | 284 | |
bogdanm | 89:552587b429a1 | 285 | #endif /*__STM32F4xx_ADC_EX_H */ |
bogdanm | 89:552587b429a1 | 286 | |
bogdanm | 89:552587b429a1 | 287 | |
bogdanm | 89:552587b429a1 | 288 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |