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TARGET_ARCH_MAX/stm32f4xx_hal_dac.h@89:552587b429a1, 2014-09-12 (annotated)
- Committer:
- bogdanm
- Date:
- Fri Sep 12 16:41:52 2014 +0100
- Revision:
- 89:552587b429a1
- Child:
- 92:4fc01daae5a5
Release 89 of the mbed library
Main changes:
- low power optimizations for Nordic targets
- code structure changes for Freescale K64F targets
- bug fixes in various backends
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
bogdanm | 89:552587b429a1 | 1 | /** |
bogdanm | 89:552587b429a1 | 2 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 3 | * @file stm32f4xx_hal_dac.h |
bogdanm | 89:552587b429a1 | 4 | * @author MCD Application Team |
bogdanm | 89:552587b429a1 | 5 | * @version V1.1.0RC2 |
bogdanm | 89:552587b429a1 | 6 | * @date 14-May-2014 |
bogdanm | 89:552587b429a1 | 7 | * @brief Header file of DAC HAL module. |
bogdanm | 89:552587b429a1 | 8 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 9 | * @attention |
bogdanm | 89:552587b429a1 | 10 | * |
bogdanm | 89:552587b429a1 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
bogdanm | 89:552587b429a1 | 12 | * |
bogdanm | 89:552587b429a1 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
bogdanm | 89:552587b429a1 | 14 | * are permitted provided that the following conditions are met: |
bogdanm | 89:552587b429a1 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
bogdanm | 89:552587b429a1 | 16 | * this list of conditions and the following disclaimer. |
bogdanm | 89:552587b429a1 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
bogdanm | 89:552587b429a1 | 18 | * this list of conditions and the following disclaimer in the documentation |
bogdanm | 89:552587b429a1 | 19 | * and/or other materials provided with the distribution. |
bogdanm | 89:552587b429a1 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
bogdanm | 89:552587b429a1 | 21 | * may be used to endorse or promote products derived from this software |
bogdanm | 89:552587b429a1 | 22 | * without specific prior written permission. |
bogdanm | 89:552587b429a1 | 23 | * |
bogdanm | 89:552587b429a1 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
bogdanm | 89:552587b429a1 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
bogdanm | 89:552587b429a1 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
bogdanm | 89:552587b429a1 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
bogdanm | 89:552587b429a1 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
bogdanm | 89:552587b429a1 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
bogdanm | 89:552587b429a1 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
bogdanm | 89:552587b429a1 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
bogdanm | 89:552587b429a1 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
bogdanm | 89:552587b429a1 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
bogdanm | 89:552587b429a1 | 34 | * |
bogdanm | 89:552587b429a1 | 35 | ****************************************************************************** |
bogdanm | 89:552587b429a1 | 36 | */ |
bogdanm | 89:552587b429a1 | 37 | |
bogdanm | 89:552587b429a1 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
bogdanm | 89:552587b429a1 | 39 | #ifndef __STM32F4xx_HAL_DAC_H |
bogdanm | 89:552587b429a1 | 40 | #define __STM32F4xx_HAL_DAC_H |
bogdanm | 89:552587b429a1 | 41 | |
bogdanm | 89:552587b429a1 | 42 | #ifdef __cplusplus |
bogdanm | 89:552587b429a1 | 43 | extern "C" { |
bogdanm | 89:552587b429a1 | 44 | #endif |
bogdanm | 89:552587b429a1 | 45 | |
bogdanm | 89:552587b429a1 | 46 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
bogdanm | 89:552587b429a1 | 47 | |
bogdanm | 89:552587b429a1 | 48 | /* Includes ------------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 49 | #include "stm32f4xx_hal_def.h" |
bogdanm | 89:552587b429a1 | 50 | |
bogdanm | 89:552587b429a1 | 51 | /** @addtogroup STM32F4xx_HAL_Driver |
bogdanm | 89:552587b429a1 | 52 | * @{ |
bogdanm | 89:552587b429a1 | 53 | */ |
bogdanm | 89:552587b429a1 | 54 | |
bogdanm | 89:552587b429a1 | 55 | /** @addtogroup DAC |
bogdanm | 89:552587b429a1 | 56 | * @{ |
bogdanm | 89:552587b429a1 | 57 | */ |
bogdanm | 89:552587b429a1 | 58 | |
bogdanm | 89:552587b429a1 | 59 | /* Exported types ------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 60 | |
bogdanm | 89:552587b429a1 | 61 | /** |
bogdanm | 89:552587b429a1 | 62 | * @brief HAL State structures definition |
bogdanm | 89:552587b429a1 | 63 | */ |
bogdanm | 89:552587b429a1 | 64 | typedef enum |
bogdanm | 89:552587b429a1 | 65 | { |
bogdanm | 89:552587b429a1 | 66 | HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */ |
bogdanm | 89:552587b429a1 | 67 | HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */ |
bogdanm | 89:552587b429a1 | 68 | HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */ |
bogdanm | 89:552587b429a1 | 69 | HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */ |
bogdanm | 89:552587b429a1 | 70 | HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */ |
bogdanm | 89:552587b429a1 | 71 | }HAL_DAC_StateTypeDef; |
bogdanm | 89:552587b429a1 | 72 | |
bogdanm | 89:552587b429a1 | 73 | /** |
bogdanm | 89:552587b429a1 | 74 | * @brief DAC handle Structure definition |
bogdanm | 89:552587b429a1 | 75 | */ |
bogdanm | 89:552587b429a1 | 76 | typedef struct |
bogdanm | 89:552587b429a1 | 77 | { |
bogdanm | 89:552587b429a1 | 78 | DAC_TypeDef *Instance; /*!< Register base address */ |
bogdanm | 89:552587b429a1 | 79 | |
bogdanm | 89:552587b429a1 | 80 | __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
bogdanm | 89:552587b429a1 | 81 | |
bogdanm | 89:552587b429a1 | 82 | HAL_LockTypeDef Lock; /*!< DAC locking object */ |
bogdanm | 89:552587b429a1 | 83 | |
bogdanm | 89:552587b429a1 | 84 | DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ |
bogdanm | 89:552587b429a1 | 85 | |
bogdanm | 89:552587b429a1 | 86 | DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ |
bogdanm | 89:552587b429a1 | 87 | |
bogdanm | 89:552587b429a1 | 88 | __IO uint32_t ErrorCode; /*!< DAC Error code */ |
bogdanm | 89:552587b429a1 | 89 | |
bogdanm | 89:552587b429a1 | 90 | }DAC_HandleTypeDef; |
bogdanm | 89:552587b429a1 | 91 | |
bogdanm | 89:552587b429a1 | 92 | /** |
bogdanm | 89:552587b429a1 | 93 | * @brief DAC Configuration regular Channel structure definition |
bogdanm | 89:552587b429a1 | 94 | */ |
bogdanm | 89:552587b429a1 | 95 | typedef struct |
bogdanm | 89:552587b429a1 | 96 | { |
bogdanm | 89:552587b429a1 | 97 | uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. |
bogdanm | 89:552587b429a1 | 98 | This parameter can be a value of @ref DAC_trigger_selection */ |
bogdanm | 89:552587b429a1 | 99 | |
bogdanm | 89:552587b429a1 | 100 | uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. |
bogdanm | 89:552587b429a1 | 101 | This parameter can be a value of @ref DAC_output_buffer */ |
bogdanm | 89:552587b429a1 | 102 | }DAC_ChannelConfTypeDef; |
bogdanm | 89:552587b429a1 | 103 | |
bogdanm | 89:552587b429a1 | 104 | /* Exported constants --------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 105 | |
bogdanm | 89:552587b429a1 | 106 | /** @defgroup DAC_Error_Code |
bogdanm | 89:552587b429a1 | 107 | * @{ |
bogdanm | 89:552587b429a1 | 108 | */ |
bogdanm | 89:552587b429a1 | 109 | #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */ |
bogdanm | 89:552587b429a1 | 110 | #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DAM underrun error */ |
bogdanm | 89:552587b429a1 | 111 | #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DAM underrun error */ |
bogdanm | 89:552587b429a1 | 112 | #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */ |
bogdanm | 89:552587b429a1 | 113 | /** |
bogdanm | 89:552587b429a1 | 114 | * @} |
bogdanm | 89:552587b429a1 | 115 | */ |
bogdanm | 89:552587b429a1 | 116 | |
bogdanm | 89:552587b429a1 | 117 | /** @defgroup DAC_trigger_selection |
bogdanm | 89:552587b429a1 | 118 | * @{ |
bogdanm | 89:552587b429a1 | 119 | */ |
bogdanm | 89:552587b429a1 | 120 | |
bogdanm | 89:552587b429a1 | 121 | #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register |
bogdanm | 89:552587b429a1 | 122 | has been loaded, and not by external trigger */ |
bogdanm | 89:552587b429a1 | 123 | #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ |
bogdanm | 89:552587b429a1 | 124 | #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ |
bogdanm | 89:552587b429a1 | 125 | #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ |
bogdanm | 89:552587b429a1 | 126 | #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ |
bogdanm | 89:552587b429a1 | 127 | #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ |
bogdanm | 89:552587b429a1 | 128 | #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ |
bogdanm | 89:552587b429a1 | 129 | |
bogdanm | 89:552587b429a1 | 130 | #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ |
bogdanm | 89:552587b429a1 | 131 | #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ |
bogdanm | 89:552587b429a1 | 132 | |
bogdanm | 89:552587b429a1 | 133 | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
bogdanm | 89:552587b429a1 | 134 | ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ |
bogdanm | 89:552587b429a1 | 135 | ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \ |
bogdanm | 89:552587b429a1 | 136 | ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ |
bogdanm | 89:552587b429a1 | 137 | ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \ |
bogdanm | 89:552587b429a1 | 138 | ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ |
bogdanm | 89:552587b429a1 | 139 | ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \ |
bogdanm | 89:552587b429a1 | 140 | ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ |
bogdanm | 89:552587b429a1 | 141 | ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
bogdanm | 89:552587b429a1 | 142 | /** |
bogdanm | 89:552587b429a1 | 143 | * @} |
bogdanm | 89:552587b429a1 | 144 | */ |
bogdanm | 89:552587b429a1 | 145 | |
bogdanm | 89:552587b429a1 | 146 | /** @defgroup DAC_output_buffer |
bogdanm | 89:552587b429a1 | 147 | * @{ |
bogdanm | 89:552587b429a1 | 148 | */ |
bogdanm | 89:552587b429a1 | 149 | #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000) |
bogdanm | 89:552587b429a1 | 150 | #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) |
bogdanm | 89:552587b429a1 | 151 | |
bogdanm | 89:552587b429a1 | 152 | #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
bogdanm | 89:552587b429a1 | 153 | ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
bogdanm | 89:552587b429a1 | 154 | /** |
bogdanm | 89:552587b429a1 | 155 | * @} |
bogdanm | 89:552587b429a1 | 156 | */ |
bogdanm | 89:552587b429a1 | 157 | |
bogdanm | 89:552587b429a1 | 158 | /** @defgroup DAC_Channel_selection |
bogdanm | 89:552587b429a1 | 159 | * @{ |
bogdanm | 89:552587b429a1 | 160 | */ |
bogdanm | 89:552587b429a1 | 161 | #define DAC_CHANNEL_1 ((uint32_t)0x00000000) |
bogdanm | 89:552587b429a1 | 162 | #define DAC_CHANNEL_2 ((uint32_t)0x00000010) |
bogdanm | 89:552587b429a1 | 163 | |
bogdanm | 89:552587b429a1 | 164 | #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ |
bogdanm | 89:552587b429a1 | 165 | ((CHANNEL) == DAC_CHANNEL_2)) |
bogdanm | 89:552587b429a1 | 166 | /** |
bogdanm | 89:552587b429a1 | 167 | * @} |
bogdanm | 89:552587b429a1 | 168 | */ |
bogdanm | 89:552587b429a1 | 169 | |
bogdanm | 89:552587b429a1 | 170 | /** @defgroup DAC_data_alignement |
bogdanm | 89:552587b429a1 | 171 | * @{ |
bogdanm | 89:552587b429a1 | 172 | */ |
bogdanm | 89:552587b429a1 | 173 | #define DAC_ALIGN_12B_R ((uint32_t)0x00000000) |
bogdanm | 89:552587b429a1 | 174 | #define DAC_ALIGN_12B_L ((uint32_t)0x00000004) |
bogdanm | 89:552587b429a1 | 175 | #define DAC_ALIGN_8B_R ((uint32_t)0x00000008) |
bogdanm | 89:552587b429a1 | 176 | |
bogdanm | 89:552587b429a1 | 177 | #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
bogdanm | 89:552587b429a1 | 178 | ((ALIGN) == DAC_ALIGN_12B_L) || \ |
bogdanm | 89:552587b429a1 | 179 | ((ALIGN) == DAC_ALIGN_8B_R)) |
bogdanm | 89:552587b429a1 | 180 | /** |
bogdanm | 89:552587b429a1 | 181 | * @} |
bogdanm | 89:552587b429a1 | 182 | */ |
bogdanm | 89:552587b429a1 | 183 | |
bogdanm | 89:552587b429a1 | 184 | /** @defgroup DAC_data |
bogdanm | 89:552587b429a1 | 185 | * @{ |
bogdanm | 89:552587b429a1 | 186 | */ |
bogdanm | 89:552587b429a1 | 187 | #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) |
bogdanm | 89:552587b429a1 | 188 | /** |
bogdanm | 89:552587b429a1 | 189 | * @} |
bogdanm | 89:552587b429a1 | 190 | */ |
bogdanm | 89:552587b429a1 | 191 | |
bogdanm | 89:552587b429a1 | 192 | /** @defgroup DAC_flags_definition |
bogdanm | 89:552587b429a1 | 193 | * @{ |
bogdanm | 89:552587b429a1 | 194 | */ |
bogdanm | 89:552587b429a1 | 195 | #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
bogdanm | 89:552587b429a1 | 196 | #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
bogdanm | 89:552587b429a1 | 197 | |
bogdanm | 89:552587b429a1 | 198 | #define IS_DAC_FLAG(FLAG) (((FLAG) == DAC_FLAG_DMAUDR1) || \ |
bogdanm | 89:552587b429a1 | 199 | ((FLAG) == DAC_FLAG_DMAUDR2)) |
bogdanm | 89:552587b429a1 | 200 | /** |
bogdanm | 89:552587b429a1 | 201 | * @} |
bogdanm | 89:552587b429a1 | 202 | */ |
bogdanm | 89:552587b429a1 | 203 | |
bogdanm | 89:552587b429a1 | 204 | /** @defgroup DAC_IT_definition |
bogdanm | 89:552587b429a1 | 205 | * @{ |
bogdanm | 89:552587b429a1 | 206 | */ |
bogdanm | 89:552587b429a1 | 207 | #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
bogdanm | 89:552587b429a1 | 208 | #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
bogdanm | 89:552587b429a1 | 209 | |
bogdanm | 89:552587b429a1 | 210 | #define IS_DAC_IT(IT) (((IT) == DAC_IT_DMAUDR1) || \ |
bogdanm | 89:552587b429a1 | 211 | ((IT) == DAC_IT_DMAUDR2)) |
bogdanm | 89:552587b429a1 | 212 | /** |
bogdanm | 89:552587b429a1 | 213 | * @} |
bogdanm | 89:552587b429a1 | 214 | */ |
bogdanm | 89:552587b429a1 | 215 | |
bogdanm | 89:552587b429a1 | 216 | /* Exported macro ------------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 217 | |
bogdanm | 89:552587b429a1 | 218 | /** @brief Reset DAC handle state |
bogdanm | 89:552587b429a1 | 219 | * @param __HANDLE__: specifies the DAC handle. |
bogdanm | 89:552587b429a1 | 220 | * @retval None |
bogdanm | 89:552587b429a1 | 221 | */ |
bogdanm | 89:552587b429a1 | 222 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) |
bogdanm | 89:552587b429a1 | 223 | |
bogdanm | 89:552587b429a1 | 224 | /** @brief Enable the DAC channel |
bogdanm | 89:552587b429a1 | 225 | * @param __HANDLE__: specifies the DAC handle. |
bogdanm | 89:552587b429a1 | 226 | * @param __DAC_Channel__: specifies the DAC channel |
bogdanm | 89:552587b429a1 | 227 | * @retval None |
bogdanm | 89:552587b429a1 | 228 | */ |
bogdanm | 89:552587b429a1 | 229 | #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ |
bogdanm | 89:552587b429a1 | 230 | ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) |
bogdanm | 89:552587b429a1 | 231 | |
bogdanm | 89:552587b429a1 | 232 | /** @brief Disable the DAC channel |
bogdanm | 89:552587b429a1 | 233 | * @param __HANDLE__: specifies the DAC handle |
bogdanm | 89:552587b429a1 | 234 | * @param __DAC_Channel__: specifies the DAC channel. |
bogdanm | 89:552587b429a1 | 235 | * @retval None |
bogdanm | 89:552587b429a1 | 236 | */ |
bogdanm | 89:552587b429a1 | 237 | #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ |
bogdanm | 89:552587b429a1 | 238 | ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) |
bogdanm | 89:552587b429a1 | 239 | |
bogdanm | 89:552587b429a1 | 240 | /** @brief Set DHR12R1 alignment |
bogdanm | 89:552587b429a1 | 241 | * @param __ALIGNEMENT__: specifies the DAC alignement |
bogdanm | 89:552587b429a1 | 242 | * @retval None |
bogdanm | 89:552587b429a1 | 243 | */ |
bogdanm | 89:552587b429a1 | 244 | #define __HAL_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008) + (__ALIGNEMENT__)) |
bogdanm | 89:552587b429a1 | 245 | |
bogdanm | 89:552587b429a1 | 246 | /** @brief Set DHR12R2 alignment |
bogdanm | 89:552587b429a1 | 247 | * @param __ALIGNEMENT__: specifies the DAC alignement |
bogdanm | 89:552587b429a1 | 248 | * @retval None |
bogdanm | 89:552587b429a1 | 249 | */ |
bogdanm | 89:552587b429a1 | 250 | #define __HAL_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014) + (__ALIGNEMENT__)) |
bogdanm | 89:552587b429a1 | 251 | |
bogdanm | 89:552587b429a1 | 252 | /** @brief Set DHR12RD alignment |
bogdanm | 89:552587b429a1 | 253 | * @param __ALIGNEMENT__: specifies the DAC alignement |
bogdanm | 89:552587b429a1 | 254 | * @retval None |
bogdanm | 89:552587b429a1 | 255 | */ |
bogdanm | 89:552587b429a1 | 256 | #define __HAL_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020) + (__ALIGNEMENT__)) |
bogdanm | 89:552587b429a1 | 257 | |
bogdanm | 89:552587b429a1 | 258 | /** @brief Enable the DAC interrupt |
bogdanm | 89:552587b429a1 | 259 | * @param __HANDLE__: specifies the DAC handle |
bogdanm | 89:552587b429a1 | 260 | * @param __INTERRUPT__: specifies the DAC interrupt. |
bogdanm | 89:552587b429a1 | 261 | * @retval None |
bogdanm | 89:552587b429a1 | 262 | */ |
bogdanm | 89:552587b429a1 | 263 | #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) |
bogdanm | 89:552587b429a1 | 264 | |
bogdanm | 89:552587b429a1 | 265 | /** @brief Disable the DAC interrupt |
bogdanm | 89:552587b429a1 | 266 | * @param __HANDLE__: specifies the DAC handle |
bogdanm | 89:552587b429a1 | 267 | * @param __INTERRUPT__: specifies the DAC interrupt. |
bogdanm | 89:552587b429a1 | 268 | * @retval None |
bogdanm | 89:552587b429a1 | 269 | */ |
bogdanm | 89:552587b429a1 | 270 | #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) |
bogdanm | 89:552587b429a1 | 271 | |
bogdanm | 89:552587b429a1 | 272 | /** @brief Get the selected DAC's flag status. |
bogdanm | 89:552587b429a1 | 273 | * @param __HANDLE__: specifies the DAC handle. |
bogdanm | 89:552587b429a1 | 274 | * @retval None |
bogdanm | 89:552587b429a1 | 275 | */ |
bogdanm | 89:552587b429a1 | 276 | #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
bogdanm | 89:552587b429a1 | 277 | |
bogdanm | 89:552587b429a1 | 278 | /** @brief Clear the DAC's flag. |
bogdanm | 89:552587b429a1 | 279 | * @param __HANDLE__: specifies the DAC handle. |
bogdanm | 89:552587b429a1 | 280 | * @retval None |
bogdanm | 89:552587b429a1 | 281 | */ |
bogdanm | 89:552587b429a1 | 282 | #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) |= (__FLAG__)) |
bogdanm | 89:552587b429a1 | 283 | |
bogdanm | 89:552587b429a1 | 284 | /* Include DAC HAL Extension module */ |
bogdanm | 89:552587b429a1 | 285 | #include "stm32f4xx_hal_dac_ex.h" |
bogdanm | 89:552587b429a1 | 286 | |
bogdanm | 89:552587b429a1 | 287 | /* Exported functions --------------------------------------------------------*/ |
bogdanm | 89:552587b429a1 | 288 | /* Initialization/de-initialization functions *********************************/ |
bogdanm | 89:552587b429a1 | 289 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); |
bogdanm | 89:552587b429a1 | 290 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); |
bogdanm | 89:552587b429a1 | 291 | void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); |
bogdanm | 89:552587b429a1 | 292 | void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); |
bogdanm | 89:552587b429a1 | 293 | |
bogdanm | 89:552587b429a1 | 294 | /* I/O operation functions ****************************************************/ |
bogdanm | 89:552587b429a1 | 295 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); |
bogdanm | 89:552587b429a1 | 296 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); |
bogdanm | 89:552587b429a1 | 297 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); |
bogdanm | 89:552587b429a1 | 298 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); |
bogdanm | 89:552587b429a1 | 299 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); |
bogdanm | 89:552587b429a1 | 300 | |
bogdanm | 89:552587b429a1 | 301 | /* Peripheral Control functions ***********************************************/ |
bogdanm | 89:552587b429a1 | 302 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); |
bogdanm | 89:552587b429a1 | 303 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
bogdanm | 89:552587b429a1 | 304 | |
bogdanm | 89:552587b429a1 | 305 | /* Peripheral State functions *************************************************/ |
bogdanm | 89:552587b429a1 | 306 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); |
bogdanm | 89:552587b429a1 | 307 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); |
bogdanm | 89:552587b429a1 | 308 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
bogdanm | 89:552587b429a1 | 309 | |
bogdanm | 89:552587b429a1 | 310 | void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
bogdanm | 89:552587b429a1 | 311 | void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
bogdanm | 89:552587b429a1 | 312 | void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
bogdanm | 89:552587b429a1 | 313 | void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
bogdanm | 89:552587b429a1 | 314 | |
bogdanm | 89:552587b429a1 | 315 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
bogdanm | 89:552587b429a1 | 316 | |
bogdanm | 89:552587b429a1 | 317 | /** |
bogdanm | 89:552587b429a1 | 318 | * @} |
bogdanm | 89:552587b429a1 | 319 | */ |
bogdanm | 89:552587b429a1 | 320 | |
bogdanm | 89:552587b429a1 | 321 | /** |
bogdanm | 89:552587b429a1 | 322 | * @} |
bogdanm | 89:552587b429a1 | 323 | */ |
bogdanm | 89:552587b429a1 | 324 | |
bogdanm | 89:552587b429a1 | 325 | #ifdef __cplusplus |
bogdanm | 89:552587b429a1 | 326 | } |
bogdanm | 89:552587b429a1 | 327 | #endif |
bogdanm | 89:552587b429a1 | 328 | |
bogdanm | 89:552587b429a1 | 329 | #endif /*__STM32F4xx_HAL_DAC_H */ |
bogdanm | 89:552587b429a1 | 330 | |
bogdanm | 89:552587b429a1 | 331 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |