Egor Rumjantsev
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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal_can.h@92:4fc01daae5a5, 2014-11-27 (annotated)
- Committer:
- bogdanm
- Date:
- Thu Nov 27 13:33:22 2014 +0000
- Revision:
- 92:4fc01daae5a5
Release 92 of the mbed libray
Main changes:
- nRF51822: fixed pin assignment issues
- ST targets moving to the STM32Cube driver
- LPC1439: fixed serial interrupt issue
- first Cortex-A platform supported in mbed (RZ_A1H)
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 92:4fc01daae5a5 | 1 | /** |
| bogdanm | 92:4fc01daae5a5 | 2 | ****************************************************************************** |
| bogdanm | 92:4fc01daae5a5 | 3 | * @file stm32f4xx_hal_can.h |
| bogdanm | 92:4fc01daae5a5 | 4 | * @author MCD Application Team |
| bogdanm | 92:4fc01daae5a5 | 5 | * @version V1.1.0 |
| bogdanm | 92:4fc01daae5a5 | 6 | * @date 19-June-2014 |
| bogdanm | 92:4fc01daae5a5 | 7 | * @brief Header file of CAN HAL module. |
| bogdanm | 92:4fc01daae5a5 | 8 | ****************************************************************************** |
| bogdanm | 92:4fc01daae5a5 | 9 | * @attention |
| bogdanm | 92:4fc01daae5a5 | 10 | * |
| bogdanm | 92:4fc01daae5a5 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 92:4fc01daae5a5 | 12 | * |
| bogdanm | 92:4fc01daae5a5 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 92:4fc01daae5a5 | 14 | * are permitted provided that the following conditions are met: |
| bogdanm | 92:4fc01daae5a5 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 92:4fc01daae5a5 | 16 | * this list of conditions and the following disclaimer. |
| bogdanm | 92:4fc01daae5a5 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 92:4fc01daae5a5 | 18 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 92:4fc01daae5a5 | 19 | * and/or other materials provided with the distribution. |
| bogdanm | 92:4fc01daae5a5 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 92:4fc01daae5a5 | 21 | * may be used to endorse or promote products derived from this software |
| bogdanm | 92:4fc01daae5a5 | 22 | * without specific prior written permission. |
| bogdanm | 92:4fc01daae5a5 | 23 | * |
| bogdanm | 92:4fc01daae5a5 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 92:4fc01daae5a5 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 92:4fc01daae5a5 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 92:4fc01daae5a5 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 92:4fc01daae5a5 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 92:4fc01daae5a5 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 92:4fc01daae5a5 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 92:4fc01daae5a5 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 92:4fc01daae5a5 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 92:4fc01daae5a5 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 92:4fc01daae5a5 | 34 | * |
| bogdanm | 92:4fc01daae5a5 | 35 | ****************************************************************************** |
| bogdanm | 92:4fc01daae5a5 | 36 | */ |
| bogdanm | 92:4fc01daae5a5 | 37 | |
| bogdanm | 92:4fc01daae5a5 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 39 | #ifndef __STM32F4xx_HAL_CAN_H |
| bogdanm | 92:4fc01daae5a5 | 40 | #define __STM32F4xx_HAL_CAN_H |
| bogdanm | 92:4fc01daae5a5 | 41 | |
| bogdanm | 92:4fc01daae5a5 | 42 | #ifdef __cplusplus |
| bogdanm | 92:4fc01daae5a5 | 43 | extern "C" { |
| bogdanm | 92:4fc01daae5a5 | 44 | #endif |
| bogdanm | 92:4fc01daae5a5 | 45 | |
| bogdanm | 92:4fc01daae5a5 | 46 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| bogdanm | 92:4fc01daae5a5 | 47 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 48 | #include "stm32f4xx_hal_def.h" |
| bogdanm | 92:4fc01daae5a5 | 49 | |
| bogdanm | 92:4fc01daae5a5 | 50 | /** @addtogroup STM32F4xx_HAL_Driver |
| bogdanm | 92:4fc01daae5a5 | 51 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 52 | */ |
| bogdanm | 92:4fc01daae5a5 | 53 | |
| bogdanm | 92:4fc01daae5a5 | 54 | /** @addtogroup CAN |
| bogdanm | 92:4fc01daae5a5 | 55 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 56 | */ |
| bogdanm | 92:4fc01daae5a5 | 57 | |
| bogdanm | 92:4fc01daae5a5 | 58 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 59 | |
| bogdanm | 92:4fc01daae5a5 | 60 | /** |
| bogdanm | 92:4fc01daae5a5 | 61 | * @brief HAL State structures definition |
| bogdanm | 92:4fc01daae5a5 | 62 | */ |
| bogdanm | 92:4fc01daae5a5 | 63 | typedef enum |
| bogdanm | 92:4fc01daae5a5 | 64 | { |
| bogdanm | 92:4fc01daae5a5 | 65 | HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */ |
| bogdanm | 92:4fc01daae5a5 | 66 | HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */ |
| bogdanm | 92:4fc01daae5a5 | 67 | HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */ |
| bogdanm | 92:4fc01daae5a5 | 68 | HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */ |
| bogdanm | 92:4fc01daae5a5 | 69 | HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */ |
| bogdanm | 92:4fc01daae5a5 | 70 | HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */ |
| bogdanm | 92:4fc01daae5a5 | 71 | HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| bogdanm | 92:4fc01daae5a5 | 72 | HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */ |
| bogdanm | 92:4fc01daae5a5 | 73 | |
| bogdanm | 92:4fc01daae5a5 | 74 | }HAL_CAN_StateTypeDef; |
| bogdanm | 92:4fc01daae5a5 | 75 | |
| bogdanm | 92:4fc01daae5a5 | 76 | /** |
| bogdanm | 92:4fc01daae5a5 | 77 | * @brief CAN init structure definition |
| bogdanm | 92:4fc01daae5a5 | 78 | */ |
| bogdanm | 92:4fc01daae5a5 | 79 | typedef struct |
| bogdanm | 92:4fc01daae5a5 | 80 | { |
| bogdanm | 92:4fc01daae5a5 | 81 | uint32_t Prescaler; /*!< Specifies the length of a time quantum. |
| bogdanm | 92:4fc01daae5a5 | 82 | This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */ |
| bogdanm | 92:4fc01daae5a5 | 83 | |
| bogdanm | 92:4fc01daae5a5 | 84 | uint32_t Mode; /*!< Specifies the CAN operating mode. |
| bogdanm | 92:4fc01daae5a5 | 85 | This parameter can be a value of @ref CAN_operating_mode */ |
| bogdanm | 92:4fc01daae5a5 | 86 | |
| bogdanm | 92:4fc01daae5a5 | 87 | uint32_t SJW; /*!< Specifies the maximum number of time quanta |
| bogdanm | 92:4fc01daae5a5 | 88 | the CAN hardware is allowed to lengthen or |
| bogdanm | 92:4fc01daae5a5 | 89 | shorten a bit to perform resynchronization. |
| bogdanm | 92:4fc01daae5a5 | 90 | This parameter can be a value of @ref CAN_synchronisation_jump_width */ |
| bogdanm | 92:4fc01daae5a5 | 91 | |
| bogdanm | 92:4fc01daae5a5 | 92 | uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1. |
| bogdanm | 92:4fc01daae5a5 | 93 | This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ |
| bogdanm | 92:4fc01daae5a5 | 94 | |
| bogdanm | 92:4fc01daae5a5 | 95 | uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2. |
| bogdanm | 92:4fc01daae5a5 | 96 | This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ |
| bogdanm | 92:4fc01daae5a5 | 97 | |
| bogdanm | 92:4fc01daae5a5 | 98 | uint32_t TTCM; /*!< Enable or disable the time triggered communication mode. |
| bogdanm | 92:4fc01daae5a5 | 99 | This parameter can be set to ENABLE or DISABLE. */ |
| bogdanm | 92:4fc01daae5a5 | 100 | |
| bogdanm | 92:4fc01daae5a5 | 101 | uint32_t ABOM; /*!< Enable or disable the automatic bus-off management. |
| bogdanm | 92:4fc01daae5a5 | 102 | This parameter can be set to ENABLE or DISABLE */ |
| bogdanm | 92:4fc01daae5a5 | 103 | |
| bogdanm | 92:4fc01daae5a5 | 104 | uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode. |
| bogdanm | 92:4fc01daae5a5 | 105 | This parameter can be set to ENABLE or DISABLE */ |
| bogdanm | 92:4fc01daae5a5 | 106 | |
| bogdanm | 92:4fc01daae5a5 | 107 | uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode. |
| bogdanm | 92:4fc01daae5a5 | 108 | This parameter can be set to ENABLE or DISABLE */ |
| bogdanm | 92:4fc01daae5a5 | 109 | |
| bogdanm | 92:4fc01daae5a5 | 110 | uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode. |
| bogdanm | 92:4fc01daae5a5 | 111 | This parameter can be set to ENABLE or DISABLE */ |
| bogdanm | 92:4fc01daae5a5 | 112 | |
| bogdanm | 92:4fc01daae5a5 | 113 | uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority. |
| bogdanm | 92:4fc01daae5a5 | 114 | This parameter can be set to ENABLE or DISABLE */ |
| bogdanm | 92:4fc01daae5a5 | 115 | }CAN_InitTypeDef; |
| bogdanm | 92:4fc01daae5a5 | 116 | |
| bogdanm | 92:4fc01daae5a5 | 117 | /** |
| bogdanm | 92:4fc01daae5a5 | 118 | * @brief CAN filter configuration structure definition |
| bogdanm | 92:4fc01daae5a5 | 119 | */ |
| bogdanm | 92:4fc01daae5a5 | 120 | typedef struct |
| bogdanm | 92:4fc01daae5a5 | 121 | { |
| bogdanm | 92:4fc01daae5a5 | 122 | uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit |
| bogdanm | 92:4fc01daae5a5 | 123 | configuration, first one for a 16-bit configuration). |
| bogdanm | 92:4fc01daae5a5 | 124 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ |
| bogdanm | 92:4fc01daae5a5 | 125 | |
| bogdanm | 92:4fc01daae5a5 | 126 | uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit |
| bogdanm | 92:4fc01daae5a5 | 127 | configuration, second one for a 16-bit configuration). |
| bogdanm | 92:4fc01daae5a5 | 128 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ |
| bogdanm | 92:4fc01daae5a5 | 129 | |
| bogdanm | 92:4fc01daae5a5 | 130 | uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, |
| bogdanm | 92:4fc01daae5a5 | 131 | according to the mode (MSBs for a 32-bit configuration, |
| bogdanm | 92:4fc01daae5a5 | 132 | first one for a 16-bit configuration). |
| bogdanm | 92:4fc01daae5a5 | 133 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ |
| bogdanm | 92:4fc01daae5a5 | 134 | |
| bogdanm | 92:4fc01daae5a5 | 135 | uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, |
| bogdanm | 92:4fc01daae5a5 | 136 | according to the mode (LSBs for a 32-bit configuration, |
| bogdanm | 92:4fc01daae5a5 | 137 | second one for a 16-bit configuration). |
| bogdanm | 92:4fc01daae5a5 | 138 | This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ |
| bogdanm | 92:4fc01daae5a5 | 139 | |
| bogdanm | 92:4fc01daae5a5 | 140 | uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. |
| bogdanm | 92:4fc01daae5a5 | 141 | This parameter can be a value of @ref CAN_filter_FIFO */ |
| bogdanm | 92:4fc01daae5a5 | 142 | |
| bogdanm | 92:4fc01daae5a5 | 143 | uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. |
| bogdanm | 92:4fc01daae5a5 | 144 | This parameter must be a number between Min_Data = 0 and Max_Data = 27 */ |
| bogdanm | 92:4fc01daae5a5 | 145 | |
| bogdanm | 92:4fc01daae5a5 | 146 | uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. |
| bogdanm | 92:4fc01daae5a5 | 147 | This parameter can be a value of @ref CAN_filter_mode */ |
| bogdanm | 92:4fc01daae5a5 | 148 | |
| bogdanm | 92:4fc01daae5a5 | 149 | uint32_t FilterScale; /*!< Specifies the filter scale. |
| bogdanm | 92:4fc01daae5a5 | 150 | This parameter can be a value of @ref CAN_filter_scale */ |
| bogdanm | 92:4fc01daae5a5 | 151 | |
| bogdanm | 92:4fc01daae5a5 | 152 | uint32_t FilterActivation; /*!< Enable or disable the filter. |
| bogdanm | 92:4fc01daae5a5 | 153 | This parameter can be set to ENABLE or DISABLE. */ |
| bogdanm | 92:4fc01daae5a5 | 154 | |
| bogdanm | 92:4fc01daae5a5 | 155 | uint32_t BankNumber; /*!< Select the start slave bank filter. |
| bogdanm | 92:4fc01daae5a5 | 156 | This parameter must be a number between Min_Data = 0 and Max_Data = 28 */ |
| bogdanm | 92:4fc01daae5a5 | 157 | |
| bogdanm | 92:4fc01daae5a5 | 158 | }CAN_FilterConfTypeDef; |
| bogdanm | 92:4fc01daae5a5 | 159 | |
| bogdanm | 92:4fc01daae5a5 | 160 | /** |
| bogdanm | 92:4fc01daae5a5 | 161 | * @brief CAN Tx message structure definition |
| bogdanm | 92:4fc01daae5a5 | 162 | */ |
| bogdanm | 92:4fc01daae5a5 | 163 | typedef struct |
| bogdanm | 92:4fc01daae5a5 | 164 | { |
| bogdanm | 92:4fc01daae5a5 | 165 | uint32_t StdId; /*!< Specifies the standard identifier. |
| bogdanm | 92:4fc01daae5a5 | 166 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */ |
| bogdanm | 92:4fc01daae5a5 | 167 | |
| bogdanm | 92:4fc01daae5a5 | 168 | uint32_t ExtId; /*!< Specifies the extended identifier. |
| bogdanm | 92:4fc01daae5a5 | 169 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */ |
| bogdanm | 92:4fc01daae5a5 | 170 | |
| bogdanm | 92:4fc01daae5a5 | 171 | uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. |
| bogdanm | 92:4fc01daae5a5 | 172 | This parameter can be a value of @ref CAN_identifier_type */ |
| bogdanm | 92:4fc01daae5a5 | 173 | |
| bogdanm | 92:4fc01daae5a5 | 174 | uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. |
| bogdanm | 92:4fc01daae5a5 | 175 | This parameter can be a value of @ref CAN_remote_transmission_request */ |
| bogdanm | 92:4fc01daae5a5 | 176 | |
| bogdanm | 92:4fc01daae5a5 | 177 | uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. |
| bogdanm | 92:4fc01daae5a5 | 178 | This parameter must be a number between Min_Data = 0 and Max_Data = 8 */ |
| bogdanm | 92:4fc01daae5a5 | 179 | |
| bogdanm | 92:4fc01daae5a5 | 180 | uint32_t Data[8]; /*!< Contains the data to be transmitted. |
| bogdanm | 92:4fc01daae5a5 | 181 | This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ |
| bogdanm | 92:4fc01daae5a5 | 182 | |
| bogdanm | 92:4fc01daae5a5 | 183 | }CanTxMsgTypeDef; |
| bogdanm | 92:4fc01daae5a5 | 184 | |
| bogdanm | 92:4fc01daae5a5 | 185 | /** |
| bogdanm | 92:4fc01daae5a5 | 186 | * @brief CAN Rx message structure definition |
| bogdanm | 92:4fc01daae5a5 | 187 | */ |
| bogdanm | 92:4fc01daae5a5 | 188 | typedef struct |
| bogdanm | 92:4fc01daae5a5 | 189 | { |
| bogdanm | 92:4fc01daae5a5 | 190 | uint32_t StdId; /*!< Specifies the standard identifier. |
| bogdanm | 92:4fc01daae5a5 | 191 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */ |
| bogdanm | 92:4fc01daae5a5 | 192 | |
| bogdanm | 92:4fc01daae5a5 | 193 | uint32_t ExtId; /*!< Specifies the extended identifier. |
| bogdanm | 92:4fc01daae5a5 | 194 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */ |
| bogdanm | 92:4fc01daae5a5 | 195 | |
| bogdanm | 92:4fc01daae5a5 | 196 | uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received. |
| bogdanm | 92:4fc01daae5a5 | 197 | This parameter can be a value of @ref CAN_identifier_type */ |
| bogdanm | 92:4fc01daae5a5 | 198 | |
| bogdanm | 92:4fc01daae5a5 | 199 | uint32_t RTR; /*!< Specifies the type of frame for the received message. |
| bogdanm | 92:4fc01daae5a5 | 200 | This parameter can be a value of @ref CAN_remote_transmission_request */ |
| bogdanm | 92:4fc01daae5a5 | 201 | |
| bogdanm | 92:4fc01daae5a5 | 202 | uint32_t DLC; /*!< Specifies the length of the frame that will be received. |
| bogdanm | 92:4fc01daae5a5 | 203 | This parameter must be a number between Min_Data = 0 and Max_Data = 8 */ |
| bogdanm | 92:4fc01daae5a5 | 204 | |
| bogdanm | 92:4fc01daae5a5 | 205 | uint32_t Data[8]; /*!< Contains the data to be received. |
| bogdanm | 92:4fc01daae5a5 | 206 | This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ |
| bogdanm | 92:4fc01daae5a5 | 207 | |
| bogdanm | 92:4fc01daae5a5 | 208 | uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through. |
| bogdanm | 92:4fc01daae5a5 | 209 | This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ |
| bogdanm | 92:4fc01daae5a5 | 210 | |
| bogdanm | 92:4fc01daae5a5 | 211 | uint32_t FIFONumber; /*!< Specifies the receive FIFO number. |
| bogdanm | 92:4fc01daae5a5 | 212 | This parameter can be CAN_FIFO0 or CAN_FIFO1 */ |
| bogdanm | 92:4fc01daae5a5 | 213 | |
| bogdanm | 92:4fc01daae5a5 | 214 | }CanRxMsgTypeDef; |
| bogdanm | 92:4fc01daae5a5 | 215 | |
| bogdanm | 92:4fc01daae5a5 | 216 | /** |
| bogdanm | 92:4fc01daae5a5 | 217 | * @brief CAN handle Structure definition |
| bogdanm | 92:4fc01daae5a5 | 218 | */ |
| bogdanm | 92:4fc01daae5a5 | 219 | typedef struct |
| bogdanm | 92:4fc01daae5a5 | 220 | { |
| bogdanm | 92:4fc01daae5a5 | 221 | CAN_TypeDef *Instance; /*!< Register base address */ |
| bogdanm | 92:4fc01daae5a5 | 222 | |
| bogdanm | 92:4fc01daae5a5 | 223 | CAN_InitTypeDef Init; /*!< CAN required parameters */ |
| bogdanm | 92:4fc01daae5a5 | 224 | |
| bogdanm | 92:4fc01daae5a5 | 225 | CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */ |
| bogdanm | 92:4fc01daae5a5 | 226 | |
| bogdanm | 92:4fc01daae5a5 | 227 | CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */ |
| bogdanm | 92:4fc01daae5a5 | 228 | |
| bogdanm | 92:4fc01daae5a5 | 229 | __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ |
| bogdanm | 92:4fc01daae5a5 | 230 | |
| bogdanm | 92:4fc01daae5a5 | 231 | HAL_LockTypeDef Lock; /*!< CAN locking object */ |
| bogdanm | 92:4fc01daae5a5 | 232 | |
| bogdanm | 92:4fc01daae5a5 | 233 | __IO uint32_t ErrorCode; /*!< CAN Error code */ |
| bogdanm | 92:4fc01daae5a5 | 234 | |
| bogdanm | 92:4fc01daae5a5 | 235 | }CAN_HandleTypeDef; |
| bogdanm | 92:4fc01daae5a5 | 236 | |
| bogdanm | 92:4fc01daae5a5 | 237 | /* Exported constants --------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 238 | |
| bogdanm | 92:4fc01daae5a5 | 239 | /** @defgroup CAN_Exported_Constants |
| bogdanm | 92:4fc01daae5a5 | 240 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 241 | */ |
| bogdanm | 92:4fc01daae5a5 | 242 | |
| bogdanm | 92:4fc01daae5a5 | 243 | /** @defgroup HAL CAN Error Code |
| bogdanm | 92:4fc01daae5a5 | 244 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 245 | */ |
| bogdanm | 92:4fc01daae5a5 | 246 | #define HAL_CAN_ERROR_NONE 0x00 /*!< No error */ |
| bogdanm | 92:4fc01daae5a5 | 247 | #define HAL_CAN_ERROR_EWG 0x01 /*!< EWG error */ |
| bogdanm | 92:4fc01daae5a5 | 248 | #define HAL_CAN_ERROR_EPV 0x02 /*!< EPV error */ |
| bogdanm | 92:4fc01daae5a5 | 249 | #define HAL_CAN_ERROR_BOF 0x04 /*!< BOF error */ |
| bogdanm | 92:4fc01daae5a5 | 250 | #define HAL_CAN_ERROR_STF 0x08 /*!< Stuff error */ |
| bogdanm | 92:4fc01daae5a5 | 251 | #define HAL_CAN_ERROR_FOR 0x10 /*!< Form error */ |
| bogdanm | 92:4fc01daae5a5 | 252 | #define HAL_CAN_ERROR_ACK 0x20 /*!< Acknowledgment error */ |
| bogdanm | 92:4fc01daae5a5 | 253 | #define HAL_CAN_ERROR_BR 0x40 /*!< Bit recessive */ |
| bogdanm | 92:4fc01daae5a5 | 254 | #define HAL_CAN_ERROR_BD 0x80 /*!< LEC dominant */ |
| bogdanm | 92:4fc01daae5a5 | 255 | #define HAL_CAN_ERROR_CRC 0x100 /*!< LEC transfer error */ |
| bogdanm | 92:4fc01daae5a5 | 256 | /** |
| bogdanm | 92:4fc01daae5a5 | 257 | * @} |
| bogdanm | 92:4fc01daae5a5 | 258 | */ |
| bogdanm | 92:4fc01daae5a5 | 259 | |
| bogdanm | 92:4fc01daae5a5 | 260 | |
| bogdanm | 92:4fc01daae5a5 | 261 | /** @defgroup CAN_InitStatus |
| bogdanm | 92:4fc01daae5a5 | 262 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 263 | */ |
| bogdanm | 92:4fc01daae5a5 | 264 | #define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /*!< CAN initialization failed */ |
| bogdanm | 92:4fc01daae5a5 | 265 | #define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /*!< CAN initialization OK */ |
| bogdanm | 92:4fc01daae5a5 | 266 | /** |
| bogdanm | 92:4fc01daae5a5 | 267 | * @} |
| bogdanm | 92:4fc01daae5a5 | 268 | */ |
| bogdanm | 92:4fc01daae5a5 | 269 | |
| bogdanm | 92:4fc01daae5a5 | 270 | /** @defgroup CAN_operating_mode |
| bogdanm | 92:4fc01daae5a5 | 271 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 272 | */ |
| bogdanm | 92:4fc01daae5a5 | 273 | #define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */ |
| bogdanm | 92:4fc01daae5a5 | 274 | #define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ |
| bogdanm | 92:4fc01daae5a5 | 275 | #define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ |
| bogdanm | 92:4fc01daae5a5 | 276 | #define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */ |
| bogdanm | 92:4fc01daae5a5 | 277 | |
| bogdanm | 92:4fc01daae5a5 | 278 | #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ |
| bogdanm | 92:4fc01daae5a5 | 279 | ((MODE) == CAN_MODE_LOOPBACK)|| \ |
| bogdanm | 92:4fc01daae5a5 | 280 | ((MODE) == CAN_MODE_SILENT) || \ |
| bogdanm | 92:4fc01daae5a5 | 281 | ((MODE) == CAN_MODE_SILENT_LOOPBACK)) |
| bogdanm | 92:4fc01daae5a5 | 282 | /** |
| bogdanm | 92:4fc01daae5a5 | 283 | * @} |
| bogdanm | 92:4fc01daae5a5 | 284 | */ |
| bogdanm | 92:4fc01daae5a5 | 285 | |
| bogdanm | 92:4fc01daae5a5 | 286 | |
| bogdanm | 92:4fc01daae5a5 | 287 | /** @defgroup CAN_synchronisation_jump_width |
| bogdanm | 92:4fc01daae5a5 | 288 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 289 | */ |
| bogdanm | 92:4fc01daae5a5 | 290 | #define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 291 | #define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 292 | #define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 293 | #define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 294 | |
| bogdanm | 92:4fc01daae5a5 | 295 | #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \ |
| bogdanm | 92:4fc01daae5a5 | 296 | ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) |
| bogdanm | 92:4fc01daae5a5 | 297 | /** |
| bogdanm | 92:4fc01daae5a5 | 298 | * @} |
| bogdanm | 92:4fc01daae5a5 | 299 | */ |
| bogdanm | 92:4fc01daae5a5 | 300 | |
| bogdanm | 92:4fc01daae5a5 | 301 | /** @defgroup CAN_time_quantum_in_bit_segment_1 |
| bogdanm | 92:4fc01daae5a5 | 302 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 303 | */ |
| bogdanm | 92:4fc01daae5a5 | 304 | #define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 305 | #define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 306 | #define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 307 | #define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 308 | #define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 309 | #define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 310 | #define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 311 | #define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 312 | #define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 313 | #define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 314 | #define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 315 | #define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 316 | #define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 317 | #define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 318 | #define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 319 | #define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 320 | |
| bogdanm | 92:4fc01daae5a5 | 321 | #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ) |
| bogdanm | 92:4fc01daae5a5 | 322 | /** |
| bogdanm | 92:4fc01daae5a5 | 323 | * @} |
| bogdanm | 92:4fc01daae5a5 | 324 | */ |
| bogdanm | 92:4fc01daae5a5 | 325 | |
| bogdanm | 92:4fc01daae5a5 | 326 | /** @defgroup CAN_time_quantum_in_bit_segment_2 |
| bogdanm | 92:4fc01daae5a5 | 327 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 328 | */ |
| bogdanm | 92:4fc01daae5a5 | 329 | #define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 330 | #define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 331 | #define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 332 | #define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 333 | #define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 334 | #define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 335 | #define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 336 | #define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ |
| bogdanm | 92:4fc01daae5a5 | 337 | |
| bogdanm | 92:4fc01daae5a5 | 338 | #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ) |
| bogdanm | 92:4fc01daae5a5 | 339 | /** |
| bogdanm | 92:4fc01daae5a5 | 340 | * @} |
| bogdanm | 92:4fc01daae5a5 | 341 | */ |
| bogdanm | 92:4fc01daae5a5 | 342 | |
| bogdanm | 92:4fc01daae5a5 | 343 | /** @defgroup CAN_clock_prescaler |
| bogdanm | 92:4fc01daae5a5 | 344 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 345 | */ |
| bogdanm | 92:4fc01daae5a5 | 346 | #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024)) |
| bogdanm | 92:4fc01daae5a5 | 347 | /** |
| bogdanm | 92:4fc01daae5a5 | 348 | * @} |
| bogdanm | 92:4fc01daae5a5 | 349 | */ |
| bogdanm | 92:4fc01daae5a5 | 350 | |
| bogdanm | 92:4fc01daae5a5 | 351 | /** @defgroup CAN_filter_number |
| bogdanm | 92:4fc01daae5a5 | 352 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 353 | */ |
| bogdanm | 92:4fc01daae5a5 | 354 | #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27) |
| bogdanm | 92:4fc01daae5a5 | 355 | /** |
| bogdanm | 92:4fc01daae5a5 | 356 | * @} |
| bogdanm | 92:4fc01daae5a5 | 357 | */ |
| bogdanm | 92:4fc01daae5a5 | 358 | |
| bogdanm | 92:4fc01daae5a5 | 359 | /** @defgroup CAN_filter_mode |
| bogdanm | 92:4fc01daae5a5 | 360 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 361 | */ |
| bogdanm | 92:4fc01daae5a5 | 362 | #define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */ |
| bogdanm | 92:4fc01daae5a5 | 363 | #define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */ |
| bogdanm | 92:4fc01daae5a5 | 364 | |
| bogdanm | 92:4fc01daae5a5 | 365 | #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ |
| bogdanm | 92:4fc01daae5a5 | 366 | ((MODE) == CAN_FILTERMODE_IDLIST)) |
| bogdanm | 92:4fc01daae5a5 | 367 | /** |
| bogdanm | 92:4fc01daae5a5 | 368 | * @} |
| bogdanm | 92:4fc01daae5a5 | 369 | */ |
| bogdanm | 92:4fc01daae5a5 | 370 | |
| bogdanm | 92:4fc01daae5a5 | 371 | /** @defgroup CAN_filter_scale |
| bogdanm | 92:4fc01daae5a5 | 372 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 373 | */ |
| bogdanm | 92:4fc01daae5a5 | 374 | #define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */ |
| bogdanm | 92:4fc01daae5a5 | 375 | #define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */ |
| bogdanm | 92:4fc01daae5a5 | 376 | |
| bogdanm | 92:4fc01daae5a5 | 377 | #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ |
| bogdanm | 92:4fc01daae5a5 | 378 | ((SCALE) == CAN_FILTERSCALE_32BIT)) |
| bogdanm | 92:4fc01daae5a5 | 379 | /** |
| bogdanm | 92:4fc01daae5a5 | 380 | * @} |
| bogdanm | 92:4fc01daae5a5 | 381 | */ |
| bogdanm | 92:4fc01daae5a5 | 382 | |
| bogdanm | 92:4fc01daae5a5 | 383 | /** @defgroup CAN_filter_FIFO |
| bogdanm | 92:4fc01daae5a5 | 384 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 385 | */ |
| bogdanm | 92:4fc01daae5a5 | 386 | #define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */ |
| bogdanm | 92:4fc01daae5a5 | 387 | #define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */ |
| bogdanm | 92:4fc01daae5a5 | 388 | |
| bogdanm | 92:4fc01daae5a5 | 389 | #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ |
| bogdanm | 92:4fc01daae5a5 | 390 | ((FIFO) == CAN_FILTER_FIFO1)) |
| bogdanm | 92:4fc01daae5a5 | 391 | |
| bogdanm | 92:4fc01daae5a5 | 392 | /* Legacy defines */ |
| bogdanm | 92:4fc01daae5a5 | 393 | #define CAN_FilterFIFO0 CAN_FILTER_FIFO0 |
| bogdanm | 92:4fc01daae5a5 | 394 | #define CAN_FilterFIFO1 CAN_FILTER_FIFO1 |
| bogdanm | 92:4fc01daae5a5 | 395 | /** |
| bogdanm | 92:4fc01daae5a5 | 396 | * @} |
| bogdanm | 92:4fc01daae5a5 | 397 | */ |
| bogdanm | 92:4fc01daae5a5 | 398 | |
| bogdanm | 92:4fc01daae5a5 | 399 | /** @defgroup CAN_Start_bank_filter_for_slave_CAN |
| bogdanm | 92:4fc01daae5a5 | 400 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 401 | */ |
| bogdanm | 92:4fc01daae5a5 | 402 | #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28) |
| bogdanm | 92:4fc01daae5a5 | 403 | /** |
| bogdanm | 92:4fc01daae5a5 | 404 | * @} |
| bogdanm | 92:4fc01daae5a5 | 405 | */ |
| bogdanm | 92:4fc01daae5a5 | 406 | |
| bogdanm | 92:4fc01daae5a5 | 407 | /** @defgroup CAN_Tx |
| bogdanm | 92:4fc01daae5a5 | 408 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 409 | */ |
| bogdanm | 92:4fc01daae5a5 | 410 | #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02)) |
| bogdanm | 92:4fc01daae5a5 | 411 | #define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF)) |
| bogdanm | 92:4fc01daae5a5 | 412 | #define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF)) |
| bogdanm | 92:4fc01daae5a5 | 413 | #define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08)) |
| bogdanm | 92:4fc01daae5a5 | 414 | /** |
| bogdanm | 92:4fc01daae5a5 | 415 | * @} |
| bogdanm | 92:4fc01daae5a5 | 416 | */ |
| bogdanm | 92:4fc01daae5a5 | 417 | |
| bogdanm | 92:4fc01daae5a5 | 418 | /** @defgroup CAN_identifier_type |
| bogdanm | 92:4fc01daae5a5 | 419 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 420 | */ |
| bogdanm | 92:4fc01daae5a5 | 421 | #define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */ |
| bogdanm | 92:4fc01daae5a5 | 422 | #define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */ |
| bogdanm | 92:4fc01daae5a5 | 423 | #define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ |
| bogdanm | 92:4fc01daae5a5 | 424 | ((IDTYPE) == CAN_ID_EXT)) |
| bogdanm | 92:4fc01daae5a5 | 425 | /** |
| bogdanm | 92:4fc01daae5a5 | 426 | * @} |
| bogdanm | 92:4fc01daae5a5 | 427 | */ |
| bogdanm | 92:4fc01daae5a5 | 428 | |
| bogdanm | 92:4fc01daae5a5 | 429 | /** @defgroup CAN_remote_transmission_request |
| bogdanm | 92:4fc01daae5a5 | 430 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 431 | */ |
| bogdanm | 92:4fc01daae5a5 | 432 | #define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */ |
| bogdanm | 92:4fc01daae5a5 | 433 | #define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */ |
| bogdanm | 92:4fc01daae5a5 | 434 | #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) |
| bogdanm | 92:4fc01daae5a5 | 435 | |
| bogdanm | 92:4fc01daae5a5 | 436 | /** |
| bogdanm | 92:4fc01daae5a5 | 437 | * @} |
| bogdanm | 92:4fc01daae5a5 | 438 | */ |
| bogdanm | 92:4fc01daae5a5 | 439 | |
| bogdanm | 92:4fc01daae5a5 | 440 | /** @defgroup CAN_transmit_constants |
| bogdanm | 92:4fc01daae5a5 | 441 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 442 | */ |
| bogdanm | 92:4fc01daae5a5 | 443 | #define CAN_TXSTATUS_FAILED ((uint8_t)0x00) /*!< CAN transmission failed */ |
| bogdanm | 92:4fc01daae5a5 | 444 | #define CAN_TXSTATUS_OK ((uint8_t)0x01) /*!< CAN transmission succeeded */ |
| bogdanm | 92:4fc01daae5a5 | 445 | #define CAN_TXSTATUS_PENDING ((uint8_t)0x02) /*!< CAN transmission pending */ |
| bogdanm | 92:4fc01daae5a5 | 446 | #define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */ |
| bogdanm | 92:4fc01daae5a5 | 447 | |
| bogdanm | 92:4fc01daae5a5 | 448 | /** |
| bogdanm | 92:4fc01daae5a5 | 449 | * @} |
| bogdanm | 92:4fc01daae5a5 | 450 | */ |
| bogdanm | 92:4fc01daae5a5 | 451 | |
| bogdanm | 92:4fc01daae5a5 | 452 | /** @defgroup CAN_receive_FIFO_number_constants |
| bogdanm | 92:4fc01daae5a5 | 453 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 454 | */ |
| bogdanm | 92:4fc01daae5a5 | 455 | #define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */ |
| bogdanm | 92:4fc01daae5a5 | 456 | #define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */ |
| bogdanm | 92:4fc01daae5a5 | 457 | |
| bogdanm | 92:4fc01daae5a5 | 458 | #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) |
| bogdanm | 92:4fc01daae5a5 | 459 | /** |
| bogdanm | 92:4fc01daae5a5 | 460 | * @} |
| bogdanm | 92:4fc01daae5a5 | 461 | */ |
| bogdanm | 92:4fc01daae5a5 | 462 | |
| bogdanm | 92:4fc01daae5a5 | 463 | /** @defgroup CAN_flags |
| bogdanm | 92:4fc01daae5a5 | 464 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 465 | */ |
| bogdanm | 92:4fc01daae5a5 | 466 | /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus() |
| bogdanm | 92:4fc01daae5a5 | 467 | and CAN_ClearFlag() functions. */ |
| bogdanm | 92:4fc01daae5a5 | 468 | /* If the flag is 0x1XXXXXXX, it means that it can only be used with |
| bogdanm | 92:4fc01daae5a5 | 469 | CAN_GetFlagStatus() function. */ |
| bogdanm | 92:4fc01daae5a5 | 470 | |
| bogdanm | 92:4fc01daae5a5 | 471 | /* Transmit Flags */ |
| bogdanm | 92:4fc01daae5a5 | 472 | #define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */ |
| bogdanm | 92:4fc01daae5a5 | 473 | #define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */ |
| bogdanm | 92:4fc01daae5a5 | 474 | #define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */ |
| bogdanm | 92:4fc01daae5a5 | 475 | #define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */ |
| bogdanm | 92:4fc01daae5a5 | 476 | #define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */ |
| bogdanm | 92:4fc01daae5a5 | 477 | #define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */ |
| bogdanm | 92:4fc01daae5a5 | 478 | #define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */ |
| bogdanm | 92:4fc01daae5a5 | 479 | #define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */ |
| bogdanm | 92:4fc01daae5a5 | 480 | #define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */ |
| bogdanm | 92:4fc01daae5a5 | 481 | |
| bogdanm | 92:4fc01daae5a5 | 482 | /* Receive Flags */ |
| bogdanm | 92:4fc01daae5a5 | 483 | #define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */ |
| bogdanm | 92:4fc01daae5a5 | 484 | #define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */ |
| bogdanm | 92:4fc01daae5a5 | 485 | |
| bogdanm | 92:4fc01daae5a5 | 486 | #define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */ |
| bogdanm | 92:4fc01daae5a5 | 487 | #define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */ |
| bogdanm | 92:4fc01daae5a5 | 488 | |
| bogdanm | 92:4fc01daae5a5 | 489 | /* Operating Mode Flags */ |
| bogdanm | 92:4fc01daae5a5 | 490 | #define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */ |
| bogdanm | 92:4fc01daae5a5 | 491 | #define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */ |
| bogdanm | 92:4fc01daae5a5 | 492 | #define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */ |
| bogdanm | 92:4fc01daae5a5 | 493 | /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible. |
| bogdanm | 92:4fc01daae5a5 | 494 | In this case the SLAK bit can be polled.*/ |
| bogdanm | 92:4fc01daae5a5 | 495 | |
| bogdanm | 92:4fc01daae5a5 | 496 | /* Error Flags */ |
| bogdanm | 92:4fc01daae5a5 | 497 | #define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */ |
| bogdanm | 92:4fc01daae5a5 | 498 | #define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */ |
| bogdanm | 92:4fc01daae5a5 | 499 | #define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */ |
| bogdanm | 92:4fc01daae5a5 | 500 | |
| bogdanm | 92:4fc01daae5a5 | 501 | #define IS_CAN_GET_FLAG(FLAG) (((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_BOF) || \ |
| bogdanm | 92:4fc01daae5a5 | 502 | ((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_EWG) || \ |
| bogdanm | 92:4fc01daae5a5 | 503 | ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_FOV0) || \ |
| bogdanm | 92:4fc01daae5a5 | 504 | ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_SLAK) || \ |
| bogdanm | 92:4fc01daae5a5 | 505 | ((FLAG) == CAN_FLAG_FOV1) || ((FLAG) == CAN_FLAG_FF1) || \ |
| bogdanm | 92:4fc01daae5a5 | 506 | ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0)) |
| bogdanm | 92:4fc01daae5a5 | 507 | |
| bogdanm | 92:4fc01daae5a5 | 508 | |
| bogdanm | 92:4fc01daae5a5 | 509 | #define IS_CAN_CLEAR_FLAG(FLAG)(((FLAG) == CAN_FLAG_SLAK) || ((FLAG) == CAN_FLAG_RQCP2) || \ |
| bogdanm | 92:4fc01daae5a5 | 510 | ((FLAG) == CAN_FLAG_RQCP1) || ((FLAG) == CAN_FLAG_RQCP0) || \ |
| bogdanm | 92:4fc01daae5a5 | 511 | ((FLAG) == CAN_FLAG_FF0) || ((FLAG) == CAN_FLAG_FOV0) || \ |
| bogdanm | 92:4fc01daae5a5 | 512 | ((FLAG) == CAN_FLAG_FF1) || ((FLAG) == CAN_FLAG_FOV1) || \ |
| bogdanm | 92:4fc01daae5a5 | 513 | ((FLAG) == CAN_FLAG_WKU)) |
| bogdanm | 92:4fc01daae5a5 | 514 | /** |
| bogdanm | 92:4fc01daae5a5 | 515 | * @} |
| bogdanm | 92:4fc01daae5a5 | 516 | */ |
| bogdanm | 92:4fc01daae5a5 | 517 | |
| bogdanm | 92:4fc01daae5a5 | 518 | |
| bogdanm | 92:4fc01daae5a5 | 519 | /** @defgroup CAN_interrupts |
| bogdanm | 92:4fc01daae5a5 | 520 | * @{ |
| bogdanm | 92:4fc01daae5a5 | 521 | */ |
| bogdanm | 92:4fc01daae5a5 | 522 | #define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 523 | |
| bogdanm | 92:4fc01daae5a5 | 524 | /* Receive Interrupts */ |
| bogdanm | 92:4fc01daae5a5 | 525 | #define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 526 | #define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 527 | #define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 528 | #define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 529 | #define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 530 | #define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 531 | |
| bogdanm | 92:4fc01daae5a5 | 532 | /* Operating Mode Interrupts */ |
| bogdanm | 92:4fc01daae5a5 | 533 | #define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 534 | #define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 535 | |
| bogdanm | 92:4fc01daae5a5 | 536 | /* Error Interrupts */ |
| bogdanm | 92:4fc01daae5a5 | 537 | #define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 538 | #define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 539 | #define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 540 | #define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 541 | #define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ |
| bogdanm | 92:4fc01daae5a5 | 542 | |
| bogdanm | 92:4fc01daae5a5 | 543 | /* Flags named as Interrupts : kept only for FW compatibility */ |
| bogdanm | 92:4fc01daae5a5 | 544 | #define CAN_IT_RQCP0 CAN_IT_TME |
| bogdanm | 92:4fc01daae5a5 | 545 | #define CAN_IT_RQCP1 CAN_IT_TME |
| bogdanm | 92:4fc01daae5a5 | 546 | #define CAN_IT_RQCP2 CAN_IT_TME |
| bogdanm | 92:4fc01daae5a5 | 547 | |
| bogdanm | 92:4fc01daae5a5 | 548 | #define IS_CAN_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP0) ||\ |
| bogdanm | 92:4fc01daae5a5 | 549 | ((IT) == CAN_IT_FF0) || ((IT) == CAN_IT_FOV0) ||\ |
| bogdanm | 92:4fc01daae5a5 | 550 | ((IT) == CAN_IT_FMP1) || ((IT) == CAN_IT_FF1) ||\ |
| bogdanm | 92:4fc01daae5a5 | 551 | ((IT) == CAN_IT_FOV1) || ((IT) == CAN_IT_EWG) ||\ |
| bogdanm | 92:4fc01daae5a5 | 552 | ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ |
| bogdanm | 92:4fc01daae5a5 | 553 | ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ |
| bogdanm | 92:4fc01daae5a5 | 554 | ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) |
| bogdanm | 92:4fc01daae5a5 | 555 | |
| bogdanm | 92:4fc01daae5a5 | 556 | #define IS_CAN_CLEAR_IT(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF0) ||\ |
| bogdanm | 92:4fc01daae5a5 | 557 | ((IT) == CAN_IT_FOV0)|| ((IT) == CAN_IT_FF1) ||\ |
| bogdanm | 92:4fc01daae5a5 | 558 | ((IT) == CAN_IT_FOV1)|| ((IT) == CAN_IT_EWG) ||\ |
| bogdanm | 92:4fc01daae5a5 | 559 | ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF) ||\ |
| bogdanm | 92:4fc01daae5a5 | 560 | ((IT) == CAN_IT_LEC) || ((IT) == CAN_IT_ERR) ||\ |
| bogdanm | 92:4fc01daae5a5 | 561 | ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_SLK)) |
| bogdanm | 92:4fc01daae5a5 | 562 | /** |
| bogdanm | 92:4fc01daae5a5 | 563 | * @} |
| bogdanm | 92:4fc01daae5a5 | 564 | */ |
| bogdanm | 92:4fc01daae5a5 | 565 | |
| bogdanm | 92:4fc01daae5a5 | 566 | /* Time out for INAK bit */ |
| bogdanm | 92:4fc01daae5a5 | 567 | #define INAK_TIMEOUT ((uint32_t)0x0000FFFF) |
| bogdanm | 92:4fc01daae5a5 | 568 | /* Time out for SLAK bit */ |
| bogdanm | 92:4fc01daae5a5 | 569 | #define SLAK_TIMEOUT ((uint32_t)0x0000FFFF) |
| bogdanm | 92:4fc01daae5a5 | 570 | |
| bogdanm | 92:4fc01daae5a5 | 571 | /* Mailboxes definition */ |
| bogdanm | 92:4fc01daae5a5 | 572 | #define CAN_TXMAILBOX_0 ((uint8_t)0x00) |
| bogdanm | 92:4fc01daae5a5 | 573 | #define CAN_TXMAILBOX_1 ((uint8_t)0x01) |
| bogdanm | 92:4fc01daae5a5 | 574 | #define CAN_TXMAILBOX_2 ((uint8_t)0x02) |
| bogdanm | 92:4fc01daae5a5 | 575 | |
| bogdanm | 92:4fc01daae5a5 | 576 | /** |
| bogdanm | 92:4fc01daae5a5 | 577 | * @} |
| bogdanm | 92:4fc01daae5a5 | 578 | */ |
| bogdanm | 92:4fc01daae5a5 | 579 | |
| bogdanm | 92:4fc01daae5a5 | 580 | /* Exported macro ------------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 581 | |
| bogdanm | 92:4fc01daae5a5 | 582 | /** @brief Reset CAN handle state |
| bogdanm | 92:4fc01daae5a5 | 583 | * @param __HANDLE__: specifies the CAN Handle. |
| bogdanm | 92:4fc01daae5a5 | 584 | * @retval None |
| bogdanm | 92:4fc01daae5a5 | 585 | */ |
| bogdanm | 92:4fc01daae5a5 | 586 | #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) |
| bogdanm | 92:4fc01daae5a5 | 587 | |
| bogdanm | 92:4fc01daae5a5 | 588 | /** |
| bogdanm | 92:4fc01daae5a5 | 589 | * @brief Enable the specified CAN interrupts. |
| bogdanm | 92:4fc01daae5a5 | 590 | * @param __HANDLE__: CAN handle |
| bogdanm | 92:4fc01daae5a5 | 591 | * @param __INTERRUPT__: CAN Interrupt |
| bogdanm | 92:4fc01daae5a5 | 592 | * @retval None |
| bogdanm | 92:4fc01daae5a5 | 593 | */ |
| bogdanm | 92:4fc01daae5a5 | 594 | #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) |
| bogdanm | 92:4fc01daae5a5 | 595 | |
| bogdanm | 92:4fc01daae5a5 | 596 | /** |
| bogdanm | 92:4fc01daae5a5 | 597 | * @brief Disable the specified CAN interrupts. |
| bogdanm | 92:4fc01daae5a5 | 598 | * @param __HANDLE__: CAN handle |
| bogdanm | 92:4fc01daae5a5 | 599 | * @param __INTERRUPT__: CAN Interrupt |
| bogdanm | 92:4fc01daae5a5 | 600 | * @retval None |
| bogdanm | 92:4fc01daae5a5 | 601 | */ |
| bogdanm | 92:4fc01daae5a5 | 602 | #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) |
| bogdanm | 92:4fc01daae5a5 | 603 | |
| bogdanm | 92:4fc01daae5a5 | 604 | /** |
| bogdanm | 92:4fc01daae5a5 | 605 | * @brief Return the number of pending received messages. |
| bogdanm | 92:4fc01daae5a5 | 606 | * @param __HANDLE__: CAN handle |
| bogdanm | 92:4fc01daae5a5 | 607 | * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. |
| bogdanm | 92:4fc01daae5a5 | 608 | * @retval The number of pending message. |
| bogdanm | 92:4fc01daae5a5 | 609 | */ |
| bogdanm | 92:4fc01daae5a5 | 610 | #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ |
| bogdanm | 92:4fc01daae5a5 | 611 | ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03))) |
| bogdanm | 92:4fc01daae5a5 | 612 | |
| bogdanm | 92:4fc01daae5a5 | 613 | /** @brief Check whether the specified CAN flag is set or not. |
| bogdanm | 92:4fc01daae5a5 | 614 | * @param __HANDLE__: CAN Handle |
| bogdanm | 92:4fc01daae5a5 | 615 | * @param __FLAG__: specifies the flag to check. |
| bogdanm | 92:4fc01daae5a5 | 616 | * This parameter can be one of the following values: |
| bogdanm | 92:4fc01daae5a5 | 617 | * @arg CAN_TSR_RQCP0: Request MailBox0 Flag |
| bogdanm | 92:4fc01daae5a5 | 618 | * @arg CAN_TSR_RQCP1: Request MailBox1 Flag |
| bogdanm | 92:4fc01daae5a5 | 619 | * @arg CAN_TSR_RQCP2: Request MailBox2 Flag |
| bogdanm | 92:4fc01daae5a5 | 620 | * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag |
| bogdanm | 92:4fc01daae5a5 | 621 | * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag |
| bogdanm | 92:4fc01daae5a5 | 622 | * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag |
| bogdanm | 92:4fc01daae5a5 | 623 | * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag |
| bogdanm | 92:4fc01daae5a5 | 624 | * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag |
| bogdanm | 92:4fc01daae5a5 | 625 | * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag |
| bogdanm | 92:4fc01daae5a5 | 626 | * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag |
| bogdanm | 92:4fc01daae5a5 | 627 | * @arg CAN_FLAG_FF0: FIFO 0 Full Flag |
| bogdanm | 92:4fc01daae5a5 | 628 | * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag |
| bogdanm | 92:4fc01daae5a5 | 629 | * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag |
| bogdanm | 92:4fc01daae5a5 | 630 | * @arg CAN_FLAG_FF1: FIFO 1 Full Flag |
| bogdanm | 92:4fc01daae5a5 | 631 | * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag |
| bogdanm | 92:4fc01daae5a5 | 632 | * @arg CAN_FLAG_WKU: Wake up Flag |
| bogdanm | 92:4fc01daae5a5 | 633 | * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag |
| bogdanm | 92:4fc01daae5a5 | 634 | * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag |
| bogdanm | 92:4fc01daae5a5 | 635 | * @arg CAN_FLAG_EWG: Error Warning Flag |
| bogdanm | 92:4fc01daae5a5 | 636 | * @arg CAN_FLAG_EPV: Error Passive Flag |
| bogdanm | 92:4fc01daae5a5 | 637 | * @arg CAN_FLAG_BOF: Bus-Off Flag |
| bogdanm | 92:4fc01daae5a5 | 638 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| bogdanm | 92:4fc01daae5a5 | 639 | */ |
| bogdanm | 92:4fc01daae5a5 | 640 | #define CAN_FLAG_MASK ((uint32_t)0x000000FF) |
| bogdanm | 92:4fc01daae5a5 | 641 | #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ |
| bogdanm | 92:4fc01daae5a5 | 642 | ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| bogdanm | 92:4fc01daae5a5 | 643 | (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| bogdanm | 92:4fc01daae5a5 | 644 | (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| bogdanm | 92:4fc01daae5a5 | 645 | (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| bogdanm | 92:4fc01daae5a5 | 646 | ((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK)))) |
| bogdanm | 92:4fc01daae5a5 | 647 | |
| bogdanm | 92:4fc01daae5a5 | 648 | /** @brief Clear the specified CAN pending flag. |
| bogdanm | 92:4fc01daae5a5 | 649 | * @param __HANDLE__: CAN Handle. |
| bogdanm | 92:4fc01daae5a5 | 650 | * @param __FLAG__: specifies the flag to check. |
| bogdanm | 92:4fc01daae5a5 | 651 | * This parameter can be one of the following values: |
| bogdanm | 92:4fc01daae5a5 | 652 | * @arg CAN_TSR_RQCP0: Request MailBox0 Flag |
| bogdanm | 92:4fc01daae5a5 | 653 | * @arg CAN_TSR_RQCP1: Request MailBox1 Flag |
| bogdanm | 92:4fc01daae5a5 | 654 | * @arg CAN_TSR_RQCP2: Request MailBox2 Flag |
| bogdanm | 92:4fc01daae5a5 | 655 | * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag |
| bogdanm | 92:4fc01daae5a5 | 656 | * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag |
| bogdanm | 92:4fc01daae5a5 | 657 | * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag |
| bogdanm | 92:4fc01daae5a5 | 658 | * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag |
| bogdanm | 92:4fc01daae5a5 | 659 | * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag |
| bogdanm | 92:4fc01daae5a5 | 660 | * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag |
| bogdanm | 92:4fc01daae5a5 | 661 | * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag |
| bogdanm | 92:4fc01daae5a5 | 662 | * @arg CAN_FLAG_FF0: FIFO 0 Full Flag |
| bogdanm | 92:4fc01daae5a5 | 663 | * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag |
| bogdanm | 92:4fc01daae5a5 | 664 | * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag |
| bogdanm | 92:4fc01daae5a5 | 665 | * @arg CAN_FLAG_FF1: FIFO 1 Full Flag |
| bogdanm | 92:4fc01daae5a5 | 666 | * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag |
| bogdanm | 92:4fc01daae5a5 | 667 | * @arg CAN_FLAG_WKU: Wake up Flag |
| bogdanm | 92:4fc01daae5a5 | 668 | * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag |
| bogdanm | 92:4fc01daae5a5 | 669 | * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag |
| bogdanm | 92:4fc01daae5a5 | 670 | * @arg CAN_FLAG_EWG: Error Warning Flag |
| bogdanm | 92:4fc01daae5a5 | 671 | * @arg CAN_FLAG_EPV: Error Passive Flag |
| bogdanm | 92:4fc01daae5a5 | 672 | * @arg CAN_FLAG_BOF: Bus-Off Flag |
| bogdanm | 92:4fc01daae5a5 | 673 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| bogdanm | 92:4fc01daae5a5 | 674 | */ |
| bogdanm | 92:4fc01daae5a5 | 675 | #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
| bogdanm | 92:4fc01daae5a5 | 676 | ((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| bogdanm | 92:4fc01daae5a5 | 677 | (((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| bogdanm | 92:4fc01daae5a5 | 678 | (((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| bogdanm | 92:4fc01daae5a5 | 679 | (((__FLAG__) >> 8) == 1)? (((__HANDLE__)->Instance->MSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \ |
| bogdanm | 92:4fc01daae5a5 | 680 | (((__HANDLE__)->Instance->ESR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK)))) |
| bogdanm | 92:4fc01daae5a5 | 681 | |
| bogdanm | 92:4fc01daae5a5 | 682 | /** @brief Check if the specified CAN interrupt source is enabled or disabled. |
| bogdanm | 92:4fc01daae5a5 | 683 | * @param __HANDLE__: CAN Handle |
| bogdanm | 92:4fc01daae5a5 | 684 | * @param __INTERRUPT__: specifies the CAN interrupt source to check. |
| bogdanm | 92:4fc01daae5a5 | 685 | * This parameter can be one of the following values: |
| bogdanm | 92:4fc01daae5a5 | 686 | * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable |
| bogdanm | 92:4fc01daae5a5 | 687 | * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enablev |
| bogdanm | 92:4fc01daae5a5 | 688 | * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable |
| bogdanm | 92:4fc01daae5a5 | 689 | * @retval The new state of __IT__ (TRUE or FALSE). |
| bogdanm | 92:4fc01daae5a5 | 690 | */ |
| bogdanm | 92:4fc01daae5a5 | 691 | #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| bogdanm | 92:4fc01daae5a5 | 692 | |
| bogdanm | 92:4fc01daae5a5 | 693 | /** |
| bogdanm | 92:4fc01daae5a5 | 694 | * @brief Check the transmission status of a CAN Frame. |
| bogdanm | 92:4fc01daae5a5 | 695 | * @param __HANDLE__: CAN Handle |
| bogdanm | 92:4fc01daae5a5 | 696 | * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission. |
| bogdanm | 92:4fc01daae5a5 | 697 | * @retval The new status of transmission (TRUE or FALSE). |
| bogdanm | 92:4fc01daae5a5 | 698 | */ |
| bogdanm | 92:4fc01daae5a5 | 699 | #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\ |
| bogdanm | 92:4fc01daae5a5 | 700 | (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\ |
| bogdanm | 92:4fc01daae5a5 | 701 | ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\ |
| bogdanm | 92:4fc01daae5a5 | 702 | ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2))) |
| bogdanm | 92:4fc01daae5a5 | 703 | |
| bogdanm | 92:4fc01daae5a5 | 704 | |
| bogdanm | 92:4fc01daae5a5 | 705 | |
| bogdanm | 92:4fc01daae5a5 | 706 | /** |
| bogdanm | 92:4fc01daae5a5 | 707 | * @brief Release the specified receive FIFO. |
| bogdanm | 92:4fc01daae5a5 | 708 | * @param __HANDLE__: CAN handle |
| bogdanm | 92:4fc01daae5a5 | 709 | * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. |
| bogdanm | 92:4fc01daae5a5 | 710 | * @retval None |
| bogdanm | 92:4fc01daae5a5 | 711 | */ |
| bogdanm | 92:4fc01daae5a5 | 712 | #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ |
| bogdanm | 92:4fc01daae5a5 | 713 | ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1)) |
| bogdanm | 92:4fc01daae5a5 | 714 | |
| bogdanm | 92:4fc01daae5a5 | 715 | /** |
| bogdanm | 92:4fc01daae5a5 | 716 | * @brief Cancel a transmit request. |
| bogdanm | 92:4fc01daae5a5 | 717 | * @param __HANDLE__: CAN Handle |
| bogdanm | 92:4fc01daae5a5 | 718 | * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission. |
| bogdanm | 92:4fc01daae5a5 | 719 | * @retval None |
| bogdanm | 92:4fc01daae5a5 | 720 | */ |
| bogdanm | 92:4fc01daae5a5 | 721 | #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\ |
| bogdanm | 92:4fc01daae5a5 | 722 | (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\ |
| bogdanm | 92:4fc01daae5a5 | 723 | ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\ |
| bogdanm | 92:4fc01daae5a5 | 724 | ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2)) |
| bogdanm | 92:4fc01daae5a5 | 725 | |
| bogdanm | 92:4fc01daae5a5 | 726 | /** |
| bogdanm | 92:4fc01daae5a5 | 727 | * @brief Enable or disable the DBG Freeze for CAN. |
| bogdanm | 92:4fc01daae5a5 | 728 | * @param __HANDLE__: CAN Handle |
| bogdanm | 92:4fc01daae5a5 | 729 | * @param __NEWSTATE__: new state of the CAN peripheral. |
| bogdanm | 92:4fc01daae5a5 | 730 | * This parameter can be: ENABLE (CAN reception/transmission is frozen |
| bogdanm | 92:4fc01daae5a5 | 731 | * during debug. Reception FIFOs can still be accessed/controlled normally) |
| bogdanm | 92:4fc01daae5a5 | 732 | * or DISABLE (CAN is working during debug). |
| bogdanm | 92:4fc01daae5a5 | 733 | * @retval None |
| bogdanm | 92:4fc01daae5a5 | 734 | */ |
| bogdanm | 92:4fc01daae5a5 | 735 | #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \ |
| bogdanm | 92:4fc01daae5a5 | 736 | ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF)) |
| bogdanm | 92:4fc01daae5a5 | 737 | |
| bogdanm | 92:4fc01daae5a5 | 738 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 92:4fc01daae5a5 | 739 | |
| bogdanm | 92:4fc01daae5a5 | 740 | /* Initialization/de-initialization functions ***********************************/ |
| bogdanm | 92:4fc01daae5a5 | 741 | HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan); |
| bogdanm | 92:4fc01daae5a5 | 742 | HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig); |
| bogdanm | 92:4fc01daae5a5 | 743 | HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan); |
| bogdanm | 92:4fc01daae5a5 | 744 | void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan); |
| bogdanm | 92:4fc01daae5a5 | 745 | void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan); |
| bogdanm | 92:4fc01daae5a5 | 746 | |
| bogdanm | 92:4fc01daae5a5 | 747 | /* I/O operation functions ******************************************************/ |
| bogdanm | 92:4fc01daae5a5 | 748 | HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout); |
| bogdanm | 92:4fc01daae5a5 | 749 | HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan); |
| bogdanm | 92:4fc01daae5a5 | 750 | HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout); |
| bogdanm | 92:4fc01daae5a5 | 751 | HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber); |
| bogdanm | 92:4fc01daae5a5 | 752 | HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan); |
| bogdanm | 92:4fc01daae5a5 | 753 | HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); |
| bogdanm | 92:4fc01daae5a5 | 754 | |
| bogdanm | 92:4fc01daae5a5 | 755 | /* Peripheral State functions ***************************************************/ |
| bogdanm | 92:4fc01daae5a5 | 756 | void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan); |
| bogdanm | 92:4fc01daae5a5 | 757 | uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan); |
| bogdanm | 92:4fc01daae5a5 | 758 | HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan); |
| bogdanm | 92:4fc01daae5a5 | 759 | |
| bogdanm | 92:4fc01daae5a5 | 760 | void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan); |
| bogdanm | 92:4fc01daae5a5 | 761 | void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan); |
| bogdanm | 92:4fc01daae5a5 | 762 | void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); |
| bogdanm | 92:4fc01daae5a5 | 763 | |
| bogdanm | 92:4fc01daae5a5 | 764 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| bogdanm | 92:4fc01daae5a5 | 765 | |
| bogdanm | 92:4fc01daae5a5 | 766 | /** |
| bogdanm | 92:4fc01daae5a5 | 767 | * @} |
| bogdanm | 92:4fc01daae5a5 | 768 | */ |
| bogdanm | 92:4fc01daae5a5 | 769 | |
| bogdanm | 92:4fc01daae5a5 | 770 | /** |
| bogdanm | 92:4fc01daae5a5 | 771 | * @} |
| bogdanm | 92:4fc01daae5a5 | 772 | */ |
| bogdanm | 92:4fc01daae5a5 | 773 | |
| bogdanm | 92:4fc01daae5a5 | 774 | #ifdef __cplusplus |
| bogdanm | 92:4fc01daae5a5 | 775 | } |
| bogdanm | 92:4fc01daae5a5 | 776 | #endif |
| bogdanm | 92:4fc01daae5a5 | 777 | |
| bogdanm | 92:4fc01daae5a5 | 778 | #endif /* __STM32F4xx_CAN_H */ |
| bogdanm | 92:4fc01daae5a5 | 779 | |
| bogdanm | 92:4fc01daae5a5 | 780 | |
| bogdanm | 92:4fc01daae5a5 | 781 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |