Egor Rumjantsev / mbed

The official mbed C/C SDK provides the software platform and libraries to build your applications.

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TARGET_MTS_MDOT_F405RG/stm32f4xx_hal.h@92:4fc01daae5a5, 2014-11-27 (annotated)

Committer:
bogdanm
Date:
Thu Nov 27 13:33:22 2014 +0000
Revision:
92:4fc01daae5a5
Release 92 of the mbed libray



Main changes:



- nRF51822: fixed pin assignment issues

- ST targets moving to the STM32Cube driver

- LPC1439: fixed serial interrupt issue

- first Cortex-A platform supported in mbed (RZ_A1H)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 92:4fc01daae5a5 1 /**
bogdanm 92:4fc01daae5a5 2 ******************************************************************************
bogdanm 92:4fc01daae5a5 3 * @file stm32f4xx_hal.h
bogdanm 92:4fc01daae5a5 4 * @author MCD Application Team
bogdanm 92:4fc01daae5a5 5 * @version V1.1.0
bogdanm 92:4fc01daae5a5 6 * @date 19-June-2014
bogdanm 92:4fc01daae5a5 7 * @brief This file contains all the functions prototypes for the HAL
bogdanm 92:4fc01daae5a5 8 * module driver.
bogdanm 92:4fc01daae5a5 9 ******************************************************************************
bogdanm 92:4fc01daae5a5 10 * @attention
bogdanm 92:4fc01daae5a5 11 *
bogdanm 92:4fc01daae5a5 12 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
bogdanm 92:4fc01daae5a5 13 *
bogdanm 92:4fc01daae5a5 14 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 92:4fc01daae5a5 15 * are permitted provided that the following conditions are met:
bogdanm 92:4fc01daae5a5 16 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 92:4fc01daae5a5 17 * this list of conditions and the following disclaimer.
bogdanm 92:4fc01daae5a5 18 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 92:4fc01daae5a5 19 * this list of conditions and the following disclaimer in the documentation
bogdanm 92:4fc01daae5a5 20 * and/or other materials provided with the distribution.
bogdanm 92:4fc01daae5a5 21 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 92:4fc01daae5a5 22 * may be used to endorse or promote products derived from this software
bogdanm 92:4fc01daae5a5 23 * without specific prior written permission.
bogdanm 92:4fc01daae5a5 24 *
bogdanm 92:4fc01daae5a5 25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 92:4fc01daae5a5 26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 92:4fc01daae5a5 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 92:4fc01daae5a5 28 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 92:4fc01daae5a5 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 92:4fc01daae5a5 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 92:4fc01daae5a5 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 92:4fc01daae5a5 32 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 92:4fc01daae5a5 33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 92:4fc01daae5a5 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 92:4fc01daae5a5 35 *
bogdanm 92:4fc01daae5a5 36 ******************************************************************************
bogdanm 92:4fc01daae5a5 37 */
bogdanm 92:4fc01daae5a5 38
bogdanm 92:4fc01daae5a5 39 /* Define to prevent recursive inclusion -------------------------------------*/
bogdanm 92:4fc01daae5a5 40 #ifndef __STM32F4xx_HAL_H
bogdanm 92:4fc01daae5a5 41 #define __STM32F4xx_HAL_H
bogdanm 92:4fc01daae5a5 42
bogdanm 92:4fc01daae5a5 43 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 44 extern "C" {
bogdanm 92:4fc01daae5a5 45 #endif
bogdanm 92:4fc01daae5a5 46
bogdanm 92:4fc01daae5a5 47 /* Includes ------------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 48 #include "stm32f4xx_hal_conf.h"
bogdanm 92:4fc01daae5a5 49
bogdanm 92:4fc01daae5a5 50 /** @addtogroup STM32F4xx_HAL_Driver
bogdanm 92:4fc01daae5a5 51 * @{
bogdanm 92:4fc01daae5a5 52 */
bogdanm 92:4fc01daae5a5 53
bogdanm 92:4fc01daae5a5 54 /** @addtogroup HAL
bogdanm 92:4fc01daae5a5 55 * @{
bogdanm 92:4fc01daae5a5 56 */
bogdanm 92:4fc01daae5a5 57
bogdanm 92:4fc01daae5a5 58 /* Exported types ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 59 /* Exported constants --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 60 /* Exported macro ------------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 61
bogdanm 92:4fc01daae5a5 62 /** @brief Freeze/Unfreeze Peripherals in Debug mode
bogdanm 92:4fc01daae5a5 63 */
bogdanm 92:4fc01daae5a5 64 #define __HAL_FREEZE_TIM2_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM2_STOP))
bogdanm 92:4fc01daae5a5 65 #define __HAL_FREEZE_TIM3_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM3_STOP))
bogdanm 92:4fc01daae5a5 66 #define __HAL_FREEZE_TIM4_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM4_STOP))
bogdanm 92:4fc01daae5a5 67 #define __HAL_FREEZE_TIM5_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM5_STOP))
bogdanm 92:4fc01daae5a5 68 #define __HAL_FREEZE_TIM6_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM6_STOP))
bogdanm 92:4fc01daae5a5 69 #define __HAL_FREEZE_TIM7_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM7_STOP))
bogdanm 92:4fc01daae5a5 70 #define __HAL_FREEZE_TIM12_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM12_STOP))
bogdanm 92:4fc01daae5a5 71 #define __HAL_FREEZE_TIM13_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM13_STOP))
bogdanm 92:4fc01daae5a5 72 #define __HAL_FREEZE_TIM14_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_TIM14_STOP))
bogdanm 92:4fc01daae5a5 73 #define __HAL_FREEZE_RTC_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_RTC_STOP))
bogdanm 92:4fc01daae5a5 74 #define __HAL_FREEZE_WWDG_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_WWDG_STOP))
bogdanm 92:4fc01daae5a5 75 #define __HAL_FREEZE_IWDG_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_IWDG_STOP))
bogdanm 92:4fc01daae5a5 76 #define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
bogdanm 92:4fc01daae5a5 77 #define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
bogdanm 92:4fc01daae5a5 78 #define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
bogdanm 92:4fc01daae5a5 79 #define __HAL_FREEZE_CAN1_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN1_STOP))
bogdanm 92:4fc01daae5a5 80 #define __HAL_FREEZE_CAN2_DBGMCU() (DBGMCU->APB1FZ |= (DBGMCU_APB1_FZ_DBG_CAN2_STOP))
bogdanm 92:4fc01daae5a5 81 #define __HAL_FREEZE_TIM1_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM1_STOP))
bogdanm 92:4fc01daae5a5 82 #define __HAL_FREEZE_TIM8_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM8_STOP))
bogdanm 92:4fc01daae5a5 83 #define __HAL_FREEZE_TIM9_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM9_STOP))
bogdanm 92:4fc01daae5a5 84 #define __HAL_FREEZE_TIM10_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM10_STOP))
bogdanm 92:4fc01daae5a5 85 #define __HAL_FREEZE_TIM11_DBGMCU() (DBGMCU->APB2FZ |= (DBGMCU_APB2_FZ_DBG_TIM11_STOP))
bogdanm 92:4fc01daae5a5 86
bogdanm 92:4fc01daae5a5 87 #define __HAL_UNFREEZE_TIM2_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM2_STOP))
bogdanm 92:4fc01daae5a5 88 #define __HAL_UNFREEZE_TIM3_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM3_STOP))
bogdanm 92:4fc01daae5a5 89 #define __HAL_UNFREEZE_TIM4_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM4_STOP))
bogdanm 92:4fc01daae5a5 90 #define __HAL_UNFREEZE_TIM5_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM5_STOP))
bogdanm 92:4fc01daae5a5 91 #define __HAL_UNFREEZE_TIM6_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM6_STOP))
bogdanm 92:4fc01daae5a5 92 #define __HAL_UNFREEZE_TIM7_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM7_STOP))
bogdanm 92:4fc01daae5a5 93 #define __HAL_UNFREEZE_TIM12_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM12_STOP))
bogdanm 92:4fc01daae5a5 94 #define __HAL_UNFREEZE_TIM13_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM13_STOP))
bogdanm 92:4fc01daae5a5 95 #define __HAL_UNFREEZE_TIM14_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_TIM14_STOP))
bogdanm 92:4fc01daae5a5 96 #define __HAL_UNFREEZE_RTC_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_RTC_STOP))
bogdanm 92:4fc01daae5a5 97 #define __HAL_UNFREEZE_WWDG_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_WWDG_STOP))
bogdanm 92:4fc01daae5a5 98 #define __HAL_UNFREEZE_IWDG_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_IWDG_STOP))
bogdanm 92:4fc01daae5a5 99 #define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT))
bogdanm 92:4fc01daae5a5 100 #define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT))
bogdanm 92:4fc01daae5a5 101 #define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT))
bogdanm 92:4fc01daae5a5 102 #define __HAL_UNFREEZE_CAN1_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN1_STOP))
bogdanm 92:4fc01daae5a5 103 #define __HAL_UNFREEZE_CAN2_DBGMCU() (DBGMCU->APB1FZ &= ~(DBGMCU_APB1_FZ_DBG_CAN2_STOP))
bogdanm 92:4fc01daae5a5 104 #define __HAL_UNFREEZE_TIM1_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM1_STOP))
bogdanm 92:4fc01daae5a5 105 #define __HAL_UNFREEZE_TIM8_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM8_STOP))
bogdanm 92:4fc01daae5a5 106 #define __HAL_UNFREEZE_TIM9_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM9_STOP))
bogdanm 92:4fc01daae5a5 107 #define __HAL_UNFREEZE_TIM10_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM10_STOP))
bogdanm 92:4fc01daae5a5 108 #define __HAL_UNFREEZE_TIM11_DBGMCU() (DBGMCU->APB2FZ &= ~(DBGMCU_APB2_FZ_DBG_TIM11_STOP))
bogdanm 92:4fc01daae5a5 109
bogdanm 92:4fc01daae5a5 110 /** @brief Main Flash memory mapped at 0x00000000
bogdanm 92:4fc01daae5a5 111 */
bogdanm 92:4fc01daae5a5 112 #define __HAL_REMAPMEMORY_FLASH() (SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE))
bogdanm 92:4fc01daae5a5 113
bogdanm 92:4fc01daae5a5 114 /** @brief System Flash memory mapped at 0x00000000
bogdanm 92:4fc01daae5a5 115 */
bogdanm 92:4fc01daae5a5 116 #define __HAL_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
bogdanm 92:4fc01daae5a5 117 SYSCFG->MEMRMP |= SYSCFG_MEMRMP_MEM_MODE_0;\
bogdanm 92:4fc01daae5a5 118 }while(0);
bogdanm 92:4fc01daae5a5 119
bogdanm 92:4fc01daae5a5 120 /** @brief Embedded SRAM mapped at 0x00000000
bogdanm 92:4fc01daae5a5 121 */
bogdanm 92:4fc01daae5a5 122 #define __HAL_REMAPMEMORY_SRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
bogdanm 92:4fc01daae5a5 123 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_0 | SYSCFG_MEMRMP_MEM_MODE_1);\
bogdanm 92:4fc01daae5a5 124 }while(0);
bogdanm 92:4fc01daae5a5 125
bogdanm 92:4fc01daae5a5 126 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
bogdanm 92:4fc01daae5a5 127 /** @brief FSMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
bogdanm 92:4fc01daae5a5 128 */
bogdanm 92:4fc01daae5a5 129 #define __HAL_REMAPMEMORY_FSMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
bogdanm 92:4fc01daae5a5 130 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
bogdanm 92:4fc01daae5a5 131 }while(0);
bogdanm 92:4fc01daae5a5 132 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
bogdanm 92:4fc01daae5a5 133
bogdanm 92:4fc01daae5a5 134 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
bogdanm 92:4fc01daae5a5 135 /** @brief FMC Bank1 (NOR/PSRAM 1 and 2) mapped at 0x00000000
bogdanm 92:4fc01daae5a5 136 */
bogdanm 92:4fc01daae5a5 137 #define __HAL_REMAPMEMORY_FMC() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
bogdanm 92:4fc01daae5a5 138 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_1);\
bogdanm 92:4fc01daae5a5 139 }while(0);
bogdanm 92:4fc01daae5a5 140
bogdanm 92:4fc01daae5a5 141 /** @brief FMC/SDRAM Bank 1 and 2 mapped at 0x00000000
bogdanm 92:4fc01daae5a5 142 */
bogdanm 92:4fc01daae5a5 143 #define __HAL_REMAPMEMORY_FMC_SDRAM() do {SYSCFG->MEMRMP &= ~(SYSCFG_MEMRMP_MEM_MODE);\
bogdanm 92:4fc01daae5a5 144 SYSCFG->MEMRMP |= (SYSCFG_MEMRMP_MEM_MODE_2);\
bogdanm 92:4fc01daae5a5 145 }while(0);
bogdanm 92:4fc01daae5a5 146 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 92:4fc01daae5a5 147
bogdanm 92:4fc01daae5a5 148 /* Exported functions --------------------------------------------------------*/
bogdanm 92:4fc01daae5a5 149
bogdanm 92:4fc01daae5a5 150 /* Initialization and de-initialization functions ******************************/
bogdanm 92:4fc01daae5a5 151 HAL_StatusTypeDef HAL_Init(void);
bogdanm 92:4fc01daae5a5 152 HAL_StatusTypeDef HAL_DeInit(void);
bogdanm 92:4fc01daae5a5 153 void HAL_MspInit(void);
bogdanm 92:4fc01daae5a5 154 void HAL_MspDeInit(void);
bogdanm 92:4fc01daae5a5 155 HAL_StatusTypeDef HAL_InitTick (uint32_t TickPriority);
bogdanm 92:4fc01daae5a5 156
bogdanm 92:4fc01daae5a5 157 /* Peripheral Control functions ************************************************/
bogdanm 92:4fc01daae5a5 158 void HAL_IncTick(void);
bogdanm 92:4fc01daae5a5 159 void HAL_Delay(__IO uint32_t Delay);
bogdanm 92:4fc01daae5a5 160 uint32_t HAL_GetTick(void);
bogdanm 92:4fc01daae5a5 161 void HAL_SuspendTick(void);
bogdanm 92:4fc01daae5a5 162 void HAL_ResumeTick(void);
bogdanm 92:4fc01daae5a5 163 uint32_t HAL_GetHalVersion(void);
bogdanm 92:4fc01daae5a5 164 uint32_t HAL_GetREVID(void);
bogdanm 92:4fc01daae5a5 165 uint32_t HAL_GetDEVID(void);
bogdanm 92:4fc01daae5a5 166 void HAL_EnableDBGSleepMode(void);
bogdanm 92:4fc01daae5a5 167 void HAL_DisableDBGSleepMode(void);
bogdanm 92:4fc01daae5a5 168 void HAL_EnableDBGStopMode(void);
bogdanm 92:4fc01daae5a5 169 void HAL_DisableDBGStopMode(void);
bogdanm 92:4fc01daae5a5 170 void HAL_EnableDBGStandbyMode(void);
bogdanm 92:4fc01daae5a5 171 void HAL_DisableDBGStandbyMode(void);
bogdanm 92:4fc01daae5a5 172 void HAL_EnableCompensationCell(void);
bogdanm 92:4fc01daae5a5 173 void HAL_DisableCompensationCell(void);
bogdanm 92:4fc01daae5a5 174 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
bogdanm 92:4fc01daae5a5 175 void HAL_EnableMemorySwappingBank(void);
bogdanm 92:4fc01daae5a5 176 void HAL_DisableMemorySwappingBank(void);
bogdanm 92:4fc01daae5a5 177 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
bogdanm 92:4fc01daae5a5 178
bogdanm 92:4fc01daae5a5 179
bogdanm 92:4fc01daae5a5 180 /**
bogdanm 92:4fc01daae5a5 181 * @}
bogdanm 92:4fc01daae5a5 182 */
bogdanm 92:4fc01daae5a5 183
bogdanm 92:4fc01daae5a5 184 /**
bogdanm 92:4fc01daae5a5 185 * @}
bogdanm 92:4fc01daae5a5 186 */
bogdanm 92:4fc01daae5a5 187
bogdanm 92:4fc01daae5a5 188 #ifdef __cplusplus
bogdanm 92:4fc01daae5a5 189 }
bogdanm 92:4fc01daae5a5 190 #endif
bogdanm 92:4fc01daae5a5 191
bogdanm 92:4fc01daae5a5 192 #endif /* __STM32F4xx_HAL_H */
bogdanm 92:4fc01daae5a5 193
bogdanm 92:4fc01daae5a5 194 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/