Egor Rumjantsev
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TARGET_NUCLEO_F334R8/stm32f3xx_hal_sdadc.h@86:04dd9b1680ae, 2014-07-02 (annotated)
- Committer:
- bogdanm
- Date:
- Wed Jul 02 13:22:23 2014 +0100
- Revision:
- 86:04dd9b1680ae
- Child:
- 92:4fc01daae5a5
Release 86 of the mbed library
Main changes:
- bug fixes in various backends
- mbed "error" replaced by assert logic (mbed_assert)
- new ST Nucleo targets
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| bogdanm | 86:04dd9b1680ae | 1 | /** |
| bogdanm | 86:04dd9b1680ae | 2 | ****************************************************************************** |
| bogdanm | 86:04dd9b1680ae | 3 | * @file stm32f3xx_hal_sdadc.h |
| bogdanm | 86:04dd9b1680ae | 4 | * @author MCD Application Team |
| bogdanm | 86:04dd9b1680ae | 5 | * @version V1.0.1 |
| bogdanm | 86:04dd9b1680ae | 6 | * @date 18-June-2014 |
| bogdanm | 86:04dd9b1680ae | 7 | * @brief This file contains all the functions prototypes for the SDADC |
| bogdanm | 86:04dd9b1680ae | 8 | * firmware library. |
| bogdanm | 86:04dd9b1680ae | 9 | ****************************************************************************** |
| bogdanm | 86:04dd9b1680ae | 10 | * @attention |
| bogdanm | 86:04dd9b1680ae | 11 | * |
| bogdanm | 86:04dd9b1680ae | 12 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| bogdanm | 86:04dd9b1680ae | 13 | * |
| bogdanm | 86:04dd9b1680ae | 14 | * Redistribution and use in source and binary forms, with or without modification, |
| bogdanm | 86:04dd9b1680ae | 15 | * are permitted provided that the following conditions are met: |
| bogdanm | 86:04dd9b1680ae | 16 | * 1. Redistributions of source code must retain the above copyright notice, |
| bogdanm | 86:04dd9b1680ae | 17 | * this list of conditions and the following disclaimer. |
| bogdanm | 86:04dd9b1680ae | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| bogdanm | 86:04dd9b1680ae | 19 | * this list of conditions and the following disclaimer in the documentation |
| bogdanm | 86:04dd9b1680ae | 20 | * and/or other materials provided with the distribution. |
| bogdanm | 86:04dd9b1680ae | 21 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| bogdanm | 86:04dd9b1680ae | 22 | * may be used to endorse or promote products derived from this software |
| bogdanm | 86:04dd9b1680ae | 23 | * without specific prior written permission. |
| bogdanm | 86:04dd9b1680ae | 24 | * |
| bogdanm | 86:04dd9b1680ae | 25 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| bogdanm | 86:04dd9b1680ae | 26 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| bogdanm | 86:04dd9b1680ae | 27 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| bogdanm | 86:04dd9b1680ae | 28 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| bogdanm | 86:04dd9b1680ae | 29 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| bogdanm | 86:04dd9b1680ae | 30 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| bogdanm | 86:04dd9b1680ae | 31 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| bogdanm | 86:04dd9b1680ae | 32 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| bogdanm | 86:04dd9b1680ae | 33 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| bogdanm | 86:04dd9b1680ae | 34 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| bogdanm | 86:04dd9b1680ae | 35 | * |
| bogdanm | 86:04dd9b1680ae | 36 | ****************************************************************************** |
| bogdanm | 86:04dd9b1680ae | 37 | */ |
| bogdanm | 86:04dd9b1680ae | 38 | |
| bogdanm | 86:04dd9b1680ae | 39 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 40 | #ifndef __STM32F3xx_SDADC_H |
| bogdanm | 86:04dd9b1680ae | 41 | #define __STM32F3xx_SDADC_H |
| bogdanm | 86:04dd9b1680ae | 42 | |
| bogdanm | 86:04dd9b1680ae | 43 | #ifdef __cplusplus |
| bogdanm | 86:04dd9b1680ae | 44 | extern "C" { |
| bogdanm | 86:04dd9b1680ae | 45 | #endif |
| bogdanm | 86:04dd9b1680ae | 46 | |
| bogdanm | 86:04dd9b1680ae | 47 | #if defined(STM32F373xC) || defined(STM32F378xx) |
| bogdanm | 86:04dd9b1680ae | 48 | |
| bogdanm | 86:04dd9b1680ae | 49 | /* Includes ------------------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 50 | #include "stm32f3xx_hal_def.h" |
| bogdanm | 86:04dd9b1680ae | 51 | |
| bogdanm | 86:04dd9b1680ae | 52 | /** @addtogroup STM32F3xx_HAL_Driver |
| bogdanm | 86:04dd9b1680ae | 53 | * @{ |
| bogdanm | 86:04dd9b1680ae | 54 | */ |
| bogdanm | 86:04dd9b1680ae | 55 | |
| bogdanm | 86:04dd9b1680ae | 56 | /** @addtogroup SDADC |
| bogdanm | 86:04dd9b1680ae | 57 | * @{ |
| bogdanm | 86:04dd9b1680ae | 58 | */ |
| bogdanm | 86:04dd9b1680ae | 59 | |
| bogdanm | 86:04dd9b1680ae | 60 | /* Exported types ------------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 61 | |
| bogdanm | 86:04dd9b1680ae | 62 | /** |
| bogdanm | 86:04dd9b1680ae | 63 | * @brief HAL SDADC States definition |
| bogdanm | 86:04dd9b1680ae | 64 | */ |
| bogdanm | 86:04dd9b1680ae | 65 | typedef enum |
| bogdanm | 86:04dd9b1680ae | 66 | { |
| bogdanm | 86:04dd9b1680ae | 67 | HAL_SDADC_STATE_RESET = 0x00, /*!< SDADC not initialized */ |
| bogdanm | 86:04dd9b1680ae | 68 | HAL_SDADC_STATE_READY = 0x01, /*!< SDADC initialized and ready for use */ |
| bogdanm | 86:04dd9b1680ae | 69 | HAL_SDADC_STATE_CALIB = 0x02, /*!< SDADC calibration in progress */ |
| bogdanm | 86:04dd9b1680ae | 70 | HAL_SDADC_STATE_REG = 0x03, /*!< SDADC regular conversion in progress */ |
| bogdanm | 86:04dd9b1680ae | 71 | HAL_SDADC_STATE_INJ = 0x04, /*!< SDADC injected conversion in progress */ |
| bogdanm | 86:04dd9b1680ae | 72 | HAL_SDADC_STATE_REG_INJ = 0x05, /*!< SDADC regular and injected conversions in progress */ |
| bogdanm | 86:04dd9b1680ae | 73 | HAL_SDADC_STATE_ERROR = 0xFF, /*!< SDADC state error */ |
| bogdanm | 86:04dd9b1680ae | 74 | }HAL_SDADC_StateTypeDef; |
| bogdanm | 86:04dd9b1680ae | 75 | |
| bogdanm | 86:04dd9b1680ae | 76 | /** |
| bogdanm | 86:04dd9b1680ae | 77 | * @brief SDADC Init Structure definition |
| bogdanm | 86:04dd9b1680ae | 78 | */ |
| bogdanm | 86:04dd9b1680ae | 79 | typedef struct |
| bogdanm | 86:04dd9b1680ae | 80 | { |
| bogdanm | 86:04dd9b1680ae | 81 | uint32_t IdleLowPowerMode; /*!< Specifies if SDADC can enter in power down or standby when idle. |
| bogdanm | 86:04dd9b1680ae | 82 | This parameter can be a value of @ref SDADC_Idle_Low_Power_Mode */ |
| bogdanm | 86:04dd9b1680ae | 83 | uint32_t FastConversionMode; /*!< Specifies if Fast conversion mode is enabled or not. |
| bogdanm | 86:04dd9b1680ae | 84 | This parameter can be a value of @ref SDADC_Fast_Conv_Mode */ |
| bogdanm | 86:04dd9b1680ae | 85 | uint32_t SlowClockMode; /*!< Specifies if slow clock mode is enabled or not. |
| bogdanm | 86:04dd9b1680ae | 86 | This parameter can be a value of @ref SDADC_Slow_Clock_Mode */ |
| bogdanm | 86:04dd9b1680ae | 87 | uint32_t ReferenceVoltage; /*!< Specifies the reference voltage. |
| bogdanm | 86:04dd9b1680ae | 88 | This parameter can be a value of @ref SDADC_Reference_Voltage */ |
| bogdanm | 86:04dd9b1680ae | 89 | }SDADC_InitTypeDef; |
| bogdanm | 86:04dd9b1680ae | 90 | |
| bogdanm | 86:04dd9b1680ae | 91 | /** |
| bogdanm | 86:04dd9b1680ae | 92 | * @brief SDADC handle Structure definition |
| bogdanm | 86:04dd9b1680ae | 93 | */ |
| bogdanm | 86:04dd9b1680ae | 94 | typedef struct |
| bogdanm | 86:04dd9b1680ae | 95 | { |
| bogdanm | 86:04dd9b1680ae | 96 | SDADC_TypeDef *Instance; /*!< SDADC registers base address */ |
| bogdanm | 86:04dd9b1680ae | 97 | SDADC_InitTypeDef Init; /*!< SDADC init parameters */ |
| bogdanm | 86:04dd9b1680ae | 98 | DMA_HandleTypeDef *hdma; /*!< SDADC DMA Handle parameters */ |
| bogdanm | 86:04dd9b1680ae | 99 | uint32_t RegularContMode; /*!< Regular conversion continuous mode */ |
| bogdanm | 86:04dd9b1680ae | 100 | uint32_t InjectedContMode; /*!< Injected conversion continuous mode */ |
| bogdanm | 86:04dd9b1680ae | 101 | uint32_t InjectedChannelsNbr; /*!< Number of channels in injected sequence */ |
| bogdanm | 86:04dd9b1680ae | 102 | uint32_t InjConvRemaining; /*!< Injected conversion remaining */ |
| bogdanm | 86:04dd9b1680ae | 103 | uint32_t RegularTrigger; /*!< Current trigger used for regular conversion */ |
| bogdanm | 86:04dd9b1680ae | 104 | uint32_t InjectedTrigger; /*!< Current trigger used for injected conversion */ |
| bogdanm | 86:04dd9b1680ae | 105 | uint32_t ExtTriggerEdge; /*!< Rising, falling or both edges selected */ |
| bogdanm | 86:04dd9b1680ae | 106 | uint32_t RegularMultimode; /*!< current type of regular multimode */ |
| bogdanm | 86:04dd9b1680ae | 107 | uint32_t InjectedMultimode; /*!< Current type of injected multimode */ |
| bogdanm | 86:04dd9b1680ae | 108 | HAL_SDADC_StateTypeDef State; /*!< SDADC state */ |
| bogdanm | 86:04dd9b1680ae | 109 | uint32_t ErrorCode; /*!< SDADC Error code */ |
| bogdanm | 86:04dd9b1680ae | 110 | }SDADC_HandleTypeDef; |
| bogdanm | 86:04dd9b1680ae | 111 | |
| bogdanm | 86:04dd9b1680ae | 112 | /** |
| bogdanm | 86:04dd9b1680ae | 113 | * @brief SDADC Configuration Register Parameter Structure |
| bogdanm | 86:04dd9b1680ae | 114 | */ |
| bogdanm | 86:04dd9b1680ae | 115 | typedef struct |
| bogdanm | 86:04dd9b1680ae | 116 | { |
| bogdanm | 86:04dd9b1680ae | 117 | uint32_t InputMode; /*!< Specifies the input mode (single ended, differential...) |
| bogdanm | 86:04dd9b1680ae | 118 | This parameter can be any value of @ref SDADC_InputMode */ |
| bogdanm | 86:04dd9b1680ae | 119 | uint32_t Gain; /*!< Specifies the gain setting. |
| bogdanm | 86:04dd9b1680ae | 120 | This parameter can be any value of @ref SDADC_Gain */ |
| bogdanm | 86:04dd9b1680ae | 121 | uint32_t CommonMode; /*!< Specifies the common mode setting (VSSA, VDDA, VDDA/2). |
| bogdanm | 86:04dd9b1680ae | 122 | This parameter can be any value of @ref SDADC_CommonMode */ |
| bogdanm | 86:04dd9b1680ae | 123 | uint32_t Offset; /*!< Specifies the 12-bit offset value. |
| bogdanm | 86:04dd9b1680ae | 124 | This parameter can be any value lower or equal to 0x00000FFF */ |
| bogdanm | 86:04dd9b1680ae | 125 | }SDADC_ConfParamTypeDef; |
| bogdanm | 86:04dd9b1680ae | 126 | |
| bogdanm | 86:04dd9b1680ae | 127 | /** @defgroup SDADC_Idle_Low_Power_Mode |
| bogdanm | 86:04dd9b1680ae | 128 | * @{ |
| bogdanm | 86:04dd9b1680ae | 129 | */ |
| bogdanm | 86:04dd9b1680ae | 130 | #define SDADC_LOWPOWER_NONE ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 131 | #define SDADC_LOWPOWER_POWERDOWN SDADC_CR1_PDI |
| bogdanm | 86:04dd9b1680ae | 132 | #define SDADC_LOWPOWER_STANDBY SDADC_CR1_SBI |
| bogdanm | 86:04dd9b1680ae | 133 | #define IS_SDADC_LOWPOWER_MODE(LOWPOWER) (((LOWPOWER) == SDADC_LOWPOWER_NONE) || \ |
| bogdanm | 86:04dd9b1680ae | 134 | ((LOWPOWER) == SDADC_LOWPOWER_POWERDOWN) || \ |
| bogdanm | 86:04dd9b1680ae | 135 | ((LOWPOWER) == SDADC_LOWPOWER_STANDBY)) |
| bogdanm | 86:04dd9b1680ae | 136 | /** |
| bogdanm | 86:04dd9b1680ae | 137 | * @} |
| bogdanm | 86:04dd9b1680ae | 138 | */ |
| bogdanm | 86:04dd9b1680ae | 139 | |
| bogdanm | 86:04dd9b1680ae | 140 | /** @defgroup SDADC_Fast_Conv_Mode |
| bogdanm | 86:04dd9b1680ae | 141 | * @{ |
| bogdanm | 86:04dd9b1680ae | 142 | */ |
| bogdanm | 86:04dd9b1680ae | 143 | #define SDADC_FAST_CONV_DISABLE ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 144 | #define SDADC_FAST_CONV_ENABLE SDADC_CR2_FAST |
| bogdanm | 86:04dd9b1680ae | 145 | #define IS_SDADC_FAST_CONV_MODE(FAST) (((FAST) == SDADC_FAST_CONV_DISABLE) || \ |
| bogdanm | 86:04dd9b1680ae | 146 | ((FAST) == SDADC_FAST_CONV_ENABLE)) |
| bogdanm | 86:04dd9b1680ae | 147 | /** |
| bogdanm | 86:04dd9b1680ae | 148 | * @} |
| bogdanm | 86:04dd9b1680ae | 149 | */ |
| bogdanm | 86:04dd9b1680ae | 150 | |
| bogdanm | 86:04dd9b1680ae | 151 | /** @defgroup SDADC_Slow_Clock_Mode |
| bogdanm | 86:04dd9b1680ae | 152 | * @{ |
| bogdanm | 86:04dd9b1680ae | 153 | */ |
| bogdanm | 86:04dd9b1680ae | 154 | #define SDADC_SLOW_CLOCK_DISABLE ((uint32_t)0x00000000) |
| bogdanm | 86:04dd9b1680ae | 155 | #define SDADC_SLOW_CLOCK_ENABLE SDADC_CR1_SLOWCK |
| bogdanm | 86:04dd9b1680ae | 156 | #define IS_SDADC_SLOW_CLOCK_MODE(MODE) (((MODE) == SDADC_SLOW_CLOCK_DISABLE) || \ |
| bogdanm | 86:04dd9b1680ae | 157 | ((MODE) == SDADC_SLOW_CLOCK_ENABLE)) |
| bogdanm | 86:04dd9b1680ae | 158 | /** |
| bogdanm | 86:04dd9b1680ae | 159 | * @} |
| bogdanm | 86:04dd9b1680ae | 160 | */ |
| bogdanm | 86:04dd9b1680ae | 161 | |
| bogdanm | 86:04dd9b1680ae | 162 | /** @defgroup SDADC_Reference_Voltage |
| bogdanm | 86:04dd9b1680ae | 163 | * @{ |
| bogdanm | 86:04dd9b1680ae | 164 | */ |
| bogdanm | 86:04dd9b1680ae | 165 | #define SDADC_VREF_EXT ((uint32_t)0x00000000) /*!< The reference voltage is forced externally using VREF pin */ |
| bogdanm | 86:04dd9b1680ae | 166 | #define SDADC_VREF_VREFINT1 SDADC_CR1_REFV_0 /*!< The reference voltage is forced internally to 1.22V VREFINT */ |
| bogdanm | 86:04dd9b1680ae | 167 | #define SDADC_VREF_VREFINT2 SDADC_CR1_REFV_1 /*!< The reference voltage is forced internally to 1.8V VREFINT */ |
| bogdanm | 86:04dd9b1680ae | 168 | #define SDADC_VREF_VDDA SDADC_CR1_REFV /*!< The reference voltage is forced internally to VDDA */ |
| bogdanm | 86:04dd9b1680ae | 169 | #define IS_SDADC_VREF(VREF) (((VREF) == SDADC_VREF_EXT) || \ |
| bogdanm | 86:04dd9b1680ae | 170 | ((VREF) == SDADC_VREF_VREFINT1) || \ |
| bogdanm | 86:04dd9b1680ae | 171 | ((VREF) == SDADC_VREF_VREFINT2) || \ |
| bogdanm | 86:04dd9b1680ae | 172 | ((VREF) == SDADC_VREF_VDDA)) |
| bogdanm | 86:04dd9b1680ae | 173 | /** |
| bogdanm | 86:04dd9b1680ae | 174 | * @} |
| bogdanm | 86:04dd9b1680ae | 175 | */ |
| bogdanm | 86:04dd9b1680ae | 176 | |
| bogdanm | 86:04dd9b1680ae | 177 | /** @defgroup SDADC_ConfIndex |
| bogdanm | 86:04dd9b1680ae | 178 | * @{ |
| bogdanm | 86:04dd9b1680ae | 179 | */ |
| bogdanm | 86:04dd9b1680ae | 180 | |
| bogdanm | 86:04dd9b1680ae | 181 | #define SDADC_CONF_INDEX_0 ((uint32_t)0x00000000) /*!< Configuration 0 Register selected */ |
| bogdanm | 86:04dd9b1680ae | 182 | #define SDADC_CONF_INDEX_1 ((uint32_t)0x00000001) /*!< Configuration 1 Register selected */ |
| bogdanm | 86:04dd9b1680ae | 183 | #define SDADC_CONF_INDEX_2 ((uint32_t)0x00000002) /*!< Configuration 2 Register selected */ |
| bogdanm | 86:04dd9b1680ae | 184 | |
| bogdanm | 86:04dd9b1680ae | 185 | #define IS_SDADC_CONF_INDEX(CONF) (((CONF) == SDADC_CONF_INDEX_0) || \ |
| bogdanm | 86:04dd9b1680ae | 186 | ((CONF) == SDADC_CONF_INDEX_1) || \ |
| bogdanm | 86:04dd9b1680ae | 187 | ((CONF) == SDADC_CONF_INDEX_2)) |
| bogdanm | 86:04dd9b1680ae | 188 | /** |
| bogdanm | 86:04dd9b1680ae | 189 | * @} |
| bogdanm | 86:04dd9b1680ae | 190 | */ |
| bogdanm | 86:04dd9b1680ae | 191 | |
| bogdanm | 86:04dd9b1680ae | 192 | /** @defgroup SDADC_InputMode |
| bogdanm | 86:04dd9b1680ae | 193 | * @{ |
| bogdanm | 86:04dd9b1680ae | 194 | */ |
| bogdanm | 86:04dd9b1680ae | 195 | #define SDADC_INPUT_MODE_DIFF ((uint32_t)0x00000000) /*!< Conversions are executed in differential mode */ |
| bogdanm | 86:04dd9b1680ae | 196 | #define SDADC_INPUT_MODE_SE_OFFSET SDADC_CONF0R_SE0_0 /*!< Conversions are executed in single ended offset mode */ |
| bogdanm | 86:04dd9b1680ae | 197 | #define SDADC_INPUT_MODE_SE_ZERO_REFERENCE SDADC_CONF0R_SE0 /*!< Conversions are executed in single ended zero-volt reference mode */ |
| bogdanm | 86:04dd9b1680ae | 198 | |
| bogdanm | 86:04dd9b1680ae | 199 | #define IS_SDADC_INPUT_MODE(MODE) (((MODE) == SDADC_INPUT_MODE_DIFF) || \ |
| bogdanm | 86:04dd9b1680ae | 200 | ((MODE) == SDADC_INPUT_MODE_SE_OFFSET) || \ |
| bogdanm | 86:04dd9b1680ae | 201 | ((MODE) == SDADC_INPUT_MODE_SE_ZERO_REFERENCE)) |
| bogdanm | 86:04dd9b1680ae | 202 | /** |
| bogdanm | 86:04dd9b1680ae | 203 | * @} |
| bogdanm | 86:04dd9b1680ae | 204 | */ |
| bogdanm | 86:04dd9b1680ae | 205 | |
| bogdanm | 86:04dd9b1680ae | 206 | /** @defgroup SDADC_Gain |
| bogdanm | 86:04dd9b1680ae | 207 | * @{ |
| bogdanm | 86:04dd9b1680ae | 208 | */ |
| bogdanm | 86:04dd9b1680ae | 209 | #define SDADC_GAIN_1 ((uint32_t)0x00000000) /*!< Gain equal to 1 */ |
| bogdanm | 86:04dd9b1680ae | 210 | #define SDADC_GAIN_2 SDADC_CONF0R_GAIN0_0 /*!< Gain equal to 2 */ |
| bogdanm | 86:04dd9b1680ae | 211 | #define SDADC_GAIN_4 SDADC_CONF0R_GAIN0_1 /*!< Gain equal to 4 */ |
| bogdanm | 86:04dd9b1680ae | 212 | #define SDADC_GAIN_8 ((uint32_t)0x00300000) /*!< Gain equal to 8 */ |
| bogdanm | 86:04dd9b1680ae | 213 | #define SDADC_GAIN_16 SDADC_CONF0R_GAIN0_2 /*!< Gain equal to 16 */ |
| bogdanm | 86:04dd9b1680ae | 214 | #define SDADC_GAIN_32 ((uint32_t)0x00500000) /*!< Gain equal to 32 */ |
| bogdanm | 86:04dd9b1680ae | 215 | #define SDADC_GAIN_1_2 SDADC_CONF0R_GAIN0 /*!< Gain equal to 1/2 */ |
| bogdanm | 86:04dd9b1680ae | 216 | #define IS_SDADC_GAIN(GAIN) (((GAIN) == SDADC_GAIN_1) || \ |
| bogdanm | 86:04dd9b1680ae | 217 | ((GAIN) == SDADC_GAIN_2) || \ |
| bogdanm | 86:04dd9b1680ae | 218 | ((GAIN) == SDADC_GAIN_4) || \ |
| bogdanm | 86:04dd9b1680ae | 219 | ((GAIN) == SDADC_GAIN_8) || \ |
| bogdanm | 86:04dd9b1680ae | 220 | ((GAIN) == SDADC_GAIN_16) || \ |
| bogdanm | 86:04dd9b1680ae | 221 | ((GAIN) == SDADC_GAIN_32) || \ |
| bogdanm | 86:04dd9b1680ae | 222 | ((GAIN) == SDADC_GAIN_1_2)) |
| bogdanm | 86:04dd9b1680ae | 223 | /** |
| bogdanm | 86:04dd9b1680ae | 224 | * @} |
| bogdanm | 86:04dd9b1680ae | 225 | */ |
| bogdanm | 86:04dd9b1680ae | 226 | |
| bogdanm | 86:04dd9b1680ae | 227 | /** @defgroup SDADC_CommonMode |
| bogdanm | 86:04dd9b1680ae | 228 | * @{ |
| bogdanm | 86:04dd9b1680ae | 229 | */ |
| bogdanm | 86:04dd9b1680ae | 230 | #define SDADC_COMMON_MODE_VSSA ((uint32_t)0x00000000) /*!< Select SDADC VSSA as common mode */ |
| bogdanm | 86:04dd9b1680ae | 231 | #define SDADC_COMMON_MODE_VDDA_2 SDADC_CONF0R_COMMON0_0 /*!< Select SDADC VDDA/2 as common mode */ |
| bogdanm | 86:04dd9b1680ae | 232 | #define SDADC_COMMON_MODE_VDDA SDADC_CONF0R_COMMON0_1 /*!< Select SDADC VDDA as common mode */ |
| bogdanm | 86:04dd9b1680ae | 233 | #define IS_SDADC_COMMON_MODE(MODE) (((MODE) == SDADC_COMMON_MODE_VSSA) || \ |
| bogdanm | 86:04dd9b1680ae | 234 | ((MODE) == SDADC_COMMON_MODE_VDDA_2) || \ |
| bogdanm | 86:04dd9b1680ae | 235 | ((MODE) == SDADC_COMMON_MODE_VDDA)) |
| bogdanm | 86:04dd9b1680ae | 236 | /** |
| bogdanm | 86:04dd9b1680ae | 237 | * @} |
| bogdanm | 86:04dd9b1680ae | 238 | */ |
| bogdanm | 86:04dd9b1680ae | 239 | |
| bogdanm | 86:04dd9b1680ae | 240 | /** @defgroup SDADC_Offset |
| bogdanm | 86:04dd9b1680ae | 241 | * @{ |
| bogdanm | 86:04dd9b1680ae | 242 | */ |
| bogdanm | 86:04dd9b1680ae | 243 | #define IS_SDADC_OFFSET_VALUE(VALUE) ((VALUE) <= 0x00000FFF) |
| bogdanm | 86:04dd9b1680ae | 244 | /** |
| bogdanm | 86:04dd9b1680ae | 245 | * @} |
| bogdanm | 86:04dd9b1680ae | 246 | */ |
| bogdanm | 86:04dd9b1680ae | 247 | |
| bogdanm | 86:04dd9b1680ae | 248 | /** @defgroup SDADC_Channel_Selection |
| bogdanm | 86:04dd9b1680ae | 249 | * @{ |
| bogdanm | 86:04dd9b1680ae | 250 | */ |
| bogdanm | 86:04dd9b1680ae | 251 | |
| bogdanm | 86:04dd9b1680ae | 252 | /* SDADC Channels ------------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 253 | /* The SDADC channels are defined as follows: |
| bogdanm | 86:04dd9b1680ae | 254 | - in 16-bit LSB the channel mask is set |
| bogdanm | 86:04dd9b1680ae | 255 | - in 16-bit MSB the channel number is set |
| bogdanm | 86:04dd9b1680ae | 256 | e.g. for channel 5 definition: |
| bogdanm | 86:04dd9b1680ae | 257 | - the channel mask is 0x00000020 (bit 5 is set) |
| bogdanm | 86:04dd9b1680ae | 258 | - the channel number 5 is 0x00050000 |
| bogdanm | 86:04dd9b1680ae | 259 | --> Consequently, channel 5 definition is 0x00000020 | 0x00050000 = 0x00050020 */ |
| bogdanm | 86:04dd9b1680ae | 260 | #define SDADC_CHANNEL_0 ((uint32_t)0x00000001) |
| bogdanm | 86:04dd9b1680ae | 261 | #define SDADC_CHANNEL_1 ((uint32_t)0x00010002) |
| bogdanm | 86:04dd9b1680ae | 262 | #define SDADC_CHANNEL_2 ((uint32_t)0x00020004) |
| bogdanm | 86:04dd9b1680ae | 263 | #define SDADC_CHANNEL_3 ((uint32_t)0x00030008) |
| bogdanm | 86:04dd9b1680ae | 264 | #define SDADC_CHANNEL_4 ((uint32_t)0x00040010) |
| bogdanm | 86:04dd9b1680ae | 265 | #define SDADC_CHANNEL_5 ((uint32_t)0x00050020) |
| bogdanm | 86:04dd9b1680ae | 266 | #define SDADC_CHANNEL_6 ((uint32_t)0x00060040) |
| bogdanm | 86:04dd9b1680ae | 267 | #define SDADC_CHANNEL_7 ((uint32_t)0x00070080) |
| bogdanm | 86:04dd9b1680ae | 268 | #define SDADC_CHANNEL_8 ((uint32_t)0x00080100) |
| bogdanm | 86:04dd9b1680ae | 269 | |
| bogdanm | 86:04dd9b1680ae | 270 | /* Just one channel of the 9 channels can be selected for regular conversion */ |
| bogdanm | 86:04dd9b1680ae | 271 | #define IS_SDADC_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == SDADC_CHANNEL_0) || \ |
| bogdanm | 86:04dd9b1680ae | 272 | ((CHANNEL) == SDADC_CHANNEL_1) || \ |
| bogdanm | 86:04dd9b1680ae | 273 | ((CHANNEL) == SDADC_CHANNEL_2) || \ |
| bogdanm | 86:04dd9b1680ae | 274 | ((CHANNEL) == SDADC_CHANNEL_3) || \ |
| bogdanm | 86:04dd9b1680ae | 275 | ((CHANNEL) == SDADC_CHANNEL_4) || \ |
| bogdanm | 86:04dd9b1680ae | 276 | ((CHANNEL) == SDADC_CHANNEL_5) || \ |
| bogdanm | 86:04dd9b1680ae | 277 | ((CHANNEL) == SDADC_CHANNEL_6) || \ |
| bogdanm | 86:04dd9b1680ae | 278 | ((CHANNEL) == SDADC_CHANNEL_7) || \ |
| bogdanm | 86:04dd9b1680ae | 279 | ((CHANNEL) == SDADC_CHANNEL_8)) |
| bogdanm | 86:04dd9b1680ae | 280 | |
| bogdanm | 86:04dd9b1680ae | 281 | /* Any or all of the 9 channels can be selected for injected conversion */ |
| bogdanm | 86:04dd9b1680ae | 282 | #define IS_SDADC_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0) && ((CHANNEL) <= 0x000F01FF)) |
| bogdanm | 86:04dd9b1680ae | 283 | |
| bogdanm | 86:04dd9b1680ae | 284 | /** |
| bogdanm | 86:04dd9b1680ae | 285 | * @} |
| bogdanm | 86:04dd9b1680ae | 286 | */ |
| bogdanm | 86:04dd9b1680ae | 287 | |
| bogdanm | 86:04dd9b1680ae | 288 | /** @defgroup SDADC_CalibrationSequence |
| bogdanm | 86:04dd9b1680ae | 289 | * @{ |
| bogdanm | 86:04dd9b1680ae | 290 | */ |
| bogdanm | 86:04dd9b1680ae | 291 | #define SDADC_CALIBRATION_SEQ_1 ((uint32_t)0x00000000) /*!< One calibration sequence to calculate offset of conf0 (OFFSET0[11:0]) */ |
| bogdanm | 86:04dd9b1680ae | 292 | #define SDADC_CALIBRATION_SEQ_2 SDADC_CR2_CALIBCNT_0 /*!< Two calibration sequences to calculate offset of conf0 and conf1 (OFFSET0[11:0] and OFFSET1[11:0]) */ |
| bogdanm | 86:04dd9b1680ae | 293 | #define SDADC_CALIBRATION_SEQ_3 SDADC_CR2_CALIBCNT_1 /*!< Three calibration sequences to calculate offset of conf0, conf1 and conf2 (OFFSET0[11:0], OFFSET1[11:0], and OFFSET2[11:0]) */ |
| bogdanm | 86:04dd9b1680ae | 294 | |
| bogdanm | 86:04dd9b1680ae | 295 | #define IS_SDADC_CALIB_SEQUENCE(SEQUENCE) (((SEQUENCE) == SDADC_CALIBRATION_SEQ_1) || \ |
| bogdanm | 86:04dd9b1680ae | 296 | ((SEQUENCE) == SDADC_CALIBRATION_SEQ_2) || \ |
| bogdanm | 86:04dd9b1680ae | 297 | ((SEQUENCE) == SDADC_CALIBRATION_SEQ_3)) |
| bogdanm | 86:04dd9b1680ae | 298 | /** |
| bogdanm | 86:04dd9b1680ae | 299 | * @} |
| bogdanm | 86:04dd9b1680ae | 300 | */ |
| bogdanm | 86:04dd9b1680ae | 301 | |
| bogdanm | 86:04dd9b1680ae | 302 | /** @defgroup SDADC_ContinuousMode |
| bogdanm | 86:04dd9b1680ae | 303 | * @{ |
| bogdanm | 86:04dd9b1680ae | 304 | */ |
| bogdanm | 86:04dd9b1680ae | 305 | #define SDADC_CONTINUOUS_CONV_OFF ((uint32_t)0x00000000) /*!< Conversion are not continuous */ |
| bogdanm | 86:04dd9b1680ae | 306 | #define SDADC_CONTINUOUS_CONV_ON ((uint32_t)0x00000001) /*!< Conversion are continuous */ |
| bogdanm | 86:04dd9b1680ae | 307 | |
| bogdanm | 86:04dd9b1680ae | 308 | #define IS_SDADC_CONTINUOUS_MODE(MODE) (((MODE) == SDADC_CONTINUOUS_CONV_OFF) || \ |
| bogdanm | 86:04dd9b1680ae | 309 | ((MODE) == SDADC_CONTINUOUS_CONV_ON)) |
| bogdanm | 86:04dd9b1680ae | 310 | /** |
| bogdanm | 86:04dd9b1680ae | 311 | * @} |
| bogdanm | 86:04dd9b1680ae | 312 | */ |
| bogdanm | 86:04dd9b1680ae | 313 | |
| bogdanm | 86:04dd9b1680ae | 314 | /** @defgroup SDADC_Trigger |
| bogdanm | 86:04dd9b1680ae | 315 | * @{ |
| bogdanm | 86:04dd9b1680ae | 316 | */ |
| bogdanm | 86:04dd9b1680ae | 317 | #define SDADC_SOFTWARE_TRIGGER ((uint32_t)0x00000000) /*!< Software trigger */ |
| bogdanm | 86:04dd9b1680ae | 318 | #define SDADC_SYNCHRONOUS_TRIGGER ((uint32_t)0x00000001) /*!< Synchronous with SDADC1 (only for SDADC2 and SDADC3) */ |
| bogdanm | 86:04dd9b1680ae | 319 | #define SDADC_EXTERNAL_TRIGGER ((uint32_t)0x00000002) /*!< External trigger */ |
| bogdanm | 86:04dd9b1680ae | 320 | |
| bogdanm | 86:04dd9b1680ae | 321 | #define IS_SDADC_REGULAR_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ |
| bogdanm | 86:04dd9b1680ae | 322 | ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER)) |
| bogdanm | 86:04dd9b1680ae | 323 | |
| bogdanm | 86:04dd9b1680ae | 324 | #define IS_SDADC_INJECTED_TRIGGER(TRIGGER) (((TRIGGER) == SDADC_SOFTWARE_TRIGGER) || \ |
| bogdanm | 86:04dd9b1680ae | 325 | ((TRIGGER) == SDADC_SYNCHRONOUS_TRIGGER) || \ |
| bogdanm | 86:04dd9b1680ae | 326 | ((TRIGGER) == SDADC_EXTERNAL_TRIGGER)) |
| bogdanm | 86:04dd9b1680ae | 327 | /** |
| bogdanm | 86:04dd9b1680ae | 328 | * @} |
| bogdanm | 86:04dd9b1680ae | 329 | */ |
| bogdanm | 86:04dd9b1680ae | 330 | |
| bogdanm | 86:04dd9b1680ae | 331 | /** @defgroup SDADC_InjectedExtTrigger |
| bogdanm | 86:04dd9b1680ae | 332 | * @{ |
| bogdanm | 86:04dd9b1680ae | 333 | */ |
| bogdanm | 86:04dd9b1680ae | 334 | #define SDADC_EXT_TRIG_TIM13_CC1 ((uint32_t)0x00000000) /*!< Trigger source for SDADC1 */ |
| bogdanm | 86:04dd9b1680ae | 335 | #define SDADC_EXT_TRIG_TIM14_CC1 ((uint32_t)0x00000100) /*!< Trigger source for SDADC1 */ |
| bogdanm | 86:04dd9b1680ae | 336 | #define SDADC_EXT_TRIG_TIM16_CC1 ((uint32_t)0x00000000) /*!< Trigger source for SDADC3 */ |
| bogdanm | 86:04dd9b1680ae | 337 | #define SDADC_EXT_TRIG_TIM17_CC1 ((uint32_t)0x00000000) /*!< Trigger source for SDADC2 */ |
| bogdanm | 86:04dd9b1680ae | 338 | #define SDADC_EXT_TRIG_TIM12_CC1 ((uint32_t)0x00000100) /*!< Trigger source for SDADC2 */ |
| bogdanm | 86:04dd9b1680ae | 339 | #define SDADC_EXT_TRIG_TIM12_CC2 ((uint32_t)0x00000100) /*!< Trigger source for SDADC3 */ |
| bogdanm | 86:04dd9b1680ae | 340 | #define SDADC_EXT_TRIG_TIM15_CC2 ((uint32_t)0x00000200) /*!< Trigger source for SDADC1 */ |
| bogdanm | 86:04dd9b1680ae | 341 | #define SDADC_EXT_TRIG_TIM2_CC3 ((uint32_t)0x00000200) /*!< Trigger source for SDADC2 */ |
| bogdanm | 86:04dd9b1680ae | 342 | #define SDADC_EXT_TRIG_TIM2_CC4 ((uint32_t)0x00000200) /*!< Trigger source for SDADC3 */ |
| bogdanm | 86:04dd9b1680ae | 343 | #define SDADC_EXT_TRIG_TIM3_CC1 ((uint32_t)0x00000300) /*!< Trigger source for SDADC1 */ |
| bogdanm | 86:04dd9b1680ae | 344 | #define SDADC_EXT_TRIG_TIM3_CC2 ((uint32_t)0x00000300) /*!< Trigger source for SDADC2 */ |
| bogdanm | 86:04dd9b1680ae | 345 | #define SDADC_EXT_TRIG_TIM3_CC3 ((uint32_t)0x00000300) /*!< Trigger source for SDADC3 */ |
| bogdanm | 86:04dd9b1680ae | 346 | #define SDADC_EXT_TRIG_TIM4_CC1 ((uint32_t)0x00000400) /*!< Trigger source for SDADC1 */ |
| bogdanm | 86:04dd9b1680ae | 347 | #define SDADC_EXT_TRIG_TIM4_CC2 ((uint32_t)0x00000400) /*!< Trigger source for SDADC2 */ |
| bogdanm | 86:04dd9b1680ae | 348 | #define SDADC_EXT_TRIG_TIM4_CC3 ((uint32_t)0x00000400) /*!< Trigger source for SDADC3 */ |
| bogdanm | 86:04dd9b1680ae | 349 | #define SDADC_EXT_TRIG_TIM19_CC2 ((uint32_t)0x00000500) /*!< Trigger source for SDADC1 */ |
| bogdanm | 86:04dd9b1680ae | 350 | #define SDADC_EXT_TRIG_TIM19_CC3 ((uint32_t)0x00000500) /*!< Trigger source for SDADC2 */ |
| bogdanm | 86:04dd9b1680ae | 351 | #define SDADC_EXT_TRIG_TIM19_CC4 ((uint32_t)0x00000500) /*!< Trigger source for SDADC3 */ |
| bogdanm | 86:04dd9b1680ae | 352 | #define SDADC_EXT_TRIG_EXTI11 ((uint32_t)0x00000700) /*!< Trigger source for SDADC1, SDADC2 and SDADC3 */ |
| bogdanm | 86:04dd9b1680ae | 353 | #define SDADC_EXT_TRIG_EXTI15 ((uint32_t)0x00000600) /*!< Trigger source for SDADC1, SDADC2 and SDADC3 */ |
| bogdanm | 86:04dd9b1680ae | 354 | |
| bogdanm | 86:04dd9b1680ae | 355 | #define IS_SDADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == SDADC_EXT_TRIG_TIM13_CC1) || \ |
| bogdanm | 86:04dd9b1680ae | 356 | ((INJTRIG) == SDADC_EXT_TRIG_TIM14_CC1) || \ |
| bogdanm | 86:04dd9b1680ae | 357 | ((INJTRIG) == SDADC_EXT_TRIG_TIM16_CC1) || \ |
| bogdanm | 86:04dd9b1680ae | 358 | ((INJTRIG) == SDADC_EXT_TRIG_TIM17_CC1) || \ |
| bogdanm | 86:04dd9b1680ae | 359 | ((INJTRIG) == SDADC_EXT_TRIG_TIM12_CC1) || \ |
| bogdanm | 86:04dd9b1680ae | 360 | ((INJTRIG) == SDADC_EXT_TRIG_TIM12_CC2) || \ |
| bogdanm | 86:04dd9b1680ae | 361 | ((INJTRIG) == SDADC_EXT_TRIG_TIM15_CC2) || \ |
| bogdanm | 86:04dd9b1680ae | 362 | ((INJTRIG) == SDADC_EXT_TRIG_TIM2_CC3) || \ |
| bogdanm | 86:04dd9b1680ae | 363 | ((INJTRIG) == SDADC_EXT_TRIG_TIM2_CC4) || \ |
| bogdanm | 86:04dd9b1680ae | 364 | ((INJTRIG) == SDADC_EXT_TRIG_TIM3_CC1) || \ |
| bogdanm | 86:04dd9b1680ae | 365 | ((INJTRIG) == SDADC_EXT_TRIG_TIM3_CC2) || \ |
| bogdanm | 86:04dd9b1680ae | 366 | ((INJTRIG) == SDADC_EXT_TRIG_TIM3_CC3) || \ |
| bogdanm | 86:04dd9b1680ae | 367 | ((INJTRIG) == SDADC_EXT_TRIG_TIM4_CC1) || \ |
| bogdanm | 86:04dd9b1680ae | 368 | ((INJTRIG) == SDADC_EXT_TRIG_TIM4_CC2) || \ |
| bogdanm | 86:04dd9b1680ae | 369 | ((INJTRIG) == SDADC_EXT_TRIG_TIM4_CC3) || \ |
| bogdanm | 86:04dd9b1680ae | 370 | ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC2) || \ |
| bogdanm | 86:04dd9b1680ae | 371 | ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC3) || \ |
| bogdanm | 86:04dd9b1680ae | 372 | ((INJTRIG) == SDADC_EXT_TRIG_TIM19_CC4) || \ |
| bogdanm | 86:04dd9b1680ae | 373 | ((INJTRIG) == SDADC_EXT_TRIG_EXTI11) || \ |
| bogdanm | 86:04dd9b1680ae | 374 | ((INJTRIG) == SDADC_EXT_TRIG_EXTI15)) |
| bogdanm | 86:04dd9b1680ae | 375 | /** |
| bogdanm | 86:04dd9b1680ae | 376 | * @} |
| bogdanm | 86:04dd9b1680ae | 377 | */ |
| bogdanm | 86:04dd9b1680ae | 378 | |
| bogdanm | 86:04dd9b1680ae | 379 | /** @defgroup SDADC_ExtTriggerEdge |
| bogdanm | 86:04dd9b1680ae | 380 | * @{ |
| bogdanm | 86:04dd9b1680ae | 381 | */ |
| bogdanm | 86:04dd9b1680ae | 382 | #define SDADC_EXT_TRIG_RISING_EDGE SDADC_CR2_JEXTEN_0 /*!< External rising edge */ |
| bogdanm | 86:04dd9b1680ae | 383 | #define SDADC_EXT_TRIG_FALLING_EDGE SDADC_CR2_JEXTEN_1 /*!< External falling edge */ |
| bogdanm | 86:04dd9b1680ae | 384 | #define SDADC_EXT_TRIG_BOTH_EDGES SDADC_CR2_JEXTEN /*!< External rising and falling edges */ |
| bogdanm | 86:04dd9b1680ae | 385 | |
| bogdanm | 86:04dd9b1680ae | 386 | #define IS_SDADC_EXT_TRIG_EDGE(TRIGGER) (((TRIGGER) == SDADC_EXT_TRIG_RISING_EDGE) || \ |
| bogdanm | 86:04dd9b1680ae | 387 | ((TRIGGER) == SDADC_EXT_TRIG_FALLING_EDGE) || \ |
| bogdanm | 86:04dd9b1680ae | 388 | ((TRIGGER) == SDADC_EXT_TRIG_BOTH_EDGES)) |
| bogdanm | 86:04dd9b1680ae | 389 | /** |
| bogdanm | 86:04dd9b1680ae | 390 | * @} |
| bogdanm | 86:04dd9b1680ae | 391 | */ |
| bogdanm | 86:04dd9b1680ae | 392 | |
| bogdanm | 86:04dd9b1680ae | 393 | /** @defgroup SDADC_InjectedDelay |
| bogdanm | 86:04dd9b1680ae | 394 | * @{ |
| bogdanm | 86:04dd9b1680ae | 395 | */ |
| bogdanm | 86:04dd9b1680ae | 396 | #define SDADC_INJECTED_DELAY_NONE ((uint32_t)0x00000000) /*!< No delay on injected conversion */ |
| bogdanm | 86:04dd9b1680ae | 397 | #define SDADC_INJECTED_DELAY SDADC_CR2_JDS /*!< Delay on injected conversion */ |
| bogdanm | 86:04dd9b1680ae | 398 | |
| bogdanm | 86:04dd9b1680ae | 399 | #define IS_SDADC_INJECTED_DELAY(DELAY) (((DELAY) == SDADC_INJECTED_DELAY_NONE) || \ |
| bogdanm | 86:04dd9b1680ae | 400 | ((DELAY) == SDADC_INJECTED_DELAY)) |
| bogdanm | 86:04dd9b1680ae | 401 | /** |
| bogdanm | 86:04dd9b1680ae | 402 | * @} |
| bogdanm | 86:04dd9b1680ae | 403 | */ |
| bogdanm | 86:04dd9b1680ae | 404 | |
| bogdanm | 86:04dd9b1680ae | 405 | /** @defgroup SDADC_MultimodeType |
| bogdanm | 86:04dd9b1680ae | 406 | * @{ |
| bogdanm | 86:04dd9b1680ae | 407 | */ |
| bogdanm | 86:04dd9b1680ae | 408 | #define SDADC_MULTIMODE_SDADC1_SDADC2 ((uint32_t)0x00000000) /*!< Get conversion values for SDADC1 and SDADC2 */ |
| bogdanm | 86:04dd9b1680ae | 409 | #define SDADC_MULTIMODE_SDADC1_SDADC3 ((uint32_t)0x00000001) /*!< Get conversion values for SDADC1 and SDADC3 */ |
| bogdanm | 86:04dd9b1680ae | 410 | |
| bogdanm | 86:04dd9b1680ae | 411 | #define IS_SDADC_MULTIMODE_TYPE(TYPE) (((TYPE) == SDADC_MULTIMODE_SDADC1_SDADC2) || \ |
| bogdanm | 86:04dd9b1680ae | 412 | ((TYPE) == SDADC_MULTIMODE_SDADC1_SDADC3)) |
| bogdanm | 86:04dd9b1680ae | 413 | /** |
| bogdanm | 86:04dd9b1680ae | 414 | * @} |
| bogdanm | 86:04dd9b1680ae | 415 | */ |
| bogdanm | 86:04dd9b1680ae | 416 | |
| bogdanm | 86:04dd9b1680ae | 417 | /** @defgroup SDADC_ErrorCode |
| bogdanm | 86:04dd9b1680ae | 418 | * @{ |
| bogdanm | 86:04dd9b1680ae | 419 | */ |
| bogdanm | 86:04dd9b1680ae | 420 | #define SDADC_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ |
| bogdanm | 86:04dd9b1680ae | 421 | #define SDADC_ERROR_REGULAR_OVERRUN ((uint32_t)0x00000001) /*!< Overrun occurs during regular conversion */ |
| bogdanm | 86:04dd9b1680ae | 422 | #define SDADC_ERROR_INJECTED_OVERRUN ((uint32_t)0x00000002) /*!< Overrun occurs during injected conversion */ |
| bogdanm | 86:04dd9b1680ae | 423 | #define SDADC_ERROR_DMA ((uint32_t)0x00000003) /*!< DMA error occurs */ |
| bogdanm | 86:04dd9b1680ae | 424 | /** |
| bogdanm | 86:04dd9b1680ae | 425 | * @} |
| bogdanm | 86:04dd9b1680ae | 426 | */ |
| bogdanm | 86:04dd9b1680ae | 427 | |
| bogdanm | 86:04dd9b1680ae | 428 | /* Exported macros -----------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 429 | |
| bogdanm | 86:04dd9b1680ae | 430 | /** @brief Reset SDADC handle state |
| bogdanm | 86:04dd9b1680ae | 431 | * @param __HANDLE__: SDADC handle. |
| bogdanm | 86:04dd9b1680ae | 432 | * @retval None |
| bogdanm | 86:04dd9b1680ae | 433 | */ |
| bogdanm | 86:04dd9b1680ae | 434 | #define __HAL_SDADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDADC_STATE_RESET) |
| bogdanm | 86:04dd9b1680ae | 435 | |
| bogdanm | 86:04dd9b1680ae | 436 | /* Exported functions --------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 437 | |
| bogdanm | 86:04dd9b1680ae | 438 | /* Initialization and de-initialization functions *****************************/ |
| bogdanm | 86:04dd9b1680ae | 439 | HAL_StatusTypeDef HAL_SDADC_Init(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 440 | HAL_StatusTypeDef HAL_SDADC_DeInit(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 441 | void HAL_SDADC_MspInit(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 442 | void HAL_SDADC_MspDeInit(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 443 | |
| bogdanm | 86:04dd9b1680ae | 444 | /* Peripheral Control functions ***********************************************/ |
| bogdanm | 86:04dd9b1680ae | 445 | HAL_StatusTypeDef HAL_SDADC_PrepareChannelConfig(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 86:04dd9b1680ae | 446 | uint32_t ConfIndex, |
| bogdanm | 86:04dd9b1680ae | 447 | SDADC_ConfParamTypeDef* ConfParamStruct); |
| bogdanm | 86:04dd9b1680ae | 448 | HAL_StatusTypeDef HAL_SDADC_AssociateChannelConfig(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 86:04dd9b1680ae | 449 | uint32_t Channel, |
| bogdanm | 86:04dd9b1680ae | 450 | uint32_t ConfIndex); |
| bogdanm | 86:04dd9b1680ae | 451 | HAL_StatusTypeDef HAL_SDADC_ConfigChannel(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 86:04dd9b1680ae | 452 | uint32_t Channel, |
| bogdanm | 86:04dd9b1680ae | 453 | uint32_t ContinuousMode); |
| bogdanm | 86:04dd9b1680ae | 454 | HAL_StatusTypeDef HAL_SDADC_InjectedConfigChannel(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 86:04dd9b1680ae | 455 | uint32_t Channel, |
| bogdanm | 86:04dd9b1680ae | 456 | uint32_t ContinuousMode); |
| bogdanm | 86:04dd9b1680ae | 457 | HAL_StatusTypeDef HAL_SDADC_SelectInjectedExtTrigger(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 86:04dd9b1680ae | 458 | uint32_t InjectedExtTrigger, |
| bogdanm | 86:04dd9b1680ae | 459 | uint32_t ExtTriggerEdge); |
| bogdanm | 86:04dd9b1680ae | 460 | HAL_StatusTypeDef HAL_SDADC_SelectInjectedDelay(SDADC_HandleTypeDef *hsdadc, |
| bogdanm | 86:04dd9b1680ae | 461 | uint32_t InjectedDelay); |
| bogdanm | 86:04dd9b1680ae | 462 | HAL_StatusTypeDef HAL_SDADC_SelectRegularTrigger(SDADC_HandleTypeDef *hsdadc, uint32_t Trigger); |
| bogdanm | 86:04dd9b1680ae | 463 | HAL_StatusTypeDef HAL_SDADC_SelectInjectedTrigger(SDADC_HandleTypeDef *hsdadc, uint32_t Trigger); |
| bogdanm | 86:04dd9b1680ae | 464 | HAL_StatusTypeDef HAL_SDADC_MultiModeConfigChannel(SDADC_HandleTypeDef* hsdadc, uint32_t MultimodeType); |
| bogdanm | 86:04dd9b1680ae | 465 | HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeConfigChannel(SDADC_HandleTypeDef* hsdadc, uint32_t MultimodeType); |
| bogdanm | 86:04dd9b1680ae | 466 | |
| bogdanm | 86:04dd9b1680ae | 467 | /* IO operation functions *****************************************************/ |
| bogdanm | 86:04dd9b1680ae | 468 | HAL_StatusTypeDef HAL_SDADC_CalibrationStart(SDADC_HandleTypeDef *hsdadc, uint32_t CalibrationSequence); |
| bogdanm | 86:04dd9b1680ae | 469 | HAL_StatusTypeDef HAL_SDADC_CalibrationStart_IT(SDADC_HandleTypeDef *hsdadc, uint32_t CalibrationSequence); |
| bogdanm | 86:04dd9b1680ae | 470 | |
| bogdanm | 86:04dd9b1680ae | 471 | HAL_StatusTypeDef HAL_SDADC_Start(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 472 | HAL_StatusTypeDef HAL_SDADC_Start_IT(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 473 | HAL_StatusTypeDef HAL_SDADC_Start_DMA(SDADC_HandleTypeDef *hsdadc, uint32_t *pData, uint32_t Length); |
| bogdanm | 86:04dd9b1680ae | 474 | HAL_StatusTypeDef HAL_SDADC_Stop(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 475 | HAL_StatusTypeDef HAL_SDADC_Stop_IT(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 476 | HAL_StatusTypeDef HAL_SDADC_Stop_DMA(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 477 | |
| bogdanm | 86:04dd9b1680ae | 478 | HAL_StatusTypeDef HAL_SDADC_InjectedStart(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 479 | HAL_StatusTypeDef HAL_SDADC_InjectedStart_IT(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 480 | HAL_StatusTypeDef HAL_SDADC_InjectedStart_DMA(SDADC_HandleTypeDef *hsdadc, uint32_t *pData, uint32_t Length); |
| bogdanm | 86:04dd9b1680ae | 481 | HAL_StatusTypeDef HAL_SDADC_InjectedStop(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 482 | HAL_StatusTypeDef HAL_SDADC_InjectedStop_IT(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 483 | HAL_StatusTypeDef HAL_SDADC_InjectedStop_DMA(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 484 | |
| bogdanm | 86:04dd9b1680ae | 485 | HAL_StatusTypeDef HAL_SDADC_MultiModeStart_DMA(SDADC_HandleTypeDef* hsdadc, uint32_t* pData, uint32_t Length); |
| bogdanm | 86:04dd9b1680ae | 486 | HAL_StatusTypeDef HAL_SDADC_MultiModeStop_DMA(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 487 | HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeStart_DMA(SDADC_HandleTypeDef* hsdadc, uint32_t* pData, uint32_t Length); |
| bogdanm | 86:04dd9b1680ae | 488 | HAL_StatusTypeDef HAL_SDADC_InjectedMultiModeStop_DMA(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 489 | |
| bogdanm | 86:04dd9b1680ae | 490 | uint32_t HAL_SDADC_GetValue(SDADC_HandleTypeDef *hsdadc); |
| bogdanm | 86:04dd9b1680ae | 491 | uint32_t HAL_SDADC_InjectedGetValue(SDADC_HandleTypeDef *hsdadc, uint32_t* Channel); |
| bogdanm | 86:04dd9b1680ae | 492 | uint32_t HAL_SDADC_MultiModeGetValue(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 493 | uint32_t HAL_SDADC_InjectedMultiModeGetValue(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 494 | |
| bogdanm | 86:04dd9b1680ae | 495 | void HAL_SDADC_IRQHandler(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 496 | |
| bogdanm | 86:04dd9b1680ae | 497 | HAL_StatusTypeDef HAL_SDADC_PollForCalibEvent(SDADC_HandleTypeDef* hsdadc, uint32_t Timeout); |
| bogdanm | 86:04dd9b1680ae | 498 | HAL_StatusTypeDef HAL_SDADC_PollForConversion(SDADC_HandleTypeDef* hsdadc, uint32_t Timeout); |
| bogdanm | 86:04dd9b1680ae | 499 | HAL_StatusTypeDef HAL_SDADC_PollForInjectedConversion(SDADC_HandleTypeDef* hsdadc, uint32_t Timeout); |
| bogdanm | 86:04dd9b1680ae | 500 | |
| bogdanm | 86:04dd9b1680ae | 501 | void HAL_SDADC_CalibrationCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 502 | void HAL_SDADC_ConvHalfCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 503 | void HAL_SDADC_ConvCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 504 | void HAL_SDADC_InjectedConvHalfCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 505 | void HAL_SDADC_InjectedConvCpltCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 506 | void HAL_SDADC_ErrorCallback(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 507 | |
| bogdanm | 86:04dd9b1680ae | 508 | /* Peripheral State and Error functions ***************************************/ |
| bogdanm | 86:04dd9b1680ae | 509 | HAL_SDADC_StateTypeDef HAL_SDADC_GetState(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 510 | uint32_t HAL_SDADC_GetError(SDADC_HandleTypeDef* hsdadc); |
| bogdanm | 86:04dd9b1680ae | 511 | |
| bogdanm | 86:04dd9b1680ae | 512 | /* Private functions ---------------------------------------------------------*/ |
| bogdanm | 86:04dd9b1680ae | 513 | |
| bogdanm | 86:04dd9b1680ae | 514 | /** |
| bogdanm | 86:04dd9b1680ae | 515 | * @} |
| bogdanm | 86:04dd9b1680ae | 516 | */ |
| bogdanm | 86:04dd9b1680ae | 517 | |
| bogdanm | 86:04dd9b1680ae | 518 | /** |
| bogdanm | 86:04dd9b1680ae | 519 | * @} |
| bogdanm | 86:04dd9b1680ae | 520 | */ |
| bogdanm | 86:04dd9b1680ae | 521 | |
| bogdanm | 86:04dd9b1680ae | 522 | #endif /* defined(STM32F373xC) || defined(STM32F378xx) */ |
| bogdanm | 86:04dd9b1680ae | 523 | |
| bogdanm | 86:04dd9b1680ae | 524 | #ifdef __cplusplus |
| bogdanm | 86:04dd9b1680ae | 525 | } |
| bogdanm | 86:04dd9b1680ae | 526 | #endif |
| bogdanm | 86:04dd9b1680ae | 527 | |
| bogdanm | 86:04dd9b1680ae | 528 | #endif /*__STM32F3xx_SDADC_H */ |
| bogdanm | 86:04dd9b1680ae | 529 | |
| bogdanm | 86:04dd9b1680ae | 530 | |
| bogdanm | 86:04dd9b1680ae | 531 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |