Realtime spectrogram for DISCO-F746NG. On-board MEMS microphone is used for input sound signal. リアルタイムスペクトログラム.入力:MEMSマイク
Dependencies: F746_GUI F746_SAI_IO UIT_FFT_Real
mbed_src_STM32F7/common/InterruptIn.cpp@4:c1beacfc42c7, 2016-10-02 (annotated)
- Committer:
- MikamiUitOpen
- Date:
- Sun Oct 02 10:51:10 2016 +0000
- Revision:
- 4:c1beacfc42c7
5
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
MikamiUitOpen | 4:c1beacfc42c7 | 1 | /* mbed Microcontroller Library |
MikamiUitOpen | 4:c1beacfc42c7 | 2 | * Copyright (c) 2006-2013 ARM Limited |
MikamiUitOpen | 4:c1beacfc42c7 | 3 | * |
MikamiUitOpen | 4:c1beacfc42c7 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
MikamiUitOpen | 4:c1beacfc42c7 | 5 | * you may not use this file except in compliance with the License. |
MikamiUitOpen | 4:c1beacfc42c7 | 6 | * You may obtain a copy of the License at |
MikamiUitOpen | 4:c1beacfc42c7 | 7 | * |
MikamiUitOpen | 4:c1beacfc42c7 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
MikamiUitOpen | 4:c1beacfc42c7 | 9 | * |
MikamiUitOpen | 4:c1beacfc42c7 | 10 | * Unless required by applicable law or agreed to in writing, software |
MikamiUitOpen | 4:c1beacfc42c7 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
MikamiUitOpen | 4:c1beacfc42c7 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
MikamiUitOpen | 4:c1beacfc42c7 | 13 | * See the License for the specific language governing permissions and |
MikamiUitOpen | 4:c1beacfc42c7 | 14 | * limitations under the License. |
MikamiUitOpen | 4:c1beacfc42c7 | 15 | */ |
MikamiUitOpen | 4:c1beacfc42c7 | 16 | #include "InterruptIn.h" |
MikamiUitOpen | 4:c1beacfc42c7 | 17 | |
MikamiUitOpen | 4:c1beacfc42c7 | 18 | #if DEVICE_INTERRUPTIN |
MikamiUitOpen | 4:c1beacfc42c7 | 19 | |
MikamiUitOpen | 4:c1beacfc42c7 | 20 | namespace mbed { |
MikamiUitOpen | 4:c1beacfc42c7 | 21 | |
MikamiUitOpen | 4:c1beacfc42c7 | 22 | InterruptIn::InterruptIn(PinName pin) : gpio(), |
MikamiUitOpen | 4:c1beacfc42c7 | 23 | gpio_irq(), |
MikamiUitOpen | 4:c1beacfc42c7 | 24 | _rise(), |
MikamiUitOpen | 4:c1beacfc42c7 | 25 | _fall() { |
MikamiUitOpen | 4:c1beacfc42c7 | 26 | gpio_irq_init(&gpio_irq, pin, (&InterruptIn::_irq_handler), (uint32_t)this); |
MikamiUitOpen | 4:c1beacfc42c7 | 27 | gpio_init_in(&gpio, pin); |
MikamiUitOpen | 4:c1beacfc42c7 | 28 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 29 | |
MikamiUitOpen | 4:c1beacfc42c7 | 30 | InterruptIn::~InterruptIn() { |
MikamiUitOpen | 4:c1beacfc42c7 | 31 | gpio_irq_free(&gpio_irq); |
MikamiUitOpen | 4:c1beacfc42c7 | 32 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 33 | |
MikamiUitOpen | 4:c1beacfc42c7 | 34 | int InterruptIn::read() { |
MikamiUitOpen | 4:c1beacfc42c7 | 35 | return gpio_read(&gpio); |
MikamiUitOpen | 4:c1beacfc42c7 | 36 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 37 | |
MikamiUitOpen | 4:c1beacfc42c7 | 38 | void InterruptIn::mode(PinMode pull) { |
MikamiUitOpen | 4:c1beacfc42c7 | 39 | gpio_mode(&gpio, pull); |
MikamiUitOpen | 4:c1beacfc42c7 | 40 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 41 | |
MikamiUitOpen | 4:c1beacfc42c7 | 42 | void InterruptIn::rise(void (*fptr)(void)) { |
MikamiUitOpen | 4:c1beacfc42c7 | 43 | if (fptr) { |
MikamiUitOpen | 4:c1beacfc42c7 | 44 | _rise.attach(fptr); |
MikamiUitOpen | 4:c1beacfc42c7 | 45 | gpio_irq_set(&gpio_irq, IRQ_RISE, 1); |
MikamiUitOpen | 4:c1beacfc42c7 | 46 | } else { |
MikamiUitOpen | 4:c1beacfc42c7 | 47 | _rise.attach(NULL); |
MikamiUitOpen | 4:c1beacfc42c7 | 48 | gpio_irq_set(&gpio_irq, IRQ_RISE, 0); |
MikamiUitOpen | 4:c1beacfc42c7 | 49 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 50 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 51 | |
MikamiUitOpen | 4:c1beacfc42c7 | 52 | void InterruptIn::fall(void (*fptr)(void)) { |
MikamiUitOpen | 4:c1beacfc42c7 | 53 | if (fptr) { |
MikamiUitOpen | 4:c1beacfc42c7 | 54 | _fall.attach(fptr); |
MikamiUitOpen | 4:c1beacfc42c7 | 55 | gpio_irq_set(&gpio_irq, IRQ_FALL, 1); |
MikamiUitOpen | 4:c1beacfc42c7 | 56 | } else { |
MikamiUitOpen | 4:c1beacfc42c7 | 57 | _fall.attach(NULL); |
MikamiUitOpen | 4:c1beacfc42c7 | 58 | gpio_irq_set(&gpio_irq, IRQ_FALL, 0); |
MikamiUitOpen | 4:c1beacfc42c7 | 59 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 60 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 61 | |
MikamiUitOpen | 4:c1beacfc42c7 | 62 | void InterruptIn::_irq_handler(uint32_t id, gpio_irq_event event) { |
MikamiUitOpen | 4:c1beacfc42c7 | 63 | InterruptIn *handler = (InterruptIn*)id; |
MikamiUitOpen | 4:c1beacfc42c7 | 64 | switch (event) { |
MikamiUitOpen | 4:c1beacfc42c7 | 65 | case IRQ_RISE: handler->_rise.call(); break; |
MikamiUitOpen | 4:c1beacfc42c7 | 66 | case IRQ_FALL: handler->_fall.call(); break; |
MikamiUitOpen | 4:c1beacfc42c7 | 67 | case IRQ_NONE: break; |
MikamiUitOpen | 4:c1beacfc42c7 | 68 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 69 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 70 | |
MikamiUitOpen | 4:c1beacfc42c7 | 71 | void InterruptIn::enable_irq() { |
MikamiUitOpen | 4:c1beacfc42c7 | 72 | gpio_irq_enable(&gpio_irq); |
MikamiUitOpen | 4:c1beacfc42c7 | 73 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 74 | |
MikamiUitOpen | 4:c1beacfc42c7 | 75 | void InterruptIn::disable_irq() { |
MikamiUitOpen | 4:c1beacfc42c7 | 76 | gpio_irq_disable(&gpio_irq); |
MikamiUitOpen | 4:c1beacfc42c7 | 77 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 78 | |
MikamiUitOpen | 4:c1beacfc42c7 | 79 | #ifdef MBED_OPERATORS |
MikamiUitOpen | 4:c1beacfc42c7 | 80 | InterruptIn::operator int() { |
MikamiUitOpen | 4:c1beacfc42c7 | 81 | return read(); |
MikamiUitOpen | 4:c1beacfc42c7 | 82 | } |
MikamiUitOpen | 4:c1beacfc42c7 | 83 | #endif |
MikamiUitOpen | 4:c1beacfc42c7 | 84 | |
MikamiUitOpen | 4:c1beacfc42c7 | 85 | } // namespace mbed |
MikamiUitOpen | 4:c1beacfc42c7 | 86 | |
MikamiUitOpen | 4:c1beacfc42c7 | 87 | #endif |