不韋 呂 / F746_Spectrogram

Realtime spectrogram for DISCO-F746NG. On-board MEMS microphone is used for input sound signal. リアルタイムスペクトログラム．入力：MEMSマイク

Dependencies:   F746_GUI F746_SAI_IO UIT_FFT_Real

mbed_src_STM32F7/hal/i2c_api.h@6:b3885567877c, 2017-04-10 (annotated)

Committer:
MikamiUitOpen
Date:
Mon Apr 10 13:43:07 2017 +0000
Revision:
6:b3885567877c
Parent:
4:c1beacfc42c7 
7

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 4:c1beacfc42c7 1 /* mbed Microcontroller Library
MikamiUitOpen 4:c1beacfc42c7 2 * Copyright (c) 2006-2015 ARM Limited
MikamiUitOpen 4:c1beacfc42c7 3 *
MikamiUitOpen 4:c1beacfc42c7 4 * Licensed under the Apache License, Version 2.0 (the "License");
MikamiUitOpen 4:c1beacfc42c7 5 * you may not use this file except in compliance with the License.
MikamiUitOpen 4:c1beacfc42c7 6 * You may obtain a copy of the License at
MikamiUitOpen 4:c1beacfc42c7 7 *
MikamiUitOpen 4:c1beacfc42c7 8 * http://www.apache.org/licenses/LICENSE-2.0
MikamiUitOpen 4:c1beacfc42c7 9 *
MikamiUitOpen 4:c1beacfc42c7 10 * Unless required by applicable law or agreed to in writing, software
MikamiUitOpen 4:c1beacfc42c7 11 * distributed under the License is distributed on an "AS IS" BASIS,
MikamiUitOpen 4:c1beacfc42c7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MikamiUitOpen 4:c1beacfc42c7 13 * See the License for the specific language governing permissions and
MikamiUitOpen 4:c1beacfc42c7 14 * limitations under the License.
MikamiUitOpen 4:c1beacfc42c7 15 */
MikamiUitOpen 4:c1beacfc42c7 16 #ifndef MBED_I2C_API_H
MikamiUitOpen 4:c1beacfc42c7 17 #define MBED_I2C_API_H
MikamiUitOpen 4:c1beacfc42c7 18
MikamiUitOpen 4:c1beacfc42c7 19 #include "device.h"
MikamiUitOpen 4:c1beacfc42c7 20 #include "buffer.h"
MikamiUitOpen 4:c1beacfc42c7 21 #include "dma_api.h"
MikamiUitOpen 4:c1beacfc42c7 22
MikamiUitOpen 4:c1beacfc42c7 23 #if DEVICE_I2C
MikamiUitOpen 4:c1beacfc42c7 24
MikamiUitOpen 4:c1beacfc42c7 25 /**
MikamiUitOpen 4:c1beacfc42c7 26 * @defgroup I2CEvents I2C Events Macros
MikamiUitOpen 4:c1beacfc42c7 27 *
MikamiUitOpen 4:c1beacfc42c7 28 * @{
MikamiUitOpen 4:c1beacfc42c7 29 */
MikamiUitOpen 4:c1beacfc42c7 30 #define I2C_EVENT_ERROR (1 << 1)
MikamiUitOpen 4:c1beacfc42c7 31 #define I2C_EVENT_ERROR_NO_SLAVE (1 << 2)
MikamiUitOpen 4:c1beacfc42c7 32 #define I2C_EVENT_TRANSFER_COMPLETE (1 << 3)
MikamiUitOpen 4:c1beacfc42c7 33 #define I2C_EVENT_TRANSFER_EARLY_NACK (1 << 4)
MikamiUitOpen 4:c1beacfc42c7 34 #define I2C_EVENT_ALL (I2C_EVENT_ERROR | I2C_EVENT_TRANSFER_COMPLETE | I2C_EVENT_ERROR_NO_SLAVE | I2C_EVENT_TRANSFER_EARLY_NACK)
MikamiUitOpen 4:c1beacfc42c7 35
MikamiUitOpen 4:c1beacfc42c7 36 /**@}*/
MikamiUitOpen 4:c1beacfc42c7 37
MikamiUitOpen 4:c1beacfc42c7 38 #if DEVICE_I2C_ASYNCH
MikamiUitOpen 4:c1beacfc42c7 39 /** Asynch i2c hal structure
MikamiUitOpen 4:c1beacfc42c7 40 */
MikamiUitOpen 4:c1beacfc42c7 41 typedef struct {
MikamiUitOpen 4:c1beacfc42c7 42 struct i2c_s i2c; /**< Target specific i2c structure */
MikamiUitOpen 4:c1beacfc42c7 43 struct buffer_s tx_buff; /**< Tx buffer */
MikamiUitOpen 4:c1beacfc42c7 44 struct buffer_s rx_buff; /**< Rx buffer */
MikamiUitOpen 4:c1beacfc42c7 45 } i2c_t;
MikamiUitOpen 4:c1beacfc42c7 46
MikamiUitOpen 4:c1beacfc42c7 47 #else
MikamiUitOpen 4:c1beacfc42c7 48 /** Non-asynch i2c hal structure
MikamiUitOpen 4:c1beacfc42c7 49 */
MikamiUitOpen 4:c1beacfc42c7 50 typedef struct i2c_s i2c_t;
MikamiUitOpen 4:c1beacfc42c7 51
MikamiUitOpen 4:c1beacfc42c7 52 #endif
MikamiUitOpen 4:c1beacfc42c7 53
MikamiUitOpen 4:c1beacfc42c7 54 enum {
MikamiUitOpen 4:c1beacfc42c7 55 I2C_ERROR_NO_SLAVE = -1,
MikamiUitOpen 4:c1beacfc42c7 56 I2C_ERROR_BUS_BUSY = -2
MikamiUitOpen 4:c1beacfc42c7 57 };
MikamiUitOpen 4:c1beacfc42c7 58
MikamiUitOpen 4:c1beacfc42c7 59 #ifdef __cplusplus
MikamiUitOpen 4:c1beacfc42c7 60 extern "C" {
MikamiUitOpen 4:c1beacfc42c7 61 #endif
MikamiUitOpen 4:c1beacfc42c7 62
MikamiUitOpen 4:c1beacfc42c7 63 /**
MikamiUitOpen 4:c1beacfc42c7 64 * \defgroup GeneralI2C I2C Configuration Functions
MikamiUitOpen 4:c1beacfc42c7 65 * @{
MikamiUitOpen 4:c1beacfc42c7 66 */
MikamiUitOpen 4:c1beacfc42c7 67
MikamiUitOpen 4:c1beacfc42c7 68 /** Initialize the I2C peripheral. It sets the default parameters for I2C
MikamiUitOpen 4:c1beacfc42c7 69 * peripheral, and configure its specifieds pins.
MikamiUitOpen 4:c1beacfc42c7 70 * @param obj The i2c object
MikamiUitOpen 4:c1beacfc42c7 71 * @param sda The sda pin
MikamiUitOpen 4:c1beacfc42c7 72 * @param scl The scl pin
MikamiUitOpen 4:c1beacfc42c7 73 */
MikamiUitOpen 4:c1beacfc42c7 74 void i2c_init(i2c_t *obj, PinName sda, PinName scl);
MikamiUitOpen 4:c1beacfc42c7 75
MikamiUitOpen 4:c1beacfc42c7 76 /** Configure the I2C frequency.
MikamiUitOpen 4:c1beacfc42c7 77 * @param obj The i2c object
MikamiUitOpen 4:c1beacfc42c7 78 * @param hz Frequency in Hz
MikamiUitOpen 4:c1beacfc42c7 79 */
MikamiUitOpen 4:c1beacfc42c7 80 void i2c_frequency(i2c_t *obj, int hz);
MikamiUitOpen 4:c1beacfc42c7 81
MikamiUitOpen 4:c1beacfc42c7 82 /** Send START command.
MikamiUitOpen 4:c1beacfc42c7 83 * @param obj The i2c object
MikamiUitOpen 4:c1beacfc42c7 84 */
MikamiUitOpen 4:c1beacfc42c7 85 int i2c_start(i2c_t *obj);
MikamiUitOpen 4:c1beacfc42c7 86
MikamiUitOpen 4:c1beacfc42c7 87 /** Send STOP command.
MikamiUitOpen 4:c1beacfc42c7 88 * @param obj The i2c object
MikamiUitOpen 4:c1beacfc42c7 89 */
MikamiUitOpen 4:c1beacfc42c7 90 int i2c_stop(i2c_t *obj);
MikamiUitOpen 4:c1beacfc42c7 91
MikamiUitOpen 4:c1beacfc42c7 92 /** Blocking reading data.
MikamiUitOpen 4:c1beacfc42c7 93 * @param obj The i2c object
MikamiUitOpen 4:c1beacfc42c7 94 * @param address 7-bit address (last bit is 1)
MikamiUitOpen 4:c1beacfc42c7 95 * @param data The buffer for receiving
MikamiUitOpen 4:c1beacfc42c7 96 * @param length Number of bytes to read
MikamiUitOpen 4:c1beacfc42c7 97 * @param stop Stop to be generated after the transfer is done
MikamiUitOpen 4:c1beacfc42c7 98 * @return Number of read bytes
MikamiUitOpen 4:c1beacfc42c7 99 */
MikamiUitOpen 4:c1beacfc42c7 100 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop);
MikamiUitOpen 4:c1beacfc42c7 101
MikamiUitOpen 4:c1beacfc42c7 102 /** Blocking sending data.
MikamiUitOpen 4:c1beacfc42c7 103 * @param obj The i2c object
MikamiUitOpen 4:c1beacfc42c7 104 * @param address 7-bit address (last bit is 0)
MikamiUitOpen 4:c1beacfc42c7 105 * @param data The buffer for sending
MikamiUitOpen 4:c1beacfc42c7 106 * @param length Number of bytes to wrte
MikamiUitOpen 4:c1beacfc42c7 107 * @param stop Stop to be generated after the transfer is done
MikamiUitOpen 4:c1beacfc42c7 108 * @return Number of written bytes
MikamiUitOpen 4:c1beacfc42c7 109 */
MikamiUitOpen 4:c1beacfc42c7 110 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop);
MikamiUitOpen 4:c1beacfc42c7 111
MikamiUitOpen 4:c1beacfc42c7 112 /** Reset I2C peripheral. TODO: The action here. Most of the implementation sends stop().
MikamiUitOpen 4:c1beacfc42c7 113 * @param obj The i2c object
MikamiUitOpen 4:c1beacfc42c7 114 */
MikamiUitOpen 4:c1beacfc42c7 115 void i2c_reset(i2c_t *obj);
MikamiUitOpen 4:c1beacfc42c7 116
MikamiUitOpen 4:c1beacfc42c7 117 /** Read one byte.
MikamiUitOpen 4:c1beacfc42c7 118 * @param obj The i2c object
MikamiUitOpen 4:c1beacfc42c7 119 * @param last Acknoledge
MikamiUitOpen 4:c1beacfc42c7 120 * @return The read byte
MikamiUitOpen 4:c1beacfc42c7 121 */
MikamiUitOpen 4:c1beacfc42c7 122 int i2c_byte_read(i2c_t *obj, int last);
MikamiUitOpen 4:c1beacfc42c7 123
MikamiUitOpen 4:c1beacfc42c7 124 /** Write one byte.
MikamiUitOpen 4:c1beacfc42c7 125 * @param obj The i2c object
MikamiUitOpen 4:c1beacfc42c7 126 * @param data Byte to be written
MikamiUitOpen 4:c1beacfc42c7 127 * @return 0 if NAK was received, 1 if ACK was received, 2 for timeout.
MikamiUitOpen 4:c1beacfc42c7 128 */
MikamiUitOpen 4:c1beacfc42c7 129 int i2c_byte_write(i2c_t *obj, int data);
MikamiUitOpen 4:c1beacfc42c7 130
MikamiUitOpen 4:c1beacfc42c7 131 /**@}*/
MikamiUitOpen 4:c1beacfc42c7 132
MikamiUitOpen 4:c1beacfc42c7 133 #if DEVICE_I2CSLAVE
MikamiUitOpen 4:c1beacfc42c7 134
MikamiUitOpen 4:c1beacfc42c7 135 /**
MikamiUitOpen 4:c1beacfc42c7 136 * \defgroup SynchI2C Synchronous I2C Hardware Abstraction Layer for slave
MikamiUitOpen 4:c1beacfc42c7 137 * @{
MikamiUitOpen 4:c1beacfc42c7 138 */
MikamiUitOpen 4:c1beacfc42c7 139
MikamiUitOpen 4:c1beacfc42c7 140 /** Configure I2C as slave or master.
MikamiUitOpen 4:c1beacfc42c7 141 * @param obj The I2C object
MikamiUitOpen 4:c1beacfc42c7 142 * @return non-zero if a value is available
MikamiUitOpen 4:c1beacfc42c7 143 */
MikamiUitOpen 4:c1beacfc42c7 144 void i2c_slave_mode(i2c_t *obj, int enable_slave);
MikamiUitOpen 4:c1beacfc42c7 145
MikamiUitOpen 4:c1beacfc42c7 146 /** Check to see if the I2C slave has been addressed.
MikamiUitOpen 4:c1beacfc42c7 147 * @param obj The I2C object
MikamiUitOpen 4:c1beacfc42c7 148 * @return The status - 1 - read addresses, 2 - write to all slaves,
MikamiUitOpen 4:c1beacfc42c7 149 * 3 write addressed, 0 - the slave has not been addressed
MikamiUitOpen 4:c1beacfc42c7 150 */
MikamiUitOpen 4:c1beacfc42c7 151 int i2c_slave_receive(i2c_t *obj);
MikamiUitOpen 4:c1beacfc42c7 152
MikamiUitOpen 4:c1beacfc42c7 153 /** Configure I2C as slave or master.
MikamiUitOpen 4:c1beacfc42c7 154 * @param obj The I2C object
MikamiUitOpen 4:c1beacfc42c7 155 * @return non-zero if a value is available
MikamiUitOpen 4:c1beacfc42c7 156 */
MikamiUitOpen 4:c1beacfc42c7 157 int i2c_slave_read(i2c_t *obj, char *data, int length);
MikamiUitOpen 4:c1beacfc42c7 158
MikamiUitOpen 4:c1beacfc42c7 159 /** Configure I2C as slave or master.
MikamiUitOpen 4:c1beacfc42c7 160 * @param obj The I2C object
MikamiUitOpen 4:c1beacfc42c7 161 * @return non-zero if a value is available
MikamiUitOpen 4:c1beacfc42c7 162 */
MikamiUitOpen 4:c1beacfc42c7 163 int i2c_slave_write(i2c_t *obj, const char *data, int length);
MikamiUitOpen 4:c1beacfc42c7 164
MikamiUitOpen 4:c1beacfc42c7 165 /** Configure I2C address.
MikamiUitOpen 4:c1beacfc42c7 166 * @param obj The I2C object
MikamiUitOpen 4:c1beacfc42c7 167 * @param idx Currently not used
MikamiUitOpen 4:c1beacfc42c7 168 * @param address The address to be set
MikamiUitOpen 4:c1beacfc42c7 169 * @param mask Currently not used
MikamiUitOpen 4:c1beacfc42c7 170 */
MikamiUitOpen 4:c1beacfc42c7 171 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask);
MikamiUitOpen 4:c1beacfc42c7 172
MikamiUitOpen 4:c1beacfc42c7 173 #endif
MikamiUitOpen 4:c1beacfc42c7 174
MikamiUitOpen 4:c1beacfc42c7 175 /**@}*/
MikamiUitOpen 4:c1beacfc42c7 176
MikamiUitOpen 4:c1beacfc42c7 177 #if DEVICE_I2C_ASYNCH
MikamiUitOpen 4:c1beacfc42c7 178
MikamiUitOpen 4:c1beacfc42c7 179 /**
MikamiUitOpen 4:c1beacfc42c7 180 * \defgroup AsynchI2C Asynchronous I2C Hardware Abstraction Layer
MikamiUitOpen 4:c1beacfc42c7 181 * @{
MikamiUitOpen 4:c1beacfc42c7 182 */
MikamiUitOpen 4:c1beacfc42c7 183
MikamiUitOpen 4:c1beacfc42c7 184 /** Start i2c asynchronous transfer.
MikamiUitOpen 4:c1beacfc42c7 185 * @param obj The I2C object
MikamiUitOpen 4:c1beacfc42c7 186 * @param tx The buffer to send
MikamiUitOpen 4:c1beacfc42c7 187 * @param tx_length The number of words to transmit
MikamiUitOpen 4:c1beacfc42c7 188 * @param rx The buffer to receive
MikamiUitOpen 4:c1beacfc42c7 189 * @param rx_length The number of words to receive
MikamiUitOpen 4:c1beacfc42c7 190 * @param address The address to be set - 7bit or 9 bit
MikamiUitOpen 4:c1beacfc42c7 191 * @param stop If true, stop will be generated after the transfer is done
MikamiUitOpen 4:c1beacfc42c7 192 * @param handler The I2C IRQ handler to be set
MikamiUitOpen 4:c1beacfc42c7 193 * @param hint DMA hint usage
MikamiUitOpen 4:c1beacfc42c7 194 */
MikamiUitOpen 4:c1beacfc42c7 195 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint);
MikamiUitOpen 4:c1beacfc42c7 196
MikamiUitOpen 4:c1beacfc42c7 197 /** The asynchronous IRQ handler
MikamiUitOpen 4:c1beacfc42c7 198 * @param obj The I2C object which holds the transfer information
MikamiUitOpen 4:c1beacfc42c7 199 * @return event flags if a transfer termination condition was met or 0 otherwise.
MikamiUitOpen 4:c1beacfc42c7 200 */
MikamiUitOpen 4:c1beacfc42c7 201 uint32_t i2c_irq_handler_asynch(i2c_t *obj);
MikamiUitOpen 4:c1beacfc42c7 202
MikamiUitOpen 4:c1beacfc42c7 203 /** Attempts to determine if I2C peripheral is already in use.
MikamiUitOpen 4:c1beacfc42c7 204 * @param obj The I2C object
MikamiUitOpen 4:c1beacfc42c7 205 * @return non-zero if the I2C module is active or zero if it is not
MikamiUitOpen 4:c1beacfc42c7 206 */
MikamiUitOpen 4:c1beacfc42c7 207 uint8_t i2c_active(i2c_t *obj);
MikamiUitOpen 4:c1beacfc42c7 208
MikamiUitOpen 4:c1beacfc42c7 209 /** Abort ongoing asynchronous transaction.
MikamiUitOpen 4:c1beacfc42c7 210 * @param obj The I2C object
MikamiUitOpen 4:c1beacfc42c7 211 */
MikamiUitOpen 4:c1beacfc42c7 212 void i2c_abort_asynch(i2c_t *obj);
MikamiUitOpen 4:c1beacfc42c7 213
MikamiUitOpen 4:c1beacfc42c7 214 #endif
MikamiUitOpen 4:c1beacfc42c7 215
MikamiUitOpen 4:c1beacfc42c7 216 /**@}*/
MikamiUitOpen 4:c1beacfc42c7 217
MikamiUitOpen 4:c1beacfc42c7 218 #ifdef __cplusplus
MikamiUitOpen 4:c1beacfc42c7 219 }
MikamiUitOpen 4:c1beacfc42c7 220 #endif
MikamiUitOpen 4:c1beacfc42c7 221
MikamiUitOpen 4:c1beacfc42c7 222 #endif
MikamiUitOpen 4:c1beacfc42c7 223
MikamiUitOpen 4:c1beacfc42c7 224 #endif