不韋 呂 / F746_Spectrogram

Realtime spectrogram for DISCO-F746NG. On-board MEMS microphone is used for input sound signal. リアルタイムスペクトログラム．入力：MEMSマイク

Dependencies:   F746_GUI F746_SAI_IO UIT_FFT_Real

mbed_src_STM32F7/api/SPI.h@6:b3885567877c, 2017-04-10 (annotated)

Committer:
MikamiUitOpen
Date:
Mon Apr 10 13:43:07 2017 +0000
Revision:
6:b3885567877c
Parent:
4:c1beacfc42c7 
7

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 4:c1beacfc42c7 1 /* mbed Microcontroller Library
MikamiUitOpen 4:c1beacfc42c7 2 * Copyright (c) 2006-2015 ARM Limited
MikamiUitOpen 4:c1beacfc42c7 3 *
MikamiUitOpen 4:c1beacfc42c7 4 * Licensed under the Apache License, Version 2.0 (the "License");
MikamiUitOpen 4:c1beacfc42c7 5 * you may not use this file except in compliance with the License.
MikamiUitOpen 4:c1beacfc42c7 6 * You may obtain a copy of the License at
MikamiUitOpen 4:c1beacfc42c7 7 *
MikamiUitOpen 4:c1beacfc42c7 8 * http://www.apache.org/licenses/LICENSE-2.0
MikamiUitOpen 4:c1beacfc42c7 9 *
MikamiUitOpen 4:c1beacfc42c7 10 * Unless required by applicable law or agreed to in writing, software
MikamiUitOpen 4:c1beacfc42c7 11 * distributed under the License is distributed on an "AS IS" BASIS,
MikamiUitOpen 4:c1beacfc42c7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MikamiUitOpen 4:c1beacfc42c7 13 * See the License for the specific language governing permissions and
MikamiUitOpen 4:c1beacfc42c7 14 * limitations under the License.
MikamiUitOpen 4:c1beacfc42c7 15 */
MikamiUitOpen 4:c1beacfc42c7 16 #ifndef MBED_SPI_H
MikamiUitOpen 4:c1beacfc42c7 17 #define MBED_SPI_H
MikamiUitOpen 4:c1beacfc42c7 18
MikamiUitOpen 4:c1beacfc42c7 19 #include "platform.h"
MikamiUitOpen 4:c1beacfc42c7 20
MikamiUitOpen 4:c1beacfc42c7 21 #if DEVICE_SPI
MikamiUitOpen 4:c1beacfc42c7 22
MikamiUitOpen 4:c1beacfc42c7 23 #include "spi_api.h"
MikamiUitOpen 4:c1beacfc42c7 24
MikamiUitOpen 4:c1beacfc42c7 25 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 4:c1beacfc42c7 26 #include "CThunk.h"
MikamiUitOpen 4:c1beacfc42c7 27 #include "dma_api.h"
MikamiUitOpen 4:c1beacfc42c7 28 #include "CircularBuffer.h"
MikamiUitOpen 4:c1beacfc42c7 29 #include "FunctionPointer.h"
MikamiUitOpen 4:c1beacfc42c7 30 #include "Transaction.h"
MikamiUitOpen 4:c1beacfc42c7 31 #endif
MikamiUitOpen 4:c1beacfc42c7 32
MikamiUitOpen 4:c1beacfc42c7 33 namespace mbed {
MikamiUitOpen 4:c1beacfc42c7 34
MikamiUitOpen 4:c1beacfc42c7 35 /** A SPI Master, used for communicating with SPI slave devices
MikamiUitOpen 4:c1beacfc42c7 36 *
MikamiUitOpen 4:c1beacfc42c7 37 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
MikamiUitOpen 4:c1beacfc42c7 38 *
MikamiUitOpen 4:c1beacfc42c7 39 * Most SPI devices will also require Chip Select and Reset signals. These
MikamiUitOpen 4:c1beacfc42c7 40 * can be controlled using <DigitalOut> pins
MikamiUitOpen 4:c1beacfc42c7 41 *
MikamiUitOpen 4:c1beacfc42c7 42 * Example:
MikamiUitOpen 4:c1beacfc42c7 43 * @code
MikamiUitOpen 4:c1beacfc42c7 44 * // Send a byte to a SPI slave, and record the response
MikamiUitOpen 4:c1beacfc42c7 45 *
MikamiUitOpen 4:c1beacfc42c7 46 * #include "mbed.h"
MikamiUitOpen 4:c1beacfc42c7 47 *
MikamiUitOpen 4:c1beacfc42c7 48 * // hardware ssel (where applicable)
MikamiUitOpen 4:c1beacfc42c7 49 * //SPI device(p5, p6, p7, p8); // mosi, miso, sclk, ssel
MikamiUitOpen 4:c1beacfc42c7 50 *
MikamiUitOpen 4:c1beacfc42c7 51 * // software ssel
MikamiUitOpen 4:c1beacfc42c7 52 * SPI device(p5, p6, p7); // mosi, miso, sclk
MikamiUitOpen 4:c1beacfc42c7 53 * DigitalOut cs(p8); // ssel
MikamiUitOpen 4:c1beacfc42c7 54 *
MikamiUitOpen 4:c1beacfc42c7 55 * int main() {
MikamiUitOpen 4:c1beacfc42c7 56 * // hardware ssel (where applicable)
MikamiUitOpen 4:c1beacfc42c7 57 * //int response = device.write(0xFF);
MikamiUitOpen 4:c1beacfc42c7 58 *
MikamiUitOpen 4:c1beacfc42c7 59 * // software ssel
MikamiUitOpen 4:c1beacfc42c7 60 * cs = 0;
MikamiUitOpen 4:c1beacfc42c7 61 * int response = device.write(0xFF);
MikamiUitOpen 4:c1beacfc42c7 62 * cs = 1;
MikamiUitOpen 4:c1beacfc42c7 63 * }
MikamiUitOpen 4:c1beacfc42c7 64 * @endcode
MikamiUitOpen 4:c1beacfc42c7 65 */
MikamiUitOpen 4:c1beacfc42c7 66 class SPI {
MikamiUitOpen 4:c1beacfc42c7 67
MikamiUitOpen 4:c1beacfc42c7 68 public:
MikamiUitOpen 4:c1beacfc42c7 69
MikamiUitOpen 4:c1beacfc42c7 70 /** Create a SPI master connected to the specified pins
MikamiUitOpen 4:c1beacfc42c7 71 *
MikamiUitOpen 4:c1beacfc42c7 72 * mosi or miso can be specfied as NC if not used
MikamiUitOpen 4:c1beacfc42c7 73 *
MikamiUitOpen 4:c1beacfc42c7 74 * @param mosi SPI Master Out, Slave In pin
MikamiUitOpen 4:c1beacfc42c7 75 * @param miso SPI Master In, Slave Out pin
MikamiUitOpen 4:c1beacfc42c7 76 * @param sclk SPI Clock pin
MikamiUitOpen 4:c1beacfc42c7 77 * @param ssel SPI chip select pin
MikamiUitOpen 4:c1beacfc42c7 78 */
MikamiUitOpen 4:c1beacfc42c7 79 SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel=NC);
MikamiUitOpen 4:c1beacfc42c7 80
MikamiUitOpen 4:c1beacfc42c7 81 /** Configure the data transmission format
MikamiUitOpen 4:c1beacfc42c7 82 *
MikamiUitOpen 4:c1beacfc42c7 83 * @param bits Number of bits per SPI frame (4 - 16)
MikamiUitOpen 4:c1beacfc42c7 84 * @param mode Clock polarity and phase mode (0 - 3)
MikamiUitOpen 4:c1beacfc42c7 85 *
MikamiUitOpen 4:c1beacfc42c7 86 * @code
MikamiUitOpen 4:c1beacfc42c7 87 * mode | POL PHA
MikamiUitOpen 4:c1beacfc42c7 88 * -----+--------
MikamiUitOpen 4:c1beacfc42c7 89 * 0 | 0 0
MikamiUitOpen 4:c1beacfc42c7 90 * 1 | 0 1
MikamiUitOpen 4:c1beacfc42c7 91 * 2 | 1 0
MikamiUitOpen 4:c1beacfc42c7 92 * 3 | 1 1
MikamiUitOpen 4:c1beacfc42c7 93 * @endcode
MikamiUitOpen 4:c1beacfc42c7 94 */
MikamiUitOpen 4:c1beacfc42c7 95 void format(int bits, int mode = 0);
MikamiUitOpen 4:c1beacfc42c7 96
MikamiUitOpen 4:c1beacfc42c7 97 /** Set the spi bus clock frequency
MikamiUitOpen 4:c1beacfc42c7 98 *
MikamiUitOpen 4:c1beacfc42c7 99 * @param hz SCLK frequency in hz (default = 1MHz)
MikamiUitOpen 4:c1beacfc42c7 100 */
MikamiUitOpen 4:c1beacfc42c7 101 void frequency(int hz = 1000000);
MikamiUitOpen 4:c1beacfc42c7 102
MikamiUitOpen 4:c1beacfc42c7 103 /** Write to the SPI Slave and return the response
MikamiUitOpen 4:c1beacfc42c7 104 *
MikamiUitOpen 4:c1beacfc42c7 105 * @param value Data to be sent to the SPI slave
MikamiUitOpen 4:c1beacfc42c7 106 *
MikamiUitOpen 4:c1beacfc42c7 107 * @returns
MikamiUitOpen 4:c1beacfc42c7 108 * Response from the SPI slave
MikamiUitOpen 4:c1beacfc42c7 109 */
MikamiUitOpen 4:c1beacfc42c7 110 virtual int write(int value);
MikamiUitOpen 4:c1beacfc42c7 111
MikamiUitOpen 4:c1beacfc42c7 112 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 4:c1beacfc42c7 113
MikamiUitOpen 4:c1beacfc42c7 114 /** Start non-blocking SPI transfer using 8bit buffers.
MikamiUitOpen 4:c1beacfc42c7 115 *
MikamiUitOpen 4:c1beacfc42c7 116 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
MikamiUitOpen 4:c1beacfc42c7 117 * the default SPI value is sent
MikamiUitOpen 4:c1beacfc42c7 118 * @param tx_length The length of TX buffer in bytes
MikamiUitOpen 4:c1beacfc42c7 119 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
MikamiUitOpen 4:c1beacfc42c7 120 * received data are ignored
MikamiUitOpen 4:c1beacfc42c7 121 * @param rx_length The length of RX buffer in bytes
MikamiUitOpen 4:c1beacfc42c7 122 * @param callback The event callback function
MikamiUitOpen 4:c1beacfc42c7 123 * @param event The logical OR of events to modify. Look at spi hal header file for SPI events.
MikamiUitOpen 4:c1beacfc42c7 124 * @return Zero if the transfer has started, or -1 if SPI peripheral is busy
MikamiUitOpen 4:c1beacfc42c7 125 */
MikamiUitOpen 4:c1beacfc42c7 126 template<typename Type>
MikamiUitOpen 4:c1beacfc42c7 127 int transfer(const Type *tx_buffer, int tx_length, Type *rx_buffer, int rx_length, const event_callback_t& callback, int event = SPI_EVENT_COMPLETE) {
MikamiUitOpen 4:c1beacfc42c7 128 if (spi_active(&_spi)) {
MikamiUitOpen 4:c1beacfc42c7 129 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
MikamiUitOpen 4:c1beacfc42c7 130 }
MikamiUitOpen 4:c1beacfc42c7 131 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, sizeof(Type)*8, callback, event);
MikamiUitOpen 4:c1beacfc42c7 132 return 0;
MikamiUitOpen 4:c1beacfc42c7 133 }
MikamiUitOpen 4:c1beacfc42c7 134
MikamiUitOpen 4:c1beacfc42c7 135 /** Abort the on-going SPI transfer, and continue with transfer's in the queue if any.
MikamiUitOpen 4:c1beacfc42c7 136 */
MikamiUitOpen 4:c1beacfc42c7 137 void abort_transfer();
MikamiUitOpen 4:c1beacfc42c7 138
MikamiUitOpen 4:c1beacfc42c7 139 /** Clear the transaction buffer
MikamiUitOpen 4:c1beacfc42c7 140 */
MikamiUitOpen 4:c1beacfc42c7 141 void clear_transfer_buffer();
MikamiUitOpen 4:c1beacfc42c7 142
MikamiUitOpen 4:c1beacfc42c7 143 /** Clear the transaction buffer and abort on-going transfer.
MikamiUitOpen 4:c1beacfc42c7 144 */
MikamiUitOpen 4:c1beacfc42c7 145 void abort_all_transfers();
MikamiUitOpen 4:c1beacfc42c7 146
MikamiUitOpen 4:c1beacfc42c7 147 /** Configure DMA usage suggestion for non-blocking transfers
MikamiUitOpen 4:c1beacfc42c7 148 *
MikamiUitOpen 4:c1beacfc42c7 149 * @param usage The usage DMA hint for peripheral
MikamiUitOpen 4:c1beacfc42c7 150 * @return Zero if the usage was set, -1 if a transaction is on-going
MikamiUitOpen 4:c1beacfc42c7 151 */
MikamiUitOpen 4:c1beacfc42c7 152 int set_dma_usage(DMAUsage usage);
MikamiUitOpen 4:c1beacfc42c7 153
MikamiUitOpen 4:c1beacfc42c7 154 protected:
MikamiUitOpen 4:c1beacfc42c7 155 /** SPI IRQ handler
MikamiUitOpen 4:c1beacfc42c7 156 *
MikamiUitOpen 4:c1beacfc42c7 157 */
MikamiUitOpen 4:c1beacfc42c7 158 void irq_handler_asynch(void);
MikamiUitOpen 4:c1beacfc42c7 159
MikamiUitOpen 4:c1beacfc42c7 160 /** Common transfer method
MikamiUitOpen 4:c1beacfc42c7 161 *
MikamiUitOpen 4:c1beacfc42c7 162 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
MikamiUitOpen 4:c1beacfc42c7 163 * the default SPI value is sent
MikamiUitOpen 4:c1beacfc42c7 164 * @param tx_length The length of TX buffer in bytes
MikamiUitOpen 4:c1beacfc42c7 165 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
MikamiUitOpen 4:c1beacfc42c7 166 * received data are ignored
MikamiUitOpen 4:c1beacfc42c7 167 * @param rx_length The length of RX buffer in bytes
MikamiUitOpen 4:c1beacfc42c7 168 * @param bit_width The buffers element width
MikamiUitOpen 4:c1beacfc42c7 169 * @param callback The event callback function
MikamiUitOpen 4:c1beacfc42c7 170 * @param event The logical OR of events to modify
MikamiUitOpen 4:c1beacfc42c7 171 * @return Zero if the transfer has started or was added to the queue, or -1 if SPI peripheral is busy/buffer is full
MikamiUitOpen 4:c1beacfc42c7 172 */
MikamiUitOpen 4:c1beacfc42c7 173 int transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
MikamiUitOpen 4:c1beacfc42c7 174
MikamiUitOpen 4:c1beacfc42c7 175 /**
MikamiUitOpen 4:c1beacfc42c7 176 *
MikamiUitOpen 4:c1beacfc42c7 177 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
MikamiUitOpen 4:c1beacfc42c7 178 * the default SPI value is sent
MikamiUitOpen 4:c1beacfc42c7 179 * @param tx_length The length of TX buffer in bytes
MikamiUitOpen 4:c1beacfc42c7 180 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
MikamiUitOpen 4:c1beacfc42c7 181 * received data are ignored
MikamiUitOpen 4:c1beacfc42c7 182 * @param rx_length The length of RX buffer in bytes
MikamiUitOpen 4:c1beacfc42c7 183 * @param bit_width The buffers element width
MikamiUitOpen 4:c1beacfc42c7 184 * @param callback The event callback function
MikamiUitOpen 4:c1beacfc42c7 185 * @param event The logical OR of events to modify
MikamiUitOpen 4:c1beacfc42c7 186 * @return Zero if a transfer was added to the queue, or -1 if the queue is full
MikamiUitOpen 4:c1beacfc42c7 187 */
MikamiUitOpen 4:c1beacfc42c7 188 int queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
MikamiUitOpen 4:c1beacfc42c7 189
MikamiUitOpen 4:c1beacfc42c7 190 /** Configures a callback, spi peripheral and initiate a new transfer
MikamiUitOpen 4:c1beacfc42c7 191 *
MikamiUitOpen 4:c1beacfc42c7 192 * @param tx_buffer The TX buffer with data to be transfered. If NULL is passed,
MikamiUitOpen 4:c1beacfc42c7 193 * the default SPI value is sent
MikamiUitOpen 4:c1beacfc42c7 194 * @param tx_length The length of TX buffer in bytes
MikamiUitOpen 4:c1beacfc42c7 195 * @param rx_buffer The RX buffer which is used for received data. If NULL is passed,
MikamiUitOpen 4:c1beacfc42c7 196 * received data are ignored
MikamiUitOpen 4:c1beacfc42c7 197 * @param rx_length The length of RX buffer in bytes
MikamiUitOpen 4:c1beacfc42c7 198 * @param bit_width The buffers element width
MikamiUitOpen 4:c1beacfc42c7 199 * @param callback The event callback function
MikamiUitOpen 4:c1beacfc42c7 200 * @param event The logical OR of events to modify
MikamiUitOpen 4:c1beacfc42c7 201 */
MikamiUitOpen 4:c1beacfc42c7 202 void start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event);
MikamiUitOpen 4:c1beacfc42c7 203
MikamiUitOpen 4:c1beacfc42c7 204 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 4:c1beacfc42c7 205
MikamiUitOpen 4:c1beacfc42c7 206 /** Start a new transaction
MikamiUitOpen 4:c1beacfc42c7 207 *
MikamiUitOpen 4:c1beacfc42c7 208 * @param data Transaction data
MikamiUitOpen 4:c1beacfc42c7 209 */
MikamiUitOpen 4:c1beacfc42c7 210 void start_transaction(transaction_t *data);
MikamiUitOpen 4:c1beacfc42c7 211
MikamiUitOpen 4:c1beacfc42c7 212 /** Dequeue a transaction
MikamiUitOpen 4:c1beacfc42c7 213 *
MikamiUitOpen 4:c1beacfc42c7 214 */
MikamiUitOpen 4:c1beacfc42c7 215 void dequeue_transaction();
MikamiUitOpen 4:c1beacfc42c7 216 static CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> _transaction_buffer;
MikamiUitOpen 4:c1beacfc42c7 217 #endif
MikamiUitOpen 4:c1beacfc42c7 218
MikamiUitOpen 4:c1beacfc42c7 219 #endif
MikamiUitOpen 4:c1beacfc42c7 220
MikamiUitOpen 4:c1beacfc42c7 221 public:
MikamiUitOpen 4:c1beacfc42c7 222 virtual ~SPI() {
MikamiUitOpen 4:c1beacfc42c7 223 }
MikamiUitOpen 4:c1beacfc42c7 224
MikamiUitOpen 4:c1beacfc42c7 225 protected:
MikamiUitOpen 4:c1beacfc42c7 226 spi_t _spi;
MikamiUitOpen 4:c1beacfc42c7 227
MikamiUitOpen 4:c1beacfc42c7 228 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 4:c1beacfc42c7 229 CThunk<SPI> _irq;
MikamiUitOpen 4:c1beacfc42c7 230 event_callback_t _callback;
MikamiUitOpen 4:c1beacfc42c7 231 DMAUsage _usage;
MikamiUitOpen 4:c1beacfc42c7 232 #endif
MikamiUitOpen 4:c1beacfc42c7 233
MikamiUitOpen 4:c1beacfc42c7 234 void aquire(void);
MikamiUitOpen 4:c1beacfc42c7 235 static SPI *_owner;
MikamiUitOpen 4:c1beacfc42c7 236 int _bits;
MikamiUitOpen 4:c1beacfc42c7 237 int _mode;
MikamiUitOpen 4:c1beacfc42c7 238 int _hz;
MikamiUitOpen 4:c1beacfc42c7 239 };
MikamiUitOpen 4:c1beacfc42c7 240
MikamiUitOpen 4:c1beacfc42c7 241 } // namespace mbed
MikamiUitOpen 4:c1beacfc42c7 242
MikamiUitOpen 4:c1beacfc42c7 243 #endif
MikamiUitOpen 4:c1beacfc42c7 244
MikamiUitOpen 4:c1beacfc42c7 245 #endif