不韋 呂 / F746_SD_BitmapViewer

microSD カードのビットマップ･ファイルのビュアー．画像の最大値　縦：272ピクセル，横：480ピクセル． Bitmap file viewer for microSD card. Maximum size Vertical: 272 pixels, Horizontal: 480.

Dependencies:   SDFileSystem_Warning_Fixed F746_GUI

mbed_src_STM32F7/hal/spi_api.h@0:f62ffd3644bf, 2018-10-21 (annotated)

Committer:
MikamiUitOpen
Date:
Sun Oct 21 11:29:47 2018 +0000
Revision:
0:f62ffd3644bf
1

Who changed what in which revision?

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MikamiUitOpen 0:f62ffd3644bf 1 /* mbed Microcontroller Library
MikamiUitOpen 0:f62ffd3644bf 2 * Copyright (c) 2006-2013 ARM Limited
MikamiUitOpen 0:f62ffd3644bf 3 *
MikamiUitOpen 0:f62ffd3644bf 4 * Licensed under the Apache License, Version 2.0 (the "License");
MikamiUitOpen 0:f62ffd3644bf 5 * you may not use this file except in compliance with the License.
MikamiUitOpen 0:f62ffd3644bf 6 * You may obtain a copy of the License at
MikamiUitOpen 0:f62ffd3644bf 7 *
MikamiUitOpen 0:f62ffd3644bf 8 * http://www.apache.org/licenses/LICENSE-2.0
MikamiUitOpen 0:f62ffd3644bf 9 *
MikamiUitOpen 0:f62ffd3644bf 10 * Unless required by applicable law or agreed to in writing, software
MikamiUitOpen 0:f62ffd3644bf 11 * distributed under the License is distributed on an "AS IS" BASIS,
MikamiUitOpen 0:f62ffd3644bf 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MikamiUitOpen 0:f62ffd3644bf 13 * See the License for the specific language governing permissions and
MikamiUitOpen 0:f62ffd3644bf 14 * limitations under the License.
MikamiUitOpen 0:f62ffd3644bf 15 */
MikamiUitOpen 0:f62ffd3644bf 16 #ifndef MBED_SPI_API_H
MikamiUitOpen 0:f62ffd3644bf 17 #define MBED_SPI_API_H
MikamiUitOpen 0:f62ffd3644bf 18
MikamiUitOpen 0:f62ffd3644bf 19 #include "device.h"
MikamiUitOpen 0:f62ffd3644bf 20 #include "dma_api.h"
MikamiUitOpen 0:f62ffd3644bf 21 #include "buffer.h"
MikamiUitOpen 0:f62ffd3644bf 22
MikamiUitOpen 0:f62ffd3644bf 23 #if DEVICE_SPI
MikamiUitOpen 0:f62ffd3644bf 24
MikamiUitOpen 0:f62ffd3644bf 25 #define SPI_EVENT_ERROR (1 << 1)
MikamiUitOpen 0:f62ffd3644bf 26 #define SPI_EVENT_COMPLETE (1 << 2)
MikamiUitOpen 0:f62ffd3644bf 27 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
MikamiUitOpen 0:f62ffd3644bf 28 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
MikamiUitOpen 0:f62ffd3644bf 29
MikamiUitOpen 0:f62ffd3644bf 30 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
MikamiUitOpen 0:f62ffd3644bf 31
MikamiUitOpen 0:f62ffd3644bf 32 #define SPI_FILL_WORD (0xFFFF)
MikamiUitOpen 0:f62ffd3644bf 33
MikamiUitOpen 0:f62ffd3644bf 34 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 0:f62ffd3644bf 35 /** Asynch spi hal structure
MikamiUitOpen 0:f62ffd3644bf 36 */
MikamiUitOpen 0:f62ffd3644bf 37 typedef struct {
MikamiUitOpen 0:f62ffd3644bf 38 struct spi_s spi; /**< Target specific spi structure */
MikamiUitOpen 0:f62ffd3644bf 39 struct buffer_s tx_buff; /**< Tx buffer */
MikamiUitOpen 0:f62ffd3644bf 40 struct buffer_s rx_buff; /**< Rx buffer */
MikamiUitOpen 0:f62ffd3644bf 41 } spi_t;
MikamiUitOpen 0:f62ffd3644bf 42
MikamiUitOpen 0:f62ffd3644bf 43 #else
MikamiUitOpen 0:f62ffd3644bf 44 /** Non-asynch spi hal structure
MikamiUitOpen 0:f62ffd3644bf 45 */
MikamiUitOpen 0:f62ffd3644bf 46 typedef struct spi_s spi_t;
MikamiUitOpen 0:f62ffd3644bf 47
MikamiUitOpen 0:f62ffd3644bf 48 #endif
MikamiUitOpen 0:f62ffd3644bf 49
MikamiUitOpen 0:f62ffd3644bf 50 #ifdef __cplusplus
MikamiUitOpen 0:f62ffd3644bf 51 extern "C" {
MikamiUitOpen 0:f62ffd3644bf 52 #endif
MikamiUitOpen 0:f62ffd3644bf 53
MikamiUitOpen 0:f62ffd3644bf 54 /**
MikamiUitOpen 0:f62ffd3644bf 55 * \defgroup GeneralSPI SPI Configuration Functions
MikamiUitOpen 0:f62ffd3644bf 56 * @{
MikamiUitOpen 0:f62ffd3644bf 57 */
MikamiUitOpen 0:f62ffd3644bf 58
MikamiUitOpen 0:f62ffd3644bf 59 /** Initialize the SPI peripheral
MikamiUitOpen 0:f62ffd3644bf 60 *
MikamiUitOpen 0:f62ffd3644bf 61 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
MikamiUitOpen 0:f62ffd3644bf 62 * @param[out] obj The SPI object to initialize
MikamiUitOpen 0:f62ffd3644bf 63 * @param[in] mosi The pin to use for MOSI
MikamiUitOpen 0:f62ffd3644bf 64 * @param[in] miso The pin to use for MISO
MikamiUitOpen 0:f62ffd3644bf 65 * @param[in] sclk The pin to use for SCLK
MikamiUitOpen 0:f62ffd3644bf 66 * @param[in] ssel The pin to use for SSEL
MikamiUitOpen 0:f62ffd3644bf 67 */
MikamiUitOpen 0:f62ffd3644bf 68 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
MikamiUitOpen 0:f62ffd3644bf 69
MikamiUitOpen 0:f62ffd3644bf 70 /** Release a SPI object
MikamiUitOpen 0:f62ffd3644bf 71 *
MikamiUitOpen 0:f62ffd3644bf 72 * TODO: spi_free is currently unimplemented
MikamiUitOpen 0:f62ffd3644bf 73 * This will require reference counting at the C++ level to be safe
MikamiUitOpen 0:f62ffd3644bf 74 *
MikamiUitOpen 0:f62ffd3644bf 75 * Return the pins owned by the SPI object to their reset state
MikamiUitOpen 0:f62ffd3644bf 76 * Disable the SPI peripheral
MikamiUitOpen 0:f62ffd3644bf 77 * Disable the SPI clock
MikamiUitOpen 0:f62ffd3644bf 78 * @param[in] obj The SPI object to deinitialize
MikamiUitOpen 0:f62ffd3644bf 79 */
MikamiUitOpen 0:f62ffd3644bf 80 void spi_free(spi_t *obj);
MikamiUitOpen 0:f62ffd3644bf 81
MikamiUitOpen 0:f62ffd3644bf 82 /** Configure the SPI format
MikamiUitOpen 0:f62ffd3644bf 83 *
MikamiUitOpen 0:f62ffd3644bf 84 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
MikamiUitOpen 0:f62ffd3644bf 85 * @param[in,out] obj The SPI object to configure
MikamiUitOpen 0:f62ffd3644bf 86 * @param[in] bits The number of bits per frame
MikamiUitOpen 0:f62ffd3644bf 87 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
MikamiUitOpen 0:f62ffd3644bf 88 * @param[in] slave Zero for master mode or non-zero for slave mode
MikamiUitOpen 0:f62ffd3644bf 89 */
MikamiUitOpen 0:f62ffd3644bf 90 void spi_format(spi_t *obj, int bits, int mode, int slave);
MikamiUitOpen 0:f62ffd3644bf 91
MikamiUitOpen 0:f62ffd3644bf 92 /** Set the SPI baud rate
MikamiUitOpen 0:f62ffd3644bf 93 *
MikamiUitOpen 0:f62ffd3644bf 94 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
MikamiUitOpen 0:f62ffd3644bf 95 * Configures the SPI peripheral's baud rate
MikamiUitOpen 0:f62ffd3644bf 96 * @param[in,out] obj The SPI object to configure
MikamiUitOpen 0:f62ffd3644bf 97 * @param[in] hz The baud rate in Hz
MikamiUitOpen 0:f62ffd3644bf 98 */
MikamiUitOpen 0:f62ffd3644bf 99 void spi_frequency(spi_t *obj, int hz);
MikamiUitOpen 0:f62ffd3644bf 100
MikamiUitOpen 0:f62ffd3644bf 101 /**@}*/
MikamiUitOpen 0:f62ffd3644bf 102 /**
MikamiUitOpen 0:f62ffd3644bf 103 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
MikamiUitOpen 0:f62ffd3644bf 104 * @{
MikamiUitOpen 0:f62ffd3644bf 105 */
MikamiUitOpen 0:f62ffd3644bf 106
MikamiUitOpen 0:f62ffd3644bf 107 /** Write a byte out in master mode and receive a value
MikamiUitOpen 0:f62ffd3644bf 108 *
MikamiUitOpen 0:f62ffd3644bf 109 * @param[in] obj The SPI peripheral to use for sending
MikamiUitOpen 0:f62ffd3644bf 110 * @param[in] value The value to send
MikamiUitOpen 0:f62ffd3644bf 111 * @return Returns the value received during send
MikamiUitOpen 0:f62ffd3644bf 112 */
MikamiUitOpen 0:f62ffd3644bf 113 int spi_master_write(spi_t *obj, int value);
MikamiUitOpen 0:f62ffd3644bf 114
MikamiUitOpen 0:f62ffd3644bf 115 /** Check if a value is available to read
MikamiUitOpen 0:f62ffd3644bf 116 *
MikamiUitOpen 0:f62ffd3644bf 117 * @param[in] obj The SPI peripheral to check
MikamiUitOpen 0:f62ffd3644bf 118 * @return non-zero if a value is available
MikamiUitOpen 0:f62ffd3644bf 119 */
MikamiUitOpen 0:f62ffd3644bf 120 int spi_slave_receive(spi_t *obj);
MikamiUitOpen 0:f62ffd3644bf 121
MikamiUitOpen 0:f62ffd3644bf 122 /** Get a received value out of the SPI receive buffer in slave mode
MikamiUitOpen 0:f62ffd3644bf 123 *
MikamiUitOpen 0:f62ffd3644bf 124 * Blocks until a value is available
MikamiUitOpen 0:f62ffd3644bf 125 * @param[in] obj The SPI peripheral to read
MikamiUitOpen 0:f62ffd3644bf 126 * @return The value received
MikamiUitOpen 0:f62ffd3644bf 127 */
MikamiUitOpen 0:f62ffd3644bf 128 int spi_slave_read(spi_t *obj);
MikamiUitOpen 0:f62ffd3644bf 129
MikamiUitOpen 0:f62ffd3644bf 130 /** Write a value to the SPI peripheral in slave mode
MikamiUitOpen 0:f62ffd3644bf 131 *
MikamiUitOpen 0:f62ffd3644bf 132 * Blocks until the SPI peripheral can be written to
MikamiUitOpen 0:f62ffd3644bf 133 * @param[in] obj The SPI peripheral to write
MikamiUitOpen 0:f62ffd3644bf 134 * @param[in] value The value to write
MikamiUitOpen 0:f62ffd3644bf 135 */
MikamiUitOpen 0:f62ffd3644bf 136 void spi_slave_write(spi_t *obj, int value);
MikamiUitOpen 0:f62ffd3644bf 137
MikamiUitOpen 0:f62ffd3644bf 138 /** Checks if the specified SPI peripheral is in use
MikamiUitOpen 0:f62ffd3644bf 139 *
MikamiUitOpen 0:f62ffd3644bf 140 * @param[in] obj The SPI peripheral to check
MikamiUitOpen 0:f62ffd3644bf 141 * @return non-zero if the peripheral is currently transmitting
MikamiUitOpen 0:f62ffd3644bf 142 */
MikamiUitOpen 0:f62ffd3644bf 143 int spi_busy(spi_t *obj);
MikamiUitOpen 0:f62ffd3644bf 144
MikamiUitOpen 0:f62ffd3644bf 145 /** Get the module number
MikamiUitOpen 0:f62ffd3644bf 146 *
MikamiUitOpen 0:f62ffd3644bf 147 * @param[in] obj The SPI peripheral to check
MikamiUitOpen 0:f62ffd3644bf 148 * @return The module number
MikamiUitOpen 0:f62ffd3644bf 149 */
MikamiUitOpen 0:f62ffd3644bf 150 uint8_t spi_get_module(spi_t *obj);
MikamiUitOpen 0:f62ffd3644bf 151
MikamiUitOpen 0:f62ffd3644bf 152 /**@}*/
MikamiUitOpen 0:f62ffd3644bf 153
MikamiUitOpen 0:f62ffd3644bf 154 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 0:f62ffd3644bf 155 /**
MikamiUitOpen 0:f62ffd3644bf 156 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
MikamiUitOpen 0:f62ffd3644bf 157 * @{
MikamiUitOpen 0:f62ffd3644bf 158 */
MikamiUitOpen 0:f62ffd3644bf 159
MikamiUitOpen 0:f62ffd3644bf 160 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
MikamiUitOpen 0:f62ffd3644bf 161 *
MikamiUitOpen 0:f62ffd3644bf 162 * @param[in] obj The SPI object which holds the transfer information
MikamiUitOpen 0:f62ffd3644bf 163 * @param[in] tx The buffer to send
MikamiUitOpen 0:f62ffd3644bf 164 * @param[in] tx_length The number of words to transmit
MikamiUitOpen 0:f62ffd3644bf 165 * @param[in] rx The buffer to receive
MikamiUitOpen 0:f62ffd3644bf 166 * @param[in] rx_length The number of words to receive
MikamiUitOpen 0:f62ffd3644bf 167 * @param[in] bit_width The bit width of buffer words
MikamiUitOpen 0:f62ffd3644bf 168 * @param[in] event The logical OR of events to be registered
MikamiUitOpen 0:f62ffd3644bf 169 * @param[in] handler SPI interrupt handler
MikamiUitOpen 0:f62ffd3644bf 170 * @param[in] hint A suggestion for how to use DMA with this transfer
MikamiUitOpen 0:f62ffd3644bf 171 */
MikamiUitOpen 0:f62ffd3644bf 172 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
MikamiUitOpen 0:f62ffd3644bf 173
MikamiUitOpen 0:f62ffd3644bf 174 /** The asynchronous IRQ handler
MikamiUitOpen 0:f62ffd3644bf 175 *
MikamiUitOpen 0:f62ffd3644bf 176 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
MikamiUitOpen 0:f62ffd3644bf 177 * conditions, such as buffer overflows or transfer complete.
MikamiUitOpen 0:f62ffd3644bf 178 * @param[in] obj The SPI object which holds the transfer information
MikamiUitOpen 0:f62ffd3644bf 179 * @return event flags if a transfer termination condition was met or 0 otherwise.
MikamiUitOpen 0:f62ffd3644bf 180 */
MikamiUitOpen 0:f62ffd3644bf 181 uint32_t spi_irq_handler_asynch(spi_t *obj);
MikamiUitOpen 0:f62ffd3644bf 182
MikamiUitOpen 0:f62ffd3644bf 183 /** Attempts to determine if the SPI peripheral is already in use.
MikamiUitOpen 0:f62ffd3644bf 184 *
MikamiUitOpen 0:f62ffd3644bf 185 * If a temporary DMA channel has been allocated, peripheral is in use.
MikamiUitOpen 0:f62ffd3644bf 186 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
MikamiUitOpen 0:f62ffd3644bf 187 * channel were allocated.
MikamiUitOpen 0:f62ffd3644bf 188 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
MikamiUitOpen 0:f62ffd3644bf 189 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
MikamiUitOpen 0:f62ffd3644bf 190 * there are any bytes in the FIFOs.
MikamiUitOpen 0:f62ffd3644bf 191 * @param[in] obj The SPI object to check for activity
MikamiUitOpen 0:f62ffd3644bf 192 * @return non-zero if the SPI port is active or zero if it is not.
MikamiUitOpen 0:f62ffd3644bf 193 */
MikamiUitOpen 0:f62ffd3644bf 194 uint8_t spi_active(spi_t *obj);
MikamiUitOpen 0:f62ffd3644bf 195
MikamiUitOpen 0:f62ffd3644bf 196 /** Abort an SPI transfer
MikamiUitOpen 0:f62ffd3644bf 197 *
MikamiUitOpen 0:f62ffd3644bf 198 * @param obj The SPI peripheral to stop
MikamiUitOpen 0:f62ffd3644bf 199 */
MikamiUitOpen 0:f62ffd3644bf 200 void spi_abort_asynch(spi_t *obj);
MikamiUitOpen 0:f62ffd3644bf 201
MikamiUitOpen 0:f62ffd3644bf 202
MikamiUitOpen 0:f62ffd3644bf 203 #endif
MikamiUitOpen 0:f62ffd3644bf 204
MikamiUitOpen 0:f62ffd3644bf 205 /**@}*/
MikamiUitOpen 0:f62ffd3644bf 206
MikamiUitOpen 0:f62ffd3644bf 207 #ifdef __cplusplus
MikamiUitOpen 0:f62ffd3644bf 208 }
MikamiUitOpen 0:f62ffd3644bf 209 #endif // __cplusplus
MikamiUitOpen 0:f62ffd3644bf 210
MikamiUitOpen 0:f62ffd3644bf 211 #endif // SPI_DEVICE
MikamiUitOpen 0:f62ffd3644bf 212
MikamiUitOpen 0:f62ffd3644bf 213 #endif // MBED_SPI_API_H