不韋 呂 / F746_SD_BitmapViewer

microSD カードのビットマップ･ファイルのビュアー．画像の最大値　縦：272ピクセル，横：480ピクセル． Bitmap file viewer for microSD card. Maximum size Vertical: 272 pixels, Horizontal: 480.

Dependencies:   SDFileSystem_Warning_Fixed F746_GUI

mbed_src_STM32F7/common/SPI.cpp@0:f62ffd3644bf, 2018-10-21 (annotated)

Committer:
MikamiUitOpen
Date:
Sun Oct 21 11:29:47 2018 +0000
Revision:
0:f62ffd3644bf
1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 0:f62ffd3644bf 1 /* mbed Microcontroller Library
MikamiUitOpen 0:f62ffd3644bf 2 * Copyright (c) 2006-2013 ARM Limited
MikamiUitOpen 0:f62ffd3644bf 3 *
MikamiUitOpen 0:f62ffd3644bf 4 * Licensed under the Apache License, Version 2.0 (the "License");
MikamiUitOpen 0:f62ffd3644bf 5 * you may not use this file except in compliance with the License.
MikamiUitOpen 0:f62ffd3644bf 6 * You may obtain a copy of the License at
MikamiUitOpen 0:f62ffd3644bf 7 *
MikamiUitOpen 0:f62ffd3644bf 8 * http://www.apache.org/licenses/LICENSE-2.0
MikamiUitOpen 0:f62ffd3644bf 9 *
MikamiUitOpen 0:f62ffd3644bf 10 * Unless required by applicable law or agreed to in writing, software
MikamiUitOpen 0:f62ffd3644bf 11 * distributed under the License is distributed on an "AS IS" BASIS,
MikamiUitOpen 0:f62ffd3644bf 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MikamiUitOpen 0:f62ffd3644bf 13 * See the License for the specific language governing permissions and
MikamiUitOpen 0:f62ffd3644bf 14 * limitations under the License.
MikamiUitOpen 0:f62ffd3644bf 15 */
MikamiUitOpen 0:f62ffd3644bf 16 #include "SPI.h"
MikamiUitOpen 0:f62ffd3644bf 17
MikamiUitOpen 0:f62ffd3644bf 18 #if DEVICE_SPI
MikamiUitOpen 0:f62ffd3644bf 19
MikamiUitOpen 0:f62ffd3644bf 20 namespace mbed {
MikamiUitOpen 0:f62ffd3644bf 21
MikamiUitOpen 0:f62ffd3644bf 22 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:f62ffd3644bf 23 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
MikamiUitOpen 0:f62ffd3644bf 24 #endif
MikamiUitOpen 0:f62ffd3644bf 25
MikamiUitOpen 0:f62ffd3644bf 26 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
MikamiUitOpen 0:f62ffd3644bf 27 _spi(),
MikamiUitOpen 0:f62ffd3644bf 28 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 0:f62ffd3644bf 29 _irq(this),
MikamiUitOpen 0:f62ffd3644bf 30 _usage(DMA_USAGE_NEVER),
MikamiUitOpen 0:f62ffd3644bf 31 #endif
MikamiUitOpen 0:f62ffd3644bf 32 _bits(8),
MikamiUitOpen 0:f62ffd3644bf 33 _mode(0),
MikamiUitOpen 0:f62ffd3644bf 34 _hz(1000000) {
MikamiUitOpen 0:f62ffd3644bf 35 spi_init(&_spi, mosi, miso, sclk, ssel);
MikamiUitOpen 0:f62ffd3644bf 36 spi_format(&_spi, _bits, _mode, 0);
MikamiUitOpen 0:f62ffd3644bf 37 spi_frequency(&_spi, _hz);
MikamiUitOpen 0:f62ffd3644bf 38 }
MikamiUitOpen 0:f62ffd3644bf 39
MikamiUitOpen 0:f62ffd3644bf 40 void SPI::format(int bits, int mode) {
MikamiUitOpen 0:f62ffd3644bf 41 _bits = bits;
MikamiUitOpen 0:f62ffd3644bf 42 _mode = mode;
MikamiUitOpen 0:f62ffd3644bf 43 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
MikamiUitOpen 0:f62ffd3644bf 44 aquire();
MikamiUitOpen 0:f62ffd3644bf 45 }
MikamiUitOpen 0:f62ffd3644bf 46
MikamiUitOpen 0:f62ffd3644bf 47 void SPI::frequency(int hz) {
MikamiUitOpen 0:f62ffd3644bf 48 _hz = hz;
MikamiUitOpen 0:f62ffd3644bf 49 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
MikamiUitOpen 0:f62ffd3644bf 50 aquire();
MikamiUitOpen 0:f62ffd3644bf 51 }
MikamiUitOpen 0:f62ffd3644bf 52
MikamiUitOpen 0:f62ffd3644bf 53 SPI* SPI::_owner = NULL;
MikamiUitOpen 0:f62ffd3644bf 54
MikamiUitOpen 0:f62ffd3644bf 55 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
MikamiUitOpen 0:f62ffd3644bf 56 void SPI::aquire() {
MikamiUitOpen 0:f62ffd3644bf 57 if (_owner != this) {
MikamiUitOpen 0:f62ffd3644bf 58 spi_format(&_spi, _bits, _mode, 0);
MikamiUitOpen 0:f62ffd3644bf 59 spi_frequency(&_spi, _hz);
MikamiUitOpen 0:f62ffd3644bf 60 _owner = this;
MikamiUitOpen 0:f62ffd3644bf 61 }
MikamiUitOpen 0:f62ffd3644bf 62 }
MikamiUitOpen 0:f62ffd3644bf 63
MikamiUitOpen 0:f62ffd3644bf 64 int SPI::write(int value) {
MikamiUitOpen 0:f62ffd3644bf 65 aquire();
MikamiUitOpen 0:f62ffd3644bf 66 return spi_master_write(&_spi, value);
MikamiUitOpen 0:f62ffd3644bf 67 }
MikamiUitOpen 0:f62ffd3644bf 68
MikamiUitOpen 0:f62ffd3644bf 69 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 0:f62ffd3644bf 70
MikamiUitOpen 0:f62ffd3644bf 71 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
MikamiUitOpen 0:f62ffd3644bf 72 {
MikamiUitOpen 0:f62ffd3644bf 73 if (spi_active(&_spi)) {
MikamiUitOpen 0:f62ffd3644bf 74 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
MikamiUitOpen 0:f62ffd3644bf 75 }
MikamiUitOpen 0:f62ffd3644bf 76 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
MikamiUitOpen 0:f62ffd3644bf 77 return 0;
MikamiUitOpen 0:f62ffd3644bf 78 }
MikamiUitOpen 0:f62ffd3644bf 79
MikamiUitOpen 0:f62ffd3644bf 80 void SPI::abort_transfer()
MikamiUitOpen 0:f62ffd3644bf 81 {
MikamiUitOpen 0:f62ffd3644bf 82 spi_abort_asynch(&_spi);
MikamiUitOpen 0:f62ffd3644bf 83 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:f62ffd3644bf 84 dequeue_transaction();
MikamiUitOpen 0:f62ffd3644bf 85 #endif
MikamiUitOpen 0:f62ffd3644bf 86 }
MikamiUitOpen 0:f62ffd3644bf 87
MikamiUitOpen 0:f62ffd3644bf 88
MikamiUitOpen 0:f62ffd3644bf 89 void SPI::clear_transfer_buffer()
MikamiUitOpen 0:f62ffd3644bf 90 {
MikamiUitOpen 0:f62ffd3644bf 91 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:f62ffd3644bf 92 _transaction_buffer.reset();
MikamiUitOpen 0:f62ffd3644bf 93 #endif
MikamiUitOpen 0:f62ffd3644bf 94 }
MikamiUitOpen 0:f62ffd3644bf 95
MikamiUitOpen 0:f62ffd3644bf 96 void SPI::abort_all_transfers()
MikamiUitOpen 0:f62ffd3644bf 97 {
MikamiUitOpen 0:f62ffd3644bf 98 clear_transfer_buffer();
MikamiUitOpen 0:f62ffd3644bf 99 abort_transfer();
MikamiUitOpen 0:f62ffd3644bf 100 }
MikamiUitOpen 0:f62ffd3644bf 101
MikamiUitOpen 0:f62ffd3644bf 102 int SPI::set_dma_usage(DMAUsage usage)
MikamiUitOpen 0:f62ffd3644bf 103 {
MikamiUitOpen 0:f62ffd3644bf 104 if (spi_active(&_spi)) {
MikamiUitOpen 0:f62ffd3644bf 105 return -1;
MikamiUitOpen 0:f62ffd3644bf 106 }
MikamiUitOpen 0:f62ffd3644bf 107 _usage = usage;
MikamiUitOpen 0:f62ffd3644bf 108 return 0;
MikamiUitOpen 0:f62ffd3644bf 109 }
MikamiUitOpen 0:f62ffd3644bf 110
MikamiUitOpen 0:f62ffd3644bf 111 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
MikamiUitOpen 0:f62ffd3644bf 112 {
MikamiUitOpen 0:f62ffd3644bf 113 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:f62ffd3644bf 114 transaction_t t;
MikamiUitOpen 0:f62ffd3644bf 115
MikamiUitOpen 0:f62ffd3644bf 116 t.tx_buffer = const_cast<void *>(tx_buffer);
MikamiUitOpen 0:f62ffd3644bf 117 t.tx_length = tx_length;
MikamiUitOpen 0:f62ffd3644bf 118 t.rx_buffer = rx_buffer;
MikamiUitOpen 0:f62ffd3644bf 119 t.rx_length = rx_length;
MikamiUitOpen 0:f62ffd3644bf 120 t.event = event;
MikamiUitOpen 0:f62ffd3644bf 121 t.callback = callback;
MikamiUitOpen 0:f62ffd3644bf 122 t.width = bit_width;
MikamiUitOpen 0:f62ffd3644bf 123 Transaction<SPI> transaction(this, t);
MikamiUitOpen 0:f62ffd3644bf 124 if (_transaction_buffer.full()) {
MikamiUitOpen 0:f62ffd3644bf 125 return -1; // the buffer is full
MikamiUitOpen 0:f62ffd3644bf 126 } else {
MikamiUitOpen 0:f62ffd3644bf 127 __disable_irq();
MikamiUitOpen 0:f62ffd3644bf 128 _transaction_buffer.push(transaction);
MikamiUitOpen 0:f62ffd3644bf 129 if (!spi_active(&_spi)) {
MikamiUitOpen 0:f62ffd3644bf 130 dequeue_transaction();
MikamiUitOpen 0:f62ffd3644bf 131 }
MikamiUitOpen 0:f62ffd3644bf 132 __enable_irq();
MikamiUitOpen 0:f62ffd3644bf 133 return 0;
MikamiUitOpen 0:f62ffd3644bf 134 }
MikamiUitOpen 0:f62ffd3644bf 135 #else
MikamiUitOpen 0:f62ffd3644bf 136 return -1;
MikamiUitOpen 0:f62ffd3644bf 137 #endif
MikamiUitOpen 0:f62ffd3644bf 138 }
MikamiUitOpen 0:f62ffd3644bf 139
MikamiUitOpen 0:f62ffd3644bf 140 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
MikamiUitOpen 0:f62ffd3644bf 141 {
MikamiUitOpen 0:f62ffd3644bf 142 aquire();
MikamiUitOpen 0:f62ffd3644bf 143 _callback = callback;
MikamiUitOpen 0:f62ffd3644bf 144 _irq.callback(&SPI::irq_handler_asynch);
MikamiUitOpen 0:f62ffd3644bf 145 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
MikamiUitOpen 0:f62ffd3644bf 146 }
MikamiUitOpen 0:f62ffd3644bf 147
MikamiUitOpen 0:f62ffd3644bf 148 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:f62ffd3644bf 149
MikamiUitOpen 0:f62ffd3644bf 150 void SPI::start_transaction(transaction_t *data)
MikamiUitOpen 0:f62ffd3644bf 151 {
MikamiUitOpen 0:f62ffd3644bf 152 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
MikamiUitOpen 0:f62ffd3644bf 153 }
MikamiUitOpen 0:f62ffd3644bf 154
MikamiUitOpen 0:f62ffd3644bf 155 void SPI::dequeue_transaction()
MikamiUitOpen 0:f62ffd3644bf 156 {
MikamiUitOpen 0:f62ffd3644bf 157 Transaction<SPI> t;
MikamiUitOpen 0:f62ffd3644bf 158 if (_transaction_buffer.pop(t)) {
MikamiUitOpen 0:f62ffd3644bf 159 SPI* obj = t.get_object();
MikamiUitOpen 0:f62ffd3644bf 160 transaction_t* data = t.get_transaction();
MikamiUitOpen 0:f62ffd3644bf 161 obj->start_transaction(data);
MikamiUitOpen 0:f62ffd3644bf 162 }
MikamiUitOpen 0:f62ffd3644bf 163 }
MikamiUitOpen 0:f62ffd3644bf 164
MikamiUitOpen 0:f62ffd3644bf 165 #endif
MikamiUitOpen 0:f62ffd3644bf 166
MikamiUitOpen 0:f62ffd3644bf 167 void SPI::irq_handler_asynch(void)
MikamiUitOpen 0:f62ffd3644bf 168 {
MikamiUitOpen 0:f62ffd3644bf 169 int event = spi_irq_handler_asynch(&_spi);
MikamiUitOpen 0:f62ffd3644bf 170 if (_callback && (event & SPI_EVENT_ALL)) {
MikamiUitOpen 0:f62ffd3644bf 171 _callback.call(event & SPI_EVENT_ALL);
MikamiUitOpen 0:f62ffd3644bf 172 }
MikamiUitOpen 0:f62ffd3644bf 173 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:f62ffd3644bf 174 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
MikamiUitOpen 0:f62ffd3644bf 175 // SPI peripheral is free (event happend), dequeue transaction
MikamiUitOpen 0:f62ffd3644bf 176 dequeue_transaction();
MikamiUitOpen 0:f62ffd3644bf 177 }
MikamiUitOpen 0:f62ffd3644bf 178 #endif
MikamiUitOpen 0:f62ffd3644bf 179 }
MikamiUitOpen 0:f62ffd3644bf 180
MikamiUitOpen 0:f62ffd3644bf 181 #endif
MikamiUitOpen 0:f62ffd3644bf 182
MikamiUitOpen 0:f62ffd3644bf 183 } // namespace mbed
MikamiUitOpen 0:f62ffd3644bf 184
MikamiUitOpen 0:f62ffd3644bf 185 #endif