不韋 呂 / F746_MySoundMachine

Integrated program of 4 different kinds of application programs for processing sound signal. 4種類のサウンド信号処理を統合したプログラム．

Dependencies:   F746_GUI F746_SAI_IO FrequencyResponseDrawer SD_PlayerSkeleton UIT_FFT_Real

mbed_src_STM32F7/common/SPI.cpp@16:d60e5187fd31, 2017-04-27 (annotated)

Committer:
MikamiUitOpen
Date:
Thu Apr 27 23:55:53 2017 +0000
Revision:
16:d60e5187fd31
Parent:
2:fcba17e3d573 
17

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 0:224dccbc4edd 1 /* mbed Microcontroller Library
MikamiUitOpen 0:224dccbc4edd 2 * Copyright (c) 2006-2013 ARM Limited
MikamiUitOpen 0:224dccbc4edd 3 *
MikamiUitOpen 0:224dccbc4edd 4 * Licensed under the Apache License, Version 2.0 (the "License");
MikamiUitOpen 0:224dccbc4edd 5 * you may not use this file except in compliance with the License.
MikamiUitOpen 0:224dccbc4edd 6 * You may obtain a copy of the License at
MikamiUitOpen 0:224dccbc4edd 7 *
MikamiUitOpen 0:224dccbc4edd 8 * http://www.apache.org/licenses/LICENSE-2.0
MikamiUitOpen 0:224dccbc4edd 9 *
MikamiUitOpen 0:224dccbc4edd 10 * Unless required by applicable law or agreed to in writing, software
MikamiUitOpen 0:224dccbc4edd 11 * distributed under the License is distributed on an "AS IS" BASIS,
MikamiUitOpen 0:224dccbc4edd 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MikamiUitOpen 0:224dccbc4edd 13 * See the License for the specific language governing permissions and
MikamiUitOpen 0:224dccbc4edd 14 * limitations under the License.
MikamiUitOpen 0:224dccbc4edd 15 */
MikamiUitOpen 0:224dccbc4edd 16 #include "SPI.h"
MikamiUitOpen 0:224dccbc4edd 17
MikamiUitOpen 0:224dccbc4edd 18 #if DEVICE_SPI
MikamiUitOpen 0:224dccbc4edd 19
MikamiUitOpen 0:224dccbc4edd 20 namespace mbed {
MikamiUitOpen 0:224dccbc4edd 21
MikamiUitOpen 0:224dccbc4edd 22 #if DEVICE_SPI_ASYNCH && TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:224dccbc4edd 23 CircularBuffer<Transaction<SPI>, TRANSACTION_QUEUE_SIZE_SPI> SPI::_transaction_buffer;
MikamiUitOpen 0:224dccbc4edd 24 #endif
MikamiUitOpen 0:224dccbc4edd 25
MikamiUitOpen 0:224dccbc4edd 26 SPI::SPI(PinName mosi, PinName miso, PinName sclk, PinName ssel) :
MikamiUitOpen 0:224dccbc4edd 27 _spi(),
MikamiUitOpen 0:224dccbc4edd 28 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 0:224dccbc4edd 29 _irq(this),
MikamiUitOpen 0:224dccbc4edd 30 _usage(DMA_USAGE_NEVER),
MikamiUitOpen 0:224dccbc4edd 31 #endif
MikamiUitOpen 0:224dccbc4edd 32 _bits(8),
MikamiUitOpen 0:224dccbc4edd 33 _mode(0),
MikamiUitOpen 0:224dccbc4edd 34 _hz(1000000) {
MikamiUitOpen 0:224dccbc4edd 35 spi_init(&_spi, mosi, miso, sclk, ssel);
MikamiUitOpen 0:224dccbc4edd 36 spi_format(&_spi, _bits, _mode, 0);
MikamiUitOpen 0:224dccbc4edd 37 spi_frequency(&_spi, _hz);
MikamiUitOpen 0:224dccbc4edd 38 }
MikamiUitOpen 0:224dccbc4edd 39
MikamiUitOpen 0:224dccbc4edd 40 void SPI::format(int bits, int mode) {
MikamiUitOpen 0:224dccbc4edd 41 _bits = bits;
MikamiUitOpen 0:224dccbc4edd 42 _mode = mode;
MikamiUitOpen 0:224dccbc4edd 43 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
MikamiUitOpen 0:224dccbc4edd 44 aquire();
MikamiUitOpen 0:224dccbc4edd 45 }
MikamiUitOpen 0:224dccbc4edd 46
MikamiUitOpen 0:224dccbc4edd 47 void SPI::frequency(int hz) {
MikamiUitOpen 0:224dccbc4edd 48 _hz = hz;
MikamiUitOpen 0:224dccbc4edd 49 SPI::_owner = NULL; // Not that elegant, but works. rmeyer
MikamiUitOpen 0:224dccbc4edd 50 aquire();
MikamiUitOpen 0:224dccbc4edd 51 }
MikamiUitOpen 0:224dccbc4edd 52
MikamiUitOpen 0:224dccbc4edd 53 SPI* SPI::_owner = NULL;
MikamiUitOpen 0:224dccbc4edd 54
MikamiUitOpen 0:224dccbc4edd 55 // ignore the fact there are multiple physical spis, and always update if it wasnt us last
MikamiUitOpen 0:224dccbc4edd 56 void SPI::aquire() {
MikamiUitOpen 0:224dccbc4edd 57 if (_owner != this) {
MikamiUitOpen 0:224dccbc4edd 58 spi_format(&_spi, _bits, _mode, 0);
MikamiUitOpen 0:224dccbc4edd 59 spi_frequency(&_spi, _hz);
MikamiUitOpen 0:224dccbc4edd 60 _owner = this;
MikamiUitOpen 0:224dccbc4edd 61 }
MikamiUitOpen 0:224dccbc4edd 62 }
MikamiUitOpen 0:224dccbc4edd 63
MikamiUitOpen 0:224dccbc4edd 64 int SPI::write(int value) {
MikamiUitOpen 0:224dccbc4edd 65 aquire();
MikamiUitOpen 0:224dccbc4edd 66 return spi_master_write(&_spi, value);
MikamiUitOpen 0:224dccbc4edd 67 }
MikamiUitOpen 0:224dccbc4edd 68
MikamiUitOpen 0:224dccbc4edd 69 #if DEVICE_SPI_ASYNCH
MikamiUitOpen 0:224dccbc4edd 70
MikamiUitOpen 0:224dccbc4edd 71 int SPI::transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
MikamiUitOpen 0:224dccbc4edd 72 {
MikamiUitOpen 0:224dccbc4edd 73 if (spi_active(&_spi)) {
MikamiUitOpen 0:224dccbc4edd 74 return queue_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
MikamiUitOpen 0:224dccbc4edd 75 }
MikamiUitOpen 0:224dccbc4edd 76 start_transfer(tx_buffer, tx_length, rx_buffer, rx_length, bit_width, callback, event);
MikamiUitOpen 0:224dccbc4edd 77 return 0;
MikamiUitOpen 0:224dccbc4edd 78 }
MikamiUitOpen 0:224dccbc4edd 79
MikamiUitOpen 0:224dccbc4edd 80 void SPI::abort_transfer()
MikamiUitOpen 0:224dccbc4edd 81 {
MikamiUitOpen 0:224dccbc4edd 82 spi_abort_asynch(&_spi);
MikamiUitOpen 0:224dccbc4edd 83 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:224dccbc4edd 84 dequeue_transaction();
MikamiUitOpen 0:224dccbc4edd 85 #endif
MikamiUitOpen 0:224dccbc4edd 86 }
MikamiUitOpen 0:224dccbc4edd 87
MikamiUitOpen 0:224dccbc4edd 88
MikamiUitOpen 0:224dccbc4edd 89 void SPI::clear_transfer_buffer()
MikamiUitOpen 0:224dccbc4edd 90 {
MikamiUitOpen 0:224dccbc4edd 91 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:224dccbc4edd 92 _transaction_buffer.reset();
MikamiUitOpen 0:224dccbc4edd 93 #endif
MikamiUitOpen 0:224dccbc4edd 94 }
MikamiUitOpen 0:224dccbc4edd 95
MikamiUitOpen 0:224dccbc4edd 96 void SPI::abort_all_transfers()
MikamiUitOpen 0:224dccbc4edd 97 {
MikamiUitOpen 0:224dccbc4edd 98 clear_transfer_buffer();
MikamiUitOpen 0:224dccbc4edd 99 abort_transfer();
MikamiUitOpen 0:224dccbc4edd 100 }
MikamiUitOpen 0:224dccbc4edd 101
MikamiUitOpen 0:224dccbc4edd 102 int SPI::set_dma_usage(DMAUsage usage)
MikamiUitOpen 0:224dccbc4edd 103 {
MikamiUitOpen 0:224dccbc4edd 104 if (spi_active(&_spi)) {
MikamiUitOpen 0:224dccbc4edd 105 return -1;
MikamiUitOpen 0:224dccbc4edd 106 }
MikamiUitOpen 0:224dccbc4edd 107 _usage = usage;
MikamiUitOpen 0:224dccbc4edd 108 return 0;
MikamiUitOpen 0:224dccbc4edd 109 }
MikamiUitOpen 0:224dccbc4edd 110
MikamiUitOpen 0:224dccbc4edd 111 int SPI::queue_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
MikamiUitOpen 0:224dccbc4edd 112 {
MikamiUitOpen 0:224dccbc4edd 113 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:224dccbc4edd 114 transaction_t t;
MikamiUitOpen 0:224dccbc4edd 115
MikamiUitOpen 0:224dccbc4edd 116 t.tx_buffer = const_cast<void *>(tx_buffer);
MikamiUitOpen 0:224dccbc4edd 117 t.tx_length = tx_length;
MikamiUitOpen 0:224dccbc4edd 118 t.rx_buffer = rx_buffer;
MikamiUitOpen 0:224dccbc4edd 119 t.rx_length = rx_length;
MikamiUitOpen 0:224dccbc4edd 120 t.event = event;
MikamiUitOpen 0:224dccbc4edd 121 t.callback = callback;
MikamiUitOpen 0:224dccbc4edd 122 t.width = bit_width;
MikamiUitOpen 0:224dccbc4edd 123 Transaction<SPI> transaction(this, t);
MikamiUitOpen 0:224dccbc4edd 124 if (_transaction_buffer.full()) {
MikamiUitOpen 0:224dccbc4edd 125 return -1; // the buffer is full
MikamiUitOpen 0:224dccbc4edd 126 } else {
MikamiUitOpen 0:224dccbc4edd 127 __disable_irq();
MikamiUitOpen 0:224dccbc4edd 128 _transaction_buffer.push(transaction);
MikamiUitOpen 0:224dccbc4edd 129 if (!spi_active(&_spi)) {
MikamiUitOpen 0:224dccbc4edd 130 dequeue_transaction();
MikamiUitOpen 0:224dccbc4edd 131 }
MikamiUitOpen 0:224dccbc4edd 132 __enable_irq();
MikamiUitOpen 0:224dccbc4edd 133 return 0;
MikamiUitOpen 0:224dccbc4edd 134 }
MikamiUitOpen 0:224dccbc4edd 135 #else
MikamiUitOpen 0:224dccbc4edd 136 return -1;
MikamiUitOpen 0:224dccbc4edd 137 #endif
MikamiUitOpen 0:224dccbc4edd 138 }
MikamiUitOpen 0:224dccbc4edd 139
MikamiUitOpen 0:224dccbc4edd 140 void SPI::start_transfer(const void *tx_buffer, int tx_length, void *rx_buffer, int rx_length, unsigned char bit_width, const event_callback_t& callback, int event)
MikamiUitOpen 0:224dccbc4edd 141 {
MikamiUitOpen 0:224dccbc4edd 142 aquire();
MikamiUitOpen 0:224dccbc4edd 143 _callback = callback;
MikamiUitOpen 0:224dccbc4edd 144 _irq.callback(&SPI::irq_handler_asynch);
MikamiUitOpen 0:224dccbc4edd 145 spi_master_transfer(&_spi, tx_buffer, tx_length, rx_buffer, rx_length, bit_width, _irq.entry(), event , _usage);
MikamiUitOpen 0:224dccbc4edd 146 }
MikamiUitOpen 0:224dccbc4edd 147
MikamiUitOpen 0:224dccbc4edd 148 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:224dccbc4edd 149
MikamiUitOpen 0:224dccbc4edd 150 void SPI::start_transaction(transaction_t *data)
MikamiUitOpen 0:224dccbc4edd 151 {
MikamiUitOpen 0:224dccbc4edd 152 start_transfer(data->tx_buffer, data->tx_length, data->rx_buffer, data->rx_length, data->width, data->callback, data->event);
MikamiUitOpen 0:224dccbc4edd 153 }
MikamiUitOpen 0:224dccbc4edd 154
MikamiUitOpen 0:224dccbc4edd 155 void SPI::dequeue_transaction()
MikamiUitOpen 0:224dccbc4edd 156 {
MikamiUitOpen 0:224dccbc4edd 157 Transaction<SPI> t;
MikamiUitOpen 0:224dccbc4edd 158 if (_transaction_buffer.pop(t)) {
MikamiUitOpen 0:224dccbc4edd 159 SPI* obj = t.get_object();
MikamiUitOpen 0:224dccbc4edd 160 transaction_t* data = t.get_transaction();
MikamiUitOpen 0:224dccbc4edd 161 obj->start_transaction(data);
MikamiUitOpen 0:224dccbc4edd 162 }
MikamiUitOpen 0:224dccbc4edd 163 }
MikamiUitOpen 0:224dccbc4edd 164
MikamiUitOpen 0:224dccbc4edd 165 #endif
MikamiUitOpen 0:224dccbc4edd 166
MikamiUitOpen 0:224dccbc4edd 167 void SPI::irq_handler_asynch(void)
MikamiUitOpen 0:224dccbc4edd 168 {
MikamiUitOpen 0:224dccbc4edd 169 int event = spi_irq_handler_asynch(&_spi);
MikamiUitOpen 0:224dccbc4edd 170 if (_callback && (event & SPI_EVENT_ALL)) {
MikamiUitOpen 0:224dccbc4edd 171 _callback.call(event & SPI_EVENT_ALL);
MikamiUitOpen 0:224dccbc4edd 172 }
MikamiUitOpen 0:224dccbc4edd 173 #if TRANSACTION_QUEUE_SIZE_SPI
MikamiUitOpen 0:224dccbc4edd 174 if (event & (SPI_EVENT_ALL | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE)) {
MikamiUitOpen 0:224dccbc4edd 175 // SPI peripheral is free (event happend), dequeue transaction
MikamiUitOpen 0:224dccbc4edd 176 dequeue_transaction();
MikamiUitOpen 0:224dccbc4edd 177 }
MikamiUitOpen 0:224dccbc4edd 178 #endif
MikamiUitOpen 0:224dccbc4edd 179 }
MikamiUitOpen 0:224dccbc4edd 180
MikamiUitOpen 0:224dccbc4edd 181 #endif
MikamiUitOpen 0:224dccbc4edd 182
MikamiUitOpen 0:224dccbc4edd 183 } // namespace mbed
MikamiUitOpen 0:224dccbc4edd 184
MikamiUitOpen 0:224dccbc4edd 185 #endif