Output the audio signal (*.bin) with filtering by IIR filter in the SD card using onboard CODEC. For *.wav file, F746_SD_WavPlayer and F746_SD_GraphicEqualiser are published on mbed. SD カードのオーディオ信号 (*.bin) を遮断周波数可変の IIR フィルタを通して,ボードに搭載されているCODEC で出力する.*.wav 形式のファイル用には,F746_SD_WavPlayer と F746_SD_GraphicEqualiser を mbed で公開している.

Dependencies:   BSP_DISCO_F746NG_patch_fixed F746_GUI LCD_DISCO_F746NG SDFileSystem_Warning_Fixed TS_DISCO_F746NG mbed

Committer:
MikamiUitOpen
Date:
Sun Apr 17 08:44:43 2016 +0000
Revision:
5:4a99dabc9180
Parent:
4:76aa20fb326a
6

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 4:76aa20fb326a 1 //--------------------------------------------------------------
MikamiUitOpen 4:76aa20fb326a 2 // Overwrite functuions and define calback functions
MikamiUitOpen 4:76aa20fb326a 3 // for functions in stm32746g_discovery_audio.cpp
MikamiUitOpen 4:76aa20fb326a 4 //--------------------------------------------------------------
MikamiUitOpen 4:76aa20fb326a 5 #include "BSP_AudioOut_Overwrite.hpp"
MikamiUitOpen 4:76aa20fb326a 6
MikamiUitOpen 4:76aa20fb326a 7 // These three callback functions are modyfied by Mikami
MikamiUitOpen 4:76aa20fb326a 8 void BSP_AUDIO_OUT_HalfTransfer_CallBack()
MikamiUitOpen 4:76aa20fb326a 9 {
MikamiUitOpen 4:76aa20fb326a 10 Mikami::SaiIO_O::FillBuffer1st();
MikamiUitOpen 4:76aa20fb326a 11 }
MikamiUitOpen 4:76aa20fb326a 12
MikamiUitOpen 4:76aa20fb326a 13 void BSP_AUDIO_OUT_TransferComplete_CallBack()
MikamiUitOpen 4:76aa20fb326a 14 {
MikamiUitOpen 4:76aa20fb326a 15 Mikami::SaiIO_O::FillBuffer2nd();
MikamiUitOpen 4:76aa20fb326a 16 }
MikamiUitOpen 4:76aa20fb326a 17
MikamiUitOpen 4:76aa20fb326a 18 void BSP_AUDIO_OUT_Error_CallBack()
MikamiUitOpen 4:76aa20fb326a 19 {
MikamiUitOpen 4:76aa20fb326a 20 Mikami::SaiIO_O::ErrorTrap();
MikamiUitOpen 4:76aa20fb326a 21 }
MikamiUitOpen 4:76aa20fb326a 22
MikamiUitOpen 4:76aa20fb326a 23 //--------------------------------------------------------------
MikamiUitOpen 4:76aa20fb326a 24 // Followings are original by Nanase
MikamiUitOpen 4:76aa20fb326a 25 //--------------------------------------------------------------
MikamiUitOpen 4:76aa20fb326a 26
MikamiUitOpen 4:76aa20fb326a 27 DMA_HandleTypeDef hdma_sai_tx;
MikamiUitOpen 4:76aa20fb326a 28
MikamiUitOpen 4:76aa20fb326a 29 void AUDIO_OUT_SAIx_DMAx_IRQHandler()
MikamiUitOpen 4:76aa20fb326a 30 {
MikamiUitOpen 4:76aa20fb326a 31 HAL_DMA_IRQHandler(&hdma_sai_tx);
MikamiUitOpen 4:76aa20fb326a 32 }
MikamiUitOpen 4:76aa20fb326a 33
MikamiUitOpen 4:76aa20fb326a 34 void BSP_AUDIO_OUT_MspInit(SAI_HandleTypeDef *hsai, void *Params)
MikamiUitOpen 4:76aa20fb326a 35 {
MikamiUitOpen 4:76aa20fb326a 36 //static DMA_HandleTypeDef hdma_sai_tx;
MikamiUitOpen 4:76aa20fb326a 37 GPIO_InitTypeDef gpio_init_structure;
MikamiUitOpen 4:76aa20fb326a 38
MikamiUitOpen 4:76aa20fb326a 39 /* Enable SAI clock */
MikamiUitOpen 4:76aa20fb326a 40 AUDIO_OUT_SAIx_CLK_ENABLE();
MikamiUitOpen 4:76aa20fb326a 41
MikamiUitOpen 4:76aa20fb326a 42 /* Enable GPIO clock */
MikamiUitOpen 4:76aa20fb326a 43 AUDIO_OUT_SAIx_MCLK_ENABLE();
MikamiUitOpen 4:76aa20fb326a 44 AUDIO_OUT_SAIx_SCK_SD_ENABLE();
MikamiUitOpen 4:76aa20fb326a 45 AUDIO_OUT_SAIx_FS_ENABLE();
MikamiUitOpen 4:76aa20fb326a 46
MikamiUitOpen 4:76aa20fb326a 47 /* CODEC_SAI pins configuration: FS, SCK, MCK and SD pins ------------------*/
MikamiUitOpen 4:76aa20fb326a 48 gpio_init_structure.Pin = AUDIO_OUT_SAIx_FS_PIN;
MikamiUitOpen 4:76aa20fb326a 49 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
MikamiUitOpen 4:76aa20fb326a 50 gpio_init_structure.Pull = GPIO_NOPULL;
MikamiUitOpen 4:76aa20fb326a 51 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
MikamiUitOpen 4:76aa20fb326a 52 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_FS_SD_MCLK_AF;
MikamiUitOpen 4:76aa20fb326a 53 HAL_GPIO_Init(AUDIO_OUT_SAIx_FS_GPIO_PORT, &gpio_init_structure);
MikamiUitOpen 4:76aa20fb326a 54
MikamiUitOpen 4:76aa20fb326a 55 gpio_init_structure.Pin = AUDIO_OUT_SAIx_SCK_PIN;
MikamiUitOpen 4:76aa20fb326a 56 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
MikamiUitOpen 4:76aa20fb326a 57 gpio_init_structure.Pull = GPIO_NOPULL;
MikamiUitOpen 4:76aa20fb326a 58 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
MikamiUitOpen 4:76aa20fb326a 59 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_SCK_AF;
MikamiUitOpen 4:76aa20fb326a 60 HAL_GPIO_Init(AUDIO_OUT_SAIx_SCK_SD_GPIO_PORT, &gpio_init_structure);
MikamiUitOpen 4:76aa20fb326a 61
MikamiUitOpen 4:76aa20fb326a 62 gpio_init_structure.Pin = AUDIO_OUT_SAIx_SD_PIN;
MikamiUitOpen 4:76aa20fb326a 63 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
MikamiUitOpen 4:76aa20fb326a 64 gpio_init_structure.Pull = GPIO_NOPULL;
MikamiUitOpen 4:76aa20fb326a 65 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
MikamiUitOpen 4:76aa20fb326a 66 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_FS_SD_MCLK_AF;
MikamiUitOpen 4:76aa20fb326a 67 HAL_GPIO_Init(AUDIO_OUT_SAIx_SCK_SD_GPIO_PORT, &gpio_init_structure);
MikamiUitOpen 4:76aa20fb326a 68
MikamiUitOpen 4:76aa20fb326a 69 gpio_init_structure.Pin = AUDIO_OUT_SAIx_MCLK_PIN;
MikamiUitOpen 4:76aa20fb326a 70 gpio_init_structure.Mode = GPIO_MODE_AF_PP;
MikamiUitOpen 4:76aa20fb326a 71 gpio_init_structure.Pull = GPIO_NOPULL;
MikamiUitOpen 4:76aa20fb326a 72 gpio_init_structure.Speed = GPIO_SPEED_HIGH;
MikamiUitOpen 4:76aa20fb326a 73 gpio_init_structure.Alternate = AUDIO_OUT_SAIx_FS_SD_MCLK_AF;
MikamiUitOpen 4:76aa20fb326a 74 HAL_GPIO_Init(AUDIO_OUT_SAIx_MCLK_GPIO_PORT, &gpio_init_structure);
MikamiUitOpen 4:76aa20fb326a 75
MikamiUitOpen 4:76aa20fb326a 76 /* Enable the DMA clock */
MikamiUitOpen 4:76aa20fb326a 77 AUDIO_OUT_SAIx_DMAx_CLK_ENABLE();
MikamiUitOpen 4:76aa20fb326a 78
MikamiUitOpen 4:76aa20fb326a 79 if(hsai->Instance == AUDIO_OUT_SAIx)
MikamiUitOpen 4:76aa20fb326a 80 {
MikamiUitOpen 4:76aa20fb326a 81 /* Configure the hdma_saiTx handle parameters */
MikamiUitOpen 4:76aa20fb326a 82 hdma_sai_tx.Init.Channel = AUDIO_OUT_SAIx_DMAx_CHANNEL;
MikamiUitOpen 4:76aa20fb326a 83 hdma_sai_tx.Init.Direction = DMA_MEMORY_TO_PERIPH;
MikamiUitOpen 4:76aa20fb326a 84 hdma_sai_tx.Init.PeriphInc = DMA_PINC_DISABLE;
MikamiUitOpen 4:76aa20fb326a 85 hdma_sai_tx.Init.MemInc = DMA_MINC_ENABLE;
MikamiUitOpen 4:76aa20fb326a 86 hdma_sai_tx.Init.PeriphDataAlignment = AUDIO_OUT_SAIx_DMAx_PERIPH_DATA_SIZE;
MikamiUitOpen 4:76aa20fb326a 87 hdma_sai_tx.Init.MemDataAlignment = AUDIO_OUT_SAIx_DMAx_MEM_DATA_SIZE;
MikamiUitOpen 4:76aa20fb326a 88 hdma_sai_tx.Init.Mode = DMA_CIRCULAR;
MikamiUitOpen 4:76aa20fb326a 89 hdma_sai_tx.Init.Priority = DMA_PRIORITY_HIGH;
MikamiUitOpen 4:76aa20fb326a 90 hdma_sai_tx.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
MikamiUitOpen 4:76aa20fb326a 91 hdma_sai_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
MikamiUitOpen 4:76aa20fb326a 92 hdma_sai_tx.Init.MemBurst = DMA_MBURST_SINGLE;
MikamiUitOpen 4:76aa20fb326a 93 hdma_sai_tx.Init.PeriphBurst = DMA_PBURST_SINGLE;
MikamiUitOpen 4:76aa20fb326a 94
MikamiUitOpen 4:76aa20fb326a 95 hdma_sai_tx.Instance = AUDIO_OUT_SAIx_DMAx_STREAM;
MikamiUitOpen 4:76aa20fb326a 96
MikamiUitOpen 4:76aa20fb326a 97 /* Associate the DMA handle */
MikamiUitOpen 4:76aa20fb326a 98 __HAL_LINKDMA(hsai, hdmatx, hdma_sai_tx);
MikamiUitOpen 4:76aa20fb326a 99
MikamiUitOpen 4:76aa20fb326a 100 /* Deinitialize the Stream for new transfer */
MikamiUitOpen 4:76aa20fb326a 101 HAL_DMA_DeInit(&hdma_sai_tx);
MikamiUitOpen 4:76aa20fb326a 102
MikamiUitOpen 4:76aa20fb326a 103 /* Configure the DMA Stream */
MikamiUitOpen 4:76aa20fb326a 104 HAL_DMA_Init(&hdma_sai_tx);
MikamiUitOpen 4:76aa20fb326a 105 }
MikamiUitOpen 4:76aa20fb326a 106
MikamiUitOpen 4:76aa20fb326a 107 /* SAI DMA IRQ Channel configuration */
MikamiUitOpen 4:76aa20fb326a 108 HAL_NVIC_SetPriority(AUDIO_OUT_SAIx_DMAx_IRQ, AUDIO_OUT_IRQ_PREPRIO, 0);
MikamiUitOpen 4:76aa20fb326a 109 HAL_NVIC_EnableIRQ(AUDIO_OUT_SAIx_DMAx_IRQ);
MikamiUitOpen 4:76aa20fb326a 110 }
MikamiUitOpen 4:76aa20fb326a 111
MikamiUitOpen 4:76aa20fb326a 112