GPIO retrabalhada e PABOOST selecionavel

Committer:
MatteusCarr
Date:
Thu May 20 21:24:36 2021 +0000
Revision:
6:f0616e516844
Parent:
0:561d07a737bc
Atualizacao SX1272 LoRaRadio, retrabalho e PABOOST

Who changed what in which revision?

UserRevisionLine numberNew contents of line
brunnobbco 0:561d07a737bc 1 /*
brunnobbco 0:561d07a737bc 2 * sx126x_ds.h
brunnobbco 0:561d07a737bc 3 *
brunnobbco 0:561d07a737bc 4 * Created on: Feb 20, 2019
brunnobbco 0:561d07a737bc 5 * Author: hasnain
brunnobbco 0:561d07a737bc 6 */
brunnobbco 0:561d07a737bc 7
brunnobbco 0:561d07a737bc 8 #ifndef MBED_LORA_RADIO_DRV_SX126X_SX126X_DS_H_
brunnobbco 0:561d07a737bc 9 #define MBED_LORA_RADIO_DRV_SX126X_SX126X_DS_H_
brunnobbco 0:561d07a737bc 10
brunnobbco 0:561d07a737bc 11 #include "LoRaRadio.h"
brunnobbco 0:561d07a737bc 12 /*!
brunnobbco 0:561d07a737bc 13 * \brief Provides the frequency of the chip running on the radio and the frequency step
brunnobbco 0:561d07a737bc 14 *
brunnobbco 0:561d07a737bc 15 * \remark These defines are used for computing the frequency divider to set the RF frequency
brunnobbco 0:561d07a737bc 16 */
brunnobbco 0:561d07a737bc 17 #define XTAL_FREQ 32000000
brunnobbco 0:561d07a737bc 18 #define FREQ_DIV 33554432
brunnobbco 0:561d07a737bc 19 #define FREQ_STEP 0.95367431640625 // ((double)(XTAL_FREQ / (double)FREQ_DIV))
brunnobbco 0:561d07a737bc 20 #define FREQ_ERR 0.47683715820312
brunnobbco 0:561d07a737bc 21
brunnobbco 0:561d07a737bc 22
brunnobbco 0:561d07a737bc 23 /*!
brunnobbco 0:561d07a737bc 24 * \brief List of devices supported by this driver
brunnobbco 0:561d07a737bc 25 */
brunnobbco 0:561d07a737bc 26 #define SX1261 0
brunnobbco 0:561d07a737bc 27 #define SX1262 1
brunnobbco 0:561d07a737bc 28 #define SX1268 2
brunnobbco 0:561d07a737bc 29
brunnobbco 0:561d07a737bc 30 /*!
brunnobbco 0:561d07a737bc 31 * \brief List of matching supported by the sx126x
brunnobbco 0:561d07a737bc 32 */
brunnobbco 0:561d07a737bc 33 #define MATCHING_FREQ_915 0
brunnobbco 0:561d07a737bc 34 #define MATCHING_FREQ_780 1
brunnobbco 0:561d07a737bc 35 #define MATCHING_FREQ_490 2
brunnobbco 0:561d07a737bc 36 #define MATCHING_FREQ_434 3
brunnobbco 0:561d07a737bc 37 #define MATCHING_FREQ_280 4
brunnobbco 0:561d07a737bc 38 #define MATCHING_FREQ_169 5
brunnobbco 0:561d07a737bc 39 #define MATCHING_FREQ_868 6
brunnobbco 0:561d07a737bc 40
brunnobbco 0:561d07a737bc 41 /*!
brunnobbco 0:561d07a737bc 42 * \brief Compensation delay for SetAutoTx/Rx functions in 15.625 microseconds
brunnobbco 0:561d07a737bc 43 */
brunnobbco 0:561d07a737bc 44 #define AUTO_RX_TX_OFFSET 2
brunnobbco 0:561d07a737bc 45
brunnobbco 0:561d07a737bc 46 /*!
brunnobbco 0:561d07a737bc 47 * \brief LFSR initial value to compute IBM type CRC
brunnobbco 0:561d07a737bc 48 */
brunnobbco 0:561d07a737bc 49 #define CRC_IBM_SEED 0xFFFF
brunnobbco 0:561d07a737bc 50
brunnobbco 0:561d07a737bc 51 /*!
brunnobbco 0:561d07a737bc 52 * \brief LFSR initial value to compute CCIT type CRC
brunnobbco 0:561d07a737bc 53 */
brunnobbco 0:561d07a737bc 54 #define CRC_CCITT_SEED 0x1D0F
brunnobbco 0:561d07a737bc 55
brunnobbco 0:561d07a737bc 56 /*!
brunnobbco 0:561d07a737bc 57 * \brief Polynomial used to compute IBM CRC
brunnobbco 0:561d07a737bc 58 */
brunnobbco 0:561d07a737bc 59 #define CRC_POLYNOMIAL_IBM 0x8005
brunnobbco 0:561d07a737bc 60
brunnobbco 0:561d07a737bc 61 /*!
brunnobbco 0:561d07a737bc 62 * \brief Polynomial used to compute CCIT CRC
brunnobbco 0:561d07a737bc 63 */
brunnobbco 0:561d07a737bc 64 #define CRC_POLYNOMIAL_CCITT 0x1021
brunnobbco 0:561d07a737bc 65
brunnobbco 0:561d07a737bc 66 /*!
brunnobbco 0:561d07a737bc 67 * \brief The address of the register holding the first byte defining the CRC seed
brunnobbco 0:561d07a737bc 68 *
brunnobbco 0:561d07a737bc 69 */
brunnobbco 0:561d07a737bc 70 #define REG_LR_CRCSEEDBASEADDR 0x06BC
brunnobbco 0:561d07a737bc 71
brunnobbco 0:561d07a737bc 72 /*!
brunnobbco 0:561d07a737bc 73 * \brief The address of the register holding the first byte defining the CRC polynomial
brunnobbco 0:561d07a737bc 74 */
brunnobbco 0:561d07a737bc 75 #define REG_LR_CRCPOLYBASEADDR 0x06BE
brunnobbco 0:561d07a737bc 76
brunnobbco 0:561d07a737bc 77 /*!
brunnobbco 0:561d07a737bc 78 * \brief The address of the register holding the first byte defining the whitening seed
brunnobbco 0:561d07a737bc 79 */
brunnobbco 0:561d07a737bc 80 #define REG_LR_WHITSEEDBASEADDR_MSB 0x06B8
brunnobbco 0:561d07a737bc 81 #define REG_LR_WHITSEEDBASEADDR_LSB 0x06B9
brunnobbco 0:561d07a737bc 82
brunnobbco 0:561d07a737bc 83 /*!
brunnobbco 0:561d07a737bc 84 * \brief The address of the register holding the packet configuration
brunnobbco 0:561d07a737bc 85 */
brunnobbco 0:561d07a737bc 86 #define REG_LR_PACKETPARAMS 0x0704
brunnobbco 0:561d07a737bc 87
brunnobbco 0:561d07a737bc 88 /*!
brunnobbco 0:561d07a737bc 89 * \brief The address of the register holding the payload size
brunnobbco 0:561d07a737bc 90 */
brunnobbco 0:561d07a737bc 91 #define REG_LR_PAYLOADLENGTH 0x0702
brunnobbco 0:561d07a737bc 92
brunnobbco 0:561d07a737bc 93 /*!
brunnobbco 0:561d07a737bc 94 * \brief The addresses of the registers holding SyncWords values
brunnobbco 0:561d07a737bc 95 */
brunnobbco 0:561d07a737bc 96 #define REG_LR_SYNCWORDBASEADDRESS 0x06C0
brunnobbco 0:561d07a737bc 97
brunnobbco 0:561d07a737bc 98 /*!
brunnobbco 0:561d07a737bc 99 * \brief The addresses of the register holding LoRa Modem SyncWord value
brunnobbco 0:561d07a737bc 100 */
brunnobbco 0:561d07a737bc 101 #define REG_LR_SYNCWORD 0x0740
brunnobbco 0:561d07a737bc 102
brunnobbco 0:561d07a737bc 103 /*!
brunnobbco 0:561d07a737bc 104 * Syncword for Private LoRa networks
brunnobbco 0:561d07a737bc 105 */
brunnobbco 0:561d07a737bc 106 #define LORA_MAC_PRIVATE_SYNCWORD 0x1424
brunnobbco 0:561d07a737bc 107
brunnobbco 0:561d07a737bc 108 /*!
brunnobbco 0:561d07a737bc 109 * Syncword for Public LoRa networks
brunnobbco 0:561d07a737bc 110 */
brunnobbco 0:561d07a737bc 111 #define LORA_MAC_PUBLIC_SYNCWORD 0x3444
brunnobbco 0:561d07a737bc 112
brunnobbco 0:561d07a737bc 113 /*!
brunnobbco 0:561d07a737bc 114 * The address of the register giving a 4 bytes random number
brunnobbco 0:561d07a737bc 115 */
brunnobbco 0:561d07a737bc 116 #define RANDOM_NUMBER_GENERATORBASEADDR 0x0819
brunnobbco 0:561d07a737bc 117
brunnobbco 0:561d07a737bc 118 /*!
brunnobbco 0:561d07a737bc 119 * The address of the register holding RX Gain value (0x94: power saving, 0x96: rx boosted)
brunnobbco 0:561d07a737bc 120 */
brunnobbco 0:561d07a737bc 121 #define REG_RX_GAIN 0x08AC
brunnobbco 0:561d07a737bc 122
brunnobbco 0:561d07a737bc 123 /*!
brunnobbco 0:561d07a737bc 124 * The address of the register holding frequency error indication
brunnobbco 0:561d07a737bc 125 */
brunnobbco 0:561d07a737bc 126 #define REG_FREQUENCY_ERRORBASEADDR 0x076B
brunnobbco 0:561d07a737bc 127
brunnobbco 0:561d07a737bc 128 /*!
brunnobbco 0:561d07a737bc 129 * Change the value on the device internal trimming capacitor
brunnobbco 0:561d07a737bc 130 */
brunnobbco 0:561d07a737bc 131 #define REG_XTA_TRIM 0x0911
brunnobbco 0:561d07a737bc 132
brunnobbco 0:561d07a737bc 133 /*!
brunnobbco 0:561d07a737bc 134 * Set the current max value in the over current protection
brunnobbco 0:561d07a737bc 135 */
brunnobbco 0:561d07a737bc 136 #define REG_OCP 0x08E7
brunnobbco 0:561d07a737bc 137
brunnobbco 0:561d07a737bc 138
brunnobbco 0:561d07a737bc 139 /*!
brunnobbco 0:561d07a737bc 140 * \brief Represents the Rx internal counters values when GFSK or LoRa packet type is used
brunnobbco 0:561d07a737bc 141 */
brunnobbco 0:561d07a737bc 142 typedef struct {
brunnobbco 0:561d07a737bc 143 radio_modems_t modem_type; //!< Packet to which the packet status are referring to.
brunnobbco 0:561d07a737bc 144 uint16_t packet_received;
brunnobbco 0:561d07a737bc 145 uint16_t crc_ok;
brunnobbco 0:561d07a737bc 146 uint16_t length_error;
brunnobbco 0:561d07a737bc 147 } rx_counter_t;
brunnobbco 0:561d07a737bc 148
brunnobbco 0:561d07a737bc 149 /*!
brunnobbco 0:561d07a737bc 150 * \brief Represents a calibration configuration
brunnobbco 0:561d07a737bc 151 */
brunnobbco 0:561d07a737bc 152 typedef union {
brunnobbco 0:561d07a737bc 153 struct {
brunnobbco 0:561d07a737bc 154 uint8_t rc64k_enable : 1; //!< Calibrate RC64K clock
brunnobbco 0:561d07a737bc 155 uint8_t rc13m_enable : 1; //!< Calibrate RC13M clock
brunnobbco 0:561d07a737bc 156 uint8_t pll_enable : 1; //!< Calibrate PLL
brunnobbco 0:561d07a737bc 157 uint8_t adc_pulse_enable : 1; //!< Calibrate ADC Pulse
brunnobbco 0:561d07a737bc 158 uint8_t adc_bulkN_enable : 1; //!< Calibrate ADC bulkN
brunnobbco 0:561d07a737bc 159 uint8_t adc_bulkP_enable : 1; //!< Calibrate ADC bulkP
brunnobbco 0:561d07a737bc 160 uint8_t img_enable : 1;
brunnobbco 0:561d07a737bc 161 uint8_t pad : 1;
brunnobbco 0:561d07a737bc 162 } fields;
brunnobbco 0:561d07a737bc 163
brunnobbco 0:561d07a737bc 164 uint8_t value;
brunnobbco 0:561d07a737bc 165
brunnobbco 0:561d07a737bc 166 } caliberation_params_t;
brunnobbco 0:561d07a737bc 167
brunnobbco 0:561d07a737bc 168 /*!
brunnobbco 0:561d07a737bc 169 * \brief Represents the possible radio system error states
brunnobbco 0:561d07a737bc 170 */
brunnobbco 0:561d07a737bc 171 typedef union {
brunnobbco 0:561d07a737bc 172 struct {
brunnobbco 0:561d07a737bc 173 uint8_t rc64k_calib : 1; //!< RC 64kHz oscillator calibration failed
brunnobbco 0:561d07a737bc 174 uint8_t rc13m_calib : 1; //!< RC 13MHz oscillator calibration failed
brunnobbco 0:561d07a737bc 175 uint8_t pll_calib : 1; //!< PLL calibration failed
brunnobbco 0:561d07a737bc 176 uint8_t adc_calib : 1; //!< ADC calibration failed
brunnobbco 0:561d07a737bc 177 uint8_t img_calib : 1; //!< Image calibration failed
brunnobbco 0:561d07a737bc 178 uint8_t xosc_start : 1; //!< XOSC oscillator failed to start
brunnobbco 0:561d07a737bc 179 uint8_t pll_lock : 1; //!< PLL lock failed
brunnobbco 0:561d07a737bc 180 uint8_t buck_start : 1; //!< Buck converter failed to start
brunnobbco 0:561d07a737bc 181 uint8_t pa_ramp : 1; //!< PA ramp failed
brunnobbco 0:561d07a737bc 182 uint8_t reserved : 7; //!< reserved
brunnobbco 0:561d07a737bc 183 } fields;
brunnobbco 0:561d07a737bc 184
brunnobbco 0:561d07a737bc 185 uint16_t value;
brunnobbco 0:561d07a737bc 186
brunnobbco 0:561d07a737bc 187 } radio_error_t;
brunnobbco 0:561d07a737bc 188
brunnobbco 0:561d07a737bc 189 /*!
brunnobbco 0:561d07a737bc 190 * \brief Represents the operating mode the radio is actually running
brunnobbco 0:561d07a737bc 191 */
brunnobbco 0:561d07a737bc 192 typedef enum {
brunnobbco 0:561d07a737bc 193 MODE_SLEEP = 0x00, //! The radio is in sleep mode
brunnobbco 0:561d07a737bc 194 MODE_DEEP_SLEEP, //! The radio is in deep-sleep mode
brunnobbco 0:561d07a737bc 195 MODE_STDBY_RC, //! The radio is in standby mode with RC oscillator
brunnobbco 0:561d07a737bc 196 MODE_STDBY_XOSC, //! The radio is in standby mode with XOSC oscillator
brunnobbco 0:561d07a737bc 197 MODE_FS, //! The radio is in frequency synthesis mode
brunnobbco 0:561d07a737bc 198 MODE_TX, //! The radio is in transmit mode
brunnobbco 0:561d07a737bc 199 MODE_RX, //! The radio is in receive mode
brunnobbco 0:561d07a737bc 200 MODE_RX_DC, //! The radio is in receive duty cycle mode
brunnobbco 0:561d07a737bc 201 MODE_CAD //! The radio is in channel activity detection mode
brunnobbco 0:561d07a737bc 202 } radio_operating_mode_t;
brunnobbco 0:561d07a737bc 203
brunnobbco 0:561d07a737bc 204 /*!
brunnobbco 0:561d07a737bc 205 * \brief Declares the oscillator in use while in standby mode
brunnobbco 0:561d07a737bc 206 *
brunnobbco 0:561d07a737bc 207 * Using the STDBY_RC standby mode allow to reduce the energy consumption
brunnobbco 0:561d07a737bc 208 * STDBY_XOSC should be used for time critical applications
brunnobbco 0:561d07a737bc 209 */
brunnobbco 0:561d07a737bc 210 typedef enum {
brunnobbco 0:561d07a737bc 211 STDBY_RC = 0x00,
brunnobbco 0:561d07a737bc 212 STDBY_XOSC = 0x01,
brunnobbco 0:561d07a737bc 213 } radio_standby_mode_t;
brunnobbco 0:561d07a737bc 214
brunnobbco 0:561d07a737bc 215 /*!
brunnobbco 0:561d07a737bc 216 * \brief Declares the power regulation used to power the device
brunnobbco 0:561d07a737bc 217 *
brunnobbco 0:561d07a737bc 218 * This command allows the user to specify if DC-DC or LDO is used for power regulation.
brunnobbco 0:561d07a737bc 219 * Using only LDO implies that the Rx or Tx current is doubled
brunnobbco 0:561d07a737bc 220 */
brunnobbco 0:561d07a737bc 221 typedef enum {
brunnobbco 0:561d07a737bc 222 USE_LDO = 0x00, // default
brunnobbco 0:561d07a737bc 223 USE_DCDC = 0x01,
brunnobbco 0:561d07a737bc 224 } radio_regulator_mode_t;
brunnobbco 0:561d07a737bc 225
brunnobbco 0:561d07a737bc 226 /*!
brunnobbco 0:561d07a737bc 227 * \brief Represents the ramping time for power amplifier
brunnobbco 0:561d07a737bc 228 */
brunnobbco 0:561d07a737bc 229 typedef enum {
brunnobbco 0:561d07a737bc 230 RADIO_RAMP_10_US = 0x00,
brunnobbco 0:561d07a737bc 231 RADIO_RAMP_20_US = 0x01,
brunnobbco 0:561d07a737bc 232 RADIO_RAMP_40_US = 0x02,
brunnobbco 0:561d07a737bc 233 RADIO_RAMP_80_US = 0x03,
brunnobbco 0:561d07a737bc 234 RADIO_RAMP_200_US = 0x04,
brunnobbco 0:561d07a737bc 235 RADIO_RAMP_800_US = 0x05,
brunnobbco 0:561d07a737bc 236 RADIO_RAMP_1700_US = 0x06,
brunnobbco 0:561d07a737bc 237 RADIO_RAMP_3400_US = 0x07,
brunnobbco 0:561d07a737bc 238 } radio_ramp_time_t;
brunnobbco 0:561d07a737bc 239
brunnobbco 0:561d07a737bc 240 /*!
brunnobbco 0:561d07a737bc 241 * \brief Represents the number of symbols to be used for channel activity detection operation
brunnobbco 0:561d07a737bc 242 */
brunnobbco 0:561d07a737bc 243 typedef enum {
brunnobbco 0:561d07a737bc 244 LORA_CAD_01_SYMBOL = 0x00,
brunnobbco 0:561d07a737bc 245 LORA_CAD_02_SYMBOL = 0x01,
brunnobbco 0:561d07a737bc 246 LORA_CAD_04_SYMBOL = 0x02,
brunnobbco 0:561d07a737bc 247 LORA_CAD_08_SYMBOL = 0x03,
brunnobbco 0:561d07a737bc 248 LORA_CAD_16_SYMBOL = 0x04,
brunnobbco 0:561d07a737bc 249 } lora_cad_symbols_t;
brunnobbco 0:561d07a737bc 250
brunnobbco 0:561d07a737bc 251 /*!
brunnobbco 0:561d07a737bc 252 * \brief Represents the Channel Activity Detection actions after the CAD operation is finished
brunnobbco 0:561d07a737bc 253 */
brunnobbco 0:561d07a737bc 254 typedef enum {
brunnobbco 0:561d07a737bc 255 LORA_CAD_ONLY = 0x00,
brunnobbco 0:561d07a737bc 256 LORA_CAD_RX = 0x01,
brunnobbco 0:561d07a737bc 257 LORA_CAD_LBT = 0x10,
brunnobbco 0:561d07a737bc 258 } cad_exit_modes_t;
brunnobbco 0:561d07a737bc 259
brunnobbco 0:561d07a737bc 260 /*!
brunnobbco 0:561d07a737bc 261 * \brief Represents the modulation shaping parameter
brunnobbco 0:561d07a737bc 262 */
brunnobbco 0:561d07a737bc 263 typedef enum {
brunnobbco 0:561d07a737bc 264 MOD_SHAPING_OFF = 0x00,
brunnobbco 0:561d07a737bc 265 MOD_SHAPING_G_BT_03 = 0x08,
brunnobbco 0:561d07a737bc 266 MOD_SHAPING_G_BT_05 = 0x09,
brunnobbco 0:561d07a737bc 267 MOD_SHAPING_G_BT_07 = 0x0A,
brunnobbco 0:561d07a737bc 268 MOD_SHAPING_G_BT_1 = 0x0B,
brunnobbco 0:561d07a737bc 269 } radio_mod_shaping_t;
brunnobbco 0:561d07a737bc 270
brunnobbco 0:561d07a737bc 271 /*!
brunnobbco 0:561d07a737bc 272 * \brief Represents the modulation shaping parameter
brunnobbco 0:561d07a737bc 273 */
brunnobbco 0:561d07a737bc 274 typedef enum {
brunnobbco 0:561d07a737bc 275 RX_BW_4800 = 0x1F,
brunnobbco 0:561d07a737bc 276 RX_BW_5800 = 0x17,
brunnobbco 0:561d07a737bc 277 RX_BW_7300 = 0x0F,
brunnobbco 0:561d07a737bc 278 RX_BW_9700 = 0x1E,
brunnobbco 0:561d07a737bc 279 RX_BW_11700 = 0x16,
brunnobbco 0:561d07a737bc 280 RX_BW_14600 = 0x0E,
brunnobbco 0:561d07a737bc 281 RX_BW_19500 = 0x1D,
brunnobbco 0:561d07a737bc 282 RX_BW_23400 = 0x15,
brunnobbco 0:561d07a737bc 283 RX_BW_29300 = 0x0D,
brunnobbco 0:561d07a737bc 284 RX_BW_39000 = 0x1C,
brunnobbco 0:561d07a737bc 285 RX_BW_46900 = 0x14,
brunnobbco 0:561d07a737bc 286 RX_BW_58600 = 0x0C,
brunnobbco 0:561d07a737bc 287 RX_BW_78200 = 0x1B,
brunnobbco 0:561d07a737bc 288 RX_BW_93800 = 0x13,
brunnobbco 0:561d07a737bc 289 RX_BW_117300 = 0x0B,
brunnobbco 0:561d07a737bc 290 RX_BW_156200 = 0x1A,
brunnobbco 0:561d07a737bc 291 RX_BW_187200 = 0x12,
brunnobbco 0:561d07a737bc 292 RX_BW_234300 = 0x0A,
brunnobbco 0:561d07a737bc 293 RX_BW_312000 = 0x19,
brunnobbco 0:561d07a737bc 294 RX_BW_373600 = 0x11,
brunnobbco 0:561d07a737bc 295 RX_BW_467000 = 0x09,
brunnobbco 0:561d07a737bc 296 } radio_rx_bandwidth_t;
brunnobbco 0:561d07a737bc 297
brunnobbco 0:561d07a737bc 298 /*!
brunnobbco 0:561d07a737bc 299 * \brief Represents the possible spreading factor values in LoRa packet types
brunnobbco 0:561d07a737bc 300 */
brunnobbco 0:561d07a737bc 301 typedef enum {
brunnobbco 0:561d07a737bc 302 LORA_SF5 = 0x05,
brunnobbco 0:561d07a737bc 303 LORA_SF6 = 0x06,
brunnobbco 0:561d07a737bc 304 LORA_SF7 = 0x07,
brunnobbco 0:561d07a737bc 305 LORA_SF8 = 0x08,
brunnobbco 0:561d07a737bc 306 LORA_SF9 = 0x09,
brunnobbco 0:561d07a737bc 307 LORA_SF10 = 0x0A,
brunnobbco 0:561d07a737bc 308 LORA_SF11 = 0x0B,
brunnobbco 0:561d07a737bc 309 LORA_SF12 = 0x0C,
brunnobbco 0:561d07a737bc 310 } lora_spread_factors_t;
brunnobbco 0:561d07a737bc 311
brunnobbco 0:561d07a737bc 312 /*!
brunnobbco 0:561d07a737bc 313 * \brief Represents the bandwidth values for LoRa packet type
brunnobbco 0:561d07a737bc 314 */
brunnobbco 0:561d07a737bc 315 typedef enum {
brunnobbco 0:561d07a737bc 316 LORA_BW_500 = 6,
brunnobbco 0:561d07a737bc 317 LORA_BW_250 = 5,
brunnobbco 0:561d07a737bc 318 LORA_BW_125 = 4,
brunnobbco 0:561d07a737bc 319 LORA_BW_062 = 3,
brunnobbco 0:561d07a737bc 320 LORA_BW_041 = 10,
brunnobbco 0:561d07a737bc 321 LORA_BW_031 = 2,
brunnobbco 0:561d07a737bc 322 LORA_BW_020 = 9,
brunnobbco 0:561d07a737bc 323 LORA_BW_015 = 1,
brunnobbco 0:561d07a737bc 324 LORA_BW_010 = 8,
brunnobbco 0:561d07a737bc 325 LORA_BW_007 = 0,
brunnobbco 0:561d07a737bc 326 } lora_bandwidths_t;
brunnobbco 0:561d07a737bc 327
brunnobbco 0:561d07a737bc 328 const uint8_t lora_bandwidhts [] = {LORA_BW_125, LORA_BW_250, LORA_BW_500};
brunnobbco 0:561d07a737bc 329
brunnobbco 0:561d07a737bc 330 /*!
brunnobbco 0:561d07a737bc 331 * \brief Represents the coding rate values for LoRa packet type
brunnobbco 0:561d07a737bc 332 */
brunnobbco 0:561d07a737bc 333 typedef enum {
brunnobbco 0:561d07a737bc 334 LORA_CR_4_5 = 0x01,
brunnobbco 0:561d07a737bc 335 LORA_CR_4_6 = 0x02,
brunnobbco 0:561d07a737bc 336 LORA_CR_4_7 = 0x03,
brunnobbco 0:561d07a737bc 337 LORA_CR_4_8 = 0x04,
brunnobbco 0:561d07a737bc 338 } lora_coding_tates_t;
brunnobbco 0:561d07a737bc 339
brunnobbco 0:561d07a737bc 340 /*!
brunnobbco 0:561d07a737bc 341 * \brief Represents the preamble length used to detect the packet on Rx side
brunnobbco 0:561d07a737bc 342 */
brunnobbco 0:561d07a737bc 343 typedef enum {
brunnobbco 0:561d07a737bc 344 RADIO_PREAMBLE_DETECTOR_OFF = 0x00, //!< Preamble detection length off
brunnobbco 0:561d07a737bc 345 RADIO_PREAMBLE_DETECTOR_08_BITS = 0x04, //!< Preamble detection length 8 bits
brunnobbco 0:561d07a737bc 346 RADIO_PREAMBLE_DETECTOR_16_BITS = 0x05, //!< Preamble detection length 16 bits
brunnobbco 0:561d07a737bc 347 RADIO_PREAMBLE_DETECTOR_24_BITS = 0x06, //!< Preamble detection length 24 bits
brunnobbco 0:561d07a737bc 348 RADIO_PREAMBLE_DETECTOR_32_BITS = 0x07, //!< Preamble detection length 32 bit
brunnobbco 0:561d07a737bc 349 } radio_preamble_detection_t;
brunnobbco 0:561d07a737bc 350
brunnobbco 0:561d07a737bc 351 /*!
brunnobbco 0:561d07a737bc 352 * \brief Represents the possible combinations of SyncWord correlators activated
brunnobbco 0:561d07a737bc 353 */
brunnobbco 0:561d07a737bc 354 typedef enum {
brunnobbco 0:561d07a737bc 355 RADIO_ADDRESSCOMP_FILT_OFF = 0x00, //!< No correlator turned on, i.e. do not search for SyncWord
brunnobbco 0:561d07a737bc 356 RADIO_ADDRESSCOMP_FILT_NODE = 0x01,
brunnobbco 0:561d07a737bc 357 RADIO_ADDRESSCOMP_FILT_NODE_BROAD = 0x02,
brunnobbco 0:561d07a737bc 358 } radio_address_filter_t;
brunnobbco 0:561d07a737bc 359
brunnobbco 0:561d07a737bc 360 /*!
brunnobbco 0:561d07a737bc 361 * \brief Radio packet length mode
brunnobbco 0:561d07a737bc 362 */
brunnobbco 0:561d07a737bc 363 typedef enum {
brunnobbco 0:561d07a737bc 364 RADIO_PACKET_VARIABLE_LENGTH = 0x00, //!< The packet is on variable size, header included
brunnobbco 0:561d07a737bc 365 RADIO_PACKET_FIXED_LENGTH = 0x01, //!< The packet is known on both sides, no header included in the packet
brunnobbco 0:561d07a737bc 366 } radio_pkt_length_t;
brunnobbco 0:561d07a737bc 367
brunnobbco 0:561d07a737bc 368 /*!
brunnobbco 0:561d07a737bc 369 * \brief Represents the CRC length
brunnobbco 0:561d07a737bc 370 */
brunnobbco 0:561d07a737bc 371 typedef enum radio_crc_types_e{
brunnobbco 0:561d07a737bc 372 RADIO_CRC_OFF = 0x01, //!< No CRC in use
brunnobbco 0:561d07a737bc 373 RADIO_CRC_1_BYTES = 0x00,
brunnobbco 0:561d07a737bc 374 RADIO_CRC_2_BYTES = 0x02,
brunnobbco 0:561d07a737bc 375 RADIO_CRC_1_BYTES_INV = 0x04,
brunnobbco 0:561d07a737bc 376 RADIO_CRC_2_BYTES_INV = 0x06,
brunnobbco 0:561d07a737bc 377 RADIO_CRC_2_BYTES_IBM = 0xF1,
brunnobbco 0:561d07a737bc 378 RADIO_CRC_2_BYTES_CCIT = 0xF2,
brunnobbco 0:561d07a737bc 379 } radio_crc_types_t;
brunnobbco 0:561d07a737bc 380
brunnobbco 0:561d07a737bc 381 /*!
brunnobbco 0:561d07a737bc 382 * \brief Radio whitening mode activated or deactivated
brunnobbco 0:561d07a737bc 383 */
brunnobbco 0:561d07a737bc 384 typedef enum {
brunnobbco 0:561d07a737bc 385 RADIO_DC_FREE_OFF = 0x00,
brunnobbco 0:561d07a737bc 386 RADIO_DC_FREEWHITENING = 0x01,
brunnobbco 0:561d07a737bc 387 } radio_whitening_mode_t;
brunnobbco 0:561d07a737bc 388
brunnobbco 0:561d07a737bc 389 /*!
brunnobbco 0:561d07a737bc 390 * \brief Holds the lengths mode of a LoRa packet type
brunnobbco 0:561d07a737bc 391 */
brunnobbco 0:561d07a737bc 392 typedef enum {
brunnobbco 0:561d07a737bc 393 LORA_PACKET_VARIABLE_LENGTH = 0x00, //!< The packet is on variable size, header included
brunnobbco 0:561d07a737bc 394 LORA_PACKET_FIXED_LENGTH = 0x01, //!< The packet is known on both sides, no header included in the packet
brunnobbco 0:561d07a737bc 395 LORA_PACKET_EXPLICIT = LORA_PACKET_VARIABLE_LENGTH,
brunnobbco 0:561d07a737bc 396 LORA_PACKET_IMPLICIT = LORA_PACKET_FIXED_LENGTH,
brunnobbco 0:561d07a737bc 397 } lora_pkt_length_t;
brunnobbco 0:561d07a737bc 398
brunnobbco 0:561d07a737bc 399 /*!
brunnobbco 0:561d07a737bc 400 * \brief Represents the CRC mode for LoRa packet type
brunnobbco 0:561d07a737bc 401 */
brunnobbco 0:561d07a737bc 402 typedef enum {
brunnobbco 0:561d07a737bc 403 LORA_CRC_ON = 0x01, //!< CRC activated
brunnobbco 0:561d07a737bc 404 LORA_CRC_OFF = 0x00, //!< CRC not used
brunnobbco 0:561d07a737bc 405 } lora_crc_mode_t;
brunnobbco 0:561d07a737bc 406
brunnobbco 0:561d07a737bc 407 /*!
brunnobbco 0:561d07a737bc 408 * \brief Represents the IQ mode for LoRa packet type
brunnobbco 0:561d07a737bc 409 */
brunnobbco 0:561d07a737bc 410 typedef enum {
brunnobbco 0:561d07a737bc 411 LORA_IQ_NORMAL = 0x00,
brunnobbco 0:561d07a737bc 412 LORA_IQ_INVERTED = 0x01,
brunnobbco 0:561d07a737bc 413 } lora_IQ_mode_t;
brunnobbco 0:561d07a737bc 414
brunnobbco 0:561d07a737bc 415 /*!
brunnobbco 0:561d07a737bc 416 * \brief Represents the volatge used to control the TCXO on/off from DIO3
brunnobbco 0:561d07a737bc 417 */
brunnobbco 0:561d07a737bc 418 typedef enum {
brunnobbco 0:561d07a737bc 419 TCXO_CTRL_1_6V = 0x00,
brunnobbco 0:561d07a737bc 420 TCXO_CTRL_1_7V = 0x01,
brunnobbco 0:561d07a737bc 421 TCXO_CTRL_1_8V = 0x02,
brunnobbco 0:561d07a737bc 422 TCXO_CTRL_2_2V = 0x03,
brunnobbco 0:561d07a737bc 423 TCXO_CTRL_2_4V = 0x04,
brunnobbco 0:561d07a737bc 424 TCXO_CTRL_2_7V = 0x05,
brunnobbco 0:561d07a737bc 425 TCXO_CTRL_3_0V = 0x06,
brunnobbco 0:561d07a737bc 426 TCXO_CTRL_3_3V = 0x07,
brunnobbco 0:561d07a737bc 427 } radio_TCXO_ctrl_voltage_t;
brunnobbco 0:561d07a737bc 428
brunnobbco 0:561d07a737bc 429 /*!
brunnobbco 0:561d07a737bc 430 * \brief Represents the interruption masks available for the radio
brunnobbco 0:561d07a737bc 431 *
brunnobbco 0:561d07a737bc 432 * \remark Note that not all these interruptions are available for all packet types
brunnobbco 0:561d07a737bc 433 */
brunnobbco 0:561d07a737bc 434 typedef enum {
brunnobbco 0:561d07a737bc 435 IRQ_RADIO_NONE = 0x0000,
brunnobbco 0:561d07a737bc 436 IRQ_TX_DONE = 0x0001,
brunnobbco 0:561d07a737bc 437 IRQ_RX_DONE = 0x0002,
brunnobbco 0:561d07a737bc 438 IRQ_PREAMBLE_DETECTED = 0x0004,
brunnobbco 0:561d07a737bc 439 IRQ_SYNCWORD_VALID = 0x0008,
brunnobbco 0:561d07a737bc 440 IRQ_HEADER_VALID = 0x0010,
brunnobbco 0:561d07a737bc 441 IRQ_HEADER_ERROR = 0x0020,
brunnobbco 0:561d07a737bc 442 IRQ_CRC_ERROR = 0x0040,
brunnobbco 0:561d07a737bc 443 IRQ_CAD_DONE = 0x0080,
brunnobbco 0:561d07a737bc 444 IRQ_CAD_ACTIVITY_DETECTED = 0x0100,
brunnobbco 0:561d07a737bc 445 IRQ_RX_TX_TIMEOUT = 0x0200,
brunnobbco 0:561d07a737bc 446 IRQ_RADIO_ALL = 0xFFFF,
brunnobbco 0:561d07a737bc 447 } radio_irq_masks_t;
brunnobbco 0:561d07a737bc 448
brunnobbco 0:561d07a737bc 449 typedef enum {
brunnobbco 0:561d07a737bc 450 RADIO_GET_STATUS = 0xC0,
brunnobbco 0:561d07a737bc 451 RADIO_WRITE_REGISTER = 0x0D,
brunnobbco 0:561d07a737bc 452 RADIO_READ_REGISTER = 0x1D,
brunnobbco 0:561d07a737bc 453 RADIO_WRITE_BUFFER = 0x0E,
brunnobbco 0:561d07a737bc 454 RADIO_READ_BUFFER = 0x1E,
brunnobbco 0:561d07a737bc 455 RADIO_SET_SLEEP = 0x84,
brunnobbco 0:561d07a737bc 456 RADIO_SET_STANDBY = 0x80,
brunnobbco 0:561d07a737bc 457 RADIO_SET_FS = 0xC1,
brunnobbco 0:561d07a737bc 458 RADIO_SET_TX = 0x83,
brunnobbco 0:561d07a737bc 459 RADIO_SET_RX = 0x82,
brunnobbco 0:561d07a737bc 460 RADIO_SET_RXDUTYCYCLE = 0x94,
brunnobbco 0:561d07a737bc 461 RADIO_SET_CAD = 0xC5,
brunnobbco 0:561d07a737bc 462 RADIO_SET_TXCONTINUOUSWAVE = 0xD1,
brunnobbco 0:561d07a737bc 463 RADIO_SET_TXCONTINUOUSPREAMBLE = 0xD2,
brunnobbco 0:561d07a737bc 464 RADIO_SET_PACKETTYPE = 0x8A,
brunnobbco 0:561d07a737bc 465 RADIO_GET_PACKETTYPE = 0x11,
brunnobbco 0:561d07a737bc 466 RADIO_SET_RFFREQUENCY = 0x86,
brunnobbco 0:561d07a737bc 467 RADIO_SET_TXPARAMS = 0x8E,
brunnobbco 0:561d07a737bc 468 RADIO_SET_PACONFIG = 0x95,
brunnobbco 0:561d07a737bc 469 RADIO_SET_CADPARAMS = 0x88,
brunnobbco 0:561d07a737bc 470 RADIO_SET_BUFFERBASEADDRESS = 0x8F,
brunnobbco 0:561d07a737bc 471 RADIO_SET_MODULATIONPARAMS = 0x8B,
brunnobbco 0:561d07a737bc 472 RADIO_SET_PACKETPARAMS = 0x8C,
brunnobbco 0:561d07a737bc 473 RADIO_GET_RXBUFFERSTATUS = 0x13,
brunnobbco 0:561d07a737bc 474 RADIO_GET_PACKETSTATUS = 0x14,
brunnobbco 0:561d07a737bc 475 RADIO_GET_RSSIINST = 0x15,
brunnobbco 0:561d07a737bc 476 RADIO_GET_STATS = 0x10,
brunnobbco 0:561d07a737bc 477 RADIO_RESET_STATS = 0x00,
brunnobbco 0:561d07a737bc 478 RADIO_CFG_DIOIRQ = 0x08,
brunnobbco 0:561d07a737bc 479 RADIO_GET_IRQSTATUS = 0x12,
brunnobbco 0:561d07a737bc 480 RADIO_CLR_IRQSTATUS = 0x02,
brunnobbco 0:561d07a737bc 481 RADIO_CALIBRATE = 0x89,
brunnobbco 0:561d07a737bc 482 RADIO_CALIBRATEIMAGE = 0x98,
brunnobbco 0:561d07a737bc 483 RADIO_SET_REGULATORMODE = 0x96,
brunnobbco 0:561d07a737bc 484 RADIO_GET_ERROR = 0x17,
brunnobbco 0:561d07a737bc 485 RADIO_CLR_ERROR = 0x07,
brunnobbco 0:561d07a737bc 486 RADIO_SET_TCXOMODE = 0x97,
brunnobbco 0:561d07a737bc 487 RADIO_SET_TXFALLBACKMODE = 0x93,
brunnobbco 0:561d07a737bc 488 RADIO_SET_RFSWITCHMODE = 0x9D,
brunnobbco 0:561d07a737bc 489 RADIO_SET_STOPRXTIMERONPREAMBLE = 0x9F,
brunnobbco 0:561d07a737bc 490 RADIO_SET_LORASYMBTIMEOUT = 0xA0,
brunnobbco 0:561d07a737bc 491 } opmode_commands_t;
brunnobbco 0:561d07a737bc 492
brunnobbco 0:561d07a737bc 493 /*!
brunnobbco 0:561d07a737bc 494 * \brief Structure describing the radio status
brunnobbco 0:561d07a737bc 495 */
brunnobbco 0:561d07a737bc 496 typedef union {
brunnobbco 0:561d07a737bc 497 uint8_t value;
brunnobbco 0:561d07a737bc 498 struct {
brunnobbco 0:561d07a737bc 499 //bit order is lsb -> msb
brunnobbco 0:561d07a737bc 500 uint8_t reserved : 1; //!< Reserved
brunnobbco 0:561d07a737bc 501 uint8_t cmd_status : 3; //!< Command status
brunnobbco 0:561d07a737bc 502 uint8_t chip_mode : 3; //!< Chip mode
brunnobbco 0:561d07a737bc 503 uint8_t cpu_busy : 1; //!< Flag for CPU radio busy
brunnobbco 0:561d07a737bc 504 } fields;
brunnobbco 0:561d07a737bc 505 } radio_status_t;
brunnobbco 0:561d07a737bc 506
brunnobbco 0:561d07a737bc 507 /*!
brunnobbco 0:561d07a737bc 508 * \brief Structure describing the error codes for callback functions
brunnobbco 0:561d07a737bc 509 */
brunnobbco 0:561d07a737bc 510 typedef enum {
brunnobbco 0:561d07a737bc 511 IRQ_HEADER_ERROR_CODE = 0x01,
brunnobbco 0:561d07a737bc 512 IRQ_SYNCWORD_ERROR_CODE = 0x02,
brunnobbco 0:561d07a737bc 513 IRQ_CRC_ERROR_CODE = 0x04,
brunnobbco 0:561d07a737bc 514 } irq_error_t;
brunnobbco 0:561d07a737bc 515
brunnobbco 0:561d07a737bc 516
brunnobbco 0:561d07a737bc 517 typedef enum {
brunnobbco 0:561d07a737bc 518 IRQ_PBL_DETECT_CODE = 0x01,
brunnobbco 0:561d07a737bc 519 IRQ_SYNCWORD_VALID_CODE = 0x02,
brunnobbco 0:561d07a737bc 520 IRQ_HEADER_VALID_CODE = 0x04,
brunnobbco 0:561d07a737bc 521 } irq_valid_codes_t;
brunnobbco 0:561d07a737bc 522
brunnobbco 0:561d07a737bc 523 typedef enum {
brunnobbco 0:561d07a737bc 524 IRQ_RX_TIMEOUT = 0x00,
brunnobbco 0:561d07a737bc 525 IRQ_TX_TIMEOUT = 0x01,
brunnobbco 0:561d07a737bc 526 } irq_timeout_t;
brunnobbco 0:561d07a737bc 527
brunnobbco 0:561d07a737bc 528 typedef enum {
brunnobbco 0:561d07a737bc 529 RECEPTION_MODE_SINGLE = 0,
brunnobbco 0:561d07a737bc 530 RECEPTION_MODE_CONTINUOUS,
brunnobbco 0:561d07a737bc 531 RECEPTION_MODE_OTHER
brunnobbco 0:561d07a737bc 532 } reception_mode_t;
brunnobbco 0:561d07a737bc 533
brunnobbco 0:561d07a737bc 534 /*!
brunnobbco 0:561d07a737bc 535 * \brief The type describing the modulation parameters for every packet types
brunnobbco 0:561d07a737bc 536 */
brunnobbco 0:561d07a737bc 537 typedef struct {
brunnobbco 0:561d07a737bc 538 radio_modems_t modem_type; //!< Packet to which the modulation parameters are referring to.
brunnobbco 0:561d07a737bc 539 struct {
brunnobbco 0:561d07a737bc 540 struct {
brunnobbco 0:561d07a737bc 541 uint32_t bit_rate;
brunnobbco 0:561d07a737bc 542 uint32_t fdev;
brunnobbco 0:561d07a737bc 543 radio_mod_shaping_t modulation_shaping;
brunnobbco 0:561d07a737bc 544 uint8_t bandwidth;
brunnobbco 0:561d07a737bc 545 uint32_t operational_frequency;
brunnobbco 0:561d07a737bc 546 } gfsk;
brunnobbco 0:561d07a737bc 547
brunnobbco 0:561d07a737bc 548 struct {
brunnobbco 0:561d07a737bc 549 lora_spread_factors_t spreading_factor; //!< Spreading Factor for the LoRa modulation
brunnobbco 0:561d07a737bc 550 lora_bandwidths_t bandwidth; //!< Bandwidth for the LoRa modulation
brunnobbco 0:561d07a737bc 551 lora_coding_tates_t coding_rate; //!< Coding rate for the LoRa modulation
brunnobbco 0:561d07a737bc 552 uint8_t low_datarate_optimization; //!< Indicates if the modem uses the low datarate optimization
brunnobbco 0:561d07a737bc 553 uint32_t operational_frequency;
brunnobbco 0:561d07a737bc 554 } lora;
brunnobbco 0:561d07a737bc 555 } params; //!< Holds the modulation parameters structure
brunnobbco 0:561d07a737bc 556 } modulation_params_t;
brunnobbco 0:561d07a737bc 557
brunnobbco 0:561d07a737bc 558 /*!
brunnobbco 0:561d07a737bc 559 * \brief The type describing the packet parameters for every packet types
brunnobbco 0:561d07a737bc 560 */
brunnobbco 0:561d07a737bc 561 typedef struct packet_params {
brunnobbco 0:561d07a737bc 562 radio_modems_t modem_type; //!< Packet to which the packet parameters are referring to.
brunnobbco 0:561d07a737bc 563 struct {
brunnobbco 0:561d07a737bc 564 /*!
brunnobbco 0:561d07a737bc 565 * \brief Holds the GFSK packet parameters
brunnobbco 0:561d07a737bc 566 */
brunnobbco 0:561d07a737bc 567 struct {
brunnobbco 0:561d07a737bc 568 uint16_t preamble_length; //!< The preamble Tx length for GFSK packet type in bit
brunnobbco 0:561d07a737bc 569 radio_preamble_detection_t preamble_min_detect; //!< The preamble Rx length minimal for GFSK packet type
brunnobbco 0:561d07a737bc 570 uint8_t syncword_length; //!< The synchronization word length for GFSK packet type
brunnobbco 0:561d07a737bc 571 radio_address_filter_t addr_comp; //!< Activated SyncWord correlators
brunnobbco 0:561d07a737bc 572 radio_pkt_length_t header_type; //!< If the header is explicit, it will be transmitted in the GFSK packet. If the header is implicit, it will not be transmitted
brunnobbco 0:561d07a737bc 573 uint8_t payload_length; //!< Size of the payload in the GFSK packet
brunnobbco 0:561d07a737bc 574 radio_crc_types_t crc_length; //!< Size of the CRC block in the GFSK packet
brunnobbco 0:561d07a737bc 575 radio_whitening_mode_t whitening_mode;
brunnobbco 0:561d07a737bc 576 } gfsk;
brunnobbco 0:561d07a737bc 577 /*!
brunnobbco 0:561d07a737bc 578 * \brief Holds the LoRa packet parameters
brunnobbco 0:561d07a737bc 579 */
brunnobbco 0:561d07a737bc 580 struct {
brunnobbco 0:561d07a737bc 581 uint16_t preamble_length; //!< The preamble length is the number of LoRa symbols in the preamble
brunnobbco 0:561d07a737bc 582 lora_pkt_length_t header_type; //!< If the header is explicit, it will be transmitted in the LoRa packet. If the header is implicit, it will not be transmitted
brunnobbco 0:561d07a737bc 583 uint8_t payload_length; //!< Size of the payload in the LoRa packet
brunnobbco 0:561d07a737bc 584 lora_crc_mode_t crc_mode; //!< Size of CRC block in LoRa packet
brunnobbco 0:561d07a737bc 585 lora_IQ_mode_t invert_IQ; //!< Allows to swap IQ for LoRa packet
brunnobbco 0:561d07a737bc 586 } lora;
brunnobbco 0:561d07a737bc 587 } params; //!< Holds the packet parameters structure
brunnobbco 0:561d07a737bc 588 } packet_params_t;
brunnobbco 0:561d07a737bc 589
brunnobbco 0:561d07a737bc 590 /*!
brunnobbco 0:561d07a737bc 591 * \brief Represents the packet status for every packet type
brunnobbco 0:561d07a737bc 592 */
brunnobbco 0:561d07a737bc 593 typedef struct {
brunnobbco 0:561d07a737bc 594 radio_modems_t modem_type; //!< Packet to which the packet status are referring to.
brunnobbco 0:561d07a737bc 595 struct {
brunnobbco 0:561d07a737bc 596 struct {
brunnobbco 0:561d07a737bc 597 uint8_t rx_status;
brunnobbco 0:561d07a737bc 598 int8_t rssi_avg; //!< The averaged RSSI
brunnobbco 0:561d07a737bc 599 int8_t rssi_sync; //!< The RSSI measured on last packet
brunnobbco 0:561d07a737bc 600 uint32_t freq_error;
brunnobbco 0:561d07a737bc 601 } gfsk;
brunnobbco 0:561d07a737bc 602 struct {
brunnobbco 0:561d07a737bc 603 int8_t rssi_pkt; //!< The RSSI of the last packet
brunnobbco 0:561d07a737bc 604 int8_t snr_pkt; //!< The SNR of the last packet
brunnobbco 0:561d07a737bc 605 int8_t signal_rssi_pkt;
brunnobbco 0:561d07a737bc 606 uint32_t freq_error;
brunnobbco 0:561d07a737bc 607 } lora;
brunnobbco 0:561d07a737bc 608 } params;
brunnobbco 0:561d07a737bc 609 } packet_status_t;
brunnobbco 0:561d07a737bc 610
brunnobbco 0:561d07a737bc 611
brunnobbco 0:561d07a737bc 612 #endif /* MBED_LORA_RADIO_DRV_SX126X_SX126X_DS_H_ */