stm32f30x_pwr.c

00001 /**
00002   ******************************************************************************
00003   * @file    stm32f30x_pwr.c
00004   * @author  MCD Application Team
00005   * @version V1.2.3
00006   * @date    10-July-2015
00007   * @brief   This file provides firmware functions to manage the following 
00008   *          functionalities of the Power Controller (PWR) peripheral:           
00009   *           + Backup Domain Access
00010   *           + PVD configuration
00011   *           + WakeUp pins configuration
00012   *           + Low Power modes configuration
00013   *           + Flags management
00014   *               
00015   ******************************************************************************
00016   * @attention
00017   *
00018   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
00019   *
00020   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
00021   * You may not use this file except in compliance with the License.
00022   * You may obtain a copy of the License at:
00023   *
00024   *        http://www.st.com/software_license_agreement_liberty_v2
00025   *
00026   * Unless required by applicable law or agreed to in writing, software 
00027   * distributed under the License is distributed on an "AS IS" BASIS, 
00028   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00029   * See the License for the specific language governing permissions and
00030   * limitations under the License.
00031   *
00032   ******************************************************************************
00033   */
00034 
00035 /* Includes ------------------------------------------------------------------*/
00036 #include "stm32f30x_pwr.h"
00037 #include "stm32f30x_rcc.h"
00038 
00039 /** @addtogroup STM32F30x_StdPeriph_Driver
00040   * @{
00041   */
00042 
00043 /** @defgroup PWR 
00044   * @brief PWR driver modules
00045   * @{
00046   */ 
00047 
00048 /* Private typedef -----------------------------------------------------------*/
00049 /* Private define ------------------------------------------------------------*/
00050 /* --------- PWR registers bit address in the alias region ---------- */
00051 #define PWR_OFFSET               (PWR_BASE - PERIPH_BASE)
00052 
00053 /* --- CR Register ---*/
00054 
00055 /* Alias word address of DBP bit */
00056 #define CR_OFFSET                (PWR_OFFSET + 0x00)
00057 #define DBP_BitNumber            0x08
00058 #define CR_DBP_BB                (PERIPH_BB_BASE + (CR_OFFSET * 32) + (DBP_BitNumber * 4))
00059 
00060 /* Alias word address of PVDE bit */
00061 #define PVDE_BitNumber           0x04
00062 #define CR_PVDE_BB               (PERIPH_BB_BASE + (CR_OFFSET * 32) + (PVDE_BitNumber * 4))
00063 
00064 /* ------------------ PWR registers bit mask ------------------------ */
00065 
00066 /* CR register bit mask */
00067 #define CR_DS_MASK               ((uint32_t)0xFFFFFFFC)
00068 #define CR_PLS_MASK              ((uint32_t)0xFFFFFF1F)
00069 
00070 /* Private macro -------------------------------------------------------------*/
00071 /* Private variables ---------------------------------------------------------*/
00072 /* Private function prototypes -----------------------------------------------*/
00073 /* Private functions ---------------------------------------------------------*/
00074 
00075 /** @defgroup PWR_Private_Functions
00076   * @{
00077   */
00078 
00079 /** @defgroup PWR_Group1 Backup Domain Access function 
00080  *  @brief   Backup Domain Access function
00081  *
00082 @verbatim
00083   ==============================================================================
00084                    ##### Backup Domain Access function #####
00085   ==============================================================================
00086 
00087     [..] After reset, the Backup Domain Registers (RCC BDCR Register, RTC registers
00088          and RTC backup registers) are protected against possible stray write accesses.
00089     [..] To enable access to Backup domain use the PWR_BackupAccessCmd(ENABLE) function.
00090 
00091 @endverbatim
00092   * @{
00093   */
00094 
00095 /**
00096   * @brief  Deinitializes the PWR peripheral registers to their default reset values.
00097   * @param  None
00098   * @retval None
00099   */
00100 void PWR_DeInit(void)
00101 {
00102   RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, ENABLE);
00103   RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE);
00104 }
00105 
00106 /**
00107   * @brief  Enables or disables access to the RTC and backup registers.
00108   * @note   If the HSE divided by 32 is used as the RTC clock, the 
00109   *         Backup Domain Access should be kept enabled.
00110   * @param  NewState: new state of the access to the RTC and backup registers.
00111   *         This parameter can be: ENABLE or DISABLE.
00112   * @retval None
00113   */
00114 void PWR_BackupAccessCmd(FunctionalState NewState)
00115 {
00116   /* Check the parameters */
00117   assert_param(IS_FUNCTIONAL_STATE(NewState));
00118   *(__IO uint32_t *) CR_DBP_BB = (uint32_t)NewState;
00119 }
00120 
00121 /**
00122   * @}
00123   */
00124 
00125 /** @defgroup PWR_Group2 PVD configuration functions
00126  *  @brief   PVD configuration functions 
00127  *
00128 @verbatim   
00129  ===============================================================================
00130                     ##### PVD configuration functions #####
00131   ==============================================================================
00132   [..]
00133   (+) The PVD is used to monitor the VDD power supply by comparing it to a threshold
00134       selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
00135   (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower than the 
00136       PVD threshold. This event is internally connected to the EXTI line16
00137       and can generate an interrupt if enabled through the EXTI registers.
00138   (+) The PVD is stopped in Standby mode.
00139 
00140 @endverbatim
00141   * @{
00142   */
00143 
00144 /**
00145   * @brief  Configures the voltage threshold detected by the Power Voltage Detector(PVD).
00146   * @param  PWR_PVDLevel: specifies the PVD detection level
00147   *         This parameter can be one of the following values:
00148   *             @arg PWR_PVDLevel_0: PVD detection level set to 2.18V
00149   *             @arg PWR_PVDLevel_1: PVD detection level set to 2.28V
00150   *             @arg PWR_PVDLevel_2: PVD detection level set to 2.38V
00151   *             @arg PWR_PVDLevel_3: PVD detection level set to 2.48V
00152   *             @arg PWR_PVDLevel_4: PVD detection level set to 2.58V
00153   *             @arg PWR_PVDLevel_5: PVD detection level set to 2.68V
00154   *             @arg PWR_PVDLevel_6: PVD detection level set to 2.78V
00155   *             @arg PWR_PVDLevel_7: PVD detection level set to 2.88V
00156   * @retval None
00157   */
00158 void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel)
00159 {
00160   uint32_t tmpreg = 0;
00161   
00162   /* Check the parameters */
00163   assert_param(IS_PWR_PVD_LEVEL(PWR_PVDLevel));
00164   
00165   tmpreg = PWR->CR;
00166   
00167   /* Clear PLS[7:5] bits */
00168   tmpreg &= CR_PLS_MASK;
00169   
00170   /* Set PLS[7:5] bits according to PWR_PVDLevel value */
00171   tmpreg |= PWR_PVDLevel;
00172   
00173   /* Store the new value */
00174   PWR->CR = tmpreg;
00175 }
00176 
00177 /**
00178   * @brief  Enables or disables the Power Voltage Detector(PVD).
00179   * @param  NewState: new state of the PVD.
00180   *         This parameter can be: ENABLE or DISABLE.
00181   * @retval None
00182   */
00183 void PWR_PVDCmd(FunctionalState NewState)
00184 {
00185   /* Check the parameters */
00186   assert_param(IS_FUNCTIONAL_STATE(NewState));
00187   *(__IO uint32_t *) CR_PVDE_BB = (uint32_t)NewState;
00188 }
00189 
00190 /**
00191   * @}
00192   */
00193 
00194 /** @defgroup PWR_Group3 WakeUp pins configuration functions
00195  *  @brief   WakeUp pins configuration functions 
00196  *
00197 @verbatim   
00198  ===============================================================================
00199               ##### WakeUp pins configuration functions #####
00200  ===============================================================================  
00201     [..]
00202     (+) WakeUp pins are used to wakeup the system from Standby mode. These pins are 
00203         forced in input pull down configuration and are active on rising edges.
00204     (+) There are three WakeUp pins: WakeUp Pin 1 on PA.00, WakeUp Pin 2 on PC.13 and
00205         WakeUp Pin 3 on PE.06.
00206 
00207 @endverbatim
00208   * @{
00209   */
00210 
00211 /**
00212   * @brief  Enables or disables the WakeUp Pin functionality.
00213   * @param  PWR_WakeUpPin: specifies the WakeUpPin.
00214   *         This parameter can be: PWR_WakeUpPin_1, PWR_WakeUpPin_2 or PWR_WakeUpPin_3.
00215   * @param  NewState: new state of the WakeUp Pin functionality.
00216   *         This parameter can be: ENABLE or DISABLE.
00217   * @retval None
00218   */
00219 void PWR_WakeUpPinCmd(uint32_t PWR_WakeUpPin, FunctionalState NewState)
00220 {  
00221   /* Check the parameters */
00222   assert_param(IS_PWR_WAKEUP_PIN(PWR_WakeUpPin));  
00223   assert_param(IS_FUNCTIONAL_STATE(NewState));
00224 
00225   if (NewState != DISABLE)
00226   {
00227     /* Enable the EWUPx pin */
00228     PWR->CSR |= PWR_WakeUpPin;
00229   }
00230   else
00231   {
00232     /* Disable the EWUPx pin */
00233     PWR->CSR &= ~PWR_WakeUpPin;
00234   }
00235 }
00236 
00237 /**
00238   * @}
00239   */
00240 
00241 
00242 /** @defgroup PWR_Group4 Low Power modes configuration functions
00243  *  @brief   Low Power modes configuration functions 
00244  *
00245 @verbatim   
00246  ===============================================================================
00247               ##### Low Power modes configuration functions #####
00248   ==============================================================================
00249 
00250     [..] The devices feature three low-power modes:
00251     (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running.
00252     (+) Stop mode: all clocks are stopped, regulator running, regulator in low power mode
00253     (+) Standby mode: VCORE domain powered off
00254 
00255   *** Sleep mode *** 
00256   ==================
00257   [..] 
00258     (+) Entry:
00259         (++) The Sleep mode is entered by executing the WFE() or WFI() instructions.
00260     (+) Exit:
00261         (++) Any peripheral interrupt acknowledged by the nested vectored interrupt 
00262              controller (NVIC) can wake up the device from Sleep mode.
00263 
00264   *** Stop mode *** 
00265   =================
00266   [..] In Stop mode, all clocks in the VCORE domain are stopped, the PLL, the HSI,
00267        and the HSE RC oscillators are disabled. Internal SRAM and register 
00268        contents are preserved.
00269        The voltage regulator can be configured either in normal or low-power mode.
00270 
00271     (+) Entry:
00272         (++) The Stop mode is entered using the PWR_EnterSTOPMode(PWR_Regulator_LowPower,) 
00273              function with regulator in LowPower or with Regulator ON.
00274     (+) Exit:
00275         (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode
00276              or any internal IPs (I2C or UASRT) wakeup event.
00277 
00278   *** Standby mode *** 
00279   ====================
00280   [..] The Standby mode allows to achieve the lowest power consumption. It is based 
00281        on the Cortex-M4 deepsleep mode, with the voltage regulator disabled. 
00282        The VCORE domain is consequently powered off. The PLL, the HSI, and the HSE 
00283        oscillator are also switched off. SRAM and register 
00284        contents are lost except for the Backup domain (RTC registers, RTC backup 
00285        registers and Standby circuitry).
00286    
00287   [..] The voltage regulator is OFF.
00288 
00289     (+) Entry:
00290         (++) The Standby mode is entered using the PWR_EnterSTANDBYMode() function.
00291     (+) Exit:
00292         (++) WKUP pin rising edge, RTC alarm (Alarm A and Alarm B), RTC wakeup,
00293              tamper event, time-stamp event, external reset in NRST pin, IWDG reset.
00294 
00295   *** Auto-wakeup (AWU) from low-power mode *** 
00296   =============================================
00297   [..] The MCU can be woken up from low-power mode by an RTC Alarm event, a tamper 
00298        event, a time-stamp event, or a comparator event, without depending on an 
00299        external interrupt (Auto-wakeup mode).
00300 
00301     (+) RTC auto-wakeup (AWU) from the Stop mode
00302         (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to:
00303              (+++) Configure the EXTI Line 17 to be sensitive to rising edges (Interrupt 
00304                    or Event modes) using the EXTI_Init() function.
00305              (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function
00306              (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() 
00307                    and RTC_AlarmCmd() functions.
00308         (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it 
00309              is necessary to:
00310              (+++) Configure the EXTI Line 19 to be sensitive to rising edges (Interrupt 
00311                    or Event modes) using the EXTI_Init() function.
00312              (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() 
00313                    function.
00314              (+++) Configure the RTC to detect the tamper or time stamp event using the
00315                    RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
00316                    functions.
00317 
00318     (+) RTC auto-wakeup (AWU) from the Standby mode
00319         (++) To wake up from the Standby mode with an RTC alarm event, it is necessary to:
00320              (+++) Enable the RTC Alarm Interrupt using the RTC_ITConfig() function.
00321              (+++) Configure the RTC to generate the RTC alarm using the RTC_SetAlarm() 
00322                    and RTC_AlarmCmd() functions.
00323         (++) To wake up from the Standby mode with an RTC Tamper or time stamp event, it 
00324              is necessary to:
00325              (+++) Enable the RTC Tamper or time stamp Interrupt using the RTC_ITConfig() 
00326                    function.
00327              (+++) Configure the RTC to detect the tamper or time stamp event using the
00328                    RTC_TimeStampConfig(), RTC_TamperTriggerConfig() and RTC_TamperCmd()
00329                    functions.
00330 
00331     (+) Comparator auto-wakeup (AWU) from the Stop mode
00332         (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to:
00333              (+++) Configure the correspondent comparator EXTI Line to be sensitive to 
00334                    the selected edges (falling, rising or falling and rising) 
00335                    (Interrupt or Event modes) using the EXTI_Init() function.
00336              (+++) Configure the comparator to generate the event.
00337 
00338 @endverbatim
00339   * @{
00340   */
00341 
00342 /**
00343   * @brief  Enters Sleep mode.
00344   * @note   In Sleep mode, all I/O pins keep the same state as in Run mode.                 
00345   * @param  PWR_SLEEPEntry: specifies if SLEEP mode in entered with WFI or WFE instruction.
00346   *         This parameter can be one of the following values:
00347   *             @arg PWR_SLEEPEntry_WFI: enter SLEEP mode with WFI instruction
00348   *             @arg PWR_SLEEPEntry_WFE: enter SLEEP mode with WFE instruction
00349   * @retval None
00350   */
00351 void PWR_EnterSleepMode(uint8_t PWR_SLEEPEntry)
00352 {
00353   /* Check the parameters */
00354   assert_param(IS_PWR_SLEEP_ENTRY(PWR_SLEEPEntry));
00355   
00356   /* Clear SLEEPDEEP bit of Cortex System Control Register */
00357   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
00358   
00359   /* Select SLEEP mode entry -------------------------------------------------*/
00360   if(PWR_SLEEPEntry == PWR_SLEEPEntry_WFI)
00361   {   
00362     /* Request Wait For Interrupt */
00363     __WFI();
00364   }
00365   else
00366   {
00367     /* Request Wait For Event */
00368     __SEV();
00369     __WFE(); 
00370     __WFE();
00371   }
00372 }
00373 
00374 /**
00375   * @brief  Enters STOP mode.
00376   * @note   In Stop mode, all I/O pins keep the same state as in Run mode.
00377   * @note   When exiting Stop mode by issuing an interrupt or a wakeup event, 
00378   *         the HSI RC oscillator is selected as system clock.
00379   * @note   When the voltage regulator operates in low power mode, an additional 
00380   *         startup delay is incurred when waking up from Stop mode. 
00381   *         By keeping the internal regulator ON during Stop mode, the consumption 
00382   *         is higher although the startup time is reduced.
00383   * @param  PWR_Regulator: specifies the regulator state in STOP mode.
00384   *         This parameter can be one of the following values:
00385   *             @arg PWR_Regulator_ON: STOP mode with regulator ON
00386   *             @arg PWR_Regulator_LowPower: STOP mode with regulator in low power mode
00387   * @param  PWR_STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction.
00388   *         This parameter can be one of the following values:
00389   *             @arg PWR_STOPEntry_WFI: enter STOP mode with WFI instruction
00390   *             @arg PWR_STOPEntry_WFE: enter STOP mode with WFE instruction
00391   * @retval None
00392   */
00393 void PWR_EnterSTOPMode(uint32_t PWR_Regulator, uint8_t PWR_STOPEntry)
00394 {
00395   uint32_t tmpreg = 0;
00396   
00397   /* Check the parameters */
00398   assert_param(IS_PWR_REGULATOR(PWR_Regulator));
00399   assert_param(IS_PWR_STOP_ENTRY(PWR_STOPEntry));
00400   
00401   /* Select the regulator state in STOP mode ---------------------------------*/
00402   tmpreg = PWR->CR;
00403   /* Clear PDDS and LPDSR bits */
00404   tmpreg &= CR_DS_MASK;
00405   
00406   /* Set LPDSR bit according to PWR_Regulator value */
00407   tmpreg |= PWR_Regulator;
00408   
00409   /* Store the new value */
00410   PWR->CR = tmpreg;
00411   
00412   /* Set SLEEPDEEP bit of Cortex System Control Register */
00413   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
00414   
00415   /* Select STOP mode entry --------------------------------------------------*/
00416   if(PWR_STOPEntry == PWR_STOPEntry_WFI)
00417   {   
00418     /* Request Wait For Interrupt */
00419     __WFI();
00420   }
00421   else
00422   {
00423     /* Request Wait For Event */
00424     __WFE();
00425   }
00426   /* Reset SLEEPDEEP bit of Cortex System Control Register */
00427   SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);  
00428 }
00429 
00430 /**
00431   * @brief  Enters STANDBY mode.
00432   * @note   In Standby mode, all I/O pins are high impedance except for:
00433   * @note     Reset pad (still available) 
00434   * @note     RTC_AF1 pin (PC13) if configured for Wakeup pin 2 (WKUP2), tamper, 
00435   *           time-stamp, RTC Alarm out, or RTC clock calibration out.
00436   * @note     WKUP pin 1 (PA0) and WKUP pin 3 (PE6), if enabled.    
00437   * @note The Wakeup flag (WUF) need to be cleared at application level before to call this function.        
00438   * @param  None
00439   * @retval None
00440   */
00441 void PWR_EnterSTANDBYMode(void)
00442 {
00443   /* Select STANDBY mode */
00444   PWR->CR |= PWR_CR_PDDS;
00445   
00446   /* Set SLEEPDEEP bit of Cortex System Control Register */
00447   SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
00448   
00449 /* This option is used to ensure that store operations are completed */
00450 #if defined ( __CC_ARM   )
00451   __force_stores();
00452 #endif
00453   /* Request Wait For Interrupt */
00454   __WFI();
00455 }
00456 
00457 /**
00458   * @}
00459   */
00460 
00461 /** @defgroup PWR_Group5 Flags management functions
00462  *  @brief   Flags management functions 
00463  *
00464 @verbatim   
00465  ===============================================================================
00466                     ##### Flags management functions #####
00467  ===============================================================================  
00468 
00469 @endverbatim
00470   * @{
00471   */
00472 
00473 /**
00474   * @brief  Checks whether the specified PWR flag is set or not.
00475   * @param  PWR_FLAG: specifies the flag to check.
00476   *   This parameter can be one of the following values:
00477   *     @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event 
00478   *       was received from the WKUP pin or from the RTC alarm (Alarm A or Alarm B), 
00479   *       RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
00480   *     @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
00481   *                       resumed from StandBy mode.    
00482   *     @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled 
00483   *       by the PWR_PVDCmd() function.
00484   *     @arg PWR_FLAG_VREFINTRDY: Internal Voltage Reference Ready flag. This 
00485   *       flag indicates the state of the internal voltage reference, VREFINT.
00486   * @retval The new state of PWR_FLAG (SET or RESET).
00487   */
00488 FlagStatus PWR_GetFlagStatus(uint32_t PWR_FLAG)
00489 {
00490   FlagStatus bitstatus = RESET;
00491   /* Check the parameters */
00492   assert_param(IS_PWR_GET_FLAG(PWR_FLAG));
00493   
00494   if ((PWR->CSR & PWR_FLAG) != (uint32_t)RESET)
00495   {
00496     bitstatus = SET;
00497   }
00498   else
00499   {
00500     bitstatus = RESET;
00501   }
00502   /* Return the flag status */
00503   return bitstatus;
00504 }
00505 
00506 /**
00507   * @brief  Clears the PWR's pending flags.
00508   * @param  PWR_FLAG: specifies the flag to clear.
00509   *   This parameter can be one of the following values:
00510   *     @arg PWR_FLAG_WU: Wake Up flag
00511   *     @arg PWR_FLAG_SB: StandBy flag
00512   * @retval None
00513   */
00514 void PWR_ClearFlag(uint32_t PWR_FLAG)
00515 {
00516   /* Check the parameters */
00517   assert_param(IS_PWR_CLEAR_FLAG(PWR_FLAG));
00518          
00519   PWR->CR |=  PWR_FLAG << 2;
00520 }
00521 
00522 /**
00523   * @}
00524   */
00525 
00526 /**
00527   * @}
00528   */
00529 
00530 /**
00531   * @}
00532   */
00533 
00534 /**
00535   * @}
00536   */
00537 
00538 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/